host.c 6.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * host.c - ChipIdea USB host controller driver
  4. *
  5. * Copyright (c) 2012 Intel Corporation
  6. *
  7. * Author: Alexander Shishkin
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/io.h>
  11. #include <linux/usb.h>
  12. #include <linux/usb/hcd.h>
  13. #include <linux/usb/chipidea.h>
  14. #include <linux/regulator/consumer.h>
  15. #include "../host/ehci.h"
  16. #include "ci.h"
  17. #include "bits.h"
  18. #include "host.h"
  19. static struct hc_driver __read_mostly ci_ehci_hc_driver;
  20. static int (*orig_bus_suspend)(struct usb_hcd *hcd);
  21. struct ehci_ci_priv {
  22. struct regulator *reg_vbus;
  23. };
  24. static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
  25. {
  26. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  27. struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
  28. struct device *dev = hcd->self.controller;
  29. struct ci_hdrc *ci = dev_get_drvdata(dev);
  30. int ret = 0;
  31. int port = HCS_N_PORTS(ehci->hcs_params);
  32. if (priv->reg_vbus) {
  33. if (port > 1) {
  34. dev_warn(dev,
  35. "Not support multi-port regulator control\n");
  36. return 0;
  37. }
  38. if (enable)
  39. ret = regulator_enable(priv->reg_vbus);
  40. else
  41. ret = regulator_disable(priv->reg_vbus);
  42. if (ret) {
  43. dev_err(dev,
  44. "Failed to %s vbus regulator, ret=%d\n",
  45. enable ? "enable" : "disable", ret);
  46. return ret;
  47. }
  48. }
  49. if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
  50. /*
  51. * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
  52. * As HSIC is always HS, this should be safe for others.
  53. */
  54. hw_port_test_set(ci, 5);
  55. hw_port_test_set(ci, 0);
  56. }
  57. return 0;
  58. };
  59. static int ehci_ci_reset(struct usb_hcd *hcd)
  60. {
  61. struct device *dev = hcd->self.controller;
  62. struct ci_hdrc *ci = dev_get_drvdata(dev);
  63. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  64. int ret;
  65. ret = ehci_setup(hcd);
  66. if (ret)
  67. return ret;
  68. ehci->need_io_watchdog = 0;
  69. if (ci->platdata->notify_event) {
  70. ret = ci->platdata->notify_event(ci,
  71. CI_HDRC_CONTROLLER_RESET_EVENT);
  72. if (ret)
  73. return ret;
  74. }
  75. ci_platform_configure(ci);
  76. return ret;
  77. }
  78. static const struct ehci_driver_overrides ehci_ci_overrides = {
  79. .extra_priv_size = sizeof(struct ehci_ci_priv),
  80. .port_power = ehci_ci_portpower,
  81. .reset = ehci_ci_reset,
  82. };
  83. static irqreturn_t host_irq(struct ci_hdrc *ci)
  84. {
  85. return usb_hcd_irq(ci->irq, ci->hcd);
  86. }
  87. static int host_start(struct ci_hdrc *ci)
  88. {
  89. struct usb_hcd *hcd;
  90. struct ehci_hcd *ehci;
  91. struct ehci_ci_priv *priv;
  92. int ret;
  93. if (usb_disabled())
  94. return -ENODEV;
  95. hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
  96. ci->dev, dev_name(ci->dev), NULL);
  97. if (!hcd)
  98. return -ENOMEM;
  99. dev_set_drvdata(ci->dev, ci);
  100. hcd->rsrc_start = ci->hw_bank.phys;
  101. hcd->rsrc_len = ci->hw_bank.size;
  102. hcd->regs = ci->hw_bank.abs;
  103. hcd->has_tt = 1;
  104. hcd->power_budget = ci->platdata->power_budget;
  105. hcd->tpl_support = ci->platdata->tpl_support;
  106. if (ci->phy || ci->usb_phy) {
  107. hcd->skip_phy_initialization = 1;
  108. if (ci->usb_phy)
  109. hcd->usb_phy = ci->usb_phy;
  110. }
  111. ehci = hcd_to_ehci(hcd);
  112. ehci->caps = ci->hw_bank.cap;
  113. ehci->has_hostpc = ci->hw_bank.lpm;
  114. ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
  115. ehci->imx28_write_fix = ci->imx28_write_fix;
  116. priv = (struct ehci_ci_priv *)ehci->priv;
  117. priv->reg_vbus = NULL;
  118. if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
  119. if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
  120. ret = regulator_enable(ci->platdata->reg_vbus);
  121. if (ret) {
  122. dev_err(ci->dev,
  123. "Failed to enable vbus regulator, ret=%d\n",
  124. ret);
  125. goto put_hcd;
  126. }
  127. } else {
  128. priv->reg_vbus = ci->platdata->reg_vbus;
  129. }
  130. }
  131. ret = usb_add_hcd(hcd, 0, 0);
  132. if (ret) {
  133. goto disable_reg;
  134. } else {
  135. struct usb_otg *otg = &ci->otg;
  136. ci->hcd = hcd;
  137. if (ci_otg_is_fsm_mode(ci)) {
  138. otg->host = &hcd->self;
  139. hcd->self.otg_port = 1;
  140. }
  141. }
  142. return ret;
  143. disable_reg:
  144. if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
  145. (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
  146. regulator_disable(ci->platdata->reg_vbus);
  147. put_hcd:
  148. usb_put_hcd(hcd);
  149. return ret;
  150. }
  151. static void host_stop(struct ci_hdrc *ci)
  152. {
  153. struct usb_hcd *hcd = ci->hcd;
  154. if (hcd) {
  155. if (ci->platdata->notify_event)
  156. ci->platdata->notify_event(ci,
  157. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  158. usb_remove_hcd(hcd);
  159. ci->role = CI_ROLE_END;
  160. synchronize_irq(ci->irq);
  161. usb_put_hcd(hcd);
  162. if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
  163. (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
  164. regulator_disable(ci->platdata->reg_vbus);
  165. }
  166. ci->hcd = NULL;
  167. ci->otg.host = NULL;
  168. }
  169. void ci_hdrc_host_destroy(struct ci_hdrc *ci)
  170. {
  171. if (ci->role == CI_ROLE_HOST && ci->hcd)
  172. host_stop(ci);
  173. }
  174. static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
  175. {
  176. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  177. int port;
  178. u32 tmp;
  179. int ret = orig_bus_suspend(hcd);
  180. if (ret)
  181. return ret;
  182. port = HCS_N_PORTS(ehci->hcs_params);
  183. while (port--) {
  184. u32 __iomem *reg = &ehci->regs->port_status[port];
  185. u32 portsc = ehci_readl(ehci, reg);
  186. if (portsc & PORT_CONNECT) {
  187. /*
  188. * For chipidea, the resume signal will be ended
  189. * automatically, so for remote wakeup case, the
  190. * usbcmd.rs may not be set before the resume has
  191. * ended if other resume paths consumes too much
  192. * time (~24ms), in that case, the SOF will not
  193. * send out within 3ms after resume ends, then the
  194. * high speed device will enter full speed mode.
  195. */
  196. tmp = ehci_readl(ehci, &ehci->regs->command);
  197. tmp |= CMD_RUN;
  198. ehci_writel(ehci, tmp, &ehci->regs->command);
  199. /*
  200. * It needs a short delay between set RS bit and PHCD.
  201. */
  202. usleep_range(150, 200);
  203. break;
  204. }
  205. }
  206. return 0;
  207. }
  208. int ci_hdrc_host_init(struct ci_hdrc *ci)
  209. {
  210. struct ci_role_driver *rdrv;
  211. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
  212. return -ENXIO;
  213. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  214. if (!rdrv)
  215. return -ENOMEM;
  216. rdrv->start = host_start;
  217. rdrv->stop = host_stop;
  218. rdrv->irq = host_irq;
  219. rdrv->name = "host";
  220. ci->roles[CI_ROLE_HOST] = rdrv;
  221. return 0;
  222. }
  223. void ci_hdrc_host_driver_init(void)
  224. {
  225. ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
  226. orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
  227. ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
  228. }