8250_mtk.c 7.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Mediatek 8250 driver.
  4. *
  5. * Copyright (c) 2014 MundoReader S.L.
  6. * Author: Matthias Brugger <matthias.bgg@gmail.com>
  7. */
  8. #include <linux/clk.h>
  9. #include <linux/io.h>
  10. #include <linux/module.h>
  11. #include <linux/of_irq.h>
  12. #include <linux/of_platform.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/pm_runtime.h>
  15. #include <linux/serial_8250.h>
  16. #include <linux/serial_reg.h>
  17. #include "8250.h"
  18. #define UART_MTK_HIGHS 0x09 /* Highspeed register */
  19. #define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */
  20. #define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */
  21. #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */
  22. struct mtk8250_data {
  23. int line;
  24. struct clk *uart_clk;
  25. struct clk *bus_clk;
  26. };
  27. static void
  28. mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
  29. struct ktermios *old)
  30. {
  31. struct uart_8250_port *up = up_to_u8250p(port);
  32. unsigned long flags;
  33. unsigned int baud, quot;
  34. serial8250_do_set_termios(port, termios, old);
  35. /*
  36. * Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS)
  37. *
  38. * We need to recalcualte the quot register, as the claculation depends
  39. * on the vaule in the highspeed register.
  40. *
  41. * Some baudrates are not supported by the chip, so we use the next
  42. * lower rate supported and update termios c_flag.
  43. *
  44. * If highspeed register is set to 3, we need to specify sample count
  45. * and sample point to increase accuracy. If not, we reset the
  46. * registers to their default values.
  47. */
  48. baud = uart_get_baud_rate(port, termios, old,
  49. port->uartclk / 16 / UART_DIV_MAX,
  50. port->uartclk);
  51. if (baud <= 115200) {
  52. serial_port_out(port, UART_MTK_HIGHS, 0x0);
  53. quot = uart_get_divisor(port, baud);
  54. } else if (baud <= 576000) {
  55. serial_port_out(port, UART_MTK_HIGHS, 0x2);
  56. /* Set to next lower baudrate supported */
  57. if ((baud == 500000) || (baud == 576000))
  58. baud = 460800;
  59. quot = DIV_ROUND_UP(port->uartclk, 4 * baud);
  60. } else {
  61. serial_port_out(port, UART_MTK_HIGHS, 0x3);
  62. quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
  63. }
  64. /*
  65. * Ok, we're now changing the port state. Do it with
  66. * interrupts disabled.
  67. */
  68. spin_lock_irqsave(&port->lock, flags);
  69. /* set DLAB we have cval saved in up->lcr from the call to the core */
  70. serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
  71. serial_dl_write(up, quot);
  72. /* reset DLAB */
  73. serial_port_out(port, UART_LCR, up->lcr);
  74. if (baud > 460800) {
  75. unsigned int tmp;
  76. tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud);
  77. serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1);
  78. serial_port_out(port, UART_MTK_SAMPLE_POINT,
  79. (tmp - 2) >> 1);
  80. } else {
  81. serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00);
  82. serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff);
  83. }
  84. spin_unlock_irqrestore(&port->lock, flags);
  85. /* Don't rewrite B0 */
  86. if (tty_termios_baud_rate(termios))
  87. tty_termios_encode_baud_rate(termios, baud, baud);
  88. }
  89. static int __maybe_unused mtk8250_runtime_suspend(struct device *dev)
  90. {
  91. struct mtk8250_data *data = dev_get_drvdata(dev);
  92. clk_disable_unprepare(data->uart_clk);
  93. clk_disable_unprepare(data->bus_clk);
  94. return 0;
  95. }
  96. static int __maybe_unused mtk8250_runtime_resume(struct device *dev)
  97. {
  98. struct mtk8250_data *data = dev_get_drvdata(dev);
  99. int err;
  100. err = clk_prepare_enable(data->uart_clk);
  101. if (err) {
  102. dev_warn(dev, "Can't enable clock\n");
  103. return err;
  104. }
  105. err = clk_prepare_enable(data->bus_clk);
  106. if (err) {
  107. dev_warn(dev, "Can't enable bus clock\n");
  108. return err;
  109. }
  110. return 0;
  111. }
  112. static void
  113. mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
  114. {
  115. if (!state)
  116. pm_runtime_get_sync(port->dev);
  117. serial8250_do_pm(port, state, old);
  118. if (state)
  119. pm_runtime_put_sync_suspend(port->dev);
  120. }
  121. static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
  122. struct mtk8250_data *data)
  123. {
  124. data->uart_clk = devm_clk_get(&pdev->dev, "baud");
  125. if (IS_ERR(data->uart_clk)) {
  126. /*
  127. * For compatibility with older device trees try unnamed
  128. * clk when no baud clk can be found.
  129. */
  130. data->uart_clk = devm_clk_get(&pdev->dev, NULL);
  131. if (IS_ERR(data->uart_clk)) {
  132. dev_warn(&pdev->dev, "Can't get uart clock\n");
  133. return PTR_ERR(data->uart_clk);
  134. }
  135. return 0;
  136. }
  137. data->bus_clk = devm_clk_get(&pdev->dev, "bus");
  138. return PTR_ERR_OR_ZERO(data->bus_clk);
  139. }
  140. static int mtk8250_probe(struct platform_device *pdev)
  141. {
  142. struct uart_8250_port uart = {};
  143. struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  144. struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  145. struct mtk8250_data *data;
  146. int err;
  147. if (!regs || !irq) {
  148. dev_err(&pdev->dev, "no registers/irq defined\n");
  149. return -EINVAL;
  150. }
  151. uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
  152. resource_size(regs));
  153. if (!uart.port.membase)
  154. return -ENOMEM;
  155. data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
  156. if (!data)
  157. return -ENOMEM;
  158. if (pdev->dev.of_node) {
  159. err = mtk8250_probe_of(pdev, &uart.port, data);
  160. if (err)
  161. return err;
  162. } else
  163. return -ENODEV;
  164. spin_lock_init(&uart.port.lock);
  165. uart.port.mapbase = regs->start;
  166. uart.port.irq = irq->start;
  167. uart.port.pm = mtk8250_do_pm;
  168. uart.port.type = PORT_16550;
  169. uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
  170. uart.port.dev = &pdev->dev;
  171. uart.port.iotype = UPIO_MEM32;
  172. uart.port.regshift = 2;
  173. uart.port.private_data = data;
  174. uart.port.set_termios = mtk8250_set_termios;
  175. uart.port.uartclk = clk_get_rate(data->uart_clk);
  176. /* Disable Rate Fix function */
  177. writel(0x0, uart.port.membase +
  178. (MTK_UART_RATE_FIX << uart.port.regshift));
  179. platform_set_drvdata(pdev, data);
  180. pm_runtime_enable(&pdev->dev);
  181. if (!pm_runtime_enabled(&pdev->dev)) {
  182. err = mtk8250_runtime_resume(&pdev->dev);
  183. if (err)
  184. return err;
  185. }
  186. data->line = serial8250_register_8250_port(&uart);
  187. if (data->line < 0)
  188. return data->line;
  189. return 0;
  190. }
  191. static int mtk8250_remove(struct platform_device *pdev)
  192. {
  193. struct mtk8250_data *data = platform_get_drvdata(pdev);
  194. pm_runtime_get_sync(&pdev->dev);
  195. serial8250_unregister_port(data->line);
  196. pm_runtime_disable(&pdev->dev);
  197. pm_runtime_put_noidle(&pdev->dev);
  198. if (!pm_runtime_status_suspended(&pdev->dev))
  199. mtk8250_runtime_suspend(&pdev->dev);
  200. return 0;
  201. }
  202. static int __maybe_unused mtk8250_suspend(struct device *dev)
  203. {
  204. struct mtk8250_data *data = dev_get_drvdata(dev);
  205. serial8250_suspend_port(data->line);
  206. return 0;
  207. }
  208. static int __maybe_unused mtk8250_resume(struct device *dev)
  209. {
  210. struct mtk8250_data *data = dev_get_drvdata(dev);
  211. serial8250_resume_port(data->line);
  212. return 0;
  213. }
  214. static const struct dev_pm_ops mtk8250_pm_ops = {
  215. SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
  216. SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
  217. NULL)
  218. };
  219. static const struct of_device_id mtk8250_of_match[] = {
  220. { .compatible = "mediatek,mt6577-uart" },
  221. { /* Sentinel */ }
  222. };
  223. MODULE_DEVICE_TABLE(of, mtk8250_of_match);
  224. static struct platform_driver mtk8250_platform_driver = {
  225. .driver = {
  226. .name = "mt6577-uart",
  227. .pm = &mtk8250_pm_ops,
  228. .of_match_table = mtk8250_of_match,
  229. },
  230. .probe = mtk8250_probe,
  231. .remove = mtk8250_remove,
  232. };
  233. module_platform_driver(mtk8250_platform_driver);
  234. #ifdef CONFIG_SERIAL_8250_CONSOLE
  235. static int __init early_mtk8250_setup(struct earlycon_device *device,
  236. const char *options)
  237. {
  238. if (!device->port.membase)
  239. return -ENODEV;
  240. device->port.iotype = UPIO_MEM32;
  241. return early_serial8250_setup(device, NULL);
  242. }
  243. OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);
  244. #endif
  245. MODULE_AUTHOR("Matthias Brugger");
  246. MODULE_LICENSE("GPL");
  247. MODULE_DESCRIPTION("Mediatek 8250 serial port driver");