8250_mid.c 9.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
  4. *
  5. * Copyright (C) 2015 Intel Corporation
  6. * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
  7. */
  8. #include <linux/bitops.h>
  9. #include <linux/module.h>
  10. #include <linux/pci.h>
  11. #include <linux/rational.h>
  12. #include <linux/dma/hsu.h>
  13. #include <linux/8250_pci.h>
  14. #include "8250.h"
  15. #define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b
  16. #define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c
  17. #define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d
  18. #define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191
  19. #define PCI_DEVICE_ID_INTEL_CDF_UART 0x18d8
  20. #define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8
  21. /* Intel MID Specific registers */
  22. #define INTEL_MID_UART_FISR 0x08
  23. #define INTEL_MID_UART_PS 0x30
  24. #define INTEL_MID_UART_MUL 0x34
  25. #define INTEL_MID_UART_DIV 0x38
  26. struct mid8250;
  27. struct mid8250_board {
  28. unsigned int flags;
  29. unsigned long freq;
  30. unsigned int base_baud;
  31. int (*setup)(struct mid8250 *, struct uart_port *p);
  32. void (*exit)(struct mid8250 *);
  33. };
  34. struct mid8250 {
  35. int line;
  36. int dma_index;
  37. struct pci_dev *dma_dev;
  38. struct uart_8250_dma dma;
  39. struct mid8250_board *board;
  40. struct hsu_dma_chip dma_chip;
  41. };
  42. /*****************************************************************************/
  43. static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
  44. {
  45. struct pci_dev *pdev = to_pci_dev(p->dev);
  46. switch (pdev->device) {
  47. case PCI_DEVICE_ID_INTEL_PNW_UART1:
  48. mid->dma_index = 0;
  49. break;
  50. case PCI_DEVICE_ID_INTEL_PNW_UART2:
  51. mid->dma_index = 1;
  52. break;
  53. case PCI_DEVICE_ID_INTEL_PNW_UART3:
  54. mid->dma_index = 2;
  55. break;
  56. default:
  57. return -EINVAL;
  58. }
  59. mid->dma_dev = pci_get_slot(pdev->bus,
  60. PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
  61. return 0;
  62. }
  63. static int tng_handle_irq(struct uart_port *p)
  64. {
  65. struct mid8250 *mid = p->private_data;
  66. struct uart_8250_port *up = up_to_u8250p(p);
  67. struct hsu_dma_chip *chip;
  68. u32 status;
  69. int ret = 0;
  70. int err;
  71. chip = pci_get_drvdata(mid->dma_dev);
  72. /* Rx DMA */
  73. err = hsu_dma_get_status(chip, mid->dma_index * 2 + 1, &status);
  74. if (err > 0) {
  75. serial8250_rx_dma_flush(up);
  76. ret |= 1;
  77. } else if (err == 0)
  78. ret |= hsu_dma_do_irq(chip, mid->dma_index * 2 + 1, status);
  79. /* Tx DMA */
  80. err = hsu_dma_get_status(chip, mid->dma_index * 2, &status);
  81. if (err > 0)
  82. ret |= 1;
  83. else if (err == 0)
  84. ret |= hsu_dma_do_irq(chip, mid->dma_index * 2, status);
  85. /* UART */
  86. ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
  87. return IRQ_RETVAL(ret);
  88. }
  89. static int tng_setup(struct mid8250 *mid, struct uart_port *p)
  90. {
  91. struct pci_dev *pdev = to_pci_dev(p->dev);
  92. int index = PCI_FUNC(pdev->devfn);
  93. /*
  94. * Device 0000:00:04.0 is not a real HSU port. It provides a global
  95. * register set for all HSU ports, although it has the same PCI ID.
  96. * Skip it here.
  97. */
  98. if (index-- == 0)
  99. return -ENODEV;
  100. mid->dma_index = index;
  101. mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
  102. p->handle_irq = tng_handle_irq;
  103. return 0;
  104. }
  105. static int dnv_handle_irq(struct uart_port *p)
  106. {
  107. struct mid8250 *mid = p->private_data;
  108. struct uart_8250_port *up = up_to_u8250p(p);
  109. unsigned int fisr = serial_port_in(p, INTEL_MID_UART_FISR);
  110. u32 status;
  111. int ret = 0;
  112. int err;
  113. if (fisr & BIT(2)) {
  114. err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
  115. if (err > 0) {
  116. serial8250_rx_dma_flush(up);
  117. ret |= 1;
  118. } else if (err == 0)
  119. ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status);
  120. }
  121. if (fisr & BIT(1)) {
  122. err = hsu_dma_get_status(&mid->dma_chip, 0, &status);
  123. if (err > 0)
  124. ret |= 1;
  125. else if (err == 0)
  126. ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status);
  127. }
  128. if (fisr & BIT(0))
  129. ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
  130. return IRQ_RETVAL(ret);
  131. }
  132. #define DNV_DMA_CHAN_OFFSET 0x80
  133. static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
  134. {
  135. struct hsu_dma_chip *chip = &mid->dma_chip;
  136. struct pci_dev *pdev = to_pci_dev(p->dev);
  137. unsigned int bar = FL_GET_BASE(mid->board->flags);
  138. int ret;
  139. pci_set_master(pdev);
  140. ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
  141. if (ret < 0)
  142. return ret;
  143. p->irq = pci_irq_vector(pdev, 0);
  144. chip->dev = &pdev->dev;
  145. chip->irq = pci_irq_vector(pdev, 0);
  146. chip->regs = p->membase;
  147. chip->length = pci_resource_len(pdev, bar);
  148. chip->offset = DNV_DMA_CHAN_OFFSET;
  149. /* Falling back to PIO mode if DMA probing fails */
  150. ret = hsu_dma_probe(chip);
  151. if (ret)
  152. return 0;
  153. mid->dma_dev = pdev;
  154. p->handle_irq = dnv_handle_irq;
  155. return 0;
  156. }
  157. static void dnv_exit(struct mid8250 *mid)
  158. {
  159. if (!mid->dma_dev)
  160. return;
  161. hsu_dma_remove(&mid->dma_chip);
  162. }
  163. /*****************************************************************************/
  164. static void mid8250_set_termios(struct uart_port *p,
  165. struct ktermios *termios,
  166. struct ktermios *old)
  167. {
  168. unsigned int baud = tty_termios_baud_rate(termios);
  169. struct mid8250 *mid = p->private_data;
  170. unsigned short ps = 16;
  171. unsigned long fuart = baud * ps;
  172. unsigned long w = BIT(24) - 1;
  173. unsigned long mul, div;
  174. /* Gracefully handle the B0 case: fall back to B9600 */
  175. fuart = fuart ? fuart : 9600 * 16;
  176. if (mid->board->freq < fuart) {
  177. /* Find prescaler value that satisfies Fuart < Fref */
  178. if (mid->board->freq > baud)
  179. ps = mid->board->freq / baud; /* baud rate too high */
  180. else
  181. ps = 1; /* PLL case */
  182. fuart = baud * ps;
  183. } else {
  184. /* Get Fuart closer to Fref */
  185. fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
  186. }
  187. rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
  188. p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */
  189. writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */
  190. writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */
  191. writel(div, p->membase + INTEL_MID_UART_DIV);
  192. serial8250_do_set_termios(p, termios, old);
  193. }
  194. static bool mid8250_dma_filter(struct dma_chan *chan, void *param)
  195. {
  196. struct hsu_dma_slave *s = param;
  197. if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
  198. return false;
  199. chan->private = s;
  200. return true;
  201. }
  202. static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port)
  203. {
  204. struct uart_8250_dma *dma = &mid->dma;
  205. struct device *dev = port->port.dev;
  206. struct hsu_dma_slave *rx_param;
  207. struct hsu_dma_slave *tx_param;
  208. if (!mid->dma_dev)
  209. return 0;
  210. rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
  211. if (!rx_param)
  212. return -ENOMEM;
  213. tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
  214. if (!tx_param)
  215. return -ENOMEM;
  216. rx_param->chan_id = mid->dma_index * 2 + 1;
  217. tx_param->chan_id = mid->dma_index * 2;
  218. dma->rxconf.src_maxburst = 64;
  219. dma->txconf.dst_maxburst = 64;
  220. rx_param->dma_dev = &mid->dma_dev->dev;
  221. tx_param->dma_dev = &mid->dma_dev->dev;
  222. dma->fn = mid8250_dma_filter;
  223. dma->rx_param = rx_param;
  224. dma->tx_param = tx_param;
  225. port->dma = dma;
  226. return 0;
  227. }
  228. static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  229. {
  230. struct uart_8250_port uart;
  231. struct mid8250 *mid;
  232. unsigned int bar;
  233. int ret;
  234. ret = pcim_enable_device(pdev);
  235. if (ret)
  236. return ret;
  237. mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
  238. if (!mid)
  239. return -ENOMEM;
  240. mid->board = (struct mid8250_board *)id->driver_data;
  241. bar = FL_GET_BASE(mid->board->flags);
  242. memset(&uart, 0, sizeof(struct uart_8250_port));
  243. uart.port.dev = &pdev->dev;
  244. uart.port.irq = pdev->irq;
  245. uart.port.private_data = mid;
  246. uart.port.type = PORT_16750;
  247. uart.port.iotype = UPIO_MEM;
  248. uart.port.uartclk = mid->board->base_baud * 16;
  249. uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
  250. uart.port.set_termios = mid8250_set_termios;
  251. uart.port.mapbase = pci_resource_start(pdev, bar);
  252. uart.port.membase = pcim_iomap(pdev, bar, 0);
  253. if (!uart.port.membase)
  254. return -ENOMEM;
  255. if (mid->board->setup) {
  256. ret = mid->board->setup(mid, &uart.port);
  257. if (ret)
  258. return ret;
  259. }
  260. ret = mid8250_dma_setup(mid, &uart);
  261. if (ret)
  262. goto err;
  263. ret = serial8250_register_8250_port(&uart);
  264. if (ret < 0)
  265. goto err;
  266. mid->line = ret;
  267. pci_set_drvdata(pdev, mid);
  268. return 0;
  269. err:
  270. if (mid->board->exit)
  271. mid->board->exit(mid);
  272. return ret;
  273. }
  274. static void mid8250_remove(struct pci_dev *pdev)
  275. {
  276. struct mid8250 *mid = pci_get_drvdata(pdev);
  277. serial8250_unregister_port(mid->line);
  278. if (mid->board->exit)
  279. mid->board->exit(mid);
  280. }
  281. static const struct mid8250_board pnw_board = {
  282. .flags = FL_BASE0,
  283. .freq = 50000000,
  284. .base_baud = 115200,
  285. .setup = pnw_setup,
  286. };
  287. static const struct mid8250_board tng_board = {
  288. .flags = FL_BASE0,
  289. .freq = 38400000,
  290. .base_baud = 1843200,
  291. .setup = tng_setup,
  292. };
  293. static const struct mid8250_board dnv_board = {
  294. .flags = FL_BASE1,
  295. .freq = 133333333,
  296. .base_baud = 115200,
  297. .setup = dnv_setup,
  298. .exit = dnv_exit,
  299. };
  300. #define MID_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board }
  301. static const struct pci_device_id pci_ids[] = {
  302. MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART1, pnw_board),
  303. MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART2, pnw_board),
  304. MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART3, pnw_board),
  305. MID_DEVICE(PCI_DEVICE_ID_INTEL_TNG_UART, tng_board),
  306. MID_DEVICE(PCI_DEVICE_ID_INTEL_CDF_UART, dnv_board),
  307. MID_DEVICE(PCI_DEVICE_ID_INTEL_DNV_UART, dnv_board),
  308. { },
  309. };
  310. MODULE_DEVICE_TABLE(pci, pci_ids);
  311. static struct pci_driver mid8250_pci_driver = {
  312. .name = "8250_mid",
  313. .id_table = pci_ids,
  314. .probe = mid8250_probe,
  315. .remove = mid8250_remove,
  316. };
  317. module_pci_driver(mid8250_pci_driver);
  318. MODULE_AUTHOR("Intel Corporation");
  319. MODULE_LICENSE("GPL v2");
  320. MODULE_DESCRIPTION("Intel MID UART driver");