oradax.c 27 KB

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  1. /*
  2. * Copyright (c) 2017, Oracle and/or its affiliates. All rights reserved.
  3. *
  4. * This program is free software: you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation, either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. /*
  18. * Oracle Data Analytics Accelerator (DAX)
  19. *
  20. * DAX is a coprocessor which resides on the SPARC M7 (DAX1) and M8
  21. * (DAX2) processor chips, and has direct access to the CPU's L3
  22. * caches as well as physical memory. It can perform several
  23. * operations on data streams with various input and output formats.
  24. * The driver provides a transport mechanism only and has limited
  25. * knowledge of the various opcodes and data formats. A user space
  26. * library provides high level services and translates these into low
  27. * level commands which are then passed into the driver and
  28. * subsequently the hypervisor and the coprocessor. The library is
  29. * the recommended way for applications to use the coprocessor, and
  30. * the driver interface is not intended for general use.
  31. *
  32. * See Documentation/sparc/oradax/oracle-dax.txt for more details.
  33. */
  34. #include <linux/uaccess.h>
  35. #include <linux/module.h>
  36. #include <linux/delay.h>
  37. #include <linux/cdev.h>
  38. #include <linux/slab.h>
  39. #include <linux/mm.h>
  40. #include <asm/hypervisor.h>
  41. #include <asm/mdesc.h>
  42. #include <asm/oradax.h>
  43. MODULE_LICENSE("GPL");
  44. MODULE_DESCRIPTION("Driver for Oracle Data Analytics Accelerator");
  45. #define DAX_DBG_FLG_BASIC 0x01
  46. #define DAX_DBG_FLG_STAT 0x02
  47. #define DAX_DBG_FLG_INFO 0x04
  48. #define DAX_DBG_FLG_ALL 0xff
  49. #define dax_err(fmt, ...) pr_err("%s: " fmt "\n", __func__, ##__VA_ARGS__)
  50. #define dax_info(fmt, ...) pr_info("%s: " fmt "\n", __func__, ##__VA_ARGS__)
  51. #define dax_dbg(fmt, ...) do { \
  52. if (dax_debug & DAX_DBG_FLG_BASIC)\
  53. dax_info(fmt, ##__VA_ARGS__); \
  54. } while (0)
  55. #define dax_stat_dbg(fmt, ...) do { \
  56. if (dax_debug & DAX_DBG_FLG_STAT) \
  57. dax_info(fmt, ##__VA_ARGS__); \
  58. } while (0)
  59. #define dax_info_dbg(fmt, ...) do { \
  60. if (dax_debug & DAX_DBG_FLG_INFO) \
  61. dax_info(fmt, ##__VA_ARGS__); \
  62. } while (0)
  63. #define DAX1_MINOR 1
  64. #define DAX1_MAJOR 1
  65. #define DAX2_MINOR 0
  66. #define DAX2_MAJOR 2
  67. #define DAX1_STR "ORCL,sun4v-dax"
  68. #define DAX2_STR "ORCL,sun4v-dax2"
  69. #define DAX_CA_ELEMS (DAX_MMAP_LEN / sizeof(struct dax_cca))
  70. #define DAX_CCB_USEC 100
  71. #define DAX_CCB_RETRIES 10000
  72. /* stream types */
  73. enum {
  74. OUT,
  75. PRI,
  76. SEC,
  77. TBL,
  78. NUM_STREAM_TYPES
  79. };
  80. /* completion status */
  81. #define CCA_STAT_NOT_COMPLETED 0
  82. #define CCA_STAT_COMPLETED 1
  83. #define CCA_STAT_FAILED 2
  84. #define CCA_STAT_KILLED 3
  85. #define CCA_STAT_NOT_RUN 4
  86. #define CCA_STAT_PIPE_OUT 5
  87. #define CCA_STAT_PIPE_SRC 6
  88. #define CCA_STAT_PIPE_DST 7
  89. /* completion err */
  90. #define CCA_ERR_SUCCESS 0x0 /* no error */
  91. #define CCA_ERR_OVERFLOW 0x1 /* buffer overflow */
  92. #define CCA_ERR_DECODE 0x2 /* CCB decode error */
  93. #define CCA_ERR_PAGE_OVERFLOW 0x3 /* page overflow */
  94. #define CCA_ERR_KILLED 0x7 /* command was killed */
  95. #define CCA_ERR_TIMEOUT 0x8 /* Timeout */
  96. #define CCA_ERR_ADI 0x9 /* ADI error */
  97. #define CCA_ERR_DATA_FMT 0xA /* data format error */
  98. #define CCA_ERR_OTHER_NO_RETRY 0xE /* Other error, do not retry */
  99. #define CCA_ERR_OTHER_RETRY 0xF /* Other error, retry */
  100. #define CCA_ERR_PARTIAL_SYMBOL 0x80 /* QP partial symbol warning */
  101. /* CCB address types */
  102. #define DAX_ADDR_TYPE_NONE 0
  103. #define DAX_ADDR_TYPE_VA_ALT 1 /* secondary context */
  104. #define DAX_ADDR_TYPE_RA 2 /* real address */
  105. #define DAX_ADDR_TYPE_VA 3 /* virtual address */
  106. /* dax_header_t opcode */
  107. #define DAX_OP_SYNC_NOP 0x0
  108. #define DAX_OP_EXTRACT 0x1
  109. #define DAX_OP_SCAN_VALUE 0x2
  110. #define DAX_OP_SCAN_RANGE 0x3
  111. #define DAX_OP_TRANSLATE 0x4
  112. #define DAX_OP_SELECT 0x5
  113. #define DAX_OP_INVERT 0x10 /* OR with translate, scan opcodes */
  114. struct dax_header {
  115. u32 ccb_version:4; /* 31:28 CCB Version */
  116. /* 27:24 Sync Flags */
  117. u32 pipe:1; /* Pipeline */
  118. u32 longccb:1; /* Longccb. Set for scan with lu2, lu3, lu4. */
  119. u32 cond:1; /* Conditional */
  120. u32 serial:1; /* Serial */
  121. u32 opcode:8; /* 23:16 Opcode */
  122. /* 15:0 Address Type. */
  123. u32 reserved:3; /* 15:13 reserved */
  124. u32 table_addr_type:2; /* 12:11 Huffman Table Address Type */
  125. u32 out_addr_type:3; /* 10:8 Destination Address Type */
  126. u32 sec_addr_type:3; /* 7:5 Secondary Source Address Type */
  127. u32 pri_addr_type:3; /* 4:2 Primary Source Address Type */
  128. u32 cca_addr_type:2; /* 1:0 Completion Address Type */
  129. };
  130. struct dax_control {
  131. u32 pri_fmt:4; /* 31:28 Primary Input Format */
  132. u32 pri_elem_size:5; /* 27:23 Primary Input Element Size(less1) */
  133. u32 pri_offset:3; /* 22:20 Primary Input Starting Offset */
  134. u32 sec_encoding:1; /* 19 Secondary Input Encoding */
  135. /* (must be 0 for Select) */
  136. u32 sec_offset:3; /* 18:16 Secondary Input Starting Offset */
  137. u32 sec_elem_size:2; /* 15:14 Secondary Input Element Size */
  138. /* (must be 0 for Select) */
  139. u32 out_fmt:2; /* 13:12 Output Format */
  140. u32 out_elem_size:2; /* 11:10 Output Element Size */
  141. u32 misc:10; /* 9:0 Opcode specific info */
  142. };
  143. struct dax_data_access {
  144. u64 flow_ctrl:2; /* 63:62 Flow Control Type */
  145. u64 pipe_target:2; /* 61:60 Pipeline Target */
  146. u64 out_buf_size:20; /* 59:40 Output Buffer Size */
  147. /* (cachelines less 1) */
  148. u64 unused1:8; /* 39:32 Reserved, Set to 0 */
  149. u64 out_alloc:5; /* 31:27 Output Allocation */
  150. u64 unused2:1; /* 26 Reserved */
  151. u64 pri_len_fmt:2; /* 25:24 Input Length Format */
  152. u64 pri_len:24; /* 23:0 Input Element/Byte/Bit Count */
  153. /* (less 1) */
  154. };
  155. struct dax_ccb {
  156. struct dax_header hdr; /* CCB Header */
  157. struct dax_control ctrl;/* Control Word */
  158. void *ca; /* Completion Address */
  159. void *pri; /* Primary Input Address */
  160. struct dax_data_access dac; /* Data Access Control */
  161. void *sec; /* Secondary Input Address */
  162. u64 dword5; /* depends on opcode */
  163. void *out; /* Output Address */
  164. void *tbl; /* Table Address or bitmap */
  165. };
  166. struct dax_cca {
  167. u8 status; /* user may mwait on this address */
  168. u8 err; /* user visible error notification */
  169. u8 rsvd[2]; /* reserved */
  170. u32 n_remaining; /* for QP partial symbol warning */
  171. u32 output_sz; /* output in bytes */
  172. u32 rsvd2; /* reserved */
  173. u64 run_cycles; /* run time in OCND2 cycles */
  174. u64 run_stats; /* nothing reported in version 1.0 */
  175. u32 n_processed; /* number input elements */
  176. u32 rsvd3[5]; /* reserved */
  177. u64 retval; /* command return value */
  178. u64 rsvd4[8]; /* reserved */
  179. };
  180. /* per thread CCB context */
  181. struct dax_ctx {
  182. struct dax_ccb *ccb_buf;
  183. u64 ccb_buf_ra; /* cached RA of ccb_buf */
  184. struct dax_cca *ca_buf;
  185. u64 ca_buf_ra; /* cached RA of ca_buf */
  186. struct page *pages[DAX_CA_ELEMS][NUM_STREAM_TYPES];
  187. /* array of locked pages */
  188. struct task_struct *owner; /* thread that owns ctx */
  189. struct task_struct *client; /* requesting thread */
  190. union ccb_result result;
  191. u32 ccb_count;
  192. u32 fail_count;
  193. };
  194. /* driver public entry points */
  195. static int dax_open(struct inode *inode, struct file *file);
  196. static ssize_t dax_read(struct file *filp, char __user *buf,
  197. size_t count, loff_t *ppos);
  198. static ssize_t dax_write(struct file *filp, const char __user *buf,
  199. size_t count, loff_t *ppos);
  200. static int dax_devmap(struct file *f, struct vm_area_struct *vma);
  201. static int dax_close(struct inode *i, struct file *f);
  202. static const struct file_operations dax_fops = {
  203. .owner = THIS_MODULE,
  204. .open = dax_open,
  205. .read = dax_read,
  206. .write = dax_write,
  207. .mmap = dax_devmap,
  208. .release = dax_close,
  209. };
  210. static int dax_ccb_exec(struct dax_ctx *ctx, const char __user *buf,
  211. size_t count, loff_t *ppos);
  212. static int dax_ccb_info(u64 ca, struct ccb_info_result *info);
  213. static int dax_ccb_kill(u64 ca, u16 *kill_res);
  214. static struct cdev c_dev;
  215. static struct class *cl;
  216. static dev_t first;
  217. static int max_ccb_version;
  218. static int dax_debug;
  219. module_param(dax_debug, int, 0644);
  220. MODULE_PARM_DESC(dax_debug, "Debug flags");
  221. static int __init dax_attach(void)
  222. {
  223. unsigned long dummy, hv_rv, major, minor, minor_requested, max_ccbs;
  224. struct mdesc_handle *hp = mdesc_grab();
  225. char *prop, *dax_name;
  226. bool found = false;
  227. int len, ret = 0;
  228. u64 pn;
  229. if (hp == NULL) {
  230. dax_err("Unable to grab mdesc");
  231. return -ENODEV;
  232. }
  233. mdesc_for_each_node_by_name(hp, pn, "virtual-device") {
  234. prop = (char *)mdesc_get_property(hp, pn, "name", &len);
  235. if (prop == NULL)
  236. continue;
  237. if (strncmp(prop, "dax", strlen("dax")))
  238. continue;
  239. dax_dbg("Found node 0x%llx = %s", pn, prop);
  240. prop = (char *)mdesc_get_property(hp, pn, "compatible", &len);
  241. if (prop == NULL)
  242. continue;
  243. dax_dbg("Found node 0x%llx = %s", pn, prop);
  244. found = true;
  245. break;
  246. }
  247. if (!found) {
  248. dax_err("No DAX device found");
  249. ret = -ENODEV;
  250. goto done;
  251. }
  252. if (strncmp(prop, DAX2_STR, strlen(DAX2_STR)) == 0) {
  253. dax_name = DAX_NAME "2";
  254. major = DAX2_MAJOR;
  255. minor_requested = DAX2_MINOR;
  256. max_ccb_version = 1;
  257. dax_dbg("MD indicates DAX2 coprocessor");
  258. } else if (strncmp(prop, DAX1_STR, strlen(DAX1_STR)) == 0) {
  259. dax_name = DAX_NAME "1";
  260. major = DAX1_MAJOR;
  261. minor_requested = DAX1_MINOR;
  262. max_ccb_version = 0;
  263. dax_dbg("MD indicates DAX1 coprocessor");
  264. } else {
  265. dax_err("Unknown dax type: %s", prop);
  266. ret = -ENODEV;
  267. goto done;
  268. }
  269. minor = minor_requested;
  270. dax_dbg("Registering DAX HV api with major %ld minor %ld", major,
  271. minor);
  272. if (sun4v_hvapi_register(HV_GRP_DAX, major, &minor)) {
  273. dax_err("hvapi_register failed");
  274. ret = -ENODEV;
  275. goto done;
  276. } else {
  277. dax_dbg("Max minor supported by HV = %ld (major %ld)", minor,
  278. major);
  279. minor = min(minor, minor_requested);
  280. dax_dbg("registered DAX major %ld minor %ld", major, minor);
  281. }
  282. /* submit a zero length ccb array to query coprocessor queue size */
  283. hv_rv = sun4v_ccb_submit(0, 0, HV_CCB_QUERY_CMD, 0, &max_ccbs, &dummy);
  284. if (hv_rv != 0) {
  285. dax_err("get_hwqueue_size failed with status=%ld and max_ccbs=%ld",
  286. hv_rv, max_ccbs);
  287. ret = -ENODEV;
  288. goto done;
  289. }
  290. if (max_ccbs != DAX_MAX_CCBS) {
  291. dax_err("HV reports unsupported max_ccbs=%ld", max_ccbs);
  292. ret = -ENODEV;
  293. goto done;
  294. }
  295. if (alloc_chrdev_region(&first, 0, 1, DAX_NAME) < 0) {
  296. dax_err("alloc_chrdev_region failed");
  297. ret = -ENXIO;
  298. goto done;
  299. }
  300. cl = class_create(THIS_MODULE, DAX_NAME);
  301. if (IS_ERR(cl)) {
  302. dax_err("class_create failed");
  303. ret = PTR_ERR(cl);
  304. goto class_error;
  305. }
  306. if (device_create(cl, NULL, first, NULL, dax_name) == NULL) {
  307. dax_err("device_create failed");
  308. ret = -ENXIO;
  309. goto device_error;
  310. }
  311. cdev_init(&c_dev, &dax_fops);
  312. if (cdev_add(&c_dev, first, 1) == -1) {
  313. dax_err("cdev_add failed");
  314. ret = -ENXIO;
  315. goto cdev_error;
  316. }
  317. pr_info("Attached DAX module\n");
  318. goto done;
  319. cdev_error:
  320. device_destroy(cl, first);
  321. device_error:
  322. class_destroy(cl);
  323. class_error:
  324. unregister_chrdev_region(first, 1);
  325. done:
  326. mdesc_release(hp);
  327. return ret;
  328. }
  329. module_init(dax_attach);
  330. static void __exit dax_detach(void)
  331. {
  332. pr_info("Cleaning up DAX module\n");
  333. cdev_del(&c_dev);
  334. device_destroy(cl, first);
  335. class_destroy(cl);
  336. unregister_chrdev_region(first, 1);
  337. }
  338. module_exit(dax_detach);
  339. /* map completion area */
  340. static int dax_devmap(struct file *f, struct vm_area_struct *vma)
  341. {
  342. struct dax_ctx *ctx = (struct dax_ctx *)f->private_data;
  343. size_t len = vma->vm_end - vma->vm_start;
  344. dax_dbg("len=0x%lx, flags=0x%lx", len, vma->vm_flags);
  345. if (ctx->owner != current) {
  346. dax_dbg("devmap called from wrong thread");
  347. return -EINVAL;
  348. }
  349. if (len != DAX_MMAP_LEN) {
  350. dax_dbg("len(%lu) != DAX_MMAP_LEN(%d)", len, DAX_MMAP_LEN);
  351. return -EINVAL;
  352. }
  353. /* completion area is mapped read-only for user */
  354. if (vma->vm_flags & VM_WRITE)
  355. return -EPERM;
  356. vma->vm_flags &= ~VM_MAYWRITE;
  357. if (remap_pfn_range(vma, vma->vm_start, ctx->ca_buf_ra >> PAGE_SHIFT,
  358. len, vma->vm_page_prot))
  359. return -EAGAIN;
  360. dax_dbg("mmapped completion area at uva 0x%lx", vma->vm_start);
  361. return 0;
  362. }
  363. /* Unlock user pages. Called during dequeue or device close */
  364. static void dax_unlock_pages(struct dax_ctx *ctx, int ccb_index, int nelem)
  365. {
  366. int i, j;
  367. for (i = ccb_index; i < ccb_index + nelem; i++) {
  368. for (j = 0; j < NUM_STREAM_TYPES; j++) {
  369. struct page *p = ctx->pages[i][j];
  370. if (p) {
  371. dax_dbg("freeing page %p", p);
  372. if (j == OUT)
  373. set_page_dirty(p);
  374. put_page(p);
  375. ctx->pages[i][j] = NULL;
  376. }
  377. }
  378. }
  379. }
  380. static int dax_lock_page(void *va, struct page **p)
  381. {
  382. int ret;
  383. dax_dbg("uva %p", va);
  384. ret = get_user_pages_fast((unsigned long)va, 1, 1, p);
  385. if (ret == 1) {
  386. dax_dbg("locked page %p, for VA %p", *p, va);
  387. return 0;
  388. }
  389. dax_dbg("get_user_pages failed, va=%p, ret=%d", va, ret);
  390. return -1;
  391. }
  392. static int dax_lock_pages(struct dax_ctx *ctx, int idx,
  393. int nelem, u64 *err_va)
  394. {
  395. int i;
  396. for (i = 0; i < nelem; i++) {
  397. struct dax_ccb *ccbp = &ctx->ccb_buf[i];
  398. /*
  399. * For each address in the CCB whose type is virtual,
  400. * lock the page and change the type to virtual alternate
  401. * context. On error, return the offending address in
  402. * err_va.
  403. */
  404. if (ccbp->hdr.out_addr_type == DAX_ADDR_TYPE_VA) {
  405. dax_dbg("output");
  406. if (dax_lock_page(ccbp->out,
  407. &ctx->pages[i + idx][OUT]) != 0) {
  408. *err_va = (u64)ccbp->out;
  409. goto error;
  410. }
  411. ccbp->hdr.out_addr_type = DAX_ADDR_TYPE_VA_ALT;
  412. }
  413. if (ccbp->hdr.pri_addr_type == DAX_ADDR_TYPE_VA) {
  414. dax_dbg("input");
  415. if (dax_lock_page(ccbp->pri,
  416. &ctx->pages[i + idx][PRI]) != 0) {
  417. *err_va = (u64)ccbp->pri;
  418. goto error;
  419. }
  420. ccbp->hdr.pri_addr_type = DAX_ADDR_TYPE_VA_ALT;
  421. }
  422. if (ccbp->hdr.sec_addr_type == DAX_ADDR_TYPE_VA) {
  423. dax_dbg("sec input");
  424. if (dax_lock_page(ccbp->sec,
  425. &ctx->pages[i + idx][SEC]) != 0) {
  426. *err_va = (u64)ccbp->sec;
  427. goto error;
  428. }
  429. ccbp->hdr.sec_addr_type = DAX_ADDR_TYPE_VA_ALT;
  430. }
  431. if (ccbp->hdr.table_addr_type == DAX_ADDR_TYPE_VA) {
  432. dax_dbg("tbl");
  433. if (dax_lock_page(ccbp->tbl,
  434. &ctx->pages[i + idx][TBL]) != 0) {
  435. *err_va = (u64)ccbp->tbl;
  436. goto error;
  437. }
  438. ccbp->hdr.table_addr_type = DAX_ADDR_TYPE_VA_ALT;
  439. }
  440. /* skip over 2nd 64 bytes of long CCB */
  441. if (ccbp->hdr.longccb)
  442. i++;
  443. }
  444. return DAX_SUBMIT_OK;
  445. error:
  446. dax_unlock_pages(ctx, idx, nelem);
  447. return DAX_SUBMIT_ERR_NOACCESS;
  448. }
  449. static void dax_ccb_wait(struct dax_ctx *ctx, int idx)
  450. {
  451. int ret, nretries;
  452. u16 kill_res;
  453. dax_dbg("idx=%d", idx);
  454. for (nretries = 0; nretries < DAX_CCB_RETRIES; nretries++) {
  455. if (ctx->ca_buf[idx].status == CCA_STAT_NOT_COMPLETED)
  456. udelay(DAX_CCB_USEC);
  457. else
  458. return;
  459. }
  460. dax_dbg("ctx (%p): CCB[%d] timed out, wait usec=%d, retries=%d. Killing ccb",
  461. (void *)ctx, idx, DAX_CCB_USEC, DAX_CCB_RETRIES);
  462. ret = dax_ccb_kill(ctx->ca_buf_ra + idx * sizeof(struct dax_cca),
  463. &kill_res);
  464. dax_dbg("Kill CCB[%d] %s", idx, ret ? "failed" : "succeeded");
  465. }
  466. static int dax_close(struct inode *ino, struct file *f)
  467. {
  468. struct dax_ctx *ctx = (struct dax_ctx *)f->private_data;
  469. int i;
  470. f->private_data = NULL;
  471. for (i = 0; i < DAX_CA_ELEMS; i++) {
  472. if (ctx->ca_buf[i].status == CCA_STAT_NOT_COMPLETED) {
  473. dax_dbg("CCB[%d] not completed", i);
  474. dax_ccb_wait(ctx, i);
  475. }
  476. dax_unlock_pages(ctx, i, 1);
  477. }
  478. kfree(ctx->ccb_buf);
  479. kfree(ctx->ca_buf);
  480. dax_stat_dbg("CCBs: %d good, %d bad", ctx->ccb_count, ctx->fail_count);
  481. kfree(ctx);
  482. return 0;
  483. }
  484. static ssize_t dax_read(struct file *f, char __user *buf,
  485. size_t count, loff_t *ppos)
  486. {
  487. struct dax_ctx *ctx = f->private_data;
  488. if (ctx->client != current)
  489. return -EUSERS;
  490. ctx->client = NULL;
  491. if (count != sizeof(union ccb_result))
  492. return -EINVAL;
  493. if (copy_to_user(buf, &ctx->result, sizeof(union ccb_result)))
  494. return -EFAULT;
  495. return count;
  496. }
  497. static ssize_t dax_write(struct file *f, const char __user *buf,
  498. size_t count, loff_t *ppos)
  499. {
  500. struct dax_ctx *ctx = f->private_data;
  501. struct dax_command hdr;
  502. unsigned long ca;
  503. int i, idx, ret;
  504. if (ctx->client != NULL)
  505. return -EINVAL;
  506. if (count == 0 || count > DAX_MAX_CCBS * sizeof(struct dax_ccb))
  507. return -EINVAL;
  508. if (count % sizeof(struct dax_ccb) == 0)
  509. return dax_ccb_exec(ctx, buf, count, ppos); /* CCB EXEC */
  510. if (count != sizeof(struct dax_command))
  511. return -EINVAL;
  512. /* immediate command */
  513. if (ctx->owner != current)
  514. return -EUSERS;
  515. if (copy_from_user(&hdr, buf, sizeof(hdr)))
  516. return -EFAULT;
  517. ca = ctx->ca_buf_ra + hdr.ca_offset;
  518. switch (hdr.command) {
  519. case CCB_KILL:
  520. if (hdr.ca_offset >= DAX_MMAP_LEN) {
  521. dax_dbg("invalid ca_offset (%d) >= ca_buflen (%d)",
  522. hdr.ca_offset, DAX_MMAP_LEN);
  523. return -EINVAL;
  524. }
  525. ret = dax_ccb_kill(ca, &ctx->result.kill.action);
  526. if (ret != 0) {
  527. dax_dbg("dax_ccb_kill failed (ret=%d)", ret);
  528. return ret;
  529. }
  530. dax_info_dbg("killed (ca_offset %d)", hdr.ca_offset);
  531. idx = hdr.ca_offset / sizeof(struct dax_cca);
  532. ctx->ca_buf[idx].status = CCA_STAT_KILLED;
  533. ctx->ca_buf[idx].err = CCA_ERR_KILLED;
  534. ctx->client = current;
  535. return count;
  536. case CCB_INFO:
  537. if (hdr.ca_offset >= DAX_MMAP_LEN) {
  538. dax_dbg("invalid ca_offset (%d) >= ca_buflen (%d)",
  539. hdr.ca_offset, DAX_MMAP_LEN);
  540. return -EINVAL;
  541. }
  542. ret = dax_ccb_info(ca, &ctx->result.info);
  543. if (ret != 0) {
  544. dax_dbg("dax_ccb_info failed (ret=%d)", ret);
  545. return ret;
  546. }
  547. dax_info_dbg("info succeeded on ca_offset %d", hdr.ca_offset);
  548. ctx->client = current;
  549. return count;
  550. case CCB_DEQUEUE:
  551. for (i = 0; i < DAX_CA_ELEMS; i++) {
  552. if (ctx->ca_buf[i].status !=
  553. CCA_STAT_NOT_COMPLETED)
  554. dax_unlock_pages(ctx, i, 1);
  555. }
  556. return count;
  557. default:
  558. return -EINVAL;
  559. }
  560. }
  561. static int dax_open(struct inode *inode, struct file *f)
  562. {
  563. struct dax_ctx *ctx = NULL;
  564. int i;
  565. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  566. if (ctx == NULL)
  567. goto done;
  568. ctx->ccb_buf = kcalloc(DAX_MAX_CCBS, sizeof(struct dax_ccb),
  569. GFP_KERNEL);
  570. if (ctx->ccb_buf == NULL)
  571. goto done;
  572. ctx->ccb_buf_ra = virt_to_phys(ctx->ccb_buf);
  573. dax_dbg("ctx->ccb_buf=0x%p, ccb_buf_ra=0x%llx",
  574. (void *)ctx->ccb_buf, ctx->ccb_buf_ra);
  575. /* allocate CCB completion area buffer */
  576. ctx->ca_buf = kzalloc(DAX_MMAP_LEN, GFP_KERNEL);
  577. if (ctx->ca_buf == NULL)
  578. goto alloc_error;
  579. for (i = 0; i < DAX_CA_ELEMS; i++)
  580. ctx->ca_buf[i].status = CCA_STAT_COMPLETED;
  581. ctx->ca_buf_ra = virt_to_phys(ctx->ca_buf);
  582. dax_dbg("ctx=0x%p, ctx->ca_buf=0x%p, ca_buf_ra=0x%llx",
  583. (void *)ctx, (void *)ctx->ca_buf, ctx->ca_buf_ra);
  584. ctx->owner = current;
  585. f->private_data = ctx;
  586. return 0;
  587. alloc_error:
  588. kfree(ctx->ccb_buf);
  589. done:
  590. if (ctx != NULL)
  591. kfree(ctx);
  592. return -ENOMEM;
  593. }
  594. static char *dax_hv_errno(unsigned long hv_ret, int *ret)
  595. {
  596. switch (hv_ret) {
  597. case HV_EBADALIGN:
  598. *ret = -EFAULT;
  599. return "HV_EBADALIGN";
  600. case HV_ENORADDR:
  601. *ret = -EFAULT;
  602. return "HV_ENORADDR";
  603. case HV_EINVAL:
  604. *ret = -EINVAL;
  605. return "HV_EINVAL";
  606. case HV_EWOULDBLOCK:
  607. *ret = -EAGAIN;
  608. return "HV_EWOULDBLOCK";
  609. case HV_ENOACCESS:
  610. *ret = -EPERM;
  611. return "HV_ENOACCESS";
  612. default:
  613. break;
  614. }
  615. *ret = -EIO;
  616. return "UNKNOWN";
  617. }
  618. static int dax_ccb_kill(u64 ca, u16 *kill_res)
  619. {
  620. unsigned long hv_ret;
  621. int count, ret = 0;
  622. char *err_str;
  623. for (count = 0; count < DAX_CCB_RETRIES; count++) {
  624. dax_dbg("attempting kill on ca_ra 0x%llx", ca);
  625. hv_ret = sun4v_ccb_kill(ca, kill_res);
  626. if (hv_ret == HV_EOK) {
  627. dax_info_dbg("HV_EOK (ca_ra 0x%llx): %d", ca,
  628. *kill_res);
  629. } else {
  630. err_str = dax_hv_errno(hv_ret, &ret);
  631. dax_dbg("%s (ca_ra 0x%llx)", err_str, ca);
  632. }
  633. if (ret != -EAGAIN)
  634. return ret;
  635. dax_info_dbg("ccb_kill count = %d", count);
  636. udelay(DAX_CCB_USEC);
  637. }
  638. return -EAGAIN;
  639. }
  640. static int dax_ccb_info(u64 ca, struct ccb_info_result *info)
  641. {
  642. unsigned long hv_ret;
  643. char *err_str;
  644. int ret = 0;
  645. dax_dbg("attempting info on ca_ra 0x%llx", ca);
  646. hv_ret = sun4v_ccb_info(ca, info);
  647. if (hv_ret == HV_EOK) {
  648. dax_info_dbg("HV_EOK (ca_ra 0x%llx): %d", ca, info->state);
  649. if (info->state == DAX_CCB_ENQUEUED) {
  650. dax_info_dbg("dax_unit %d, queue_num %d, queue_pos %d",
  651. info->inst_num, info->q_num, info->q_pos);
  652. }
  653. } else {
  654. err_str = dax_hv_errno(hv_ret, &ret);
  655. dax_dbg("%s (ca_ra 0x%llx)", err_str, ca);
  656. }
  657. return ret;
  658. }
  659. static void dax_prt_ccbs(struct dax_ccb *ccb, int nelem)
  660. {
  661. int i, j;
  662. u64 *ccbp;
  663. dax_dbg("ccb buffer:");
  664. for (i = 0; i < nelem; i++) {
  665. ccbp = (u64 *)&ccb[i];
  666. dax_dbg(" %sccb[%d]", ccb[i].hdr.longccb ? "long " : "", i);
  667. for (j = 0; j < 8; j++)
  668. dax_dbg("\tccb[%d].dwords[%d]=0x%llx",
  669. i, j, *(ccbp + j));
  670. }
  671. }
  672. /*
  673. * Validates user CCB content. Also sets completion address and address types
  674. * for all addresses contained in CCB.
  675. */
  676. static int dax_preprocess_usr_ccbs(struct dax_ctx *ctx, int idx, int nelem)
  677. {
  678. int i;
  679. /*
  680. * The user is not allowed to specify real address types in
  681. * the CCB header. This must be enforced by the kernel before
  682. * submitting the CCBs to HV. The only allowed values for all
  683. * address fields are VA or IMM
  684. */
  685. for (i = 0; i < nelem; i++) {
  686. struct dax_ccb *ccbp = &ctx->ccb_buf[i];
  687. unsigned long ca_offset;
  688. if (ccbp->hdr.ccb_version > max_ccb_version)
  689. return DAX_SUBMIT_ERR_CCB_INVAL;
  690. switch (ccbp->hdr.opcode) {
  691. case DAX_OP_SYNC_NOP:
  692. case DAX_OP_EXTRACT:
  693. case DAX_OP_SCAN_VALUE:
  694. case DAX_OP_SCAN_RANGE:
  695. case DAX_OP_TRANSLATE:
  696. case DAX_OP_SCAN_VALUE | DAX_OP_INVERT:
  697. case DAX_OP_SCAN_RANGE | DAX_OP_INVERT:
  698. case DAX_OP_TRANSLATE | DAX_OP_INVERT:
  699. case DAX_OP_SELECT:
  700. break;
  701. default:
  702. return DAX_SUBMIT_ERR_CCB_INVAL;
  703. }
  704. if (ccbp->hdr.out_addr_type != DAX_ADDR_TYPE_VA &&
  705. ccbp->hdr.out_addr_type != DAX_ADDR_TYPE_NONE) {
  706. dax_dbg("invalid out_addr_type in user CCB[%d]", i);
  707. return DAX_SUBMIT_ERR_CCB_INVAL;
  708. }
  709. if (ccbp->hdr.pri_addr_type != DAX_ADDR_TYPE_VA &&
  710. ccbp->hdr.pri_addr_type != DAX_ADDR_TYPE_NONE) {
  711. dax_dbg("invalid pri_addr_type in user CCB[%d]", i);
  712. return DAX_SUBMIT_ERR_CCB_INVAL;
  713. }
  714. if (ccbp->hdr.sec_addr_type != DAX_ADDR_TYPE_VA &&
  715. ccbp->hdr.sec_addr_type != DAX_ADDR_TYPE_NONE) {
  716. dax_dbg("invalid sec_addr_type in user CCB[%d]", i);
  717. return DAX_SUBMIT_ERR_CCB_INVAL;
  718. }
  719. if (ccbp->hdr.table_addr_type != DAX_ADDR_TYPE_VA &&
  720. ccbp->hdr.table_addr_type != DAX_ADDR_TYPE_NONE) {
  721. dax_dbg("invalid table_addr_type in user CCB[%d]", i);
  722. return DAX_SUBMIT_ERR_CCB_INVAL;
  723. }
  724. /* set completion (real) address and address type */
  725. ccbp->hdr.cca_addr_type = DAX_ADDR_TYPE_RA;
  726. ca_offset = (idx + i) * sizeof(struct dax_cca);
  727. ccbp->ca = (void *)ctx->ca_buf_ra + ca_offset;
  728. memset(&ctx->ca_buf[idx + i], 0, sizeof(struct dax_cca));
  729. dax_dbg("ccb[%d]=%p, ca_offset=0x%lx, compl RA=0x%llx",
  730. i, ccbp, ca_offset, ctx->ca_buf_ra + ca_offset);
  731. /* skip over 2nd 64 bytes of long CCB */
  732. if (ccbp->hdr.longccb)
  733. i++;
  734. }
  735. return DAX_SUBMIT_OK;
  736. }
  737. static int dax_ccb_exec(struct dax_ctx *ctx, const char __user *buf,
  738. size_t count, loff_t *ppos)
  739. {
  740. unsigned long accepted_len, hv_rv;
  741. int i, idx, nccbs, naccepted;
  742. ctx->client = current;
  743. idx = *ppos;
  744. nccbs = count / sizeof(struct dax_ccb);
  745. if (ctx->owner != current) {
  746. dax_dbg("wrong thread");
  747. ctx->result.exec.status = DAX_SUBMIT_ERR_THR_INIT;
  748. return 0;
  749. }
  750. dax_dbg("args: ccb_buf_len=%ld, idx=%d", count, idx);
  751. /* for given index and length, verify ca_buf range exists */
  752. if (idx < 0 || idx > (DAX_CA_ELEMS - nccbs)) {
  753. ctx->result.exec.status = DAX_SUBMIT_ERR_NO_CA_AVAIL;
  754. return 0;
  755. }
  756. /*
  757. * Copy CCBs into kernel buffer to prevent modification by the
  758. * user in between validation and submission.
  759. */
  760. if (copy_from_user(ctx->ccb_buf, buf, count)) {
  761. dax_dbg("copyin of user CCB buffer failed");
  762. ctx->result.exec.status = DAX_SUBMIT_ERR_CCB_ARR_MMU_MISS;
  763. return 0;
  764. }
  765. /* check to see if ca_buf[idx] .. ca_buf[idx + nccbs] are available */
  766. for (i = idx; i < idx + nccbs; i++) {
  767. if (ctx->ca_buf[i].status == CCA_STAT_NOT_COMPLETED) {
  768. dax_dbg("CA range not available, dequeue needed");
  769. ctx->result.exec.status = DAX_SUBMIT_ERR_NO_CA_AVAIL;
  770. return 0;
  771. }
  772. }
  773. dax_unlock_pages(ctx, idx, nccbs);
  774. ctx->result.exec.status = dax_preprocess_usr_ccbs(ctx, idx, nccbs);
  775. if (ctx->result.exec.status != DAX_SUBMIT_OK)
  776. return 0;
  777. ctx->result.exec.status = dax_lock_pages(ctx, idx, nccbs,
  778. &ctx->result.exec.status_data);
  779. if (ctx->result.exec.status != DAX_SUBMIT_OK)
  780. return 0;
  781. if (dax_debug & DAX_DBG_FLG_BASIC)
  782. dax_prt_ccbs(ctx->ccb_buf, nccbs);
  783. hv_rv = sun4v_ccb_submit(ctx->ccb_buf_ra, count,
  784. HV_CCB_QUERY_CMD | HV_CCB_VA_SECONDARY, 0,
  785. &accepted_len, &ctx->result.exec.status_data);
  786. switch (hv_rv) {
  787. case HV_EOK:
  788. /*
  789. * Hcall succeeded with no errors but the accepted
  790. * length may be less than the requested length. The
  791. * only way the driver can resubmit the remainder is
  792. * to wait for completion of the submitted CCBs since
  793. * there is no way to guarantee the ordering semantics
  794. * required by the client applications. Therefore we
  795. * let the user library deal with resubmissions.
  796. */
  797. ctx->result.exec.status = DAX_SUBMIT_OK;
  798. break;
  799. case HV_EWOULDBLOCK:
  800. /*
  801. * This is a transient HV API error. The user library
  802. * can retry.
  803. */
  804. dax_dbg("hcall returned HV_EWOULDBLOCK");
  805. ctx->result.exec.status = DAX_SUBMIT_ERR_WOULDBLOCK;
  806. break;
  807. case HV_ENOMAP:
  808. /*
  809. * HV was unable to translate a VA. The VA it could
  810. * not translate is returned in the status_data param.
  811. */
  812. dax_dbg("hcall returned HV_ENOMAP");
  813. ctx->result.exec.status = DAX_SUBMIT_ERR_NOMAP;
  814. break;
  815. case HV_EINVAL:
  816. /*
  817. * This is the result of an invalid user CCB as HV is
  818. * validating some of the user CCB fields. Pass this
  819. * error back to the user. There is no supporting info
  820. * to isolate the invalid field.
  821. */
  822. dax_dbg("hcall returned HV_EINVAL");
  823. ctx->result.exec.status = DAX_SUBMIT_ERR_CCB_INVAL;
  824. break;
  825. case HV_ENOACCESS:
  826. /*
  827. * HV found a VA that did not have the appropriate
  828. * permissions (such as the w bit). The VA in question
  829. * is returned in status_data param.
  830. */
  831. dax_dbg("hcall returned HV_ENOACCESS");
  832. ctx->result.exec.status = DAX_SUBMIT_ERR_NOACCESS;
  833. break;
  834. case HV_EUNAVAILABLE:
  835. /*
  836. * The requested CCB operation could not be performed
  837. * at this time. Return the specific unavailable code
  838. * in the status_data field.
  839. */
  840. dax_dbg("hcall returned HV_EUNAVAILABLE");
  841. ctx->result.exec.status = DAX_SUBMIT_ERR_UNAVAIL;
  842. break;
  843. default:
  844. ctx->result.exec.status = DAX_SUBMIT_ERR_INTERNAL;
  845. dax_dbg("unknown hcall return value (%ld)", hv_rv);
  846. break;
  847. }
  848. /* unlock pages associated with the unaccepted CCBs */
  849. naccepted = accepted_len / sizeof(struct dax_ccb);
  850. dax_unlock_pages(ctx, idx + naccepted, nccbs - naccepted);
  851. /* mark unaccepted CCBs as not completed */
  852. for (i = idx + naccepted; i < idx + nccbs; i++)
  853. ctx->ca_buf[i].status = CCA_STAT_COMPLETED;
  854. ctx->ccb_count += naccepted;
  855. ctx->fail_count += nccbs - naccepted;
  856. dax_dbg("hcall rv=%ld, accepted_len=%ld, status_data=0x%llx, ret status=%d",
  857. hv_rv, accepted_len, ctx->result.exec.status_data,
  858. ctx->result.exec.status);
  859. if (count == accepted_len)
  860. ctx->client = NULL; /* no read needed to complete protocol */
  861. return accepted_len;
  862. }