rdma.c 52 KB

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  1. /*
  2. * NVMe over Fabrics RDMA host code.
  3. * Copyright (c) 2015-2016 HGST, a Western Digital Company.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15. #include <linux/module.h>
  16. #include <linux/init.h>
  17. #include <linux/slab.h>
  18. #include <rdma/mr_pool.h>
  19. #include <linux/err.h>
  20. #include <linux/string.h>
  21. #include <linux/atomic.h>
  22. #include <linux/blk-mq.h>
  23. #include <linux/blk-mq-rdma.h>
  24. #include <linux/types.h>
  25. #include <linux/list.h>
  26. #include <linux/mutex.h>
  27. #include <linux/scatterlist.h>
  28. #include <linux/nvme.h>
  29. #include <asm/unaligned.h>
  30. #include <rdma/ib_verbs.h>
  31. #include <rdma/rdma_cm.h>
  32. #include <linux/nvme-rdma.h>
  33. #include "nvme.h"
  34. #include "fabrics.h"
  35. #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */
  36. #define NVME_RDMA_MAX_SEGMENTS 256
  37. #define NVME_RDMA_MAX_INLINE_SEGMENTS 4
  38. struct nvme_rdma_device {
  39. struct ib_device *dev;
  40. struct ib_pd *pd;
  41. struct kref ref;
  42. struct list_head entry;
  43. unsigned int num_inline_segments;
  44. };
  45. struct nvme_rdma_qe {
  46. struct ib_cqe cqe;
  47. void *data;
  48. u64 dma;
  49. };
  50. struct nvme_rdma_queue;
  51. struct nvme_rdma_request {
  52. struct nvme_request req;
  53. struct ib_mr *mr;
  54. struct nvme_rdma_qe sqe;
  55. union nvme_result result;
  56. __le16 status;
  57. refcount_t ref;
  58. struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS];
  59. u32 num_sge;
  60. int nents;
  61. struct ib_reg_wr reg_wr;
  62. struct ib_cqe reg_cqe;
  63. struct nvme_rdma_queue *queue;
  64. struct sg_table sg_table;
  65. struct scatterlist first_sgl[];
  66. };
  67. enum nvme_rdma_queue_flags {
  68. NVME_RDMA_Q_ALLOCATED = 0,
  69. NVME_RDMA_Q_LIVE = 1,
  70. NVME_RDMA_Q_TR_READY = 2,
  71. };
  72. struct nvme_rdma_queue {
  73. struct nvme_rdma_qe *rsp_ring;
  74. int queue_size;
  75. size_t cmnd_capsule_len;
  76. struct nvme_rdma_ctrl *ctrl;
  77. struct nvme_rdma_device *device;
  78. struct ib_cq *ib_cq;
  79. struct ib_qp *qp;
  80. unsigned long flags;
  81. struct rdma_cm_id *cm_id;
  82. int cm_error;
  83. struct completion cm_done;
  84. };
  85. struct nvme_rdma_ctrl {
  86. /* read only in the hot path */
  87. struct nvme_rdma_queue *queues;
  88. /* other member variables */
  89. struct blk_mq_tag_set tag_set;
  90. struct work_struct err_work;
  91. struct nvme_rdma_qe async_event_sqe;
  92. struct delayed_work reconnect_work;
  93. struct list_head list;
  94. struct blk_mq_tag_set admin_tag_set;
  95. struct nvme_rdma_device *device;
  96. u32 max_fr_pages;
  97. struct sockaddr_storage addr;
  98. struct sockaddr_storage src_addr;
  99. struct nvme_ctrl ctrl;
  100. bool use_inline_data;
  101. };
  102. static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl)
  103. {
  104. return container_of(ctrl, struct nvme_rdma_ctrl, ctrl);
  105. }
  106. static LIST_HEAD(device_list);
  107. static DEFINE_MUTEX(device_list_mutex);
  108. static LIST_HEAD(nvme_rdma_ctrl_list);
  109. static DEFINE_MUTEX(nvme_rdma_ctrl_mutex);
  110. /*
  111. * Disabling this option makes small I/O goes faster, but is fundamentally
  112. * unsafe. With it turned off we will have to register a global rkey that
  113. * allows read and write access to all physical memory.
  114. */
  115. static bool register_always = true;
  116. module_param(register_always, bool, 0444);
  117. MODULE_PARM_DESC(register_always,
  118. "Use memory registration even for contiguous memory regions");
  119. static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
  120. struct rdma_cm_event *event);
  121. static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
  122. static const struct blk_mq_ops nvme_rdma_mq_ops;
  123. static const struct blk_mq_ops nvme_rdma_admin_mq_ops;
  124. /* XXX: really should move to a generic header sooner or later.. */
  125. static inline void put_unaligned_le24(u32 val, u8 *p)
  126. {
  127. *p++ = val;
  128. *p++ = val >> 8;
  129. *p++ = val >> 16;
  130. }
  131. static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue)
  132. {
  133. return queue - queue->ctrl->queues;
  134. }
  135. static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue)
  136. {
  137. return queue->cmnd_capsule_len - sizeof(struct nvme_command);
  138. }
  139. static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
  140. size_t capsule_size, enum dma_data_direction dir)
  141. {
  142. ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir);
  143. kfree(qe->data);
  144. }
  145. static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe,
  146. size_t capsule_size, enum dma_data_direction dir)
  147. {
  148. qe->data = kzalloc(capsule_size, GFP_KERNEL);
  149. if (!qe->data)
  150. return -ENOMEM;
  151. qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir);
  152. if (ib_dma_mapping_error(ibdev, qe->dma)) {
  153. kfree(qe->data);
  154. return -ENOMEM;
  155. }
  156. return 0;
  157. }
  158. static void nvme_rdma_free_ring(struct ib_device *ibdev,
  159. struct nvme_rdma_qe *ring, size_t ib_queue_size,
  160. size_t capsule_size, enum dma_data_direction dir)
  161. {
  162. int i;
  163. for (i = 0; i < ib_queue_size; i++)
  164. nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir);
  165. kfree(ring);
  166. }
  167. static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev,
  168. size_t ib_queue_size, size_t capsule_size,
  169. enum dma_data_direction dir)
  170. {
  171. struct nvme_rdma_qe *ring;
  172. int i;
  173. ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL);
  174. if (!ring)
  175. return NULL;
  176. for (i = 0; i < ib_queue_size; i++) {
  177. if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir))
  178. goto out_free_ring;
  179. }
  180. return ring;
  181. out_free_ring:
  182. nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir);
  183. return NULL;
  184. }
  185. static void nvme_rdma_qp_event(struct ib_event *event, void *context)
  186. {
  187. pr_debug("QP event %s (%d)\n",
  188. ib_event_msg(event->event), event->event);
  189. }
  190. static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue)
  191. {
  192. wait_for_completion_interruptible_timeout(&queue->cm_done,
  193. msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1);
  194. return queue->cm_error;
  195. }
  196. static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor)
  197. {
  198. struct nvme_rdma_device *dev = queue->device;
  199. struct ib_qp_init_attr init_attr;
  200. int ret;
  201. memset(&init_attr, 0, sizeof(init_attr));
  202. init_attr.event_handler = nvme_rdma_qp_event;
  203. /* +1 for drain */
  204. init_attr.cap.max_send_wr = factor * queue->queue_size + 1;
  205. /* +1 for drain */
  206. init_attr.cap.max_recv_wr = queue->queue_size + 1;
  207. init_attr.cap.max_recv_sge = 1;
  208. init_attr.cap.max_send_sge = 1 + dev->num_inline_segments;
  209. init_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
  210. init_attr.qp_type = IB_QPT_RC;
  211. init_attr.send_cq = queue->ib_cq;
  212. init_attr.recv_cq = queue->ib_cq;
  213. ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr);
  214. queue->qp = queue->cm_id->qp;
  215. return ret;
  216. }
  217. static void nvme_rdma_exit_request(struct blk_mq_tag_set *set,
  218. struct request *rq, unsigned int hctx_idx)
  219. {
  220. struct nvme_rdma_ctrl *ctrl = set->driver_data;
  221. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  222. int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
  223. struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
  224. struct nvme_rdma_device *dev = queue->device;
  225. nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command),
  226. DMA_TO_DEVICE);
  227. }
  228. static int nvme_rdma_init_request(struct blk_mq_tag_set *set,
  229. struct request *rq, unsigned int hctx_idx,
  230. unsigned int numa_node)
  231. {
  232. struct nvme_rdma_ctrl *ctrl = set->driver_data;
  233. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  234. int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0;
  235. struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx];
  236. struct nvme_rdma_device *dev = queue->device;
  237. struct ib_device *ibdev = dev->dev;
  238. int ret;
  239. nvme_req(rq)->ctrl = &ctrl->ctrl;
  240. ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command),
  241. DMA_TO_DEVICE);
  242. if (ret)
  243. return ret;
  244. req->queue = queue;
  245. return 0;
  246. }
  247. static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
  248. unsigned int hctx_idx)
  249. {
  250. struct nvme_rdma_ctrl *ctrl = data;
  251. struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1];
  252. BUG_ON(hctx_idx >= ctrl->ctrl.queue_count);
  253. hctx->driver_data = queue;
  254. return 0;
  255. }
  256. static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data,
  257. unsigned int hctx_idx)
  258. {
  259. struct nvme_rdma_ctrl *ctrl = data;
  260. struct nvme_rdma_queue *queue = &ctrl->queues[0];
  261. BUG_ON(hctx_idx != 0);
  262. hctx->driver_data = queue;
  263. return 0;
  264. }
  265. static void nvme_rdma_free_dev(struct kref *ref)
  266. {
  267. struct nvme_rdma_device *ndev =
  268. container_of(ref, struct nvme_rdma_device, ref);
  269. mutex_lock(&device_list_mutex);
  270. list_del(&ndev->entry);
  271. mutex_unlock(&device_list_mutex);
  272. ib_dealloc_pd(ndev->pd);
  273. kfree(ndev);
  274. }
  275. static void nvme_rdma_dev_put(struct nvme_rdma_device *dev)
  276. {
  277. kref_put(&dev->ref, nvme_rdma_free_dev);
  278. }
  279. static int nvme_rdma_dev_get(struct nvme_rdma_device *dev)
  280. {
  281. return kref_get_unless_zero(&dev->ref);
  282. }
  283. static struct nvme_rdma_device *
  284. nvme_rdma_find_get_device(struct rdma_cm_id *cm_id)
  285. {
  286. struct nvme_rdma_device *ndev;
  287. mutex_lock(&device_list_mutex);
  288. list_for_each_entry(ndev, &device_list, entry) {
  289. if (ndev->dev->node_guid == cm_id->device->node_guid &&
  290. nvme_rdma_dev_get(ndev))
  291. goto out_unlock;
  292. }
  293. ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
  294. if (!ndev)
  295. goto out_err;
  296. ndev->dev = cm_id->device;
  297. kref_init(&ndev->ref);
  298. ndev->pd = ib_alloc_pd(ndev->dev,
  299. register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY);
  300. if (IS_ERR(ndev->pd))
  301. goto out_free_dev;
  302. if (!(ndev->dev->attrs.device_cap_flags &
  303. IB_DEVICE_MEM_MGT_EXTENSIONS)) {
  304. dev_err(&ndev->dev->dev,
  305. "Memory registrations not supported.\n");
  306. goto out_free_pd;
  307. }
  308. ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS,
  309. ndev->dev->attrs.max_send_sge - 1);
  310. list_add(&ndev->entry, &device_list);
  311. out_unlock:
  312. mutex_unlock(&device_list_mutex);
  313. return ndev;
  314. out_free_pd:
  315. ib_dealloc_pd(ndev->pd);
  316. out_free_dev:
  317. kfree(ndev);
  318. out_err:
  319. mutex_unlock(&device_list_mutex);
  320. return NULL;
  321. }
  322. static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue)
  323. {
  324. struct nvme_rdma_device *dev;
  325. struct ib_device *ibdev;
  326. if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags))
  327. return;
  328. dev = queue->device;
  329. ibdev = dev->dev;
  330. ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs);
  331. /*
  332. * The cm_id object might have been destroyed during RDMA connection
  333. * establishment error flow to avoid getting other cma events, thus
  334. * the destruction of the QP shouldn't use rdma_cm API.
  335. */
  336. ib_destroy_qp(queue->qp);
  337. ib_free_cq(queue->ib_cq);
  338. nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
  339. sizeof(struct nvme_completion), DMA_FROM_DEVICE);
  340. nvme_rdma_dev_put(dev);
  341. }
  342. static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev)
  343. {
  344. return min_t(u32, NVME_RDMA_MAX_SEGMENTS,
  345. ibdev->attrs.max_fast_reg_page_list_len);
  346. }
  347. static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue)
  348. {
  349. struct ib_device *ibdev;
  350. const int send_wr_factor = 3; /* MR, SEND, INV */
  351. const int cq_factor = send_wr_factor + 1; /* + RECV */
  352. int comp_vector, idx = nvme_rdma_queue_idx(queue);
  353. int ret;
  354. queue->device = nvme_rdma_find_get_device(queue->cm_id);
  355. if (!queue->device) {
  356. dev_err(queue->cm_id->device->dev.parent,
  357. "no client data found!\n");
  358. return -ECONNREFUSED;
  359. }
  360. ibdev = queue->device->dev;
  361. /*
  362. * Spread I/O queues completion vectors according their queue index.
  363. * Admin queues can always go on completion vector 0.
  364. */
  365. comp_vector = idx == 0 ? idx : idx - 1;
  366. /* +1 for ib_stop_cq */
  367. queue->ib_cq = ib_alloc_cq(ibdev, queue,
  368. cq_factor * queue->queue_size + 1,
  369. comp_vector, IB_POLL_SOFTIRQ);
  370. if (IS_ERR(queue->ib_cq)) {
  371. ret = PTR_ERR(queue->ib_cq);
  372. goto out_put_dev;
  373. }
  374. ret = nvme_rdma_create_qp(queue, send_wr_factor);
  375. if (ret)
  376. goto out_destroy_ib_cq;
  377. queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size,
  378. sizeof(struct nvme_completion), DMA_FROM_DEVICE);
  379. if (!queue->rsp_ring) {
  380. ret = -ENOMEM;
  381. goto out_destroy_qp;
  382. }
  383. ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs,
  384. queue->queue_size,
  385. IB_MR_TYPE_MEM_REG,
  386. nvme_rdma_get_max_fr_pages(ibdev));
  387. if (ret) {
  388. dev_err(queue->ctrl->ctrl.device,
  389. "failed to initialize MR pool sized %d for QID %d\n",
  390. queue->queue_size, idx);
  391. goto out_destroy_ring;
  392. }
  393. set_bit(NVME_RDMA_Q_TR_READY, &queue->flags);
  394. return 0;
  395. out_destroy_ring:
  396. nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size,
  397. sizeof(struct nvme_completion), DMA_FROM_DEVICE);
  398. out_destroy_qp:
  399. rdma_destroy_qp(queue->cm_id);
  400. out_destroy_ib_cq:
  401. ib_free_cq(queue->ib_cq);
  402. out_put_dev:
  403. nvme_rdma_dev_put(queue->device);
  404. return ret;
  405. }
  406. static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl,
  407. int idx, size_t queue_size)
  408. {
  409. struct nvme_rdma_queue *queue;
  410. struct sockaddr *src_addr = NULL;
  411. int ret;
  412. queue = &ctrl->queues[idx];
  413. queue->ctrl = ctrl;
  414. init_completion(&queue->cm_done);
  415. if (idx > 0)
  416. queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16;
  417. else
  418. queue->cmnd_capsule_len = sizeof(struct nvme_command);
  419. queue->queue_size = queue_size;
  420. queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue,
  421. RDMA_PS_TCP, IB_QPT_RC);
  422. if (IS_ERR(queue->cm_id)) {
  423. dev_info(ctrl->ctrl.device,
  424. "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id));
  425. return PTR_ERR(queue->cm_id);
  426. }
  427. if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
  428. src_addr = (struct sockaddr *)&ctrl->src_addr;
  429. queue->cm_error = -ETIMEDOUT;
  430. ret = rdma_resolve_addr(queue->cm_id, src_addr,
  431. (struct sockaddr *)&ctrl->addr,
  432. NVME_RDMA_CONNECT_TIMEOUT_MS);
  433. if (ret) {
  434. dev_info(ctrl->ctrl.device,
  435. "rdma_resolve_addr failed (%d).\n", ret);
  436. goto out_destroy_cm_id;
  437. }
  438. ret = nvme_rdma_wait_for_cm(queue);
  439. if (ret) {
  440. dev_info(ctrl->ctrl.device,
  441. "rdma connection establishment failed (%d)\n", ret);
  442. goto out_destroy_cm_id;
  443. }
  444. set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags);
  445. return 0;
  446. out_destroy_cm_id:
  447. rdma_destroy_id(queue->cm_id);
  448. nvme_rdma_destroy_queue_ib(queue);
  449. return ret;
  450. }
  451. static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue)
  452. {
  453. if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags))
  454. return;
  455. rdma_disconnect(queue->cm_id);
  456. ib_drain_qp(queue->qp);
  457. }
  458. static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue)
  459. {
  460. if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags))
  461. return;
  462. nvme_rdma_destroy_queue_ib(queue);
  463. rdma_destroy_id(queue->cm_id);
  464. }
  465. static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl)
  466. {
  467. int i;
  468. for (i = 1; i < ctrl->ctrl.queue_count; i++)
  469. nvme_rdma_free_queue(&ctrl->queues[i]);
  470. }
  471. static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl)
  472. {
  473. int i;
  474. for (i = 1; i < ctrl->ctrl.queue_count; i++)
  475. nvme_rdma_stop_queue(&ctrl->queues[i]);
  476. }
  477. static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx)
  478. {
  479. int ret;
  480. if (idx)
  481. ret = nvmf_connect_io_queue(&ctrl->ctrl, idx);
  482. else
  483. ret = nvmf_connect_admin_queue(&ctrl->ctrl);
  484. if (!ret)
  485. set_bit(NVME_RDMA_Q_LIVE, &ctrl->queues[idx].flags);
  486. else
  487. dev_info(ctrl->ctrl.device,
  488. "failed to connect queue: %d ret=%d\n", idx, ret);
  489. return ret;
  490. }
  491. static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl)
  492. {
  493. int i, ret = 0;
  494. for (i = 1; i < ctrl->ctrl.queue_count; i++) {
  495. ret = nvme_rdma_start_queue(ctrl, i);
  496. if (ret)
  497. goto out_stop_queues;
  498. }
  499. return 0;
  500. out_stop_queues:
  501. for (i--; i >= 1; i--)
  502. nvme_rdma_stop_queue(&ctrl->queues[i]);
  503. return ret;
  504. }
  505. static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl)
  506. {
  507. struct nvmf_ctrl_options *opts = ctrl->ctrl.opts;
  508. struct ib_device *ibdev = ctrl->device->dev;
  509. unsigned int nr_io_queues;
  510. int i, ret;
  511. nr_io_queues = min(opts->nr_io_queues, num_online_cpus());
  512. /*
  513. * we map queues according to the device irq vectors for
  514. * optimal locality so we don't need more queues than
  515. * completion vectors.
  516. */
  517. nr_io_queues = min_t(unsigned int, nr_io_queues,
  518. ibdev->num_comp_vectors);
  519. ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues);
  520. if (ret)
  521. return ret;
  522. ctrl->ctrl.queue_count = nr_io_queues + 1;
  523. if (ctrl->ctrl.queue_count < 2)
  524. return 0;
  525. dev_info(ctrl->ctrl.device,
  526. "creating %d I/O queues.\n", nr_io_queues);
  527. for (i = 1; i < ctrl->ctrl.queue_count; i++) {
  528. ret = nvme_rdma_alloc_queue(ctrl, i,
  529. ctrl->ctrl.sqsize + 1);
  530. if (ret)
  531. goto out_free_queues;
  532. }
  533. return 0;
  534. out_free_queues:
  535. for (i--; i >= 1; i--)
  536. nvme_rdma_free_queue(&ctrl->queues[i]);
  537. return ret;
  538. }
  539. static void nvme_rdma_free_tagset(struct nvme_ctrl *nctrl,
  540. struct blk_mq_tag_set *set)
  541. {
  542. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  543. blk_mq_free_tag_set(set);
  544. nvme_rdma_dev_put(ctrl->device);
  545. }
  546. static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl,
  547. bool admin)
  548. {
  549. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  550. struct blk_mq_tag_set *set;
  551. int ret;
  552. if (admin) {
  553. set = &ctrl->admin_tag_set;
  554. memset(set, 0, sizeof(*set));
  555. set->ops = &nvme_rdma_admin_mq_ops;
  556. set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
  557. set->reserved_tags = 2; /* connect + keep-alive */
  558. set->numa_node = NUMA_NO_NODE;
  559. set->cmd_size = sizeof(struct nvme_rdma_request) +
  560. SG_CHUNK_SIZE * sizeof(struct scatterlist);
  561. set->driver_data = ctrl;
  562. set->nr_hw_queues = 1;
  563. set->timeout = ADMIN_TIMEOUT;
  564. set->flags = BLK_MQ_F_NO_SCHED;
  565. } else {
  566. set = &ctrl->tag_set;
  567. memset(set, 0, sizeof(*set));
  568. set->ops = &nvme_rdma_mq_ops;
  569. set->queue_depth = nctrl->sqsize + 1;
  570. set->reserved_tags = 1; /* fabric connect */
  571. set->numa_node = NUMA_NO_NODE;
  572. set->flags = BLK_MQ_F_SHOULD_MERGE;
  573. set->cmd_size = sizeof(struct nvme_rdma_request) +
  574. SG_CHUNK_SIZE * sizeof(struct scatterlist);
  575. set->driver_data = ctrl;
  576. set->nr_hw_queues = nctrl->queue_count - 1;
  577. set->timeout = NVME_IO_TIMEOUT;
  578. }
  579. ret = blk_mq_alloc_tag_set(set);
  580. if (ret)
  581. goto out;
  582. /*
  583. * We need a reference on the device as long as the tag_set is alive,
  584. * as the MRs in the request structures need a valid ib_device.
  585. */
  586. ret = nvme_rdma_dev_get(ctrl->device);
  587. if (!ret) {
  588. ret = -EINVAL;
  589. goto out_free_tagset;
  590. }
  591. return set;
  592. out_free_tagset:
  593. blk_mq_free_tag_set(set);
  594. out:
  595. return ERR_PTR(ret);
  596. }
  597. static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl,
  598. bool remove)
  599. {
  600. if (remove) {
  601. blk_cleanup_queue(ctrl->ctrl.admin_q);
  602. nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.admin_tagset);
  603. }
  604. if (ctrl->async_event_sqe.data) {
  605. nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
  606. sizeof(struct nvme_command), DMA_TO_DEVICE);
  607. ctrl->async_event_sqe.data = NULL;
  608. }
  609. nvme_rdma_free_queue(&ctrl->queues[0]);
  610. }
  611. static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl,
  612. bool new)
  613. {
  614. int error;
  615. error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH);
  616. if (error)
  617. return error;
  618. ctrl->device = ctrl->queues[0].device;
  619. ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev);
  620. error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe,
  621. sizeof(struct nvme_command), DMA_TO_DEVICE);
  622. if (error)
  623. goto out_free_queue;
  624. if (new) {
  625. ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true);
  626. if (IS_ERR(ctrl->ctrl.admin_tagset)) {
  627. error = PTR_ERR(ctrl->ctrl.admin_tagset);
  628. goto out_free_async_qe;
  629. }
  630. ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set);
  631. if (IS_ERR(ctrl->ctrl.admin_q)) {
  632. error = PTR_ERR(ctrl->ctrl.admin_q);
  633. goto out_free_tagset;
  634. }
  635. }
  636. error = nvme_rdma_start_queue(ctrl, 0);
  637. if (error)
  638. goto out_cleanup_queue;
  639. error = ctrl->ctrl.ops->reg_read64(&ctrl->ctrl, NVME_REG_CAP,
  640. &ctrl->ctrl.cap);
  641. if (error) {
  642. dev_err(ctrl->ctrl.device,
  643. "prop_get NVME_REG_CAP failed\n");
  644. goto out_stop_queue;
  645. }
  646. ctrl->ctrl.sqsize =
  647. min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize);
  648. error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);
  649. if (error)
  650. goto out_stop_queue;
  651. ctrl->ctrl.max_hw_sectors =
  652. (ctrl->max_fr_pages - 1) << (ilog2(SZ_4K) - 9);
  653. error = nvme_init_identify(&ctrl->ctrl);
  654. if (error)
  655. goto out_stop_queue;
  656. return 0;
  657. out_stop_queue:
  658. nvme_rdma_stop_queue(&ctrl->queues[0]);
  659. out_cleanup_queue:
  660. if (new)
  661. blk_cleanup_queue(ctrl->ctrl.admin_q);
  662. out_free_tagset:
  663. if (new)
  664. nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.admin_tagset);
  665. out_free_async_qe:
  666. nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe,
  667. sizeof(struct nvme_command), DMA_TO_DEVICE);
  668. out_free_queue:
  669. nvme_rdma_free_queue(&ctrl->queues[0]);
  670. return error;
  671. }
  672. static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl,
  673. bool remove)
  674. {
  675. if (remove) {
  676. blk_cleanup_queue(ctrl->ctrl.connect_q);
  677. nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.tagset);
  678. }
  679. nvme_rdma_free_io_queues(ctrl);
  680. }
  681. static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new)
  682. {
  683. int ret;
  684. ret = nvme_rdma_alloc_io_queues(ctrl);
  685. if (ret)
  686. return ret;
  687. if (new) {
  688. ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false);
  689. if (IS_ERR(ctrl->ctrl.tagset)) {
  690. ret = PTR_ERR(ctrl->ctrl.tagset);
  691. goto out_free_io_queues;
  692. }
  693. ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set);
  694. if (IS_ERR(ctrl->ctrl.connect_q)) {
  695. ret = PTR_ERR(ctrl->ctrl.connect_q);
  696. goto out_free_tag_set;
  697. }
  698. } else {
  699. blk_mq_update_nr_hw_queues(&ctrl->tag_set,
  700. ctrl->ctrl.queue_count - 1);
  701. }
  702. ret = nvme_rdma_start_io_queues(ctrl);
  703. if (ret)
  704. goto out_cleanup_connect_q;
  705. return 0;
  706. out_cleanup_connect_q:
  707. if (new)
  708. blk_cleanup_queue(ctrl->ctrl.connect_q);
  709. out_free_tag_set:
  710. if (new)
  711. nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.tagset);
  712. out_free_io_queues:
  713. nvme_rdma_free_io_queues(ctrl);
  714. return ret;
  715. }
  716. static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl,
  717. bool remove)
  718. {
  719. blk_mq_quiesce_queue(ctrl->ctrl.admin_q);
  720. nvme_rdma_stop_queue(&ctrl->queues[0]);
  721. blk_mq_tagset_busy_iter(&ctrl->admin_tag_set, nvme_cancel_request,
  722. &ctrl->ctrl);
  723. blk_mq_unquiesce_queue(ctrl->ctrl.admin_q);
  724. nvme_rdma_destroy_admin_queue(ctrl, remove);
  725. }
  726. static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl,
  727. bool remove)
  728. {
  729. if (ctrl->ctrl.queue_count > 1) {
  730. nvme_stop_queues(&ctrl->ctrl);
  731. nvme_rdma_stop_io_queues(ctrl);
  732. blk_mq_tagset_busy_iter(&ctrl->tag_set, nvme_cancel_request,
  733. &ctrl->ctrl);
  734. if (remove)
  735. nvme_start_queues(&ctrl->ctrl);
  736. nvme_rdma_destroy_io_queues(ctrl, remove);
  737. }
  738. }
  739. static void nvme_rdma_stop_ctrl(struct nvme_ctrl *nctrl)
  740. {
  741. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  742. cancel_work_sync(&ctrl->err_work);
  743. cancel_delayed_work_sync(&ctrl->reconnect_work);
  744. }
  745. static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl)
  746. {
  747. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl);
  748. if (list_empty(&ctrl->list))
  749. goto free_ctrl;
  750. mutex_lock(&nvme_rdma_ctrl_mutex);
  751. list_del(&ctrl->list);
  752. mutex_unlock(&nvme_rdma_ctrl_mutex);
  753. nvmf_free_options(nctrl->opts);
  754. free_ctrl:
  755. kfree(ctrl->queues);
  756. kfree(ctrl);
  757. }
  758. static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl)
  759. {
  760. /* If we are resetting/deleting then do nothing */
  761. if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) {
  762. WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW ||
  763. ctrl->ctrl.state == NVME_CTRL_LIVE);
  764. return;
  765. }
  766. if (nvmf_should_reconnect(&ctrl->ctrl)) {
  767. dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n",
  768. ctrl->ctrl.opts->reconnect_delay);
  769. queue_delayed_work(nvme_wq, &ctrl->reconnect_work,
  770. ctrl->ctrl.opts->reconnect_delay * HZ);
  771. } else {
  772. nvme_delete_ctrl(&ctrl->ctrl);
  773. }
  774. }
  775. static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new)
  776. {
  777. int ret = -EINVAL;
  778. bool changed;
  779. ret = nvme_rdma_configure_admin_queue(ctrl, new);
  780. if (ret)
  781. return ret;
  782. if (ctrl->ctrl.icdoff) {
  783. dev_err(ctrl->ctrl.device, "icdoff is not supported!\n");
  784. goto destroy_admin;
  785. }
  786. if (!(ctrl->ctrl.sgls & (1 << 2))) {
  787. dev_err(ctrl->ctrl.device,
  788. "Mandatory keyed sgls are not supported!\n");
  789. goto destroy_admin;
  790. }
  791. if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) {
  792. dev_warn(ctrl->ctrl.device,
  793. "queue_size %zu > ctrl sqsize %u, clamping down\n",
  794. ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1);
  795. }
  796. if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) {
  797. dev_warn(ctrl->ctrl.device,
  798. "sqsize %u > ctrl maxcmd %u, clamping down\n",
  799. ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd);
  800. ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1;
  801. }
  802. if (ctrl->ctrl.sgls & (1 << 20))
  803. ctrl->use_inline_data = true;
  804. if (ctrl->ctrl.queue_count > 1) {
  805. ret = nvme_rdma_configure_io_queues(ctrl, new);
  806. if (ret)
  807. goto destroy_admin;
  808. }
  809. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE);
  810. if (!changed) {
  811. /* state change failure is ok if we're in DELETING state */
  812. WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING);
  813. ret = -EINVAL;
  814. goto destroy_io;
  815. }
  816. nvme_start_ctrl(&ctrl->ctrl);
  817. return 0;
  818. destroy_io:
  819. if (ctrl->ctrl.queue_count > 1)
  820. nvme_rdma_destroy_io_queues(ctrl, new);
  821. destroy_admin:
  822. nvme_rdma_stop_queue(&ctrl->queues[0]);
  823. nvme_rdma_destroy_admin_queue(ctrl, new);
  824. return ret;
  825. }
  826. static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work)
  827. {
  828. struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work),
  829. struct nvme_rdma_ctrl, reconnect_work);
  830. ++ctrl->ctrl.nr_reconnects;
  831. if (nvme_rdma_setup_ctrl(ctrl, false))
  832. goto requeue;
  833. dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n",
  834. ctrl->ctrl.nr_reconnects);
  835. ctrl->ctrl.nr_reconnects = 0;
  836. return;
  837. requeue:
  838. dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n",
  839. ctrl->ctrl.nr_reconnects);
  840. nvme_rdma_reconnect_or_remove(ctrl);
  841. }
  842. static void nvme_rdma_error_recovery_work(struct work_struct *work)
  843. {
  844. struct nvme_rdma_ctrl *ctrl = container_of(work,
  845. struct nvme_rdma_ctrl, err_work);
  846. nvme_stop_keep_alive(&ctrl->ctrl);
  847. nvme_rdma_teardown_io_queues(ctrl, false);
  848. nvme_start_queues(&ctrl->ctrl);
  849. nvme_rdma_teardown_admin_queue(ctrl, false);
  850. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
  851. /* state change failure is ok if we're in DELETING state */
  852. WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING);
  853. return;
  854. }
  855. nvme_rdma_reconnect_or_remove(ctrl);
  856. }
  857. static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl)
  858. {
  859. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING))
  860. return;
  861. queue_work(nvme_wq, &ctrl->err_work);
  862. }
  863. static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc,
  864. const char *op)
  865. {
  866. struct nvme_rdma_queue *queue = cq->cq_context;
  867. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  868. if (ctrl->ctrl.state == NVME_CTRL_LIVE)
  869. dev_info(ctrl->ctrl.device,
  870. "%s for CQE 0x%p failed with status %s (%d)\n",
  871. op, wc->wr_cqe,
  872. ib_wc_status_msg(wc->status), wc->status);
  873. nvme_rdma_error_recovery(ctrl);
  874. }
  875. static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc)
  876. {
  877. if (unlikely(wc->status != IB_WC_SUCCESS))
  878. nvme_rdma_wr_error(cq, wc, "MEMREG");
  879. }
  880. static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc)
  881. {
  882. struct nvme_rdma_request *req =
  883. container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe);
  884. struct request *rq = blk_mq_rq_from_pdu(req);
  885. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  886. nvme_rdma_wr_error(cq, wc, "LOCAL_INV");
  887. return;
  888. }
  889. if (refcount_dec_and_test(&req->ref))
  890. nvme_end_request(rq, req->status, req->result);
  891. }
  892. static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue,
  893. struct nvme_rdma_request *req)
  894. {
  895. struct ib_send_wr wr = {
  896. .opcode = IB_WR_LOCAL_INV,
  897. .next = NULL,
  898. .num_sge = 0,
  899. .send_flags = IB_SEND_SIGNALED,
  900. .ex.invalidate_rkey = req->mr->rkey,
  901. };
  902. req->reg_cqe.done = nvme_rdma_inv_rkey_done;
  903. wr.wr_cqe = &req->reg_cqe;
  904. return ib_post_send(queue->qp, &wr, NULL);
  905. }
  906. static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue,
  907. struct request *rq)
  908. {
  909. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  910. struct nvme_rdma_device *dev = queue->device;
  911. struct ib_device *ibdev = dev->dev;
  912. if (!blk_rq_payload_bytes(rq))
  913. return;
  914. if (req->mr) {
  915. ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
  916. req->mr = NULL;
  917. }
  918. ib_dma_unmap_sg(ibdev, req->sg_table.sgl,
  919. req->nents, rq_data_dir(rq) ==
  920. WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  921. nvme_cleanup_cmd(rq);
  922. sg_free_table_chained(&req->sg_table, true);
  923. }
  924. static int nvme_rdma_set_sg_null(struct nvme_command *c)
  925. {
  926. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  927. sg->addr = 0;
  928. put_unaligned_le24(0, sg->length);
  929. put_unaligned_le32(0, sg->key);
  930. sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
  931. return 0;
  932. }
  933. static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue,
  934. struct nvme_rdma_request *req, struct nvme_command *c,
  935. int count)
  936. {
  937. struct nvme_sgl_desc *sg = &c->common.dptr.sgl;
  938. struct scatterlist *sgl = req->sg_table.sgl;
  939. struct ib_sge *sge = &req->sge[1];
  940. u32 len = 0;
  941. int i;
  942. for (i = 0; i < count; i++, sgl++, sge++) {
  943. sge->addr = sg_dma_address(sgl);
  944. sge->length = sg_dma_len(sgl);
  945. sge->lkey = queue->device->pd->local_dma_lkey;
  946. len += sge->length;
  947. }
  948. sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff);
  949. sg->length = cpu_to_le32(len);
  950. sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET;
  951. req->num_sge += count;
  952. return 0;
  953. }
  954. static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue,
  955. struct nvme_rdma_request *req, struct nvme_command *c)
  956. {
  957. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  958. sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl));
  959. put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length);
  960. put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key);
  961. sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4;
  962. return 0;
  963. }
  964. static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue,
  965. struct nvme_rdma_request *req, struct nvme_command *c,
  966. int count)
  967. {
  968. struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl;
  969. int nr;
  970. req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs);
  971. if (WARN_ON_ONCE(!req->mr))
  972. return -EAGAIN;
  973. /*
  974. * Align the MR to a 4K page size to match the ctrl page size and
  975. * the block virtual boundary.
  976. */
  977. nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, SZ_4K);
  978. if (unlikely(nr < count)) {
  979. ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr);
  980. req->mr = NULL;
  981. if (nr < 0)
  982. return nr;
  983. return -EINVAL;
  984. }
  985. ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey));
  986. req->reg_cqe.done = nvme_rdma_memreg_done;
  987. memset(&req->reg_wr, 0, sizeof(req->reg_wr));
  988. req->reg_wr.wr.opcode = IB_WR_REG_MR;
  989. req->reg_wr.wr.wr_cqe = &req->reg_cqe;
  990. req->reg_wr.wr.num_sge = 0;
  991. req->reg_wr.mr = req->mr;
  992. req->reg_wr.key = req->mr->rkey;
  993. req->reg_wr.access = IB_ACCESS_LOCAL_WRITE |
  994. IB_ACCESS_REMOTE_READ |
  995. IB_ACCESS_REMOTE_WRITE;
  996. sg->addr = cpu_to_le64(req->mr->iova);
  997. put_unaligned_le24(req->mr->length, sg->length);
  998. put_unaligned_le32(req->mr->rkey, sg->key);
  999. sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) |
  1000. NVME_SGL_FMT_INVALIDATE;
  1001. return 0;
  1002. }
  1003. static int nvme_rdma_map_data(struct nvme_rdma_queue *queue,
  1004. struct request *rq, struct nvme_command *c)
  1005. {
  1006. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1007. struct nvme_rdma_device *dev = queue->device;
  1008. struct ib_device *ibdev = dev->dev;
  1009. int count, ret;
  1010. req->num_sge = 1;
  1011. refcount_set(&req->ref, 2); /* send and recv completions */
  1012. c->common.flags |= NVME_CMD_SGL_METABUF;
  1013. if (!blk_rq_payload_bytes(rq))
  1014. return nvme_rdma_set_sg_null(c);
  1015. req->sg_table.sgl = req->first_sgl;
  1016. ret = sg_alloc_table_chained(&req->sg_table,
  1017. blk_rq_nr_phys_segments(rq), req->sg_table.sgl);
  1018. if (ret)
  1019. return -ENOMEM;
  1020. req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl);
  1021. count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents,
  1022. rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  1023. if (unlikely(count <= 0)) {
  1024. ret = -EIO;
  1025. goto out_free_table;
  1026. }
  1027. if (count <= dev->num_inline_segments) {
  1028. if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) &&
  1029. queue->ctrl->use_inline_data &&
  1030. blk_rq_payload_bytes(rq) <=
  1031. nvme_rdma_inline_data_size(queue)) {
  1032. ret = nvme_rdma_map_sg_inline(queue, req, c, count);
  1033. goto out;
  1034. }
  1035. if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) {
  1036. ret = nvme_rdma_map_sg_single(queue, req, c);
  1037. goto out;
  1038. }
  1039. }
  1040. ret = nvme_rdma_map_sg_fr(queue, req, c, count);
  1041. out:
  1042. if (unlikely(ret))
  1043. goto out_unmap_sg;
  1044. return 0;
  1045. out_unmap_sg:
  1046. ib_dma_unmap_sg(ibdev, req->sg_table.sgl,
  1047. req->nents, rq_data_dir(rq) ==
  1048. WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
  1049. out_free_table:
  1050. sg_free_table_chained(&req->sg_table, true);
  1051. return ret;
  1052. }
  1053. static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
  1054. {
  1055. struct nvme_rdma_qe *qe =
  1056. container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
  1057. struct nvme_rdma_request *req =
  1058. container_of(qe, struct nvme_rdma_request, sqe);
  1059. struct request *rq = blk_mq_rq_from_pdu(req);
  1060. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  1061. nvme_rdma_wr_error(cq, wc, "SEND");
  1062. return;
  1063. }
  1064. if (refcount_dec_and_test(&req->ref))
  1065. nvme_end_request(rq, req->status, req->result);
  1066. }
  1067. static int nvme_rdma_post_send(struct nvme_rdma_queue *queue,
  1068. struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge,
  1069. struct ib_send_wr *first)
  1070. {
  1071. struct ib_send_wr wr;
  1072. int ret;
  1073. sge->addr = qe->dma;
  1074. sge->length = sizeof(struct nvme_command),
  1075. sge->lkey = queue->device->pd->local_dma_lkey;
  1076. wr.next = NULL;
  1077. wr.wr_cqe = &qe->cqe;
  1078. wr.sg_list = sge;
  1079. wr.num_sge = num_sge;
  1080. wr.opcode = IB_WR_SEND;
  1081. wr.send_flags = IB_SEND_SIGNALED;
  1082. if (first)
  1083. first->next = &wr;
  1084. else
  1085. first = &wr;
  1086. ret = ib_post_send(queue->qp, first, NULL);
  1087. if (unlikely(ret)) {
  1088. dev_err(queue->ctrl->ctrl.device,
  1089. "%s failed with error code %d\n", __func__, ret);
  1090. }
  1091. return ret;
  1092. }
  1093. static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue,
  1094. struct nvme_rdma_qe *qe)
  1095. {
  1096. struct ib_recv_wr wr;
  1097. struct ib_sge list;
  1098. int ret;
  1099. list.addr = qe->dma;
  1100. list.length = sizeof(struct nvme_completion);
  1101. list.lkey = queue->device->pd->local_dma_lkey;
  1102. qe->cqe.done = nvme_rdma_recv_done;
  1103. wr.next = NULL;
  1104. wr.wr_cqe = &qe->cqe;
  1105. wr.sg_list = &list;
  1106. wr.num_sge = 1;
  1107. ret = ib_post_recv(queue->qp, &wr, NULL);
  1108. if (unlikely(ret)) {
  1109. dev_err(queue->ctrl->ctrl.device,
  1110. "%s failed with error code %d\n", __func__, ret);
  1111. }
  1112. return ret;
  1113. }
  1114. static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue)
  1115. {
  1116. u32 queue_idx = nvme_rdma_queue_idx(queue);
  1117. if (queue_idx == 0)
  1118. return queue->ctrl->admin_tag_set.tags[queue_idx];
  1119. return queue->ctrl->tag_set.tags[queue_idx - 1];
  1120. }
  1121. static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc)
  1122. {
  1123. if (unlikely(wc->status != IB_WC_SUCCESS))
  1124. nvme_rdma_wr_error(cq, wc, "ASYNC");
  1125. }
  1126. static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg)
  1127. {
  1128. struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg);
  1129. struct nvme_rdma_queue *queue = &ctrl->queues[0];
  1130. struct ib_device *dev = queue->device->dev;
  1131. struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe;
  1132. struct nvme_command *cmd = sqe->data;
  1133. struct ib_sge sge;
  1134. int ret;
  1135. ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE);
  1136. memset(cmd, 0, sizeof(*cmd));
  1137. cmd->common.opcode = nvme_admin_async_event;
  1138. cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH;
  1139. cmd->common.flags |= NVME_CMD_SGL_METABUF;
  1140. nvme_rdma_set_sg_null(cmd);
  1141. sqe->cqe.done = nvme_rdma_async_done;
  1142. ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd),
  1143. DMA_TO_DEVICE);
  1144. ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL);
  1145. WARN_ON_ONCE(ret);
  1146. }
  1147. static int nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue,
  1148. struct nvme_completion *cqe, struct ib_wc *wc, int tag)
  1149. {
  1150. struct request *rq;
  1151. struct nvme_rdma_request *req;
  1152. int ret = 0;
  1153. rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id);
  1154. if (!rq) {
  1155. dev_err(queue->ctrl->ctrl.device,
  1156. "tag 0x%x on QP %#x not found\n",
  1157. cqe->command_id, queue->qp->qp_num);
  1158. nvme_rdma_error_recovery(queue->ctrl);
  1159. return ret;
  1160. }
  1161. req = blk_mq_rq_to_pdu(rq);
  1162. req->status = cqe->status;
  1163. req->result = cqe->result;
  1164. if (wc->wc_flags & IB_WC_WITH_INVALIDATE) {
  1165. if (unlikely(wc->ex.invalidate_rkey != req->mr->rkey)) {
  1166. dev_err(queue->ctrl->ctrl.device,
  1167. "Bogus remote invalidation for rkey %#x\n",
  1168. req->mr->rkey);
  1169. nvme_rdma_error_recovery(queue->ctrl);
  1170. }
  1171. } else if (req->mr) {
  1172. ret = nvme_rdma_inv_rkey(queue, req);
  1173. if (unlikely(ret < 0)) {
  1174. dev_err(queue->ctrl->ctrl.device,
  1175. "Queueing INV WR for rkey %#x failed (%d)\n",
  1176. req->mr->rkey, ret);
  1177. nvme_rdma_error_recovery(queue->ctrl);
  1178. }
  1179. /* the local invalidation completion will end the request */
  1180. return 0;
  1181. }
  1182. if (refcount_dec_and_test(&req->ref)) {
  1183. if (rq->tag == tag)
  1184. ret = 1;
  1185. nvme_end_request(rq, req->status, req->result);
  1186. }
  1187. return ret;
  1188. }
  1189. static int __nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc, int tag)
  1190. {
  1191. struct nvme_rdma_qe *qe =
  1192. container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe);
  1193. struct nvme_rdma_queue *queue = cq->cq_context;
  1194. struct ib_device *ibdev = queue->device->dev;
  1195. struct nvme_completion *cqe = qe->data;
  1196. const size_t len = sizeof(struct nvme_completion);
  1197. int ret = 0;
  1198. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  1199. nvme_rdma_wr_error(cq, wc, "RECV");
  1200. return 0;
  1201. }
  1202. ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE);
  1203. /*
  1204. * AEN requests are special as they don't time out and can
  1205. * survive any kind of queue freeze and often don't respond to
  1206. * aborts. We don't even bother to allocate a struct request
  1207. * for them but rather special case them here.
  1208. */
  1209. if (unlikely(nvme_rdma_queue_idx(queue) == 0 &&
  1210. cqe->command_id >= NVME_AQ_BLK_MQ_DEPTH))
  1211. nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status,
  1212. &cqe->result);
  1213. else
  1214. ret = nvme_rdma_process_nvme_rsp(queue, cqe, wc, tag);
  1215. ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE);
  1216. nvme_rdma_post_recv(queue, qe);
  1217. return ret;
  1218. }
  1219. static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
  1220. {
  1221. __nvme_rdma_recv_done(cq, wc, -1);
  1222. }
  1223. static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue)
  1224. {
  1225. int ret, i;
  1226. for (i = 0; i < queue->queue_size; i++) {
  1227. ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]);
  1228. if (ret)
  1229. goto out_destroy_queue_ib;
  1230. }
  1231. return 0;
  1232. out_destroy_queue_ib:
  1233. nvme_rdma_destroy_queue_ib(queue);
  1234. return ret;
  1235. }
  1236. static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue,
  1237. struct rdma_cm_event *ev)
  1238. {
  1239. struct rdma_cm_id *cm_id = queue->cm_id;
  1240. int status = ev->status;
  1241. const char *rej_msg;
  1242. const struct nvme_rdma_cm_rej *rej_data;
  1243. u8 rej_data_len;
  1244. rej_msg = rdma_reject_msg(cm_id, status);
  1245. rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len);
  1246. if (rej_data && rej_data_len >= sizeof(u16)) {
  1247. u16 sts = le16_to_cpu(rej_data->sts);
  1248. dev_err(queue->ctrl->ctrl.device,
  1249. "Connect rejected: status %d (%s) nvme status %d (%s).\n",
  1250. status, rej_msg, sts, nvme_rdma_cm_msg(sts));
  1251. } else {
  1252. dev_err(queue->ctrl->ctrl.device,
  1253. "Connect rejected: status %d (%s).\n", status, rej_msg);
  1254. }
  1255. return -ECONNRESET;
  1256. }
  1257. static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue)
  1258. {
  1259. int ret;
  1260. ret = nvme_rdma_create_queue_ib(queue);
  1261. if (ret)
  1262. return ret;
  1263. ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS);
  1264. if (ret) {
  1265. dev_err(queue->ctrl->ctrl.device,
  1266. "rdma_resolve_route failed (%d).\n",
  1267. queue->cm_error);
  1268. goto out_destroy_queue;
  1269. }
  1270. return 0;
  1271. out_destroy_queue:
  1272. nvme_rdma_destroy_queue_ib(queue);
  1273. return ret;
  1274. }
  1275. static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue)
  1276. {
  1277. struct nvme_rdma_ctrl *ctrl = queue->ctrl;
  1278. struct rdma_conn_param param = { };
  1279. struct nvme_rdma_cm_req priv = { };
  1280. int ret;
  1281. param.qp_num = queue->qp->qp_num;
  1282. param.flow_control = 1;
  1283. param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom;
  1284. /* maximum retry count */
  1285. param.retry_count = 7;
  1286. param.rnr_retry_count = 7;
  1287. param.private_data = &priv;
  1288. param.private_data_len = sizeof(priv);
  1289. priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
  1290. priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue));
  1291. /*
  1292. * set the admin queue depth to the minimum size
  1293. * specified by the Fabrics standard.
  1294. */
  1295. if (priv.qid == 0) {
  1296. priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH);
  1297. priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1);
  1298. } else {
  1299. /*
  1300. * current interpretation of the fabrics spec
  1301. * is at minimum you make hrqsize sqsize+1, or a
  1302. * 1's based representation of sqsize.
  1303. */
  1304. priv.hrqsize = cpu_to_le16(queue->queue_size);
  1305. priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize);
  1306. }
  1307. ret = rdma_connect(queue->cm_id, &param);
  1308. if (ret) {
  1309. dev_err(ctrl->ctrl.device,
  1310. "rdma_connect failed (%d).\n", ret);
  1311. goto out_destroy_queue_ib;
  1312. }
  1313. return 0;
  1314. out_destroy_queue_ib:
  1315. nvme_rdma_destroy_queue_ib(queue);
  1316. return ret;
  1317. }
  1318. static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id,
  1319. struct rdma_cm_event *ev)
  1320. {
  1321. struct nvme_rdma_queue *queue = cm_id->context;
  1322. int cm_error = 0;
  1323. dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n",
  1324. rdma_event_msg(ev->event), ev->event,
  1325. ev->status, cm_id);
  1326. switch (ev->event) {
  1327. case RDMA_CM_EVENT_ADDR_RESOLVED:
  1328. cm_error = nvme_rdma_addr_resolved(queue);
  1329. break;
  1330. case RDMA_CM_EVENT_ROUTE_RESOLVED:
  1331. cm_error = nvme_rdma_route_resolved(queue);
  1332. break;
  1333. case RDMA_CM_EVENT_ESTABLISHED:
  1334. queue->cm_error = nvme_rdma_conn_established(queue);
  1335. /* complete cm_done regardless of success/failure */
  1336. complete(&queue->cm_done);
  1337. return 0;
  1338. case RDMA_CM_EVENT_REJECTED:
  1339. nvme_rdma_destroy_queue_ib(queue);
  1340. cm_error = nvme_rdma_conn_rejected(queue, ev);
  1341. break;
  1342. case RDMA_CM_EVENT_ROUTE_ERROR:
  1343. case RDMA_CM_EVENT_CONNECT_ERROR:
  1344. case RDMA_CM_EVENT_UNREACHABLE:
  1345. nvme_rdma_destroy_queue_ib(queue);
  1346. /* fall through */
  1347. case RDMA_CM_EVENT_ADDR_ERROR:
  1348. dev_dbg(queue->ctrl->ctrl.device,
  1349. "CM error event %d\n", ev->event);
  1350. cm_error = -ECONNRESET;
  1351. break;
  1352. case RDMA_CM_EVENT_DISCONNECTED:
  1353. case RDMA_CM_EVENT_ADDR_CHANGE:
  1354. case RDMA_CM_EVENT_TIMEWAIT_EXIT:
  1355. dev_dbg(queue->ctrl->ctrl.device,
  1356. "disconnect received - connection closed\n");
  1357. nvme_rdma_error_recovery(queue->ctrl);
  1358. break;
  1359. case RDMA_CM_EVENT_DEVICE_REMOVAL:
  1360. /* device removal is handled via the ib_client API */
  1361. break;
  1362. default:
  1363. dev_err(queue->ctrl->ctrl.device,
  1364. "Unexpected RDMA CM event (%d)\n", ev->event);
  1365. nvme_rdma_error_recovery(queue->ctrl);
  1366. break;
  1367. }
  1368. if (cm_error) {
  1369. queue->cm_error = cm_error;
  1370. complete(&queue->cm_done);
  1371. }
  1372. return 0;
  1373. }
  1374. static enum blk_eh_timer_return
  1375. nvme_rdma_timeout(struct request *rq, bool reserved)
  1376. {
  1377. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1378. dev_warn(req->queue->ctrl->ctrl.device,
  1379. "I/O %d QID %d timeout, reset controller\n",
  1380. rq->tag, nvme_rdma_queue_idx(req->queue));
  1381. /* queue error recovery */
  1382. nvme_rdma_error_recovery(req->queue->ctrl);
  1383. /* fail with DNR on cmd timeout */
  1384. nvme_req(rq)->status = NVME_SC_ABORT_REQ | NVME_SC_DNR;
  1385. return BLK_EH_DONE;
  1386. }
  1387. static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx,
  1388. const struct blk_mq_queue_data *bd)
  1389. {
  1390. struct nvme_ns *ns = hctx->queue->queuedata;
  1391. struct nvme_rdma_queue *queue = hctx->driver_data;
  1392. struct request *rq = bd->rq;
  1393. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1394. struct nvme_rdma_qe *sqe = &req->sqe;
  1395. struct nvme_command *c = sqe->data;
  1396. struct ib_device *dev;
  1397. bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags);
  1398. blk_status_t ret;
  1399. int err;
  1400. WARN_ON_ONCE(rq->tag < 0);
  1401. if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready))
  1402. return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq);
  1403. dev = queue->device->dev;
  1404. ib_dma_sync_single_for_cpu(dev, sqe->dma,
  1405. sizeof(struct nvme_command), DMA_TO_DEVICE);
  1406. ret = nvme_setup_cmd(ns, rq, c);
  1407. if (ret)
  1408. return ret;
  1409. blk_mq_start_request(rq);
  1410. err = nvme_rdma_map_data(queue, rq, c);
  1411. if (unlikely(err < 0)) {
  1412. dev_err(queue->ctrl->ctrl.device,
  1413. "Failed to map data (%d)\n", err);
  1414. nvme_cleanup_cmd(rq);
  1415. goto err;
  1416. }
  1417. sqe->cqe.done = nvme_rdma_send_done;
  1418. ib_dma_sync_single_for_device(dev, sqe->dma,
  1419. sizeof(struct nvme_command), DMA_TO_DEVICE);
  1420. err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge,
  1421. req->mr ? &req->reg_wr.wr : NULL);
  1422. if (unlikely(err)) {
  1423. nvme_rdma_unmap_data(queue, rq);
  1424. goto err;
  1425. }
  1426. return BLK_STS_OK;
  1427. err:
  1428. if (err == -ENOMEM || err == -EAGAIN)
  1429. return BLK_STS_RESOURCE;
  1430. return BLK_STS_IOERR;
  1431. }
  1432. static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag)
  1433. {
  1434. struct nvme_rdma_queue *queue = hctx->driver_data;
  1435. struct ib_cq *cq = queue->ib_cq;
  1436. struct ib_wc wc;
  1437. int found = 0;
  1438. while (ib_poll_cq(cq, 1, &wc) > 0) {
  1439. struct ib_cqe *cqe = wc.wr_cqe;
  1440. if (cqe) {
  1441. if (cqe->done == nvme_rdma_recv_done)
  1442. found |= __nvme_rdma_recv_done(cq, &wc, tag);
  1443. else
  1444. cqe->done(cq, &wc);
  1445. }
  1446. }
  1447. return found;
  1448. }
  1449. static void nvme_rdma_complete_rq(struct request *rq)
  1450. {
  1451. struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq);
  1452. nvme_rdma_unmap_data(req->queue, rq);
  1453. nvme_complete_rq(rq);
  1454. }
  1455. static int nvme_rdma_map_queues(struct blk_mq_tag_set *set)
  1456. {
  1457. struct nvme_rdma_ctrl *ctrl = set->driver_data;
  1458. return blk_mq_rdma_map_queues(set, ctrl->device->dev, 0);
  1459. }
  1460. static const struct blk_mq_ops nvme_rdma_mq_ops = {
  1461. .queue_rq = nvme_rdma_queue_rq,
  1462. .complete = nvme_rdma_complete_rq,
  1463. .init_request = nvme_rdma_init_request,
  1464. .exit_request = nvme_rdma_exit_request,
  1465. .init_hctx = nvme_rdma_init_hctx,
  1466. .poll = nvme_rdma_poll,
  1467. .timeout = nvme_rdma_timeout,
  1468. .map_queues = nvme_rdma_map_queues,
  1469. };
  1470. static const struct blk_mq_ops nvme_rdma_admin_mq_ops = {
  1471. .queue_rq = nvme_rdma_queue_rq,
  1472. .complete = nvme_rdma_complete_rq,
  1473. .init_request = nvme_rdma_init_request,
  1474. .exit_request = nvme_rdma_exit_request,
  1475. .init_hctx = nvme_rdma_init_admin_hctx,
  1476. .timeout = nvme_rdma_timeout,
  1477. };
  1478. static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown)
  1479. {
  1480. nvme_rdma_teardown_io_queues(ctrl, shutdown);
  1481. if (shutdown)
  1482. nvme_shutdown_ctrl(&ctrl->ctrl);
  1483. else
  1484. nvme_disable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap);
  1485. nvme_rdma_teardown_admin_queue(ctrl, shutdown);
  1486. }
  1487. static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl)
  1488. {
  1489. nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true);
  1490. }
  1491. static void nvme_rdma_reset_ctrl_work(struct work_struct *work)
  1492. {
  1493. struct nvme_rdma_ctrl *ctrl =
  1494. container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work);
  1495. nvme_stop_ctrl(&ctrl->ctrl);
  1496. nvme_rdma_shutdown_ctrl(ctrl, false);
  1497. if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) {
  1498. /* state change failure should never happen */
  1499. WARN_ON_ONCE(1);
  1500. return;
  1501. }
  1502. if (nvme_rdma_setup_ctrl(ctrl, false))
  1503. goto out_fail;
  1504. return;
  1505. out_fail:
  1506. ++ctrl->ctrl.nr_reconnects;
  1507. nvme_rdma_reconnect_or_remove(ctrl);
  1508. }
  1509. static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = {
  1510. .name = "rdma",
  1511. .module = THIS_MODULE,
  1512. .flags = NVME_F_FABRICS,
  1513. .reg_read32 = nvmf_reg_read32,
  1514. .reg_read64 = nvmf_reg_read64,
  1515. .reg_write32 = nvmf_reg_write32,
  1516. .free_ctrl = nvme_rdma_free_ctrl,
  1517. .submit_async_event = nvme_rdma_submit_async_event,
  1518. .delete_ctrl = nvme_rdma_delete_ctrl,
  1519. .get_address = nvmf_get_address,
  1520. .stop_ctrl = nvme_rdma_stop_ctrl,
  1521. };
  1522. static inline bool
  1523. __nvme_rdma_options_match(struct nvme_rdma_ctrl *ctrl,
  1524. struct nvmf_ctrl_options *opts)
  1525. {
  1526. char *stdport = __stringify(NVME_RDMA_IP_PORT);
  1527. if (!nvmf_ctlr_matches_baseopts(&ctrl->ctrl, opts) ||
  1528. strcmp(opts->traddr, ctrl->ctrl.opts->traddr))
  1529. return false;
  1530. if (opts->mask & NVMF_OPT_TRSVCID &&
  1531. ctrl->ctrl.opts->mask & NVMF_OPT_TRSVCID) {
  1532. if (strcmp(opts->trsvcid, ctrl->ctrl.opts->trsvcid))
  1533. return false;
  1534. } else if (opts->mask & NVMF_OPT_TRSVCID) {
  1535. if (strcmp(opts->trsvcid, stdport))
  1536. return false;
  1537. } else if (ctrl->ctrl.opts->mask & NVMF_OPT_TRSVCID) {
  1538. if (strcmp(stdport, ctrl->ctrl.opts->trsvcid))
  1539. return false;
  1540. }
  1541. /* else, it's a match as both have stdport. Fall to next checks */
  1542. /*
  1543. * checking the local address is rough. In most cases, one
  1544. * is not specified and the host port is selected by the stack.
  1545. *
  1546. * Assume no match if:
  1547. * local address is specified and address is not the same
  1548. * local address is not specified but remote is, or vice versa
  1549. * (admin using specific host_traddr when it matters).
  1550. */
  1551. if (opts->mask & NVMF_OPT_HOST_TRADDR &&
  1552. ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) {
  1553. if (strcmp(opts->host_traddr, ctrl->ctrl.opts->host_traddr))
  1554. return false;
  1555. } else if (opts->mask & NVMF_OPT_HOST_TRADDR ||
  1556. ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR)
  1557. return false;
  1558. /*
  1559. * if neither controller had an host port specified, assume it's
  1560. * a match as everything else matched.
  1561. */
  1562. return true;
  1563. }
  1564. /*
  1565. * Fails a connection request if it matches an existing controller
  1566. * (association) with the same tuple:
  1567. * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN>
  1568. *
  1569. * if local address is not specified in the request, it will match an
  1570. * existing controller with all the other parameters the same and no
  1571. * local port address specified as well.
  1572. *
  1573. * The ports don't need to be compared as they are intrinsically
  1574. * already matched by the port pointers supplied.
  1575. */
  1576. static bool
  1577. nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts)
  1578. {
  1579. struct nvme_rdma_ctrl *ctrl;
  1580. bool found = false;
  1581. mutex_lock(&nvme_rdma_ctrl_mutex);
  1582. list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
  1583. found = __nvme_rdma_options_match(ctrl, opts);
  1584. if (found)
  1585. break;
  1586. }
  1587. mutex_unlock(&nvme_rdma_ctrl_mutex);
  1588. return found;
  1589. }
  1590. static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev,
  1591. struct nvmf_ctrl_options *opts)
  1592. {
  1593. struct nvme_rdma_ctrl *ctrl;
  1594. int ret;
  1595. bool changed;
  1596. char *port;
  1597. ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
  1598. if (!ctrl)
  1599. return ERR_PTR(-ENOMEM);
  1600. ctrl->ctrl.opts = opts;
  1601. INIT_LIST_HEAD(&ctrl->list);
  1602. if (opts->mask & NVMF_OPT_TRSVCID)
  1603. port = opts->trsvcid;
  1604. else
  1605. port = __stringify(NVME_RDMA_IP_PORT);
  1606. ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
  1607. opts->traddr, port, &ctrl->addr);
  1608. if (ret) {
  1609. pr_err("malformed address passed: %s:%s\n", opts->traddr, port);
  1610. goto out_free_ctrl;
  1611. }
  1612. if (opts->mask & NVMF_OPT_HOST_TRADDR) {
  1613. ret = inet_pton_with_scope(&init_net, AF_UNSPEC,
  1614. opts->host_traddr, NULL, &ctrl->src_addr);
  1615. if (ret) {
  1616. pr_err("malformed src address passed: %s\n",
  1617. opts->host_traddr);
  1618. goto out_free_ctrl;
  1619. }
  1620. }
  1621. if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) {
  1622. ret = -EALREADY;
  1623. goto out_free_ctrl;
  1624. }
  1625. INIT_DELAYED_WORK(&ctrl->reconnect_work,
  1626. nvme_rdma_reconnect_ctrl_work);
  1627. INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work);
  1628. INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work);
  1629. ctrl->ctrl.queue_count = opts->nr_io_queues + 1; /* +1 for admin queue */
  1630. ctrl->ctrl.sqsize = opts->queue_size - 1;
  1631. ctrl->ctrl.kato = opts->kato;
  1632. ret = -ENOMEM;
  1633. ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues),
  1634. GFP_KERNEL);
  1635. if (!ctrl->queues)
  1636. goto out_free_ctrl;
  1637. ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops,
  1638. 0 /* no quirks, we're perfect! */);
  1639. if (ret)
  1640. goto out_kfree_queues;
  1641. changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING);
  1642. WARN_ON_ONCE(!changed);
  1643. ret = nvme_rdma_setup_ctrl(ctrl, true);
  1644. if (ret)
  1645. goto out_uninit_ctrl;
  1646. dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n",
  1647. ctrl->ctrl.opts->subsysnqn, &ctrl->addr);
  1648. nvme_get_ctrl(&ctrl->ctrl);
  1649. mutex_lock(&nvme_rdma_ctrl_mutex);
  1650. list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list);
  1651. mutex_unlock(&nvme_rdma_ctrl_mutex);
  1652. return &ctrl->ctrl;
  1653. out_uninit_ctrl:
  1654. nvme_uninit_ctrl(&ctrl->ctrl);
  1655. nvme_put_ctrl(&ctrl->ctrl);
  1656. if (ret > 0)
  1657. ret = -EIO;
  1658. return ERR_PTR(ret);
  1659. out_kfree_queues:
  1660. kfree(ctrl->queues);
  1661. out_free_ctrl:
  1662. kfree(ctrl);
  1663. return ERR_PTR(ret);
  1664. }
  1665. static struct nvmf_transport_ops nvme_rdma_transport = {
  1666. .name = "rdma",
  1667. .module = THIS_MODULE,
  1668. .required_opts = NVMF_OPT_TRADDR,
  1669. .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY |
  1670. NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO,
  1671. .create_ctrl = nvme_rdma_create_ctrl,
  1672. };
  1673. static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data)
  1674. {
  1675. struct nvme_rdma_ctrl *ctrl;
  1676. struct nvme_rdma_device *ndev;
  1677. bool found = false;
  1678. mutex_lock(&device_list_mutex);
  1679. list_for_each_entry(ndev, &device_list, entry) {
  1680. if (ndev->dev == ib_device) {
  1681. found = true;
  1682. break;
  1683. }
  1684. }
  1685. mutex_unlock(&device_list_mutex);
  1686. if (!found)
  1687. return;
  1688. /* Delete all controllers using this device */
  1689. mutex_lock(&nvme_rdma_ctrl_mutex);
  1690. list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) {
  1691. if (ctrl->device->dev != ib_device)
  1692. continue;
  1693. nvme_delete_ctrl(&ctrl->ctrl);
  1694. }
  1695. mutex_unlock(&nvme_rdma_ctrl_mutex);
  1696. flush_workqueue(nvme_delete_wq);
  1697. }
  1698. static struct ib_client nvme_rdma_ib_client = {
  1699. .name = "nvme_rdma",
  1700. .remove = nvme_rdma_remove_one
  1701. };
  1702. static int __init nvme_rdma_init_module(void)
  1703. {
  1704. int ret;
  1705. ret = ib_register_client(&nvme_rdma_ib_client);
  1706. if (ret)
  1707. return ret;
  1708. ret = nvmf_register_transport(&nvme_rdma_transport);
  1709. if (ret)
  1710. goto err_unreg_client;
  1711. return 0;
  1712. err_unreg_client:
  1713. ib_unregister_client(&nvme_rdma_ib_client);
  1714. return ret;
  1715. }
  1716. static void __exit nvme_rdma_cleanup_module(void)
  1717. {
  1718. nvmf_unregister_transport(&nvme_rdma_transport);
  1719. ib_unregister_client(&nvme_rdma_ib_client);
  1720. }
  1721. module_init(nvme_rdma_init_module);
  1722. module_exit(nvme_rdma_cleanup_module);
  1723. MODULE_LICENSE("GPL v2");