region_devs.c 30 KB

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  1. /*
  2. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of version 2 of the GNU General Public License as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. #include <linux/scatterlist.h>
  14. #include <linux/highmem.h>
  15. #include <linux/sched.h>
  16. #include <linux/slab.h>
  17. #include <linux/hash.h>
  18. #include <linux/sort.h>
  19. #include <linux/io.h>
  20. #include <linux/nd.h>
  21. #include "nd-core.h"
  22. #include "nd.h"
  23. /*
  24. * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
  25. * irrelevant.
  26. */
  27. #include <linux/io-64-nonatomic-hi-lo.h>
  28. static DEFINE_IDA(region_ida);
  29. static DEFINE_PER_CPU(int, flush_idx);
  30. static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
  31. struct nd_region_data *ndrd)
  32. {
  33. int i, j;
  34. dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
  35. nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
  36. for (i = 0; i < (1 << ndrd->hints_shift); i++) {
  37. struct resource *res = &nvdimm->flush_wpq[i];
  38. unsigned long pfn = PHYS_PFN(res->start);
  39. void __iomem *flush_page;
  40. /* check if flush hints share a page */
  41. for (j = 0; j < i; j++) {
  42. struct resource *res_j = &nvdimm->flush_wpq[j];
  43. unsigned long pfn_j = PHYS_PFN(res_j->start);
  44. if (pfn == pfn_j)
  45. break;
  46. }
  47. if (j < i)
  48. flush_page = (void __iomem *) ((unsigned long)
  49. ndrd_get_flush_wpq(ndrd, dimm, j)
  50. & PAGE_MASK);
  51. else
  52. flush_page = devm_nvdimm_ioremap(dev,
  53. PFN_PHYS(pfn), PAGE_SIZE);
  54. if (!flush_page)
  55. return -ENXIO;
  56. ndrd_set_flush_wpq(ndrd, dimm, i, flush_page
  57. + (res->start & ~PAGE_MASK));
  58. }
  59. return 0;
  60. }
  61. int nd_region_activate(struct nd_region *nd_region)
  62. {
  63. int i, j, num_flush = 0;
  64. struct nd_region_data *ndrd;
  65. struct device *dev = &nd_region->dev;
  66. size_t flush_data_size = sizeof(void *);
  67. nvdimm_bus_lock(&nd_region->dev);
  68. for (i = 0; i < nd_region->ndr_mappings; i++) {
  69. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  70. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  71. /* at least one null hint slot per-dimm for the "no-hint" case */
  72. flush_data_size += sizeof(void *);
  73. num_flush = min_not_zero(num_flush, nvdimm->num_flush);
  74. if (!nvdimm->num_flush)
  75. continue;
  76. flush_data_size += nvdimm->num_flush * sizeof(void *);
  77. }
  78. nvdimm_bus_unlock(&nd_region->dev);
  79. ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
  80. if (!ndrd)
  81. return -ENOMEM;
  82. dev_set_drvdata(dev, ndrd);
  83. if (!num_flush)
  84. return 0;
  85. ndrd->hints_shift = ilog2(num_flush);
  86. for (i = 0; i < nd_region->ndr_mappings; i++) {
  87. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  88. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  89. int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
  90. if (rc)
  91. return rc;
  92. }
  93. /*
  94. * Clear out entries that are duplicates. This should prevent the
  95. * extra flushings.
  96. */
  97. for (i = 0; i < nd_region->ndr_mappings - 1; i++) {
  98. /* ignore if NULL already */
  99. if (!ndrd_get_flush_wpq(ndrd, i, 0))
  100. continue;
  101. for (j = i + 1; j < nd_region->ndr_mappings; j++)
  102. if (ndrd_get_flush_wpq(ndrd, i, 0) ==
  103. ndrd_get_flush_wpq(ndrd, j, 0))
  104. ndrd_set_flush_wpq(ndrd, j, 0, NULL);
  105. }
  106. return 0;
  107. }
  108. static void nd_region_release(struct device *dev)
  109. {
  110. struct nd_region *nd_region = to_nd_region(dev);
  111. u16 i;
  112. for (i = 0; i < nd_region->ndr_mappings; i++) {
  113. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  114. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  115. put_device(&nvdimm->dev);
  116. }
  117. free_percpu(nd_region->lane);
  118. ida_simple_remove(&region_ida, nd_region->id);
  119. if (is_nd_blk(dev))
  120. kfree(to_nd_blk_region(dev));
  121. else
  122. kfree(nd_region);
  123. }
  124. static struct device_type nd_blk_device_type = {
  125. .name = "nd_blk",
  126. .release = nd_region_release,
  127. };
  128. static struct device_type nd_pmem_device_type = {
  129. .name = "nd_pmem",
  130. .release = nd_region_release,
  131. };
  132. static struct device_type nd_volatile_device_type = {
  133. .name = "nd_volatile",
  134. .release = nd_region_release,
  135. };
  136. bool is_nd_pmem(struct device *dev)
  137. {
  138. return dev ? dev->type == &nd_pmem_device_type : false;
  139. }
  140. bool is_nd_blk(struct device *dev)
  141. {
  142. return dev ? dev->type == &nd_blk_device_type : false;
  143. }
  144. bool is_nd_volatile(struct device *dev)
  145. {
  146. return dev ? dev->type == &nd_volatile_device_type : false;
  147. }
  148. struct nd_region *to_nd_region(struct device *dev)
  149. {
  150. struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
  151. WARN_ON(dev->type->release != nd_region_release);
  152. return nd_region;
  153. }
  154. EXPORT_SYMBOL_GPL(to_nd_region);
  155. struct device *nd_region_dev(struct nd_region *nd_region)
  156. {
  157. if (!nd_region)
  158. return NULL;
  159. return &nd_region->dev;
  160. }
  161. EXPORT_SYMBOL_GPL(nd_region_dev);
  162. struct nd_blk_region *to_nd_blk_region(struct device *dev)
  163. {
  164. struct nd_region *nd_region = to_nd_region(dev);
  165. WARN_ON(!is_nd_blk(dev));
  166. return container_of(nd_region, struct nd_blk_region, nd_region);
  167. }
  168. EXPORT_SYMBOL_GPL(to_nd_blk_region);
  169. void *nd_region_provider_data(struct nd_region *nd_region)
  170. {
  171. return nd_region->provider_data;
  172. }
  173. EXPORT_SYMBOL_GPL(nd_region_provider_data);
  174. void *nd_blk_region_provider_data(struct nd_blk_region *ndbr)
  175. {
  176. return ndbr->blk_provider_data;
  177. }
  178. EXPORT_SYMBOL_GPL(nd_blk_region_provider_data);
  179. void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data)
  180. {
  181. ndbr->blk_provider_data = data;
  182. }
  183. EXPORT_SYMBOL_GPL(nd_blk_region_set_provider_data);
  184. /**
  185. * nd_region_to_nstype() - region to an integer namespace type
  186. * @nd_region: region-device to interrogate
  187. *
  188. * This is the 'nstype' attribute of a region as well, an input to the
  189. * MODALIAS for namespace devices, and bit number for a nvdimm_bus to match
  190. * namespace devices with namespace drivers.
  191. */
  192. int nd_region_to_nstype(struct nd_region *nd_region)
  193. {
  194. if (is_memory(&nd_region->dev)) {
  195. u16 i, alias;
  196. for (i = 0, alias = 0; i < nd_region->ndr_mappings; i++) {
  197. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  198. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  199. if (test_bit(NDD_ALIASING, &nvdimm->flags))
  200. alias++;
  201. }
  202. if (alias)
  203. return ND_DEVICE_NAMESPACE_PMEM;
  204. else
  205. return ND_DEVICE_NAMESPACE_IO;
  206. } else if (is_nd_blk(&nd_region->dev)) {
  207. return ND_DEVICE_NAMESPACE_BLK;
  208. }
  209. return 0;
  210. }
  211. EXPORT_SYMBOL(nd_region_to_nstype);
  212. static ssize_t size_show(struct device *dev,
  213. struct device_attribute *attr, char *buf)
  214. {
  215. struct nd_region *nd_region = to_nd_region(dev);
  216. unsigned long long size = 0;
  217. if (is_memory(dev)) {
  218. size = nd_region->ndr_size;
  219. } else if (nd_region->ndr_mappings == 1) {
  220. struct nd_mapping *nd_mapping = &nd_region->mapping[0];
  221. size = nd_mapping->size;
  222. }
  223. return sprintf(buf, "%llu\n", size);
  224. }
  225. static DEVICE_ATTR_RO(size);
  226. static ssize_t deep_flush_show(struct device *dev,
  227. struct device_attribute *attr, char *buf)
  228. {
  229. struct nd_region *nd_region = to_nd_region(dev);
  230. /*
  231. * NOTE: in the nvdimm_has_flush() error case this attribute is
  232. * not visible.
  233. */
  234. return sprintf(buf, "%d\n", nvdimm_has_flush(nd_region));
  235. }
  236. static ssize_t deep_flush_store(struct device *dev, struct device_attribute *attr,
  237. const char *buf, size_t len)
  238. {
  239. bool flush;
  240. int rc = strtobool(buf, &flush);
  241. struct nd_region *nd_region = to_nd_region(dev);
  242. if (rc)
  243. return rc;
  244. if (!flush)
  245. return -EINVAL;
  246. nvdimm_flush(nd_region);
  247. return len;
  248. }
  249. static DEVICE_ATTR_RW(deep_flush);
  250. static ssize_t mappings_show(struct device *dev,
  251. struct device_attribute *attr, char *buf)
  252. {
  253. struct nd_region *nd_region = to_nd_region(dev);
  254. return sprintf(buf, "%d\n", nd_region->ndr_mappings);
  255. }
  256. static DEVICE_ATTR_RO(mappings);
  257. static ssize_t nstype_show(struct device *dev,
  258. struct device_attribute *attr, char *buf)
  259. {
  260. struct nd_region *nd_region = to_nd_region(dev);
  261. return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
  262. }
  263. static DEVICE_ATTR_RO(nstype);
  264. static ssize_t set_cookie_show(struct device *dev,
  265. struct device_attribute *attr, char *buf)
  266. {
  267. struct nd_region *nd_region = to_nd_region(dev);
  268. struct nd_interleave_set *nd_set = nd_region->nd_set;
  269. ssize_t rc = 0;
  270. if (is_memory(dev) && nd_set)
  271. /* pass, should be precluded by region_visible */;
  272. else
  273. return -ENXIO;
  274. /*
  275. * The cookie to show depends on which specification of the
  276. * labels we are using. If there are not labels then default to
  277. * the v1.1 namespace label cookie definition. To read all this
  278. * data we need to wait for probing to settle.
  279. */
  280. device_lock(dev);
  281. nvdimm_bus_lock(dev);
  282. wait_nvdimm_bus_probe_idle(dev);
  283. if (nd_region->ndr_mappings) {
  284. struct nd_mapping *nd_mapping = &nd_region->mapping[0];
  285. struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
  286. if (ndd) {
  287. struct nd_namespace_index *nsindex;
  288. nsindex = to_namespace_index(ndd, ndd->ns_current);
  289. rc = sprintf(buf, "%#llx\n",
  290. nd_region_interleave_set_cookie(nd_region,
  291. nsindex));
  292. }
  293. }
  294. nvdimm_bus_unlock(dev);
  295. device_unlock(dev);
  296. if (rc)
  297. return rc;
  298. return sprintf(buf, "%#llx\n", nd_set->cookie1);
  299. }
  300. static DEVICE_ATTR_RO(set_cookie);
  301. resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
  302. {
  303. resource_size_t blk_max_overlap = 0, available, overlap;
  304. int i;
  305. WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
  306. retry:
  307. available = 0;
  308. overlap = blk_max_overlap;
  309. for (i = 0; i < nd_region->ndr_mappings; i++) {
  310. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  311. struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
  312. /* if a dimm is disabled the available capacity is zero */
  313. if (!ndd)
  314. return 0;
  315. if (is_memory(&nd_region->dev)) {
  316. available += nd_pmem_available_dpa(nd_region,
  317. nd_mapping, &overlap);
  318. if (overlap > blk_max_overlap) {
  319. blk_max_overlap = overlap;
  320. goto retry;
  321. }
  322. } else if (is_nd_blk(&nd_region->dev))
  323. available += nd_blk_available_dpa(nd_region);
  324. }
  325. return available;
  326. }
  327. resource_size_t nd_region_allocatable_dpa(struct nd_region *nd_region)
  328. {
  329. resource_size_t available = 0;
  330. int i;
  331. if (is_memory(&nd_region->dev))
  332. available = PHYS_ADDR_MAX;
  333. WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
  334. for (i = 0; i < nd_region->ndr_mappings; i++) {
  335. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  336. if (is_memory(&nd_region->dev))
  337. available = min(available,
  338. nd_pmem_max_contiguous_dpa(nd_region,
  339. nd_mapping));
  340. else if (is_nd_blk(&nd_region->dev))
  341. available += nd_blk_available_dpa(nd_region);
  342. }
  343. if (is_memory(&nd_region->dev))
  344. return available * nd_region->ndr_mappings;
  345. return available;
  346. }
  347. static ssize_t available_size_show(struct device *dev,
  348. struct device_attribute *attr, char *buf)
  349. {
  350. struct nd_region *nd_region = to_nd_region(dev);
  351. unsigned long long available = 0;
  352. /*
  353. * Flush in-flight updates and grab a snapshot of the available
  354. * size. Of course, this value is potentially invalidated the
  355. * memory nvdimm_bus_lock() is dropped, but that's userspace's
  356. * problem to not race itself.
  357. */
  358. nvdimm_bus_lock(dev);
  359. wait_nvdimm_bus_probe_idle(dev);
  360. available = nd_region_available_dpa(nd_region);
  361. nvdimm_bus_unlock(dev);
  362. return sprintf(buf, "%llu\n", available);
  363. }
  364. static DEVICE_ATTR_RO(available_size);
  365. static ssize_t max_available_extent_show(struct device *dev,
  366. struct device_attribute *attr, char *buf)
  367. {
  368. struct nd_region *nd_region = to_nd_region(dev);
  369. unsigned long long available = 0;
  370. nvdimm_bus_lock(dev);
  371. wait_nvdimm_bus_probe_idle(dev);
  372. available = nd_region_allocatable_dpa(nd_region);
  373. nvdimm_bus_unlock(dev);
  374. return sprintf(buf, "%llu\n", available);
  375. }
  376. static DEVICE_ATTR_RO(max_available_extent);
  377. static ssize_t init_namespaces_show(struct device *dev,
  378. struct device_attribute *attr, char *buf)
  379. {
  380. struct nd_region_data *ndrd = dev_get_drvdata(dev);
  381. ssize_t rc;
  382. nvdimm_bus_lock(dev);
  383. if (ndrd)
  384. rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
  385. else
  386. rc = -ENXIO;
  387. nvdimm_bus_unlock(dev);
  388. return rc;
  389. }
  390. static DEVICE_ATTR_RO(init_namespaces);
  391. static ssize_t namespace_seed_show(struct device *dev,
  392. struct device_attribute *attr, char *buf)
  393. {
  394. struct nd_region *nd_region = to_nd_region(dev);
  395. ssize_t rc;
  396. nvdimm_bus_lock(dev);
  397. if (nd_region->ns_seed)
  398. rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
  399. else
  400. rc = sprintf(buf, "\n");
  401. nvdimm_bus_unlock(dev);
  402. return rc;
  403. }
  404. static DEVICE_ATTR_RO(namespace_seed);
  405. static ssize_t btt_seed_show(struct device *dev,
  406. struct device_attribute *attr, char *buf)
  407. {
  408. struct nd_region *nd_region = to_nd_region(dev);
  409. ssize_t rc;
  410. nvdimm_bus_lock(dev);
  411. if (nd_region->btt_seed)
  412. rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
  413. else
  414. rc = sprintf(buf, "\n");
  415. nvdimm_bus_unlock(dev);
  416. return rc;
  417. }
  418. static DEVICE_ATTR_RO(btt_seed);
  419. static ssize_t pfn_seed_show(struct device *dev,
  420. struct device_attribute *attr, char *buf)
  421. {
  422. struct nd_region *nd_region = to_nd_region(dev);
  423. ssize_t rc;
  424. nvdimm_bus_lock(dev);
  425. if (nd_region->pfn_seed)
  426. rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
  427. else
  428. rc = sprintf(buf, "\n");
  429. nvdimm_bus_unlock(dev);
  430. return rc;
  431. }
  432. static DEVICE_ATTR_RO(pfn_seed);
  433. static ssize_t dax_seed_show(struct device *dev,
  434. struct device_attribute *attr, char *buf)
  435. {
  436. struct nd_region *nd_region = to_nd_region(dev);
  437. ssize_t rc;
  438. nvdimm_bus_lock(dev);
  439. if (nd_region->dax_seed)
  440. rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
  441. else
  442. rc = sprintf(buf, "\n");
  443. nvdimm_bus_unlock(dev);
  444. return rc;
  445. }
  446. static DEVICE_ATTR_RO(dax_seed);
  447. static ssize_t read_only_show(struct device *dev,
  448. struct device_attribute *attr, char *buf)
  449. {
  450. struct nd_region *nd_region = to_nd_region(dev);
  451. return sprintf(buf, "%d\n", nd_region->ro);
  452. }
  453. static ssize_t read_only_store(struct device *dev,
  454. struct device_attribute *attr, const char *buf, size_t len)
  455. {
  456. bool ro;
  457. int rc = strtobool(buf, &ro);
  458. struct nd_region *nd_region = to_nd_region(dev);
  459. if (rc)
  460. return rc;
  461. nd_region->ro = ro;
  462. return len;
  463. }
  464. static DEVICE_ATTR_RW(read_only);
  465. static ssize_t region_badblocks_show(struct device *dev,
  466. struct device_attribute *attr, char *buf)
  467. {
  468. struct nd_region *nd_region = to_nd_region(dev);
  469. return badblocks_show(&nd_region->bb, buf, 0);
  470. }
  471. static DEVICE_ATTR(badblocks, 0444, region_badblocks_show, NULL);
  472. static ssize_t resource_show(struct device *dev,
  473. struct device_attribute *attr, char *buf)
  474. {
  475. struct nd_region *nd_region = to_nd_region(dev);
  476. return sprintf(buf, "%#llx\n", nd_region->ndr_start);
  477. }
  478. static DEVICE_ATTR_RO(resource);
  479. static ssize_t persistence_domain_show(struct device *dev,
  480. struct device_attribute *attr, char *buf)
  481. {
  482. struct nd_region *nd_region = to_nd_region(dev);
  483. if (test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags))
  484. return sprintf(buf, "cpu_cache\n");
  485. else if (test_bit(ND_REGION_PERSIST_MEMCTRL, &nd_region->flags))
  486. return sprintf(buf, "memory_controller\n");
  487. else
  488. return sprintf(buf, "\n");
  489. }
  490. static DEVICE_ATTR_RO(persistence_domain);
  491. static struct attribute *nd_region_attributes[] = {
  492. &dev_attr_size.attr,
  493. &dev_attr_nstype.attr,
  494. &dev_attr_mappings.attr,
  495. &dev_attr_btt_seed.attr,
  496. &dev_attr_pfn_seed.attr,
  497. &dev_attr_dax_seed.attr,
  498. &dev_attr_deep_flush.attr,
  499. &dev_attr_read_only.attr,
  500. &dev_attr_set_cookie.attr,
  501. &dev_attr_available_size.attr,
  502. &dev_attr_max_available_extent.attr,
  503. &dev_attr_namespace_seed.attr,
  504. &dev_attr_init_namespaces.attr,
  505. &dev_attr_badblocks.attr,
  506. &dev_attr_resource.attr,
  507. &dev_attr_persistence_domain.attr,
  508. NULL,
  509. };
  510. static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
  511. {
  512. struct device *dev = container_of(kobj, typeof(*dev), kobj);
  513. struct nd_region *nd_region = to_nd_region(dev);
  514. struct nd_interleave_set *nd_set = nd_region->nd_set;
  515. int type = nd_region_to_nstype(nd_region);
  516. if (!is_memory(dev) && a == &dev_attr_pfn_seed.attr)
  517. return 0;
  518. if (!is_memory(dev) && a == &dev_attr_dax_seed.attr)
  519. return 0;
  520. if (!is_nd_pmem(dev) && a == &dev_attr_badblocks.attr)
  521. return 0;
  522. if (a == &dev_attr_resource.attr) {
  523. if (is_nd_pmem(dev))
  524. return 0400;
  525. else
  526. return 0;
  527. }
  528. if (a == &dev_attr_deep_flush.attr) {
  529. int has_flush = nvdimm_has_flush(nd_region);
  530. if (has_flush == 1)
  531. return a->mode;
  532. else if (has_flush == 0)
  533. return 0444;
  534. else
  535. return 0;
  536. }
  537. if (a == &dev_attr_persistence_domain.attr) {
  538. if ((nd_region->flags & (BIT(ND_REGION_PERSIST_CACHE)
  539. | BIT(ND_REGION_PERSIST_MEMCTRL))) == 0)
  540. return 0;
  541. return a->mode;
  542. }
  543. if (a != &dev_attr_set_cookie.attr
  544. && a != &dev_attr_available_size.attr)
  545. return a->mode;
  546. if ((type == ND_DEVICE_NAMESPACE_PMEM
  547. || type == ND_DEVICE_NAMESPACE_BLK)
  548. && a == &dev_attr_available_size.attr)
  549. return a->mode;
  550. else if (is_memory(dev) && nd_set)
  551. return a->mode;
  552. return 0;
  553. }
  554. struct attribute_group nd_region_attribute_group = {
  555. .attrs = nd_region_attributes,
  556. .is_visible = region_visible,
  557. };
  558. EXPORT_SYMBOL_GPL(nd_region_attribute_group);
  559. u64 nd_region_interleave_set_cookie(struct nd_region *nd_region,
  560. struct nd_namespace_index *nsindex)
  561. {
  562. struct nd_interleave_set *nd_set = nd_region->nd_set;
  563. if (!nd_set)
  564. return 0;
  565. if (nsindex && __le16_to_cpu(nsindex->major) == 1
  566. && __le16_to_cpu(nsindex->minor) == 1)
  567. return nd_set->cookie1;
  568. return nd_set->cookie2;
  569. }
  570. u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region)
  571. {
  572. struct nd_interleave_set *nd_set = nd_region->nd_set;
  573. if (nd_set)
  574. return nd_set->altcookie;
  575. return 0;
  576. }
  577. void nd_mapping_free_labels(struct nd_mapping *nd_mapping)
  578. {
  579. struct nd_label_ent *label_ent, *e;
  580. lockdep_assert_held(&nd_mapping->lock);
  581. list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) {
  582. list_del(&label_ent->list);
  583. kfree(label_ent);
  584. }
  585. }
  586. /*
  587. * Upon successful probe/remove, take/release a reference on the
  588. * associated interleave set (if present), and plant new btt + namespace
  589. * seeds. Also, on the removal of a BLK region, notify the provider to
  590. * disable the region.
  591. */
  592. static void nd_region_notify_driver_action(struct nvdimm_bus *nvdimm_bus,
  593. struct device *dev, bool probe)
  594. {
  595. struct nd_region *nd_region;
  596. if (!probe && is_nd_region(dev)) {
  597. int i;
  598. nd_region = to_nd_region(dev);
  599. for (i = 0; i < nd_region->ndr_mappings; i++) {
  600. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  601. struct nvdimm_drvdata *ndd = nd_mapping->ndd;
  602. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  603. mutex_lock(&nd_mapping->lock);
  604. nd_mapping_free_labels(nd_mapping);
  605. mutex_unlock(&nd_mapping->lock);
  606. put_ndd(ndd);
  607. nd_mapping->ndd = NULL;
  608. if (ndd)
  609. atomic_dec(&nvdimm->busy);
  610. }
  611. }
  612. if (dev->parent && is_nd_region(dev->parent) && probe) {
  613. nd_region = to_nd_region(dev->parent);
  614. nvdimm_bus_lock(dev);
  615. if (nd_region->ns_seed == dev)
  616. nd_region_create_ns_seed(nd_region);
  617. nvdimm_bus_unlock(dev);
  618. }
  619. if (is_nd_btt(dev) && probe) {
  620. struct nd_btt *nd_btt = to_nd_btt(dev);
  621. nd_region = to_nd_region(dev->parent);
  622. nvdimm_bus_lock(dev);
  623. if (nd_region->btt_seed == dev)
  624. nd_region_create_btt_seed(nd_region);
  625. if (nd_region->ns_seed == &nd_btt->ndns->dev)
  626. nd_region_create_ns_seed(nd_region);
  627. nvdimm_bus_unlock(dev);
  628. }
  629. if (is_nd_pfn(dev) && probe) {
  630. struct nd_pfn *nd_pfn = to_nd_pfn(dev);
  631. nd_region = to_nd_region(dev->parent);
  632. nvdimm_bus_lock(dev);
  633. if (nd_region->pfn_seed == dev)
  634. nd_region_create_pfn_seed(nd_region);
  635. if (nd_region->ns_seed == &nd_pfn->ndns->dev)
  636. nd_region_create_ns_seed(nd_region);
  637. nvdimm_bus_unlock(dev);
  638. }
  639. if (is_nd_dax(dev) && probe) {
  640. struct nd_dax *nd_dax = to_nd_dax(dev);
  641. nd_region = to_nd_region(dev->parent);
  642. nvdimm_bus_lock(dev);
  643. if (nd_region->dax_seed == dev)
  644. nd_region_create_dax_seed(nd_region);
  645. if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev)
  646. nd_region_create_ns_seed(nd_region);
  647. nvdimm_bus_unlock(dev);
  648. }
  649. }
  650. void nd_region_probe_success(struct nvdimm_bus *nvdimm_bus, struct device *dev)
  651. {
  652. nd_region_notify_driver_action(nvdimm_bus, dev, true);
  653. }
  654. void nd_region_disable(struct nvdimm_bus *nvdimm_bus, struct device *dev)
  655. {
  656. nd_region_notify_driver_action(nvdimm_bus, dev, false);
  657. }
  658. static ssize_t mappingN(struct device *dev, char *buf, int n)
  659. {
  660. struct nd_region *nd_region = to_nd_region(dev);
  661. struct nd_mapping *nd_mapping;
  662. struct nvdimm *nvdimm;
  663. if (n >= nd_region->ndr_mappings)
  664. return -ENXIO;
  665. nd_mapping = &nd_region->mapping[n];
  666. nvdimm = nd_mapping->nvdimm;
  667. return sprintf(buf, "%s,%llu,%llu,%d\n", dev_name(&nvdimm->dev),
  668. nd_mapping->start, nd_mapping->size,
  669. nd_mapping->position);
  670. }
  671. #define REGION_MAPPING(idx) \
  672. static ssize_t mapping##idx##_show(struct device *dev, \
  673. struct device_attribute *attr, char *buf) \
  674. { \
  675. return mappingN(dev, buf, idx); \
  676. } \
  677. static DEVICE_ATTR_RO(mapping##idx)
  678. /*
  679. * 32 should be enough for a while, even in the presence of socket
  680. * interleave a 32-way interleave set is a degenerate case.
  681. */
  682. REGION_MAPPING(0);
  683. REGION_MAPPING(1);
  684. REGION_MAPPING(2);
  685. REGION_MAPPING(3);
  686. REGION_MAPPING(4);
  687. REGION_MAPPING(5);
  688. REGION_MAPPING(6);
  689. REGION_MAPPING(7);
  690. REGION_MAPPING(8);
  691. REGION_MAPPING(9);
  692. REGION_MAPPING(10);
  693. REGION_MAPPING(11);
  694. REGION_MAPPING(12);
  695. REGION_MAPPING(13);
  696. REGION_MAPPING(14);
  697. REGION_MAPPING(15);
  698. REGION_MAPPING(16);
  699. REGION_MAPPING(17);
  700. REGION_MAPPING(18);
  701. REGION_MAPPING(19);
  702. REGION_MAPPING(20);
  703. REGION_MAPPING(21);
  704. REGION_MAPPING(22);
  705. REGION_MAPPING(23);
  706. REGION_MAPPING(24);
  707. REGION_MAPPING(25);
  708. REGION_MAPPING(26);
  709. REGION_MAPPING(27);
  710. REGION_MAPPING(28);
  711. REGION_MAPPING(29);
  712. REGION_MAPPING(30);
  713. REGION_MAPPING(31);
  714. static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
  715. {
  716. struct device *dev = container_of(kobj, struct device, kobj);
  717. struct nd_region *nd_region = to_nd_region(dev);
  718. if (n < nd_region->ndr_mappings)
  719. return a->mode;
  720. return 0;
  721. }
  722. static struct attribute *mapping_attributes[] = {
  723. &dev_attr_mapping0.attr,
  724. &dev_attr_mapping1.attr,
  725. &dev_attr_mapping2.attr,
  726. &dev_attr_mapping3.attr,
  727. &dev_attr_mapping4.attr,
  728. &dev_attr_mapping5.attr,
  729. &dev_attr_mapping6.attr,
  730. &dev_attr_mapping7.attr,
  731. &dev_attr_mapping8.attr,
  732. &dev_attr_mapping9.attr,
  733. &dev_attr_mapping10.attr,
  734. &dev_attr_mapping11.attr,
  735. &dev_attr_mapping12.attr,
  736. &dev_attr_mapping13.attr,
  737. &dev_attr_mapping14.attr,
  738. &dev_attr_mapping15.attr,
  739. &dev_attr_mapping16.attr,
  740. &dev_attr_mapping17.attr,
  741. &dev_attr_mapping18.attr,
  742. &dev_attr_mapping19.attr,
  743. &dev_attr_mapping20.attr,
  744. &dev_attr_mapping21.attr,
  745. &dev_attr_mapping22.attr,
  746. &dev_attr_mapping23.attr,
  747. &dev_attr_mapping24.attr,
  748. &dev_attr_mapping25.attr,
  749. &dev_attr_mapping26.attr,
  750. &dev_attr_mapping27.attr,
  751. &dev_attr_mapping28.attr,
  752. &dev_attr_mapping29.attr,
  753. &dev_attr_mapping30.attr,
  754. &dev_attr_mapping31.attr,
  755. NULL,
  756. };
  757. struct attribute_group nd_mapping_attribute_group = {
  758. .is_visible = mapping_visible,
  759. .attrs = mapping_attributes,
  760. };
  761. EXPORT_SYMBOL_GPL(nd_mapping_attribute_group);
  762. int nd_blk_region_init(struct nd_region *nd_region)
  763. {
  764. struct device *dev = &nd_region->dev;
  765. struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev);
  766. if (!is_nd_blk(dev))
  767. return 0;
  768. if (nd_region->ndr_mappings < 1) {
  769. dev_dbg(dev, "invalid BLK region\n");
  770. return -ENXIO;
  771. }
  772. return to_nd_blk_region(dev)->enable(nvdimm_bus, dev);
  773. }
  774. /**
  775. * nd_region_acquire_lane - allocate and lock a lane
  776. * @nd_region: region id and number of lanes possible
  777. *
  778. * A lane correlates to a BLK-data-window and/or a log slot in the BTT.
  779. * We optimize for the common case where there are 256 lanes, one
  780. * per-cpu. For larger systems we need to lock to share lanes. For now
  781. * this implementation assumes the cost of maintaining an allocator for
  782. * free lanes is on the order of the lock hold time, so it implements a
  783. * static lane = cpu % num_lanes mapping.
  784. *
  785. * In the case of a BTT instance on top of a BLK namespace a lane may be
  786. * acquired recursively. We lock on the first instance.
  787. *
  788. * In the case of a BTT instance on top of PMEM, we only acquire a lane
  789. * for the BTT metadata updates.
  790. */
  791. unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
  792. {
  793. unsigned int cpu, lane;
  794. cpu = get_cpu();
  795. if (nd_region->num_lanes < nr_cpu_ids) {
  796. struct nd_percpu_lane *ndl_lock, *ndl_count;
  797. lane = cpu % nd_region->num_lanes;
  798. ndl_count = per_cpu_ptr(nd_region->lane, cpu);
  799. ndl_lock = per_cpu_ptr(nd_region->lane, lane);
  800. if (ndl_count->count++ == 0)
  801. spin_lock(&ndl_lock->lock);
  802. } else
  803. lane = cpu;
  804. return lane;
  805. }
  806. EXPORT_SYMBOL(nd_region_acquire_lane);
  807. void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
  808. {
  809. if (nd_region->num_lanes < nr_cpu_ids) {
  810. unsigned int cpu = get_cpu();
  811. struct nd_percpu_lane *ndl_lock, *ndl_count;
  812. ndl_count = per_cpu_ptr(nd_region->lane, cpu);
  813. ndl_lock = per_cpu_ptr(nd_region->lane, lane);
  814. if (--ndl_count->count == 0)
  815. spin_unlock(&ndl_lock->lock);
  816. put_cpu();
  817. }
  818. put_cpu();
  819. }
  820. EXPORT_SYMBOL(nd_region_release_lane);
  821. static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
  822. struct nd_region_desc *ndr_desc, struct device_type *dev_type,
  823. const char *caller)
  824. {
  825. struct nd_region *nd_region;
  826. struct device *dev;
  827. void *region_buf;
  828. unsigned int i;
  829. int ro = 0;
  830. for (i = 0; i < ndr_desc->num_mappings; i++) {
  831. struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
  832. struct nvdimm *nvdimm = mapping->nvdimm;
  833. if ((mapping->start | mapping->size) % SZ_4K) {
  834. dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not 4K aligned\n",
  835. caller, dev_name(&nvdimm->dev), i);
  836. return NULL;
  837. }
  838. if (test_bit(NDD_UNARMED, &nvdimm->flags))
  839. ro = 1;
  840. }
  841. if (dev_type == &nd_blk_device_type) {
  842. struct nd_blk_region_desc *ndbr_desc;
  843. struct nd_blk_region *ndbr;
  844. ndbr_desc = to_blk_region_desc(ndr_desc);
  845. ndbr = kzalloc(sizeof(*ndbr) + sizeof(struct nd_mapping)
  846. * ndr_desc->num_mappings,
  847. GFP_KERNEL);
  848. if (ndbr) {
  849. nd_region = &ndbr->nd_region;
  850. ndbr->enable = ndbr_desc->enable;
  851. ndbr->do_io = ndbr_desc->do_io;
  852. }
  853. region_buf = ndbr;
  854. } else {
  855. nd_region = kzalloc(sizeof(struct nd_region)
  856. + sizeof(struct nd_mapping)
  857. * ndr_desc->num_mappings,
  858. GFP_KERNEL);
  859. region_buf = nd_region;
  860. }
  861. if (!region_buf)
  862. return NULL;
  863. nd_region->id = ida_simple_get(&region_ida, 0, 0, GFP_KERNEL);
  864. if (nd_region->id < 0)
  865. goto err_id;
  866. nd_region->lane = alloc_percpu(struct nd_percpu_lane);
  867. if (!nd_region->lane)
  868. goto err_percpu;
  869. for (i = 0; i < nr_cpu_ids; i++) {
  870. struct nd_percpu_lane *ndl;
  871. ndl = per_cpu_ptr(nd_region->lane, i);
  872. spin_lock_init(&ndl->lock);
  873. ndl->count = 0;
  874. }
  875. for (i = 0; i < ndr_desc->num_mappings; i++) {
  876. struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
  877. struct nvdimm *nvdimm = mapping->nvdimm;
  878. nd_region->mapping[i].nvdimm = nvdimm;
  879. nd_region->mapping[i].start = mapping->start;
  880. nd_region->mapping[i].size = mapping->size;
  881. nd_region->mapping[i].position = mapping->position;
  882. INIT_LIST_HEAD(&nd_region->mapping[i].labels);
  883. mutex_init(&nd_region->mapping[i].lock);
  884. get_device(&nvdimm->dev);
  885. }
  886. nd_region->ndr_mappings = ndr_desc->num_mappings;
  887. nd_region->provider_data = ndr_desc->provider_data;
  888. nd_region->nd_set = ndr_desc->nd_set;
  889. nd_region->num_lanes = ndr_desc->num_lanes;
  890. nd_region->flags = ndr_desc->flags;
  891. nd_region->ro = ro;
  892. nd_region->numa_node = ndr_desc->numa_node;
  893. ida_init(&nd_region->ns_ida);
  894. ida_init(&nd_region->btt_ida);
  895. ida_init(&nd_region->pfn_ida);
  896. ida_init(&nd_region->dax_ida);
  897. dev = &nd_region->dev;
  898. dev_set_name(dev, "region%d", nd_region->id);
  899. dev->parent = &nvdimm_bus->dev;
  900. dev->type = dev_type;
  901. dev->groups = ndr_desc->attr_groups;
  902. dev->of_node = ndr_desc->of_node;
  903. nd_region->ndr_size = resource_size(ndr_desc->res);
  904. nd_region->ndr_start = ndr_desc->res->start;
  905. nd_device_register(dev);
  906. return nd_region;
  907. err_percpu:
  908. ida_simple_remove(&region_ida, nd_region->id);
  909. err_id:
  910. kfree(region_buf);
  911. return NULL;
  912. }
  913. struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
  914. struct nd_region_desc *ndr_desc)
  915. {
  916. ndr_desc->num_lanes = ND_MAX_LANES;
  917. return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
  918. __func__);
  919. }
  920. EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
  921. struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
  922. struct nd_region_desc *ndr_desc)
  923. {
  924. if (ndr_desc->num_mappings > 1)
  925. return NULL;
  926. ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES);
  927. return nd_region_create(nvdimm_bus, ndr_desc, &nd_blk_device_type,
  928. __func__);
  929. }
  930. EXPORT_SYMBOL_GPL(nvdimm_blk_region_create);
  931. struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
  932. struct nd_region_desc *ndr_desc)
  933. {
  934. ndr_desc->num_lanes = ND_MAX_LANES;
  935. return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
  936. __func__);
  937. }
  938. EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
  939. /**
  940. * nvdimm_flush - flush any posted write queues between the cpu and pmem media
  941. * @nd_region: blk or interleaved pmem region
  942. */
  943. void nvdimm_flush(struct nd_region *nd_region)
  944. {
  945. struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
  946. int i, idx;
  947. /*
  948. * Try to encourage some diversity in flush hint addresses
  949. * across cpus assuming a limited number of flush hints.
  950. */
  951. idx = this_cpu_read(flush_idx);
  952. idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
  953. /*
  954. * The first wmb() is needed to 'sfence' all previous writes
  955. * such that they are architecturally visible for the platform
  956. * buffer flush. Note that we've already arranged for pmem
  957. * writes to avoid the cache via memcpy_flushcache(). The final
  958. * wmb() ensures ordering for the NVDIMM flush write.
  959. */
  960. wmb();
  961. for (i = 0; i < nd_region->ndr_mappings; i++)
  962. if (ndrd_get_flush_wpq(ndrd, i, 0))
  963. writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
  964. wmb();
  965. }
  966. EXPORT_SYMBOL_GPL(nvdimm_flush);
  967. /**
  968. * nvdimm_has_flush - determine write flushing requirements
  969. * @nd_region: blk or interleaved pmem region
  970. *
  971. * Returns 1 if writes require flushing
  972. * Returns 0 if writes do not require flushing
  973. * Returns -ENXIO if flushing capability can not be determined
  974. */
  975. int nvdimm_has_flush(struct nd_region *nd_region)
  976. {
  977. int i;
  978. /* no nvdimm or pmem api == flushing capability unknown */
  979. if (nd_region->ndr_mappings == 0
  980. || !IS_ENABLED(CONFIG_ARCH_HAS_PMEM_API))
  981. return -ENXIO;
  982. for (i = 0; i < nd_region->ndr_mappings; i++) {
  983. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  984. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  985. /* flush hints present / available */
  986. if (nvdimm->num_flush)
  987. return 1;
  988. }
  989. /*
  990. * The platform defines dimm devices without hints, assume
  991. * platform persistence mechanism like ADR
  992. */
  993. return 0;
  994. }
  995. EXPORT_SYMBOL_GPL(nvdimm_has_flush);
  996. int nvdimm_has_cache(struct nd_region *nd_region)
  997. {
  998. return is_nd_pmem(&nd_region->dev) &&
  999. !test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags);
  1000. }
  1001. EXPORT_SYMBOL_GPL(nvdimm_has_cache);
  1002. void __exit nd_region_devs_exit(void)
  1003. {
  1004. ida_destroy(&region_ida);
  1005. }