eeprom.c 9.8 KB

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  1. /*
  2. * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
  3. * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/of.h>
  15. #include <linux/mtd/mtd.h>
  16. #include <linux/mtd/partitions.h>
  17. #include <linux/etherdevice.h>
  18. #include <asm/unaligned.h>
  19. #include "mt7601u.h"
  20. #include "eeprom.h"
  21. #include "mac.h"
  22. static bool
  23. field_valid(u8 val)
  24. {
  25. return val != 0xff;
  26. }
  27. static s8
  28. field_validate(u8 val)
  29. {
  30. if (!field_valid(val))
  31. return 0;
  32. return val;
  33. }
  34. static int
  35. mt7601u_efuse_read(struct mt7601u_dev *dev, u16 addr, u8 *data,
  36. enum mt7601u_eeprom_access_modes mode)
  37. {
  38. u32 val;
  39. int i;
  40. val = mt76_rr(dev, MT_EFUSE_CTRL);
  41. val &= ~(MT_EFUSE_CTRL_AIN |
  42. MT_EFUSE_CTRL_MODE);
  43. val |= FIELD_PREP(MT_EFUSE_CTRL_AIN, addr & ~0xf) |
  44. FIELD_PREP(MT_EFUSE_CTRL_MODE, mode) |
  45. MT_EFUSE_CTRL_KICK;
  46. mt76_wr(dev, MT_EFUSE_CTRL, val);
  47. if (!mt76_poll(dev, MT_EFUSE_CTRL, MT_EFUSE_CTRL_KICK, 0, 1000))
  48. return -ETIMEDOUT;
  49. val = mt76_rr(dev, MT_EFUSE_CTRL);
  50. if ((val & MT_EFUSE_CTRL_AOUT) == MT_EFUSE_CTRL_AOUT) {
  51. /* Parts of eeprom not in the usage map (0x80-0xc0,0xf0)
  52. * will not return valid data but it's ok.
  53. */
  54. memset(data, 0xff, 16);
  55. return 0;
  56. }
  57. for (i = 0; i < 4; i++) {
  58. val = mt76_rr(dev, MT_EFUSE_DATA(i));
  59. put_unaligned_le32(val, data + 4 * i);
  60. }
  61. return 0;
  62. }
  63. static int
  64. mt7601u_efuse_physical_size_check(struct mt7601u_dev *dev)
  65. {
  66. const int map_reads = DIV_ROUND_UP(MT_EFUSE_USAGE_MAP_SIZE, 16);
  67. u8 data[round_up(MT_EFUSE_USAGE_MAP_SIZE, 16)];
  68. int ret, i;
  69. u32 start = 0, end = 0, cnt_free;
  70. for (i = 0; i < map_reads; i++) {
  71. ret = mt7601u_efuse_read(dev, MT_EE_USAGE_MAP_START + i * 16,
  72. data + i * 16, MT_EE_PHYSICAL_READ);
  73. if (ret)
  74. return ret;
  75. }
  76. for (i = 0; i < MT_EFUSE_USAGE_MAP_SIZE; i++)
  77. if (!data[i]) {
  78. if (!start)
  79. start = MT_EE_USAGE_MAP_START + i;
  80. end = MT_EE_USAGE_MAP_START + i;
  81. }
  82. cnt_free = end - start + 1;
  83. if (MT_EFUSE_USAGE_MAP_SIZE - cnt_free < 5) {
  84. dev_err(dev->dev, "Error: your device needs default EEPROM file and this driver doesn't support it!\n");
  85. return -EINVAL;
  86. }
  87. return 0;
  88. }
  89. static bool
  90. mt7601u_has_tssi(struct mt7601u_dev *dev, u8 *eeprom)
  91. {
  92. u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1);
  93. return ~nic_conf1 && (nic_conf1 & MT_EE_NIC_CONF_1_TX_ALC_EN);
  94. }
  95. static void
  96. mt7601u_set_chip_cap(struct mt7601u_dev *dev, u8 *eeprom)
  97. {
  98. u16 nic_conf0 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_0);
  99. u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1);
  100. if (!field_valid(nic_conf1 & 0xff))
  101. nic_conf1 &= 0xff00;
  102. dev->ee->tssi_enabled = mt7601u_has_tssi(dev, eeprom) &&
  103. !(nic_conf1 & MT_EE_NIC_CONF_1_TEMP_TX_ALC);
  104. if (nic_conf1 & MT_EE_NIC_CONF_1_HW_RF_CTRL)
  105. dev_err(dev->dev,
  106. "Error: this driver does not support HW RF ctrl\n");
  107. if (!field_valid(nic_conf0 >> 8))
  108. return;
  109. if (FIELD_GET(MT_EE_NIC_CONF_0_RX_PATH, nic_conf0) > 1 ||
  110. FIELD_GET(MT_EE_NIC_CONF_0_TX_PATH, nic_conf0) > 1)
  111. dev_err(dev->dev,
  112. "Error: device has more than 1 RX/TX stream!\n");
  113. }
  114. static void mt7601u_set_channel_target_power(struct mt7601u_dev *dev,
  115. u8 *eeprom, u8 max_pwr)
  116. {
  117. u8 trgt_pwr = eeprom[MT_EE_TX_TSSI_TARGET_POWER];
  118. if (trgt_pwr > max_pwr || !trgt_pwr) {
  119. dev_warn(dev->dev, "Error: EEPROM trgt power invalid %hhx!\n",
  120. trgt_pwr);
  121. trgt_pwr = 0x20;
  122. }
  123. memset(dev->ee->chan_pwr, trgt_pwr, sizeof(dev->ee->chan_pwr));
  124. }
  125. static void
  126. mt7601u_set_channel_power(struct mt7601u_dev *dev, u8 *eeprom)
  127. {
  128. u32 i, val;
  129. u8 max_pwr;
  130. val = mt7601u_rr(dev, MT_TX_ALC_CFG_0);
  131. max_pwr = FIELD_GET(MT_TX_ALC_CFG_0_LIMIT_0, val);
  132. if (mt7601u_has_tssi(dev, eeprom)) {
  133. mt7601u_set_channel_target_power(dev, eeprom, max_pwr);
  134. return;
  135. }
  136. for (i = 0; i < 14; i++) {
  137. s8 power = field_validate(eeprom[MT_EE_TX_POWER_OFFSET + i]);
  138. if (power > max_pwr || power < 0)
  139. power = MT7601U_DEFAULT_TX_POWER;
  140. dev->ee->chan_pwr[i] = power;
  141. }
  142. }
  143. static void
  144. mt7601u_set_country_reg(struct mt7601u_dev *dev, u8 *eeprom)
  145. {
  146. /* Note: - region 31 is not valid for mt7601u (see rtmp_init.c)
  147. * - comments in rtmp_def.h are incorrect (see rt_channel.c)
  148. */
  149. static const struct reg_channel_bounds chan_bounds[] = {
  150. /* EEPROM country regions 0 - 7 */
  151. { 1, 11 }, { 1, 13 }, { 10, 2 }, { 10, 4 },
  152. { 14, 1 }, { 1, 14 }, { 3, 7 }, { 5, 9 },
  153. /* EEPROM country regions 32 - 33 */
  154. { 1, 11 }, { 1, 14 }
  155. };
  156. u8 val = eeprom[MT_EE_COUNTRY_REGION];
  157. int idx = -1;
  158. if (val < 8)
  159. idx = val;
  160. if (val > 31 && val < 33)
  161. idx = val - 32 + 8;
  162. if (idx != -1)
  163. dev_info(dev->dev,
  164. "EEPROM country region %02hhx (channels %hhd-%hhd)\n",
  165. val, chan_bounds[idx].start,
  166. chan_bounds[idx].start + chan_bounds[idx].num - 1);
  167. else
  168. idx = 5; /* channels 1 - 14 */
  169. dev->ee->reg = chan_bounds[idx];
  170. /* TODO: country region 33 is special - phy should be set to B-mode
  171. * before entering channel 14 (see sta/connect.c)
  172. */
  173. }
  174. static void
  175. mt7601u_set_rf_freq_off(struct mt7601u_dev *dev, u8 *eeprom)
  176. {
  177. u8 comp;
  178. dev->ee->rf_freq_off = field_validate(eeprom[MT_EE_FREQ_OFFSET]);
  179. comp = field_validate(eeprom[MT_EE_FREQ_OFFSET_COMPENSATION]);
  180. if (comp & BIT(7))
  181. dev->ee->rf_freq_off -= comp & 0x7f;
  182. else
  183. dev->ee->rf_freq_off += comp;
  184. }
  185. static void
  186. mt7601u_set_rssi_offset(struct mt7601u_dev *dev, u8 *eeprom)
  187. {
  188. int i;
  189. s8 *rssi_offset = dev->ee->rssi_offset;
  190. for (i = 0; i < 2; i++) {
  191. rssi_offset[i] = eeprom[MT_EE_RSSI_OFFSET + i];
  192. if (rssi_offset[i] < -10 || rssi_offset[i] > 10) {
  193. dev_warn(dev->dev,
  194. "Warning: EEPROM RSSI is invalid %02hhx\n",
  195. rssi_offset[i]);
  196. rssi_offset[i] = 0;
  197. }
  198. }
  199. }
  200. static void
  201. mt7601u_extra_power_over_mac(struct mt7601u_dev *dev)
  202. {
  203. u32 val;
  204. val = ((mt7601u_rr(dev, MT_TX_PWR_CFG_1) & 0x0000ff00) >> 8);
  205. val |= ((mt7601u_rr(dev, MT_TX_PWR_CFG_2) & 0x0000ff00) << 8);
  206. mt7601u_wr(dev, MT_TX_PWR_CFG_7, val);
  207. val = ((mt7601u_rr(dev, MT_TX_PWR_CFG_4) & 0x0000ff00) >> 8);
  208. mt7601u_wr(dev, MT_TX_PWR_CFG_9, val);
  209. }
  210. static void
  211. mt7601u_set_power_rate(struct power_per_rate *rate, s8 delta, u8 value)
  212. {
  213. /* Invalid? Note: vendor driver does not handle this */
  214. if (value == 0xff)
  215. return;
  216. rate->raw = s6_validate(value);
  217. rate->bw20 = s6_to_int(value);
  218. /* Note: vendor driver does cap the value to s6 right away */
  219. rate->bw40 = rate->bw20 + delta;
  220. }
  221. static void
  222. mt7601u_save_power_rate(struct mt7601u_dev *dev, s8 delta, u32 val, int i)
  223. {
  224. struct mt7601u_rate_power *t = &dev->ee->power_rate_table;
  225. switch (i) {
  226. case 0:
  227. mt7601u_set_power_rate(&t->cck[0], delta, (val >> 0) & 0xff);
  228. mt7601u_set_power_rate(&t->cck[1], delta, (val >> 8) & 0xff);
  229. /* Save cck bw20 for fixups of channel 14 */
  230. dev->ee->real_cck_bw20[0] = t->cck[0].bw20;
  231. dev->ee->real_cck_bw20[1] = t->cck[1].bw20;
  232. mt7601u_set_power_rate(&t->ofdm[0], delta, (val >> 16) & 0xff);
  233. mt7601u_set_power_rate(&t->ofdm[1], delta, (val >> 24) & 0xff);
  234. break;
  235. case 1:
  236. mt7601u_set_power_rate(&t->ofdm[2], delta, (val >> 0) & 0xff);
  237. mt7601u_set_power_rate(&t->ofdm[3], delta, (val >> 8) & 0xff);
  238. mt7601u_set_power_rate(&t->ht[0], delta, (val >> 16) & 0xff);
  239. mt7601u_set_power_rate(&t->ht[1], delta, (val >> 24) & 0xff);
  240. break;
  241. case 2:
  242. mt7601u_set_power_rate(&t->ht[2], delta, (val >> 0) & 0xff);
  243. mt7601u_set_power_rate(&t->ht[3], delta, (val >> 8) & 0xff);
  244. break;
  245. }
  246. }
  247. static s8
  248. get_delta(u8 val)
  249. {
  250. s8 ret;
  251. if (!field_valid(val) || !(val & BIT(7)))
  252. return 0;
  253. ret = val & 0x1f;
  254. if (ret > 8)
  255. ret = 8;
  256. if (val & BIT(6))
  257. ret = -ret;
  258. return ret;
  259. }
  260. static void
  261. mt7601u_config_tx_power_per_rate(struct mt7601u_dev *dev, u8 *eeprom)
  262. {
  263. u32 val;
  264. s8 bw40_delta;
  265. int i;
  266. bw40_delta = get_delta(eeprom[MT_EE_TX_POWER_DELTA_BW40]);
  267. for (i = 0; i < 5; i++) {
  268. val = get_unaligned_le32(eeprom + MT_EE_TX_POWER_BYRATE(i));
  269. mt7601u_save_power_rate(dev, bw40_delta, val, i);
  270. if (~val)
  271. mt7601u_wr(dev, MT_TX_PWR_CFG_0 + i * 4, val);
  272. }
  273. mt7601u_extra_power_over_mac(dev);
  274. }
  275. static void
  276. mt7601u_init_tssi_params(struct mt7601u_dev *dev, u8 *eeprom)
  277. {
  278. struct tssi_data *d = &dev->ee->tssi_data;
  279. if (!dev->ee->tssi_enabled)
  280. return;
  281. d->slope = eeprom[MT_EE_TX_TSSI_SLOPE];
  282. d->tx0_delta_offset = eeprom[MT_EE_TX_TSSI_OFFSET] * 1024;
  283. d->offset[0] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP];
  284. d->offset[1] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP + 1];
  285. d->offset[2] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP + 2];
  286. }
  287. int
  288. mt7601u_eeprom_init(struct mt7601u_dev *dev)
  289. {
  290. u8 *eeprom;
  291. int i, ret;
  292. ret = mt7601u_efuse_physical_size_check(dev);
  293. if (ret)
  294. return ret;
  295. dev->ee = devm_kzalloc(dev->dev, sizeof(*dev->ee), GFP_KERNEL);
  296. if (!dev->ee)
  297. return -ENOMEM;
  298. eeprom = kmalloc(MT7601U_EEPROM_SIZE, GFP_KERNEL);
  299. if (!eeprom)
  300. return -ENOMEM;
  301. for (i = 0; i + 16 <= MT7601U_EEPROM_SIZE; i += 16) {
  302. ret = mt7601u_efuse_read(dev, i, eeprom + i, MT_EE_READ);
  303. if (ret)
  304. goto out;
  305. }
  306. if (eeprom[MT_EE_VERSION_EE] > MT7601U_EE_MAX_VER)
  307. dev_warn(dev->dev,
  308. "Warning: unsupported EEPROM version %02hhx\n",
  309. eeprom[MT_EE_VERSION_EE]);
  310. dev_info(dev->dev, "EEPROM ver:%02hhx fae:%02hhx\n",
  311. eeprom[MT_EE_VERSION_EE], eeprom[MT_EE_VERSION_FAE]);
  312. mt7601u_set_macaddr(dev, eeprom + MT_EE_MAC_ADDR);
  313. mt7601u_set_chip_cap(dev, eeprom);
  314. mt7601u_set_channel_power(dev, eeprom);
  315. mt7601u_set_country_reg(dev, eeprom);
  316. mt7601u_set_rf_freq_off(dev, eeprom);
  317. mt7601u_set_rssi_offset(dev, eeprom);
  318. dev->ee->ref_temp = eeprom[MT_EE_REF_TEMP];
  319. dev->ee->lna_gain = eeprom[MT_EE_LNA_GAIN];
  320. mt7601u_config_tx_power_per_rate(dev, eeprom);
  321. mt7601u_init_tssi_params(dev, eeprom);
  322. out:
  323. kfree(eeprom);
  324. return ret;
  325. }