3945-mac.c 105 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/pci-aspm.h>
  35. #include <linux/slab.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/delay.h>
  38. #include <linux/sched.h>
  39. #include <linux/skbuff.h>
  40. #include <linux/netdevice.h>
  41. #include <linux/firmware.h>
  42. #include <linux/etherdevice.h>
  43. #include <linux/if_arp.h>
  44. #include <net/ieee80211_radiotap.h>
  45. #include <net/mac80211.h>
  46. #include <asm/div64.h>
  47. #define DRV_NAME "iwl3945"
  48. #include "commands.h"
  49. #include "common.h"
  50. #include "3945.h"
  51. #include "iwl-spectrum.h"
  52. /*
  53. * module name, copyright, version, etc.
  54. */
  55. #define DRV_DESCRIPTION \
  56. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  57. #ifdef CONFIG_IWLEGACY_DEBUG
  58. #define VD "d"
  59. #else
  60. #define VD
  61. #endif
  62. /*
  63. * add "s" to indicate spectrum measurement included.
  64. * we add it here to be consistent with previous releases in which
  65. * this was configurable.
  66. */
  67. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  68. #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
  69. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  70. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  71. MODULE_VERSION(DRV_VERSION);
  72. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  73. MODULE_LICENSE("GPL");
  74. /* module parameters */
  75. struct il_mod_params il3945_mod_params = {
  76. .sw_crypto = 1,
  77. .restart_fw = 1,
  78. .disable_hw_scan = 1,
  79. /* the rest are 0 by default */
  80. };
  81. /**
  82. * il3945_get_antenna_flags - Get antenna flags for RXON command
  83. * @il: eeprom and antenna fields are used to determine antenna flags
  84. *
  85. * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  86. * il3945_mod_params.antenna specifies the antenna diversity mode:
  87. *
  88. * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  89. * IL_ANTENNA_MAIN - Force MAIN antenna
  90. * IL_ANTENNA_AUX - Force AUX antenna
  91. */
  92. __le32
  93. il3945_get_antenna_flags(const struct il_priv *il)
  94. {
  95. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  96. switch (il3945_mod_params.antenna) {
  97. case IL_ANTENNA_DIVERSITY:
  98. return 0;
  99. case IL_ANTENNA_MAIN:
  100. if (eeprom->antenna_switch_type)
  101. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  103. case IL_ANTENNA_AUX:
  104. if (eeprom->antenna_switch_type)
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  107. }
  108. /* bad antenna selector value */
  109. IL_ERR("Bad antenna selector value (0x%x)\n",
  110. il3945_mod_params.antenna);
  111. return 0; /* "diversity" is default if error */
  112. }
  113. static int
  114. il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
  115. struct ieee80211_key_conf *keyconf, u8 sta_id)
  116. {
  117. unsigned long flags;
  118. __le16 key_flags = 0;
  119. int ret;
  120. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  121. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  122. if (sta_id == il->hw_params.bcast_id)
  123. key_flags |= STA_KEY_MULTICAST_MSK;
  124. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  125. keyconf->hw_key_idx = keyconf->keyidx;
  126. key_flags &= ~STA_KEY_FLG_INVALID;
  127. spin_lock_irqsave(&il->sta_lock, flags);
  128. il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
  129. il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  130. memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
  131. memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
  132. if ((il->stations[sta_id].sta.key.
  133. key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
  134. il->stations[sta_id].sta.key.key_offset =
  135. il_get_free_ucode_key_idx(il);
  136. /* else, we are overriding an existing key => no need to allocated room
  137. * in uCode. */
  138. WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  139. "no space for a new key");
  140. il->stations[sta_id].sta.key.key_flags = key_flags;
  141. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  142. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  143. D_INFO("hwcrypto: modify ucode station key info\n");
  144. ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
  145. spin_unlock_irqrestore(&il->sta_lock, flags);
  146. return ret;
  147. }
  148. static int
  149. il3945_set_tkip_dynamic_key_info(struct il_priv *il,
  150. struct ieee80211_key_conf *keyconf, u8 sta_id)
  151. {
  152. return -EOPNOTSUPP;
  153. }
  154. static int
  155. il3945_set_wep_dynamic_key_info(struct il_priv *il,
  156. struct ieee80211_key_conf *keyconf, u8 sta_id)
  157. {
  158. return -EOPNOTSUPP;
  159. }
  160. static int
  161. il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
  162. {
  163. unsigned long flags;
  164. struct il_addsta_cmd sta_cmd;
  165. spin_lock_irqsave(&il->sta_lock, flags);
  166. memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
  167. memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
  168. il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  169. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  170. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  171. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  172. sizeof(struct il_addsta_cmd));
  173. spin_unlock_irqrestore(&il->sta_lock, flags);
  174. D_INFO("hwcrypto: clear ucode station key info\n");
  175. return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  176. }
  177. static int
  178. il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
  179. u8 sta_id)
  180. {
  181. int ret = 0;
  182. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  183. switch (keyconf->cipher) {
  184. case WLAN_CIPHER_SUITE_CCMP:
  185. ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
  186. break;
  187. case WLAN_CIPHER_SUITE_TKIP:
  188. ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
  189. break;
  190. case WLAN_CIPHER_SUITE_WEP40:
  191. case WLAN_CIPHER_SUITE_WEP104:
  192. ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
  193. break;
  194. default:
  195. IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
  196. ret = -EINVAL;
  197. }
  198. D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
  199. keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
  200. return ret;
  201. }
  202. static int
  203. il3945_remove_static_key(struct il_priv *il)
  204. {
  205. int ret = -EOPNOTSUPP;
  206. return ret;
  207. }
  208. static int
  209. il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
  210. {
  211. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  212. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  213. return -EOPNOTSUPP;
  214. IL_ERR("Static key invalid: cipher %x\n", key->cipher);
  215. return -EINVAL;
  216. }
  217. static void
  218. il3945_clear_free_frames(struct il_priv *il)
  219. {
  220. struct list_head *element;
  221. D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
  222. while (!list_empty(&il->free_frames)) {
  223. element = il->free_frames.next;
  224. list_del(element);
  225. kfree(list_entry(element, struct il3945_frame, list));
  226. il->frames_count--;
  227. }
  228. if (il->frames_count) {
  229. IL_WARN("%d frames still in use. Did we lose one?\n",
  230. il->frames_count);
  231. il->frames_count = 0;
  232. }
  233. }
  234. static struct il3945_frame *
  235. il3945_get_free_frame(struct il_priv *il)
  236. {
  237. struct il3945_frame *frame;
  238. struct list_head *element;
  239. if (list_empty(&il->free_frames)) {
  240. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  241. if (!frame) {
  242. IL_ERR("Could not allocate frame!\n");
  243. return NULL;
  244. }
  245. il->frames_count++;
  246. return frame;
  247. }
  248. element = il->free_frames.next;
  249. list_del(element);
  250. return list_entry(element, struct il3945_frame, list);
  251. }
  252. static void
  253. il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
  254. {
  255. memset(frame, 0, sizeof(*frame));
  256. list_add(&frame->list, &il->free_frames);
  257. }
  258. unsigned int
  259. il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
  260. int left)
  261. {
  262. if (!il_is_associated(il) || !il->beacon_skb)
  263. return 0;
  264. if (il->beacon_skb->len > left)
  265. return 0;
  266. memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
  267. return il->beacon_skb->len;
  268. }
  269. static int
  270. il3945_send_beacon_cmd(struct il_priv *il)
  271. {
  272. struct il3945_frame *frame;
  273. unsigned int frame_size;
  274. int rc;
  275. u8 rate;
  276. frame = il3945_get_free_frame(il);
  277. if (!frame) {
  278. IL_ERR("Could not obtain free frame buffer for beacon "
  279. "command.\n");
  280. return -ENOMEM;
  281. }
  282. rate = il_get_lowest_plcp(il);
  283. frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
  284. rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
  285. il3945_free_frame(il, frame);
  286. return rc;
  287. }
  288. static void
  289. il3945_unset_hw_params(struct il_priv *il)
  290. {
  291. if (il->_3945.shared_virt)
  292. dma_free_coherent(&il->pci_dev->dev,
  293. sizeof(struct il3945_shared),
  294. il->_3945.shared_virt, il->_3945.shared_phys);
  295. }
  296. static void
  297. il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
  298. struct il_device_cmd *cmd,
  299. struct sk_buff *skb_frag, int sta_id)
  300. {
  301. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  302. struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
  303. tx_cmd->sec_ctl = 0;
  304. switch (keyinfo->cipher) {
  305. case WLAN_CIPHER_SUITE_CCMP:
  306. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  307. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  308. D_TX("tx_cmd with AES hwcrypto\n");
  309. break;
  310. case WLAN_CIPHER_SUITE_TKIP:
  311. break;
  312. case WLAN_CIPHER_SUITE_WEP104:
  313. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  314. /* fall through */
  315. case WLAN_CIPHER_SUITE_WEP40:
  316. tx_cmd->sec_ctl |=
  317. TX_CMD_SEC_WEP | (info->control.hw_key->
  318. hw_key_idx & TX_CMD_SEC_MSK) <<
  319. TX_CMD_SEC_SHIFT;
  320. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  321. D_TX("Configuring packet for WEP encryption " "with key %d\n",
  322. info->control.hw_key->hw_key_idx);
  323. break;
  324. default:
  325. IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
  326. break;
  327. }
  328. }
  329. /*
  330. * handle build C_TX command notification.
  331. */
  332. static void
  333. il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
  334. struct ieee80211_tx_info *info,
  335. struct ieee80211_hdr *hdr, u8 std_id)
  336. {
  337. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  338. __le32 tx_flags = tx_cmd->tx_flags;
  339. __le16 fc = hdr->frame_control;
  340. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  341. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  342. tx_flags |= TX_CMD_FLG_ACK_MSK;
  343. if (ieee80211_is_mgmt(fc))
  344. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  345. if (ieee80211_is_probe_resp(fc) &&
  346. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  347. tx_flags |= TX_CMD_FLG_TSF_MSK;
  348. } else {
  349. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  350. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  351. }
  352. tx_cmd->sta_id = std_id;
  353. if (ieee80211_has_morefrags(fc))
  354. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  355. if (ieee80211_is_data_qos(fc)) {
  356. u8 *qc = ieee80211_get_qos_ctl(hdr);
  357. tx_cmd->tid_tspec = qc[0] & 0xf;
  358. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  359. } else {
  360. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  361. }
  362. il_tx_cmd_protection(il, info, fc, &tx_flags);
  363. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  364. if (ieee80211_is_mgmt(fc)) {
  365. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  366. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  367. else
  368. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  369. } else {
  370. tx_cmd->timeout.pm_frame_timeout = 0;
  371. }
  372. tx_cmd->driver_txop = 0;
  373. tx_cmd->tx_flags = tx_flags;
  374. tx_cmd->next_frame_len = 0;
  375. }
  376. /*
  377. * start C_TX command process
  378. */
  379. static int
  380. il3945_tx_skb(struct il_priv *il,
  381. struct ieee80211_sta *sta,
  382. struct sk_buff *skb)
  383. {
  384. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  385. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  386. struct il3945_tx_cmd *tx_cmd;
  387. struct il_tx_queue *txq = NULL;
  388. struct il_queue *q = NULL;
  389. struct il_device_cmd *out_cmd;
  390. struct il_cmd_meta *out_meta;
  391. dma_addr_t phys_addr;
  392. dma_addr_t txcmd_phys;
  393. int txq_id = skb_get_queue_mapping(skb);
  394. u16 len, idx, hdr_len;
  395. u16 firstlen, secondlen;
  396. u8 sta_id;
  397. u8 tid = 0;
  398. __le16 fc;
  399. u8 wait_write_ptr = 0;
  400. unsigned long flags;
  401. spin_lock_irqsave(&il->lock, flags);
  402. if (il_is_rfkill(il)) {
  403. D_DROP("Dropping - RF KILL\n");
  404. goto drop_unlock;
  405. }
  406. if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
  407. IL_INVALID_RATE) {
  408. IL_ERR("ERROR: No TX rate available.\n");
  409. goto drop_unlock;
  410. }
  411. fc = hdr->frame_control;
  412. #ifdef CONFIG_IWLEGACY_DEBUG
  413. if (ieee80211_is_auth(fc))
  414. D_TX("Sending AUTH frame\n");
  415. else if (ieee80211_is_assoc_req(fc))
  416. D_TX("Sending ASSOC frame\n");
  417. else if (ieee80211_is_reassoc_req(fc))
  418. D_TX("Sending REASSOC frame\n");
  419. #endif
  420. spin_unlock_irqrestore(&il->lock, flags);
  421. hdr_len = ieee80211_hdrlen(fc);
  422. /* Find idx into station table for destination station */
  423. sta_id = il_sta_id_or_broadcast(il, sta);
  424. if (sta_id == IL_INVALID_STATION) {
  425. D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
  426. goto drop;
  427. }
  428. D_RATE("station Id %d\n", sta_id);
  429. if (ieee80211_is_data_qos(fc)) {
  430. u8 *qc = ieee80211_get_qos_ctl(hdr);
  431. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  432. if (unlikely(tid >= MAX_TID_COUNT))
  433. goto drop;
  434. }
  435. /* Descriptor for chosen Tx queue */
  436. txq = &il->txq[txq_id];
  437. q = &txq->q;
  438. if ((il_queue_space(q) < q->high_mark))
  439. goto drop;
  440. spin_lock_irqsave(&il->lock, flags);
  441. idx = il_get_cmd_idx(q, q->write_ptr, 0);
  442. txq->skbs[q->write_ptr] = skb;
  443. /* Init first empty entry in queue's array of Tx/cmd buffers */
  444. out_cmd = txq->cmd[idx];
  445. out_meta = &txq->meta[idx];
  446. tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
  447. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  448. memset(tx_cmd, 0, sizeof(*tx_cmd));
  449. /*
  450. * Set up the Tx-command (not MAC!) header.
  451. * Store the chosen Tx queue and TFD idx within the sequence field;
  452. * after Tx, uCode's Tx response will return this value so driver can
  453. * locate the frame within the tx queue and do post-tx processing.
  454. */
  455. out_cmd->hdr.cmd = C_TX;
  456. out_cmd->hdr.sequence =
  457. cpu_to_le16((u16)
  458. (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
  459. /* Copy MAC header from skb into command buffer */
  460. memcpy(tx_cmd->hdr, hdr, hdr_len);
  461. if (info->control.hw_key)
  462. il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
  463. /* TODO need this for burst mode later on */
  464. il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
  465. il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id);
  466. /* Total # bytes to be transmitted */
  467. tx_cmd->len = cpu_to_le16((u16) skb->len);
  468. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  469. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  470. /*
  471. * Use the first empty entry in this queue's command buffer array
  472. * to contain the Tx command and MAC header concatenated together
  473. * (payload data will be in another buffer).
  474. * Size of this varies, due to varying MAC header length.
  475. * If end is not dword aligned, we'll have 2 extra bytes at the end
  476. * of the MAC header (device reads on dword boundaries).
  477. * We'll tell device about this padding later.
  478. */
  479. len =
  480. sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
  481. hdr_len;
  482. firstlen = (len + 3) & ~3;
  483. /* Physical address of this Tx command's header (not MAC header!),
  484. * within command buffer array. */
  485. txcmd_phys =
  486. pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen,
  487. PCI_DMA_TODEVICE);
  488. if (unlikely(pci_dma_mapping_error(il->pci_dev, txcmd_phys)))
  489. goto drop_unlock;
  490. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  491. * if any (802.11 null frames have no payload). */
  492. secondlen = skb->len - hdr_len;
  493. if (secondlen > 0) {
  494. phys_addr =
  495. pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen,
  496. PCI_DMA_TODEVICE);
  497. if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr)))
  498. goto drop_unlock;
  499. }
  500. /* Add buffer containing Tx command and MAC(!) header to TFD's
  501. * first entry */
  502. il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0);
  503. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  504. dma_unmap_len_set(out_meta, len, firstlen);
  505. if (secondlen > 0)
  506. il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0,
  507. U32_PAD(secondlen));
  508. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  509. txq->need_update = 1;
  510. } else {
  511. wait_write_ptr = 1;
  512. txq->need_update = 0;
  513. }
  514. il_update_stats(il, true, fc, skb->len);
  515. D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
  516. D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  517. il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  518. il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
  519. ieee80211_hdrlen(fc));
  520. /* Tell device the write idx *just past* this latest filled TFD */
  521. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  522. il_txq_update_write_ptr(il, txq);
  523. spin_unlock_irqrestore(&il->lock, flags);
  524. if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
  525. if (wait_write_ptr) {
  526. spin_lock_irqsave(&il->lock, flags);
  527. txq->need_update = 1;
  528. il_txq_update_write_ptr(il, txq);
  529. spin_unlock_irqrestore(&il->lock, flags);
  530. }
  531. il_stop_queue(il, txq);
  532. }
  533. return 0;
  534. drop_unlock:
  535. spin_unlock_irqrestore(&il->lock, flags);
  536. drop:
  537. return -1;
  538. }
  539. static int
  540. il3945_get_measurement(struct il_priv *il,
  541. struct ieee80211_measurement_params *params, u8 type)
  542. {
  543. struct il_spectrum_cmd spectrum;
  544. struct il_rx_pkt *pkt;
  545. struct il_host_cmd cmd = {
  546. .id = C_SPECTRUM_MEASUREMENT,
  547. .data = (void *)&spectrum,
  548. .flags = CMD_WANT_SKB,
  549. };
  550. u32 add_time = le64_to_cpu(params->start_time);
  551. int rc;
  552. int spectrum_resp_status;
  553. int duration = le16_to_cpu(params->duration);
  554. if (il_is_associated(il))
  555. add_time =
  556. il_usecs_to_beacons(il,
  557. le64_to_cpu(params->start_time) -
  558. il->_3945.last_tsf,
  559. le16_to_cpu(il->timing.beacon_interval));
  560. memset(&spectrum, 0, sizeof(spectrum));
  561. spectrum.channel_count = cpu_to_le16(1);
  562. spectrum.flags =
  563. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  564. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  565. cmd.len = sizeof(spectrum);
  566. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  567. if (il_is_associated(il))
  568. spectrum.start_time =
  569. il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
  570. le16_to_cpu(il->timing.beacon_interval));
  571. else
  572. spectrum.start_time = 0;
  573. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  574. spectrum.channels[0].channel = params->channel;
  575. spectrum.channels[0].type = type;
  576. if (il->active.flags & RXON_FLG_BAND_24G_MSK)
  577. spectrum.flags |=
  578. RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
  579. RXON_FLG_TGG_PROTECT_MSK;
  580. rc = il_send_cmd_sync(il, &cmd);
  581. if (rc)
  582. return rc;
  583. pkt = (struct il_rx_pkt *)cmd.reply_page;
  584. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  585. IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
  586. rc = -EIO;
  587. }
  588. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  589. switch (spectrum_resp_status) {
  590. case 0: /* Command will be handled */
  591. if (pkt->u.spectrum.id != 0xff) {
  592. D_INFO("Replaced existing measurement: %d\n",
  593. pkt->u.spectrum.id);
  594. il->measurement_status &= ~MEASUREMENT_READY;
  595. }
  596. il->measurement_status |= MEASUREMENT_ACTIVE;
  597. rc = 0;
  598. break;
  599. case 1: /* Command will not be handled */
  600. rc = -EAGAIN;
  601. break;
  602. }
  603. il_free_pages(il, cmd.reply_page);
  604. return rc;
  605. }
  606. static void
  607. il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
  608. {
  609. struct il_rx_pkt *pkt = rxb_addr(rxb);
  610. struct il_alive_resp *palive;
  611. struct delayed_work *pwork;
  612. palive = &pkt->u.alive_frame;
  613. D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
  614. palive->is_valid, palive->ver_type, palive->ver_subtype);
  615. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  616. D_INFO("Initialization Alive received.\n");
  617. memcpy(&il->card_alive_init, &pkt->u.alive_frame,
  618. sizeof(struct il_alive_resp));
  619. pwork = &il->init_alive_start;
  620. } else {
  621. D_INFO("Runtime Alive received.\n");
  622. memcpy(&il->card_alive, &pkt->u.alive_frame,
  623. sizeof(struct il_alive_resp));
  624. pwork = &il->alive_start;
  625. il3945_disable_events(il);
  626. }
  627. /* We delay the ALIVE response by 5ms to
  628. * give the HW RF Kill time to activate... */
  629. if (palive->is_valid == UCODE_VALID_OK)
  630. queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
  631. else
  632. IL_WARN("uCode did not respond OK.\n");
  633. }
  634. static void
  635. il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
  636. {
  637. #ifdef CONFIG_IWLEGACY_DEBUG
  638. struct il_rx_pkt *pkt = rxb_addr(rxb);
  639. #endif
  640. D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
  641. }
  642. static void
  643. il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
  644. {
  645. struct il_rx_pkt *pkt = rxb_addr(rxb);
  646. struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  647. #ifdef CONFIG_IWLEGACY_DEBUG
  648. u8 rate = beacon->beacon_notify_hdr.rate;
  649. D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
  650. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  651. beacon->beacon_notify_hdr.failure_frame,
  652. le32_to_cpu(beacon->ibss_mgr_status),
  653. le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
  654. #endif
  655. il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  656. }
  657. /* Handle notification from uCode that card's power state is changing
  658. * due to software, hardware, or critical temperature RFKILL */
  659. static void
  660. il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
  661. {
  662. struct il_rx_pkt *pkt = rxb_addr(rxb);
  663. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  664. unsigned long status = il->status;
  665. IL_WARN("Card state received: HW:%s SW:%s\n",
  666. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  667. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  668. _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  669. if (flags & HW_CARD_DISABLED)
  670. set_bit(S_RFKILL, &il->status);
  671. else
  672. clear_bit(S_RFKILL, &il->status);
  673. il_scan_cancel(il);
  674. if ((test_bit(S_RFKILL, &status) !=
  675. test_bit(S_RFKILL, &il->status)))
  676. wiphy_rfkill_set_hw_state(il->hw->wiphy,
  677. test_bit(S_RFKILL, &il->status));
  678. else
  679. wake_up(&il->wait_command_queue);
  680. }
  681. /**
  682. * il3945_setup_handlers - Initialize Rx handler callbacks
  683. *
  684. * Setup the RX handlers for each of the reply types sent from the uCode
  685. * to the host.
  686. *
  687. * This function chains into the hardware specific files for them to setup
  688. * any hardware specific handlers as well.
  689. */
  690. static void
  691. il3945_setup_handlers(struct il_priv *il)
  692. {
  693. il->handlers[N_ALIVE] = il3945_hdl_alive;
  694. il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
  695. il->handlers[N_ERROR] = il_hdl_error;
  696. il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
  697. il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
  698. il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
  699. il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
  700. il->handlers[N_BEACON] = il3945_hdl_beacon;
  701. /*
  702. * The same handler is used for both the REPLY to a discrete
  703. * stats request from the host as well as for the periodic
  704. * stats notifications (after received beacons) from the uCode.
  705. */
  706. il->handlers[C_STATS] = il3945_hdl_c_stats;
  707. il->handlers[N_STATS] = il3945_hdl_stats;
  708. il_setup_rx_scan_handlers(il);
  709. il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
  710. /* Set up hardware specific Rx handlers */
  711. il3945_hw_handler_setup(il);
  712. }
  713. /************************** RX-FUNCTIONS ****************************/
  714. /*
  715. * Rx theory of operation
  716. *
  717. * The host allocates 32 DMA target addresses and passes the host address
  718. * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
  719. * 0 to 31
  720. *
  721. * Rx Queue Indexes
  722. * The host/firmware share two idx registers for managing the Rx buffers.
  723. *
  724. * The READ idx maps to the first position that the firmware may be writing
  725. * to -- the driver can read up to (but not including) this position and get
  726. * good data.
  727. * The READ idx is managed by the firmware once the card is enabled.
  728. *
  729. * The WRITE idx maps to the last position the driver has read from -- the
  730. * position preceding WRITE is the last slot the firmware can place a packet.
  731. *
  732. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  733. * WRITE = READ.
  734. *
  735. * During initialization, the host sets up the READ queue position to the first
  736. * IDX position, and WRITE to the last (READ - 1 wrapped)
  737. *
  738. * When the firmware places a packet in a buffer, it will advance the READ idx
  739. * and fire the RX interrupt. The driver can then query the READ idx and
  740. * process as many packets as possible, moving the WRITE idx forward as it
  741. * resets the Rx queue buffers with new memory.
  742. *
  743. * The management in the driver is as follows:
  744. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  745. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  746. * to replenish the iwl->rxq->rx_free.
  747. * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  748. * iwl->rxq is replenished and the READ IDX is updated (updating the
  749. * 'processed' and 'read' driver idxes as well)
  750. * + A received packet is processed and handed to the kernel network stack,
  751. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  752. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  753. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  754. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  755. * were enough free buffers and RX_STALLED is set it is cleared.
  756. *
  757. *
  758. * Driver sequence:
  759. *
  760. * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  761. * il3945_rx_queue_restock
  762. * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  763. * queue, updates firmware pointers, and updates
  764. * the WRITE idx. If insufficient rx_free buffers
  765. * are available, schedules il3945_rx_replenish
  766. *
  767. * -- enable interrupts --
  768. * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
  769. * READ IDX, detaching the SKB from the pool.
  770. * Moves the packet buffer from queue to rx_used.
  771. * Calls il3945_rx_queue_restock to refill any empty
  772. * slots.
  773. * ...
  774. *
  775. */
  776. /**
  777. * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  778. */
  779. static inline __le32
  780. il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
  781. {
  782. return cpu_to_le32((u32) dma_addr);
  783. }
  784. /**
  785. * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
  786. *
  787. * If there are slots in the RX queue that need to be restocked,
  788. * and we have free pre-allocated buffers, fill the ranks as much
  789. * as we can, pulling from rx_free.
  790. *
  791. * This moves the 'write' idx forward to catch up with 'processed', and
  792. * also updates the memory address in the firmware to reference the new
  793. * target buffer.
  794. */
  795. static void
  796. il3945_rx_queue_restock(struct il_priv *il)
  797. {
  798. struct il_rx_queue *rxq = &il->rxq;
  799. struct list_head *element;
  800. struct il_rx_buf *rxb;
  801. unsigned long flags;
  802. spin_lock_irqsave(&rxq->lock, flags);
  803. while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
  804. /* Get next free Rx buffer, remove from free list */
  805. element = rxq->rx_free.next;
  806. rxb = list_entry(element, struct il_rx_buf, list);
  807. list_del(element);
  808. /* Point to Rx buffer via next RBD in circular buffer */
  809. rxq->bd[rxq->write] =
  810. il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
  811. rxq->queue[rxq->write] = rxb;
  812. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  813. rxq->free_count--;
  814. }
  815. spin_unlock_irqrestore(&rxq->lock, flags);
  816. /* If the pre-allocated buffer pool is dropping low, schedule to
  817. * refill it */
  818. if (rxq->free_count <= RX_LOW_WATERMARK)
  819. queue_work(il->workqueue, &il->rx_replenish);
  820. /* If we've added more space for the firmware to place data, tell it.
  821. * Increment device's write pointer in multiples of 8. */
  822. if (rxq->write_actual != (rxq->write & ~0x7) ||
  823. abs(rxq->write - rxq->read) > 7) {
  824. spin_lock_irqsave(&rxq->lock, flags);
  825. rxq->need_update = 1;
  826. spin_unlock_irqrestore(&rxq->lock, flags);
  827. il_rx_queue_update_write_ptr(il, rxq);
  828. }
  829. }
  830. /**
  831. * il3945_rx_replenish - Move all used packet from rx_used to rx_free
  832. *
  833. * When moving to rx_free an SKB is allocated for the slot.
  834. *
  835. * Also restock the Rx queue via il3945_rx_queue_restock.
  836. * This is called as a scheduled work item (except for during initialization)
  837. */
  838. static void
  839. il3945_rx_allocate(struct il_priv *il, gfp_t priority)
  840. {
  841. struct il_rx_queue *rxq = &il->rxq;
  842. struct list_head *element;
  843. struct il_rx_buf *rxb;
  844. struct page *page;
  845. dma_addr_t page_dma;
  846. unsigned long flags;
  847. gfp_t gfp_mask = priority;
  848. while (1) {
  849. spin_lock_irqsave(&rxq->lock, flags);
  850. if (list_empty(&rxq->rx_used)) {
  851. spin_unlock_irqrestore(&rxq->lock, flags);
  852. return;
  853. }
  854. spin_unlock_irqrestore(&rxq->lock, flags);
  855. if (rxq->free_count > RX_LOW_WATERMARK)
  856. gfp_mask |= __GFP_NOWARN;
  857. if (il->hw_params.rx_page_order > 0)
  858. gfp_mask |= __GFP_COMP;
  859. /* Alloc a new receive buffer */
  860. page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
  861. if (!page) {
  862. if (net_ratelimit())
  863. D_INFO("Failed to allocate SKB buffer.\n");
  864. if (rxq->free_count <= RX_LOW_WATERMARK &&
  865. net_ratelimit())
  866. IL_ERR("Failed to allocate SKB buffer with %0x."
  867. "Only %u free buffers remaining.\n",
  868. priority, rxq->free_count);
  869. /* We don't reschedule replenish work here -- we will
  870. * call the restock method and if it still needs
  871. * more buffers it will schedule replenish */
  872. break;
  873. }
  874. /* Get physical address of RB/SKB */
  875. page_dma =
  876. pci_map_page(il->pci_dev, page, 0,
  877. PAGE_SIZE << il->hw_params.rx_page_order,
  878. PCI_DMA_FROMDEVICE);
  879. if (unlikely(pci_dma_mapping_error(il->pci_dev, page_dma))) {
  880. __free_pages(page, il->hw_params.rx_page_order);
  881. break;
  882. }
  883. spin_lock_irqsave(&rxq->lock, flags);
  884. if (list_empty(&rxq->rx_used)) {
  885. spin_unlock_irqrestore(&rxq->lock, flags);
  886. pci_unmap_page(il->pci_dev, page_dma,
  887. PAGE_SIZE << il->hw_params.rx_page_order,
  888. PCI_DMA_FROMDEVICE);
  889. __free_pages(page, il->hw_params.rx_page_order);
  890. return;
  891. }
  892. element = rxq->rx_used.next;
  893. rxb = list_entry(element, struct il_rx_buf, list);
  894. list_del(element);
  895. rxb->page = page;
  896. rxb->page_dma = page_dma;
  897. list_add_tail(&rxb->list, &rxq->rx_free);
  898. rxq->free_count++;
  899. il->alloc_rxb_page++;
  900. spin_unlock_irqrestore(&rxq->lock, flags);
  901. }
  902. }
  903. void
  904. il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
  905. {
  906. unsigned long flags;
  907. int i;
  908. spin_lock_irqsave(&rxq->lock, flags);
  909. INIT_LIST_HEAD(&rxq->rx_free);
  910. INIT_LIST_HEAD(&rxq->rx_used);
  911. /* Fill the rx_used queue with _all_ of the Rx buffers */
  912. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  913. /* In the reset function, these buffers may have been allocated
  914. * to an SKB, so we need to unmap and free potential storage */
  915. if (rxq->pool[i].page != NULL) {
  916. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  917. PAGE_SIZE << il->hw_params.rx_page_order,
  918. PCI_DMA_FROMDEVICE);
  919. __il_free_pages(il, rxq->pool[i].page);
  920. rxq->pool[i].page = NULL;
  921. }
  922. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  923. }
  924. /* Set us so that we have processed and used all buffers, but have
  925. * not restocked the Rx queue with fresh buffers */
  926. rxq->read = rxq->write = 0;
  927. rxq->write_actual = 0;
  928. rxq->free_count = 0;
  929. spin_unlock_irqrestore(&rxq->lock, flags);
  930. }
  931. void
  932. il3945_rx_replenish(void *data)
  933. {
  934. struct il_priv *il = data;
  935. unsigned long flags;
  936. il3945_rx_allocate(il, GFP_KERNEL);
  937. spin_lock_irqsave(&il->lock, flags);
  938. il3945_rx_queue_restock(il);
  939. spin_unlock_irqrestore(&il->lock, flags);
  940. }
  941. static void
  942. il3945_rx_replenish_now(struct il_priv *il)
  943. {
  944. il3945_rx_allocate(il, GFP_ATOMIC);
  945. il3945_rx_queue_restock(il);
  946. }
  947. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  948. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  949. * This free routine walks the list of POOL entries and if SKB is set to
  950. * non NULL it is unmapped and freed
  951. */
  952. static void
  953. il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
  954. {
  955. int i;
  956. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  957. if (rxq->pool[i].page != NULL) {
  958. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  959. PAGE_SIZE << il->hw_params.rx_page_order,
  960. PCI_DMA_FROMDEVICE);
  961. __il_free_pages(il, rxq->pool[i].page);
  962. rxq->pool[i].page = NULL;
  963. }
  964. }
  965. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  966. rxq->bd_dma);
  967. dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
  968. rxq->rb_stts, rxq->rb_stts_dma);
  969. rxq->bd = NULL;
  970. rxq->rb_stts = NULL;
  971. }
  972. /* Convert linear signal-to-noise ratio into dB */
  973. static u8 ratio2dB[100] = {
  974. /* 0 1 2 3 4 5 6 7 8 9 */
  975. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  976. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  977. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  978. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  979. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  980. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  981. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  982. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  983. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  984. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  985. };
  986. /* Calculates a relative dB value from a ratio of linear
  987. * (i.e. not dB) signal levels.
  988. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  989. int
  990. il3945_calc_db_from_ratio(int sig_ratio)
  991. {
  992. /* 1000:1 or higher just report as 60 dB */
  993. if (sig_ratio >= 1000)
  994. return 60;
  995. /* 100:1 or higher, divide by 10 and use table,
  996. * add 20 dB to make up for divide by 10 */
  997. if (sig_ratio >= 100)
  998. return 20 + (int)ratio2dB[sig_ratio / 10];
  999. /* We shouldn't see this */
  1000. if (sig_ratio < 1)
  1001. return 0;
  1002. /* Use table for ratios 1:1 - 99:1 */
  1003. return (int)ratio2dB[sig_ratio];
  1004. }
  1005. /**
  1006. * il3945_rx_handle - Main entry function for receiving responses from uCode
  1007. *
  1008. * Uses the il->handlers callback function array to invoke
  1009. * the appropriate handlers, including command responses,
  1010. * frame-received notifications, and other notifications.
  1011. */
  1012. static void
  1013. il3945_rx_handle(struct il_priv *il)
  1014. {
  1015. struct il_rx_buf *rxb;
  1016. struct il_rx_pkt *pkt;
  1017. struct il_rx_queue *rxq = &il->rxq;
  1018. u32 r, i;
  1019. int reclaim;
  1020. unsigned long flags;
  1021. u8 fill_rx = 0;
  1022. u32 count = 8;
  1023. int total_empty = 0;
  1024. /* uCode's read idx (stored in shared DRAM) indicates the last Rx
  1025. * buffer that the driver may process (last buffer filled by ucode). */
  1026. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1027. i = rxq->read;
  1028. /* calculate total frames need to be restock after handling RX */
  1029. total_empty = r - rxq->write_actual;
  1030. if (total_empty < 0)
  1031. total_empty += RX_QUEUE_SIZE;
  1032. if (total_empty > (RX_QUEUE_SIZE / 2))
  1033. fill_rx = 1;
  1034. /* Rx interrupt, but nothing sent from uCode */
  1035. if (i == r)
  1036. D_RX("r = %d, i = %d\n", r, i);
  1037. while (i != r) {
  1038. int len;
  1039. rxb = rxq->queue[i];
  1040. /* If an RXB doesn't have a Rx queue slot associated with it,
  1041. * then a bug has been introduced in the queue refilling
  1042. * routines -- catch it here */
  1043. BUG_ON(rxb == NULL);
  1044. rxq->queue[i] = NULL;
  1045. pci_unmap_page(il->pci_dev, rxb->page_dma,
  1046. PAGE_SIZE << il->hw_params.rx_page_order,
  1047. PCI_DMA_FROMDEVICE);
  1048. pkt = rxb_addr(rxb);
  1049. len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  1050. len += sizeof(u32); /* account for status word */
  1051. reclaim = il_need_reclaim(il, pkt);
  1052. /* Based on type of command response or notification,
  1053. * handle those that need handling via function in
  1054. * handlers table. See il3945_setup_handlers() */
  1055. if (il->handlers[pkt->hdr.cmd]) {
  1056. D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
  1057. il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1058. il->isr_stats.handlers[pkt->hdr.cmd]++;
  1059. il->handlers[pkt->hdr.cmd] (il, rxb);
  1060. } else {
  1061. /* No handling needed */
  1062. D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
  1063. i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1064. }
  1065. /*
  1066. * XXX: After here, we should always check rxb->page
  1067. * against NULL before touching it or its virtual
  1068. * memory (pkt). Because some handler might have
  1069. * already taken or freed the pages.
  1070. */
  1071. if (reclaim) {
  1072. /* Invoke any callbacks, transfer the buffer to caller,
  1073. * and fire off the (possibly) blocking il_send_cmd()
  1074. * as we reclaim the driver command queue */
  1075. if (rxb->page)
  1076. il_tx_cmd_complete(il, rxb);
  1077. else
  1078. IL_WARN("Claim null rxb?\n");
  1079. }
  1080. /* Reuse the page if possible. For notification packets and
  1081. * SKBs that fail to Rx correctly, add them back into the
  1082. * rx_free list for reuse later. */
  1083. spin_lock_irqsave(&rxq->lock, flags);
  1084. if (rxb->page != NULL) {
  1085. rxb->page_dma =
  1086. pci_map_page(il->pci_dev, rxb->page, 0,
  1087. PAGE_SIZE << il->hw_params.
  1088. rx_page_order, PCI_DMA_FROMDEVICE);
  1089. if (unlikely(pci_dma_mapping_error(il->pci_dev,
  1090. rxb->page_dma))) {
  1091. __il_free_pages(il, rxb->page);
  1092. rxb->page = NULL;
  1093. list_add_tail(&rxb->list, &rxq->rx_used);
  1094. } else {
  1095. list_add_tail(&rxb->list, &rxq->rx_free);
  1096. rxq->free_count++;
  1097. }
  1098. } else
  1099. list_add_tail(&rxb->list, &rxq->rx_used);
  1100. spin_unlock_irqrestore(&rxq->lock, flags);
  1101. i = (i + 1) & RX_QUEUE_MASK;
  1102. /* If there are a lot of unused frames,
  1103. * restock the Rx queue so ucode won't assert. */
  1104. if (fill_rx) {
  1105. count++;
  1106. if (count >= 8) {
  1107. rxq->read = i;
  1108. il3945_rx_replenish_now(il);
  1109. count = 0;
  1110. }
  1111. }
  1112. }
  1113. /* Backtrack one entry */
  1114. rxq->read = i;
  1115. if (fill_rx)
  1116. il3945_rx_replenish_now(il);
  1117. else
  1118. il3945_rx_queue_restock(il);
  1119. }
  1120. /* call this function to flush any scheduled tasklet */
  1121. static inline void
  1122. il3945_synchronize_irq(struct il_priv *il)
  1123. {
  1124. /* wait to make sure we flush pending tasklet */
  1125. synchronize_irq(il->pci_dev->irq);
  1126. tasklet_kill(&il->irq_tasklet);
  1127. }
  1128. static const char *
  1129. il3945_desc_lookup(int i)
  1130. {
  1131. switch (i) {
  1132. case 1:
  1133. return "FAIL";
  1134. case 2:
  1135. return "BAD_PARAM";
  1136. case 3:
  1137. return "BAD_CHECKSUM";
  1138. case 4:
  1139. return "NMI_INTERRUPT";
  1140. case 5:
  1141. return "SYSASSERT";
  1142. case 6:
  1143. return "FATAL_ERROR";
  1144. }
  1145. return "UNKNOWN";
  1146. }
  1147. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1148. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1149. void
  1150. il3945_dump_nic_error_log(struct il_priv *il)
  1151. {
  1152. u32 i;
  1153. u32 desc, time, count, base, data1;
  1154. u32 blink1, blink2, ilink1, ilink2;
  1155. base = le32_to_cpu(il->card_alive.error_event_table_ptr);
  1156. if (!il3945_hw_valid_rtc_data_addr(base)) {
  1157. IL_ERR("Not valid error log pointer 0x%08X\n", base);
  1158. return;
  1159. }
  1160. count = il_read_targ_mem(il, base);
  1161. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1162. IL_ERR("Start IWL Error Log Dump:\n");
  1163. IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
  1164. }
  1165. IL_ERR("Desc Time asrtPC blink2 "
  1166. "ilink1 nmiPC Line\n");
  1167. for (i = ERROR_START_OFFSET;
  1168. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1169. i += ERROR_ELEM_SIZE) {
  1170. desc = il_read_targ_mem(il, base + i);
  1171. time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
  1172. blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
  1173. blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
  1174. ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
  1175. ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
  1176. data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
  1177. IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1178. il3945_desc_lookup(desc), desc, time, blink1, blink2,
  1179. ilink1, ilink2, data1);
  1180. }
  1181. }
  1182. static void
  1183. il3945_irq_tasklet(struct il_priv *il)
  1184. {
  1185. u32 inta, handled = 0;
  1186. u32 inta_fh;
  1187. unsigned long flags;
  1188. #ifdef CONFIG_IWLEGACY_DEBUG
  1189. u32 inta_mask;
  1190. #endif
  1191. spin_lock_irqsave(&il->lock, flags);
  1192. /* Ack/clear/reset pending uCode interrupts.
  1193. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1194. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1195. inta = _il_rd(il, CSR_INT);
  1196. _il_wr(il, CSR_INT, inta);
  1197. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1198. * Any new interrupts that happen after this, either while we're
  1199. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1200. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1201. _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
  1202. #ifdef CONFIG_IWLEGACY_DEBUG
  1203. if (il_get_debug_level(il) & IL_DL_ISR) {
  1204. /* just for debug */
  1205. inta_mask = _il_rd(il, CSR_INT_MASK);
  1206. D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
  1207. inta_mask, inta_fh);
  1208. }
  1209. #endif
  1210. spin_unlock_irqrestore(&il->lock, flags);
  1211. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1212. * atomic, make sure that inta covers all the interrupts that
  1213. * we've discovered, even if FH interrupt came in just after
  1214. * reading CSR_INT. */
  1215. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1216. inta |= CSR_INT_BIT_FH_RX;
  1217. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1218. inta |= CSR_INT_BIT_FH_TX;
  1219. /* Now service all interrupt bits discovered above. */
  1220. if (inta & CSR_INT_BIT_HW_ERR) {
  1221. IL_ERR("Hardware error detected. Restarting.\n");
  1222. /* Tell the device to stop sending interrupts */
  1223. il_disable_interrupts(il);
  1224. il->isr_stats.hw++;
  1225. il_irq_handle_error(il);
  1226. handled |= CSR_INT_BIT_HW_ERR;
  1227. return;
  1228. }
  1229. #ifdef CONFIG_IWLEGACY_DEBUG
  1230. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1231. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1232. if (inta & CSR_INT_BIT_SCD) {
  1233. D_ISR("Scheduler finished to transmit "
  1234. "the frame/frames.\n");
  1235. il->isr_stats.sch++;
  1236. }
  1237. /* Alive notification via Rx interrupt will do the real work */
  1238. if (inta & CSR_INT_BIT_ALIVE) {
  1239. D_ISR("Alive interrupt\n");
  1240. il->isr_stats.alive++;
  1241. }
  1242. }
  1243. #endif
  1244. /* Safely ignore these bits for debug checks below */
  1245. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1246. /* Error detected by uCode */
  1247. if (inta & CSR_INT_BIT_SW_ERR) {
  1248. IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
  1249. inta);
  1250. il->isr_stats.sw++;
  1251. il_irq_handle_error(il);
  1252. handled |= CSR_INT_BIT_SW_ERR;
  1253. }
  1254. /* uCode wakes up after power-down sleep */
  1255. if (inta & CSR_INT_BIT_WAKEUP) {
  1256. D_ISR("Wakeup interrupt\n");
  1257. il_rx_queue_update_write_ptr(il, &il->rxq);
  1258. spin_lock_irqsave(&il->lock, flags);
  1259. il_txq_update_write_ptr(il, &il->txq[0]);
  1260. il_txq_update_write_ptr(il, &il->txq[1]);
  1261. il_txq_update_write_ptr(il, &il->txq[2]);
  1262. il_txq_update_write_ptr(il, &il->txq[3]);
  1263. il_txq_update_write_ptr(il, &il->txq[4]);
  1264. spin_unlock_irqrestore(&il->lock, flags);
  1265. il->isr_stats.wakeup++;
  1266. handled |= CSR_INT_BIT_WAKEUP;
  1267. }
  1268. /* All uCode command responses, including Tx command responses,
  1269. * Rx "responses" (frame-received notification), and other
  1270. * notifications from uCode come through here*/
  1271. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1272. il3945_rx_handle(il);
  1273. il->isr_stats.rx++;
  1274. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1275. }
  1276. if (inta & CSR_INT_BIT_FH_TX) {
  1277. D_ISR("Tx interrupt\n");
  1278. il->isr_stats.tx++;
  1279. _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
  1280. il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
  1281. handled |= CSR_INT_BIT_FH_TX;
  1282. }
  1283. if (inta & ~handled) {
  1284. IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1285. il->isr_stats.unhandled++;
  1286. }
  1287. if (inta & ~il->inta_mask) {
  1288. IL_WARN("Disabled INTA bits 0x%08x were pending\n",
  1289. inta & ~il->inta_mask);
  1290. IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
  1291. }
  1292. /* Re-enable all interrupts */
  1293. /* only Re-enable if disabled by irq */
  1294. if (test_bit(S_INT_ENABLED, &il->status))
  1295. il_enable_interrupts(il);
  1296. #ifdef CONFIG_IWLEGACY_DEBUG
  1297. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1298. inta = _il_rd(il, CSR_INT);
  1299. inta_mask = _il_rd(il, CSR_INT_MASK);
  1300. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1301. D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1302. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1303. }
  1304. #endif
  1305. }
  1306. static int
  1307. il3945_get_channels_for_scan(struct il_priv *il, enum nl80211_band band,
  1308. u8 is_active, u8 n_probes,
  1309. struct il3945_scan_channel *scan_ch,
  1310. struct ieee80211_vif *vif)
  1311. {
  1312. struct ieee80211_channel *chan;
  1313. const struct ieee80211_supported_band *sband;
  1314. const struct il_channel_info *ch_info;
  1315. u16 passive_dwell = 0;
  1316. u16 active_dwell = 0;
  1317. int added, i;
  1318. sband = il_get_hw_mode(il, band);
  1319. if (!sband)
  1320. return 0;
  1321. active_dwell = il_get_active_dwell_time(il, band, n_probes);
  1322. passive_dwell = il_get_passive_dwell_time(il, band, vif);
  1323. if (passive_dwell <= active_dwell)
  1324. passive_dwell = active_dwell + 1;
  1325. for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
  1326. chan = il->scan_request->channels[i];
  1327. if (chan->band != band)
  1328. continue;
  1329. scan_ch->channel = chan->hw_value;
  1330. ch_info = il_get_channel_info(il, band, scan_ch->channel);
  1331. if (!il_is_channel_valid(ch_info)) {
  1332. D_SCAN("Channel %d is INVALID for this band.\n",
  1333. scan_ch->channel);
  1334. continue;
  1335. }
  1336. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1337. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1338. /* If passive , set up for auto-switch
  1339. * and use long active_dwell time.
  1340. */
  1341. if (!is_active || il_is_channel_passive(ch_info) ||
  1342. (chan->flags & IEEE80211_CHAN_NO_IR)) {
  1343. scan_ch->type = 0; /* passive */
  1344. if (IL_UCODE_API(il->ucode_ver) == 1)
  1345. scan_ch->active_dwell =
  1346. cpu_to_le16(passive_dwell - 1);
  1347. } else {
  1348. scan_ch->type = 1; /* active */
  1349. }
  1350. /* Set direct probe bits. These may be used both for active
  1351. * scan channels (probes gets sent right away),
  1352. * or for passive channels (probes get se sent only after
  1353. * hearing clear Rx packet).*/
  1354. if (IL_UCODE_API(il->ucode_ver) >= 2) {
  1355. if (n_probes)
  1356. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1357. } else {
  1358. /* uCode v1 does not allow setting direct probe bits on
  1359. * passive channel. */
  1360. if ((scan_ch->type & 1) && n_probes)
  1361. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1362. }
  1363. /* Set txpower levels to defaults */
  1364. scan_ch->tpc.dsp_atten = 110;
  1365. /* scan_pwr_info->tpc.dsp_atten; */
  1366. /*scan_pwr_info->tpc.tx_gain; */
  1367. if (band == NL80211_BAND_5GHZ)
  1368. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1369. else {
  1370. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1371. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1372. * power level:
  1373. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1374. */
  1375. }
  1376. D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
  1377. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1378. (scan_ch->type & 1) ? active_dwell : passive_dwell);
  1379. scan_ch++;
  1380. added++;
  1381. }
  1382. D_SCAN("total channels to scan %d\n", added);
  1383. return added;
  1384. }
  1385. static void
  1386. il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
  1387. {
  1388. int i;
  1389. for (i = 0; i < RATE_COUNT_LEGACY; i++) {
  1390. rates[i].bitrate = il3945_rates[i].ieee * 5;
  1391. rates[i].hw_value = i; /* Rate scaling will work on idxes */
  1392. rates[i].hw_value_short = i;
  1393. rates[i].flags = 0;
  1394. if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
  1395. /*
  1396. * If CCK != 1M then set short preamble rate flag.
  1397. */
  1398. rates[i].flags |=
  1399. (il3945_rates[i].plcp ==
  1400. 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1401. }
  1402. }
  1403. }
  1404. /******************************************************************************
  1405. *
  1406. * uCode download functions
  1407. *
  1408. ******************************************************************************/
  1409. static void
  1410. il3945_dealloc_ucode_pci(struct il_priv *il)
  1411. {
  1412. il_free_fw_desc(il->pci_dev, &il->ucode_code);
  1413. il_free_fw_desc(il->pci_dev, &il->ucode_data);
  1414. il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1415. il_free_fw_desc(il->pci_dev, &il->ucode_init);
  1416. il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
  1417. il_free_fw_desc(il->pci_dev, &il->ucode_boot);
  1418. }
  1419. /**
  1420. * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1421. * looking at all data.
  1422. */
  1423. static int
  1424. il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
  1425. {
  1426. u32 val;
  1427. u32 save_len = len;
  1428. int rc = 0;
  1429. u32 errcnt;
  1430. D_INFO("ucode inst image size is %u\n", len);
  1431. il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
  1432. errcnt = 0;
  1433. for (; len > 0; len -= sizeof(u32), image++) {
  1434. /* read data comes through single port, auto-incr addr */
  1435. /* NOTE: Use the debugless read so we don't flood kernel log
  1436. * if IL_DL_IO is set */
  1437. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1438. if (val != le32_to_cpu(*image)) {
  1439. IL_ERR("uCode INST section is invalid at "
  1440. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1441. save_len - len, val, le32_to_cpu(*image));
  1442. rc = -EIO;
  1443. errcnt++;
  1444. if (errcnt >= 20)
  1445. break;
  1446. }
  1447. }
  1448. if (!errcnt)
  1449. D_INFO("ucode image in INSTRUCTION memory is good\n");
  1450. return rc;
  1451. }
  1452. /**
  1453. * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1454. * using sample data 100 bytes apart. If these sample points are good,
  1455. * it's a pretty good bet that everything between them is good, too.
  1456. */
  1457. static int
  1458. il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
  1459. {
  1460. u32 val;
  1461. int rc = 0;
  1462. u32 errcnt = 0;
  1463. u32 i;
  1464. D_INFO("ucode inst image size is %u\n", len);
  1465. for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
  1466. /* read data comes through single port, auto-incr addr */
  1467. /* NOTE: Use the debugless read so we don't flood kernel log
  1468. * if IL_DL_IO is set */
  1469. il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
  1470. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1471. if (val != le32_to_cpu(*image)) {
  1472. #if 0 /* Enable this if you want to see details */
  1473. IL_ERR("uCode INST section is invalid at "
  1474. "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
  1475. *image);
  1476. #endif
  1477. rc = -EIO;
  1478. errcnt++;
  1479. if (errcnt >= 3)
  1480. break;
  1481. }
  1482. }
  1483. return rc;
  1484. }
  1485. /**
  1486. * il3945_verify_ucode - determine which instruction image is in SRAM,
  1487. * and verify its contents
  1488. */
  1489. static int
  1490. il3945_verify_ucode(struct il_priv *il)
  1491. {
  1492. __le32 *image;
  1493. u32 len;
  1494. int rc = 0;
  1495. /* Try bootstrap */
  1496. image = (__le32 *) il->ucode_boot.v_addr;
  1497. len = il->ucode_boot.len;
  1498. rc = il3945_verify_inst_sparse(il, image, len);
  1499. if (rc == 0) {
  1500. D_INFO("Bootstrap uCode is good in inst SRAM\n");
  1501. return 0;
  1502. }
  1503. /* Try initialize */
  1504. image = (__le32 *) il->ucode_init.v_addr;
  1505. len = il->ucode_init.len;
  1506. rc = il3945_verify_inst_sparse(il, image, len);
  1507. if (rc == 0) {
  1508. D_INFO("Initialize uCode is good in inst SRAM\n");
  1509. return 0;
  1510. }
  1511. /* Try runtime/protocol */
  1512. image = (__le32 *) il->ucode_code.v_addr;
  1513. len = il->ucode_code.len;
  1514. rc = il3945_verify_inst_sparse(il, image, len);
  1515. if (rc == 0) {
  1516. D_INFO("Runtime uCode is good in inst SRAM\n");
  1517. return 0;
  1518. }
  1519. IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1520. /* Since nothing seems to match, show first several data entries in
  1521. * instruction SRAM, so maybe visual inspection will give a clue.
  1522. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1523. image = (__le32 *) il->ucode_boot.v_addr;
  1524. len = il->ucode_boot.len;
  1525. rc = il3945_verify_inst_full(il, image, len);
  1526. return rc;
  1527. }
  1528. static void
  1529. il3945_nic_start(struct il_priv *il)
  1530. {
  1531. /* Remove all resets to allow NIC to operate */
  1532. _il_wr(il, CSR_RESET, 0);
  1533. }
  1534. #define IL3945_UCODE_GET(item) \
  1535. static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
  1536. { \
  1537. return le32_to_cpu(ucode->v1.item); \
  1538. }
  1539. static u32
  1540. il3945_ucode_get_header_size(u32 api_ver)
  1541. {
  1542. return 24;
  1543. }
  1544. static u8 *
  1545. il3945_ucode_get_data(const struct il_ucode_header *ucode)
  1546. {
  1547. return (u8 *) ucode->v1.data;
  1548. }
  1549. IL3945_UCODE_GET(inst_size);
  1550. IL3945_UCODE_GET(data_size);
  1551. IL3945_UCODE_GET(init_size);
  1552. IL3945_UCODE_GET(init_data_size);
  1553. IL3945_UCODE_GET(boot_size);
  1554. /**
  1555. * il3945_read_ucode - Read uCode images from disk file.
  1556. *
  1557. * Copy into buffers for card to fetch via bus-mastering
  1558. */
  1559. static int
  1560. il3945_read_ucode(struct il_priv *il)
  1561. {
  1562. const struct il_ucode_header *ucode;
  1563. int ret = -EINVAL, idx;
  1564. const struct firmware *ucode_raw;
  1565. /* firmware file name contains uCode/driver compatibility version */
  1566. const char *name_pre = il->cfg->fw_name_pre;
  1567. const unsigned int api_max = il->cfg->ucode_api_max;
  1568. const unsigned int api_min = il->cfg->ucode_api_min;
  1569. char buf[25];
  1570. u8 *src;
  1571. size_t len;
  1572. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1573. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1574. * request_firmware() is synchronous, file is in memory on return. */
  1575. for (idx = api_max; idx >= api_min; idx--) {
  1576. sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
  1577. ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
  1578. if (ret < 0) {
  1579. IL_ERR("%s firmware file req failed: %d\n", buf, ret);
  1580. if (ret == -ENOENT)
  1581. continue;
  1582. else
  1583. goto error;
  1584. } else {
  1585. if (idx < api_max)
  1586. IL_ERR("Loaded firmware %s, "
  1587. "which is deprecated. "
  1588. " Please use API v%u instead.\n", buf,
  1589. api_max);
  1590. D_INFO("Got firmware '%s' file "
  1591. "(%zd bytes) from disk\n", buf, ucode_raw->size);
  1592. break;
  1593. }
  1594. }
  1595. if (ret < 0)
  1596. goto error;
  1597. /* Make sure that we got at least our header! */
  1598. if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
  1599. IL_ERR("File size way too small!\n");
  1600. ret = -EINVAL;
  1601. goto err_release;
  1602. }
  1603. /* Data from ucode file: header followed by uCode images */
  1604. ucode = (struct il_ucode_header *)ucode_raw->data;
  1605. il->ucode_ver = le32_to_cpu(ucode->ver);
  1606. api_ver = IL_UCODE_API(il->ucode_ver);
  1607. inst_size = il3945_ucode_get_inst_size(ucode);
  1608. data_size = il3945_ucode_get_data_size(ucode);
  1609. init_size = il3945_ucode_get_init_size(ucode);
  1610. init_data_size = il3945_ucode_get_init_data_size(ucode);
  1611. boot_size = il3945_ucode_get_boot_size(ucode);
  1612. src = il3945_ucode_get_data(ucode);
  1613. /* api_ver should match the api version forming part of the
  1614. * firmware filename ... but we don't check for that and only rely
  1615. * on the API version read from firmware header from here on forward */
  1616. if (api_ver < api_min || api_ver > api_max) {
  1617. IL_ERR("Driver unable to support your firmware API. "
  1618. "Driver supports v%u, firmware is v%u.\n", api_max,
  1619. api_ver);
  1620. il->ucode_ver = 0;
  1621. ret = -EINVAL;
  1622. goto err_release;
  1623. }
  1624. if (api_ver != api_max)
  1625. IL_ERR("Firmware has old API version. Expected %u, "
  1626. "got %u. New firmware can be obtained "
  1627. "from http://www.intellinuxwireless.org.\n", api_max,
  1628. api_ver);
  1629. IL_INFO("loaded firmware version %u.%u.%u.%u\n",
  1630. IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
  1631. IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
  1632. snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
  1633. "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
  1634. IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
  1635. IL_UCODE_SERIAL(il->ucode_ver));
  1636. D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
  1637. D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  1638. D_INFO("f/w package hdr runtime data size = %u\n", data_size);
  1639. D_INFO("f/w package hdr init inst size = %u\n", init_size);
  1640. D_INFO("f/w package hdr init data size = %u\n", init_data_size);
  1641. D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  1642. /* Verify size of file vs. image size info in file's header */
  1643. if (ucode_raw->size !=
  1644. il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
  1645. init_size + init_data_size + boot_size) {
  1646. D_INFO("uCode file size %zd does not match expected size\n",
  1647. ucode_raw->size);
  1648. ret = -EINVAL;
  1649. goto err_release;
  1650. }
  1651. /* Verify that uCode images will fit in card's SRAM */
  1652. if (inst_size > IL39_MAX_INST_SIZE) {
  1653. D_INFO("uCode instr len %d too large to fit in\n", inst_size);
  1654. ret = -EINVAL;
  1655. goto err_release;
  1656. }
  1657. if (data_size > IL39_MAX_DATA_SIZE) {
  1658. D_INFO("uCode data len %d too large to fit in\n", data_size);
  1659. ret = -EINVAL;
  1660. goto err_release;
  1661. }
  1662. if (init_size > IL39_MAX_INST_SIZE) {
  1663. D_INFO("uCode init instr len %d too large to fit in\n",
  1664. init_size);
  1665. ret = -EINVAL;
  1666. goto err_release;
  1667. }
  1668. if (init_data_size > IL39_MAX_DATA_SIZE) {
  1669. D_INFO("uCode init data len %d too large to fit in\n",
  1670. init_data_size);
  1671. ret = -EINVAL;
  1672. goto err_release;
  1673. }
  1674. if (boot_size > IL39_MAX_BSM_SIZE) {
  1675. D_INFO("uCode boot instr len %d too large to fit in\n",
  1676. boot_size);
  1677. ret = -EINVAL;
  1678. goto err_release;
  1679. }
  1680. /* Allocate ucode buffers for card's bus-master loading ... */
  1681. /* Runtime instructions and 2 copies of data:
  1682. * 1) unmodified from disk
  1683. * 2) backup cache for save/restore during power-downs */
  1684. il->ucode_code.len = inst_size;
  1685. il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
  1686. il->ucode_data.len = data_size;
  1687. il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
  1688. il->ucode_data_backup.len = data_size;
  1689. il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1690. if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
  1691. !il->ucode_data_backup.v_addr)
  1692. goto err_pci_alloc;
  1693. /* Initialization instructions and data */
  1694. if (init_size && init_data_size) {
  1695. il->ucode_init.len = init_size;
  1696. il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
  1697. il->ucode_init_data.len = init_data_size;
  1698. il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
  1699. if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
  1700. goto err_pci_alloc;
  1701. }
  1702. /* Bootstrap (instructions only, no data) */
  1703. if (boot_size) {
  1704. il->ucode_boot.len = boot_size;
  1705. il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
  1706. if (!il->ucode_boot.v_addr)
  1707. goto err_pci_alloc;
  1708. }
  1709. /* Copy images into buffers for card's bus-master reads ... */
  1710. /* Runtime instructions (first block of data in file) */
  1711. len = inst_size;
  1712. D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
  1713. memcpy(il->ucode_code.v_addr, src, len);
  1714. src += len;
  1715. D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1716. il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
  1717. /* Runtime data (2nd block)
  1718. * NOTE: Copy into backup buffer will be done in il3945_up() */
  1719. len = data_size;
  1720. D_INFO("Copying (but not loading) uCode data len %zd\n", len);
  1721. memcpy(il->ucode_data.v_addr, src, len);
  1722. memcpy(il->ucode_data_backup.v_addr, src, len);
  1723. src += len;
  1724. /* Initialization instructions (3rd block) */
  1725. if (init_size) {
  1726. len = init_size;
  1727. D_INFO("Copying (but not loading) init instr len %zd\n", len);
  1728. memcpy(il->ucode_init.v_addr, src, len);
  1729. src += len;
  1730. }
  1731. /* Initialization data (4th block) */
  1732. if (init_data_size) {
  1733. len = init_data_size;
  1734. D_INFO("Copying (but not loading) init data len %zd\n", len);
  1735. memcpy(il->ucode_init_data.v_addr, src, len);
  1736. src += len;
  1737. }
  1738. /* Bootstrap instructions (5th block) */
  1739. len = boot_size;
  1740. D_INFO("Copying (but not loading) boot instr len %zd\n", len);
  1741. memcpy(il->ucode_boot.v_addr, src, len);
  1742. /* We have our copies now, allow OS release its copies */
  1743. release_firmware(ucode_raw);
  1744. return 0;
  1745. err_pci_alloc:
  1746. IL_ERR("failed to allocate pci memory\n");
  1747. ret = -ENOMEM;
  1748. il3945_dealloc_ucode_pci(il);
  1749. err_release:
  1750. release_firmware(ucode_raw);
  1751. error:
  1752. return ret;
  1753. }
  1754. /**
  1755. * il3945_set_ucode_ptrs - Set uCode address location
  1756. *
  1757. * Tell initialization uCode where to find runtime uCode.
  1758. *
  1759. * BSM registers initially contain pointers to initialization uCode.
  1760. * We need to replace them to load runtime uCode inst and data,
  1761. * and to save runtime data when powering down.
  1762. */
  1763. static int
  1764. il3945_set_ucode_ptrs(struct il_priv *il)
  1765. {
  1766. dma_addr_t pinst;
  1767. dma_addr_t pdata;
  1768. /* bits 31:0 for 3945 */
  1769. pinst = il->ucode_code.p_addr;
  1770. pdata = il->ucode_data_backup.p_addr;
  1771. /* Tell bootstrap uCode where to find image to load */
  1772. il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
  1773. il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
  1774. il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
  1775. /* Inst byte count must be last to set up, bit 31 signals uCode
  1776. * that all new ptr/size info is in place */
  1777. il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
  1778. il->ucode_code.len | BSM_DRAM_INST_LOAD);
  1779. D_INFO("Runtime uCode pointers are set.\n");
  1780. return 0;
  1781. }
  1782. /**
  1783. * il3945_init_alive_start - Called after N_ALIVE notification received
  1784. *
  1785. * Called after N_ALIVE notification received from "initialize" uCode.
  1786. *
  1787. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1788. */
  1789. static void
  1790. il3945_init_alive_start(struct il_priv *il)
  1791. {
  1792. /* Check alive response for "valid" sign from uCode */
  1793. if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
  1794. /* We had an error bringing up the hardware, so take it
  1795. * all the way back down so we can try again */
  1796. D_INFO("Initialize Alive failed.\n");
  1797. goto restart;
  1798. }
  1799. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1800. * This is a paranoid check, because we would not have gotten the
  1801. * "initialize" alive if code weren't properly loaded. */
  1802. if (il3945_verify_ucode(il)) {
  1803. /* Runtime instruction load was bad;
  1804. * take it all the way back down so we can try again */
  1805. D_INFO("Bad \"initialize\" uCode load.\n");
  1806. goto restart;
  1807. }
  1808. /* Send pointers to protocol/runtime uCode image ... init code will
  1809. * load and launch runtime uCode, which will send us another "Alive"
  1810. * notification. */
  1811. D_INFO("Initialization Alive received.\n");
  1812. if (il3945_set_ucode_ptrs(il)) {
  1813. /* Runtime instruction load won't happen;
  1814. * take it all the way back down so we can try again */
  1815. D_INFO("Couldn't set up uCode pointers.\n");
  1816. goto restart;
  1817. }
  1818. return;
  1819. restart:
  1820. queue_work(il->workqueue, &il->restart);
  1821. }
  1822. /**
  1823. * il3945_alive_start - called after N_ALIVE notification received
  1824. * from protocol/runtime uCode (initialization uCode's
  1825. * Alive gets handled by il3945_init_alive_start()).
  1826. */
  1827. static void
  1828. il3945_alive_start(struct il_priv *il)
  1829. {
  1830. int thermal_spin = 0;
  1831. u32 rfkill;
  1832. D_INFO("Runtime Alive received.\n");
  1833. if (il->card_alive.is_valid != UCODE_VALID_OK) {
  1834. /* We had an error bringing up the hardware, so take it
  1835. * all the way back down so we can try again */
  1836. D_INFO("Alive failed.\n");
  1837. goto restart;
  1838. }
  1839. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  1840. * This is a paranoid check, because we would not have gotten the
  1841. * "runtime" alive if code weren't properly loaded. */
  1842. if (il3945_verify_ucode(il)) {
  1843. /* Runtime instruction load was bad;
  1844. * take it all the way back down so we can try again */
  1845. D_INFO("Bad runtime uCode load.\n");
  1846. goto restart;
  1847. }
  1848. rfkill = il_rd_prph(il, APMG_RFKILL_REG);
  1849. D_INFO("RFKILL status: 0x%x\n", rfkill);
  1850. if (rfkill & 0x1) {
  1851. clear_bit(S_RFKILL, &il->status);
  1852. /* if RFKILL is not on, then wait for thermal
  1853. * sensor in adapter to kick in */
  1854. while (il3945_hw_get_temperature(il) == 0) {
  1855. thermal_spin++;
  1856. udelay(10);
  1857. }
  1858. if (thermal_spin)
  1859. D_INFO("Thermal calibration took %dus\n",
  1860. thermal_spin * 10);
  1861. } else
  1862. set_bit(S_RFKILL, &il->status);
  1863. /* After the ALIVE response, we can send commands to 3945 uCode */
  1864. set_bit(S_ALIVE, &il->status);
  1865. /* Enable watchdog to monitor the driver tx queues */
  1866. il_setup_watchdog(il);
  1867. if (il_is_rfkill(il))
  1868. return;
  1869. ieee80211_wake_queues(il->hw);
  1870. il->active_rate = RATES_MASK_3945;
  1871. il_power_update_mode(il, true);
  1872. if (il_is_associated(il)) {
  1873. struct il3945_rxon_cmd *active_rxon =
  1874. (struct il3945_rxon_cmd *)(&il->active);
  1875. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1876. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1877. } else {
  1878. /* Initialize our rx_config data */
  1879. il_connection_init_rx_config(il);
  1880. }
  1881. /* Configure Bluetooth device coexistence support */
  1882. il_send_bt_config(il);
  1883. set_bit(S_READY, &il->status);
  1884. /* Configure the adapter for unassociated operation */
  1885. il3945_commit_rxon(il);
  1886. il3945_reg_txpower_periodic(il);
  1887. D_INFO("ALIVE processing complete.\n");
  1888. wake_up(&il->wait_command_queue);
  1889. return;
  1890. restart:
  1891. queue_work(il->workqueue, &il->restart);
  1892. }
  1893. static void il3945_cancel_deferred_work(struct il_priv *il);
  1894. static void
  1895. __il3945_down(struct il_priv *il)
  1896. {
  1897. unsigned long flags;
  1898. int exit_pending;
  1899. D_INFO(DRV_NAME " is going down\n");
  1900. il_scan_cancel_timeout(il, 200);
  1901. exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
  1902. /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
  1903. * to prevent rearm timer */
  1904. del_timer_sync(&il->watchdog);
  1905. /* Station information will now be cleared in device */
  1906. il_clear_ucode_stations(il);
  1907. il_dealloc_bcast_stations(il);
  1908. il_clear_driver_stations(il);
  1909. /* Unblock any waiting calls */
  1910. wake_up_all(&il->wait_command_queue);
  1911. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1912. * exiting the module */
  1913. if (!exit_pending)
  1914. clear_bit(S_EXIT_PENDING, &il->status);
  1915. /* stop and reset the on-board processor */
  1916. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  1917. /* tell the device to stop sending interrupts */
  1918. spin_lock_irqsave(&il->lock, flags);
  1919. il_disable_interrupts(il);
  1920. spin_unlock_irqrestore(&il->lock, flags);
  1921. il3945_synchronize_irq(il);
  1922. if (il->mac80211_registered)
  1923. ieee80211_stop_queues(il->hw);
  1924. /* If we have not previously called il3945_init() then
  1925. * clear all bits but the RF Kill bits and return */
  1926. if (!il_is_init(il)) {
  1927. il->status =
  1928. test_bit(S_RFKILL, &il->status) << S_RFKILL |
  1929. test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
  1930. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1931. goto exit;
  1932. }
  1933. /* ...otherwise clear out all the status bits but the RF Kill
  1934. * bit and continue taking the NIC down. */
  1935. il->status &=
  1936. test_bit(S_RFKILL, &il->status) << S_RFKILL |
  1937. test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
  1938. test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
  1939. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1940. /*
  1941. * We disabled and synchronized interrupt, and priv->mutex is taken, so
  1942. * here is the only thread which will program device registers, but
  1943. * still have lockdep assertions, so we are taking reg_lock.
  1944. */
  1945. spin_lock_irq(&il->reg_lock);
  1946. /* FIXME: il_grab_nic_access if rfkill is off ? */
  1947. il3945_hw_txq_ctx_stop(il);
  1948. il3945_hw_rxq_stop(il);
  1949. /* Power-down device's busmaster DMA clocks */
  1950. _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  1951. udelay(5);
  1952. /* Stop the device, and put it in low power state */
  1953. _il_apm_stop(il);
  1954. spin_unlock_irq(&il->reg_lock);
  1955. il3945_hw_txq_ctx_free(il);
  1956. exit:
  1957. memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
  1958. if (il->beacon_skb)
  1959. dev_kfree_skb(il->beacon_skb);
  1960. il->beacon_skb = NULL;
  1961. /* clear out any free frames */
  1962. il3945_clear_free_frames(il);
  1963. }
  1964. static void
  1965. il3945_down(struct il_priv *il)
  1966. {
  1967. mutex_lock(&il->mutex);
  1968. __il3945_down(il);
  1969. mutex_unlock(&il->mutex);
  1970. il3945_cancel_deferred_work(il);
  1971. }
  1972. #define MAX_HW_RESTARTS 5
  1973. static int
  1974. il3945_alloc_bcast_station(struct il_priv *il)
  1975. {
  1976. unsigned long flags;
  1977. u8 sta_id;
  1978. spin_lock_irqsave(&il->sta_lock, flags);
  1979. sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
  1980. if (sta_id == IL_INVALID_STATION) {
  1981. IL_ERR("Unable to prepare broadcast station\n");
  1982. spin_unlock_irqrestore(&il->sta_lock, flags);
  1983. return -EINVAL;
  1984. }
  1985. il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
  1986. il->stations[sta_id].used |= IL_STA_BCAST;
  1987. spin_unlock_irqrestore(&il->sta_lock, flags);
  1988. return 0;
  1989. }
  1990. static int
  1991. __il3945_up(struct il_priv *il)
  1992. {
  1993. int rc, i;
  1994. rc = il3945_alloc_bcast_station(il);
  1995. if (rc)
  1996. return rc;
  1997. if (test_bit(S_EXIT_PENDING, &il->status)) {
  1998. IL_WARN("Exit pending; will not bring the NIC up\n");
  1999. return -EIO;
  2000. }
  2001. if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
  2002. IL_ERR("ucode not available for device bring up\n");
  2003. return -EIO;
  2004. }
  2005. /* If platform's RF_KILL switch is NOT set to KILL */
  2006. if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2007. clear_bit(S_RFKILL, &il->status);
  2008. else {
  2009. set_bit(S_RFKILL, &il->status);
  2010. return -ERFKILL;
  2011. }
  2012. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2013. rc = il3945_hw_nic_init(il);
  2014. if (rc) {
  2015. IL_ERR("Unable to int nic\n");
  2016. return rc;
  2017. }
  2018. /* make sure rfkill handshake bits are cleared */
  2019. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2020. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2021. /* clear (again), then enable host interrupts */
  2022. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2023. il_enable_interrupts(il);
  2024. /* really make sure rfkill handshake bits are cleared */
  2025. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2026. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2027. /* Copy original ucode data image from disk into backup cache.
  2028. * This will be used to initialize the on-board processor's
  2029. * data SRAM for a clean start when the runtime program first loads. */
  2030. memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
  2031. il->ucode_data.len);
  2032. /* We return success when we resume from suspend and rf_kill is on. */
  2033. if (test_bit(S_RFKILL, &il->status))
  2034. return 0;
  2035. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2036. /* load bootstrap state machine,
  2037. * load bootstrap program into processor's memory,
  2038. * prepare to load the "initialize" uCode */
  2039. rc = il->ops->load_ucode(il);
  2040. if (rc) {
  2041. IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
  2042. continue;
  2043. }
  2044. /* start card; "initialize" will load runtime ucode */
  2045. il3945_nic_start(il);
  2046. D_INFO(DRV_NAME " is coming up\n");
  2047. return 0;
  2048. }
  2049. set_bit(S_EXIT_PENDING, &il->status);
  2050. __il3945_down(il);
  2051. clear_bit(S_EXIT_PENDING, &il->status);
  2052. /* tried to restart and config the device for as long as our
  2053. * patience could withstand */
  2054. IL_ERR("Unable to initialize device after %d attempts.\n", i);
  2055. return -EIO;
  2056. }
  2057. /*****************************************************************************
  2058. *
  2059. * Workqueue callbacks
  2060. *
  2061. *****************************************************************************/
  2062. static void
  2063. il3945_bg_init_alive_start(struct work_struct *data)
  2064. {
  2065. struct il_priv *il =
  2066. container_of(data, struct il_priv, init_alive_start.work);
  2067. mutex_lock(&il->mutex);
  2068. if (test_bit(S_EXIT_PENDING, &il->status))
  2069. goto out;
  2070. il3945_init_alive_start(il);
  2071. out:
  2072. mutex_unlock(&il->mutex);
  2073. }
  2074. static void
  2075. il3945_bg_alive_start(struct work_struct *data)
  2076. {
  2077. struct il_priv *il =
  2078. container_of(data, struct il_priv, alive_start.work);
  2079. mutex_lock(&il->mutex);
  2080. if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL)
  2081. goto out;
  2082. il3945_alive_start(il);
  2083. out:
  2084. mutex_unlock(&il->mutex);
  2085. }
  2086. /*
  2087. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2088. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2089. * *is* readable even when device has been SW_RESET into low power mode
  2090. * (e.g. during RF KILL).
  2091. */
  2092. static void
  2093. il3945_rfkill_poll(struct work_struct *data)
  2094. {
  2095. struct il_priv *il =
  2096. container_of(data, struct il_priv, _3945.rfkill_poll.work);
  2097. bool old_rfkill = test_bit(S_RFKILL, &il->status);
  2098. bool new_rfkill =
  2099. !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2100. if (new_rfkill != old_rfkill) {
  2101. if (new_rfkill)
  2102. set_bit(S_RFKILL, &il->status);
  2103. else
  2104. clear_bit(S_RFKILL, &il->status);
  2105. wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
  2106. D_RF_KILL("RF_KILL bit toggled to %s.\n",
  2107. new_rfkill ? "disable radio" : "enable radio");
  2108. }
  2109. /* Keep this running, even if radio now enabled. This will be
  2110. * cancelled in mac_start() if system decides to start again */
  2111. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2112. round_jiffies_relative(2 * HZ));
  2113. }
  2114. int
  2115. il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
  2116. {
  2117. struct il_host_cmd cmd = {
  2118. .id = C_SCAN,
  2119. .len = sizeof(struct il3945_scan_cmd),
  2120. .flags = CMD_SIZE_HUGE,
  2121. };
  2122. struct il3945_scan_cmd *scan;
  2123. u8 n_probes = 0;
  2124. enum nl80211_band band;
  2125. bool is_active = false;
  2126. int ret;
  2127. u16 len;
  2128. lockdep_assert_held(&il->mutex);
  2129. if (!il->scan_cmd) {
  2130. il->scan_cmd =
  2131. kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
  2132. GFP_KERNEL);
  2133. if (!il->scan_cmd) {
  2134. D_SCAN("Fail to allocate scan memory\n");
  2135. return -ENOMEM;
  2136. }
  2137. }
  2138. scan = il->scan_cmd;
  2139. memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
  2140. scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
  2141. scan->quiet_time = IL_ACTIVE_QUIET_TIME;
  2142. if (il_is_associated(il)) {
  2143. u16 interval;
  2144. u32 extra;
  2145. u32 suspend_time = 100;
  2146. u32 scan_suspend_time = 100;
  2147. D_INFO("Scanning while associated...\n");
  2148. interval = vif->bss_conf.beacon_int;
  2149. scan->suspend_time = 0;
  2150. scan->max_out_time = cpu_to_le32(200 * 1024);
  2151. if (!interval)
  2152. interval = suspend_time;
  2153. /*
  2154. * suspend time format:
  2155. * 0-19: beacon interval in usec (time before exec.)
  2156. * 20-23: 0
  2157. * 24-31: number of beacons (suspend between channels)
  2158. */
  2159. extra = (suspend_time / interval) << 24;
  2160. scan_suspend_time =
  2161. 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
  2162. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2163. D_SCAN("suspend_time 0x%X beacon interval %d\n",
  2164. scan_suspend_time, interval);
  2165. }
  2166. if (il->scan_request->n_ssids) {
  2167. int i, p = 0;
  2168. D_SCAN("Kicking off active scan\n");
  2169. for (i = 0; i < il->scan_request->n_ssids; i++) {
  2170. /* always does wildcard anyway */
  2171. if (!il->scan_request->ssids[i].ssid_len)
  2172. continue;
  2173. scan->direct_scan[p].id = WLAN_EID_SSID;
  2174. scan->direct_scan[p].len =
  2175. il->scan_request->ssids[i].ssid_len;
  2176. memcpy(scan->direct_scan[p].ssid,
  2177. il->scan_request->ssids[i].ssid,
  2178. il->scan_request->ssids[i].ssid_len);
  2179. n_probes++;
  2180. p++;
  2181. }
  2182. is_active = true;
  2183. } else
  2184. D_SCAN("Kicking off passive scan.\n");
  2185. /* We don't build a direct scan probe request; the uCode will do
  2186. * that based on the direct_mask added to each channel entry */
  2187. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2188. scan->tx_cmd.sta_id = il->hw_params.bcast_id;
  2189. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2190. /* flags + rate selection */
  2191. switch (il->scan_band) {
  2192. case NL80211_BAND_2GHZ:
  2193. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2194. scan->tx_cmd.rate = RATE_1M_PLCP;
  2195. band = NL80211_BAND_2GHZ;
  2196. break;
  2197. case NL80211_BAND_5GHZ:
  2198. scan->tx_cmd.rate = RATE_6M_PLCP;
  2199. band = NL80211_BAND_5GHZ;
  2200. break;
  2201. default:
  2202. IL_WARN("Invalid scan band\n");
  2203. return -EIO;
  2204. }
  2205. /*
  2206. * If active scaning is requested but a certain channel is marked
  2207. * passive, we can do active scanning if we detect transmissions. For
  2208. * passive only scanning disable switching to active on any channel.
  2209. */
  2210. scan->good_CRC_th =
  2211. is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
  2212. len =
  2213. il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
  2214. vif->addr, il->scan_request->ie,
  2215. il->scan_request->ie_len,
  2216. IL_MAX_SCAN_SIZE - sizeof(*scan));
  2217. scan->tx_cmd.len = cpu_to_le16(len);
  2218. /* select Rx antennas */
  2219. scan->flags |= il3945_get_antenna_flags(il);
  2220. scan->channel_count =
  2221. il3945_get_channels_for_scan(il, band, is_active, n_probes,
  2222. (void *)&scan->data[len], vif);
  2223. if (scan->channel_count == 0) {
  2224. D_SCAN("channel count %d\n", scan->channel_count);
  2225. return -EIO;
  2226. }
  2227. cmd.len +=
  2228. le16_to_cpu(scan->tx_cmd.len) +
  2229. scan->channel_count * sizeof(struct il3945_scan_channel);
  2230. cmd.data = scan;
  2231. scan->len = cpu_to_le16(cmd.len);
  2232. set_bit(S_SCAN_HW, &il->status);
  2233. ret = il_send_cmd_sync(il, &cmd);
  2234. if (ret)
  2235. clear_bit(S_SCAN_HW, &il->status);
  2236. return ret;
  2237. }
  2238. void
  2239. il3945_post_scan(struct il_priv *il)
  2240. {
  2241. /*
  2242. * Since setting the RXON may have been deferred while
  2243. * performing the scan, fire one off if needed
  2244. */
  2245. if (memcmp(&il->staging, &il->active, sizeof(il->staging)))
  2246. il3945_commit_rxon(il);
  2247. }
  2248. static void
  2249. il3945_bg_restart(struct work_struct *data)
  2250. {
  2251. struct il_priv *il = container_of(data, struct il_priv, restart);
  2252. if (test_bit(S_EXIT_PENDING, &il->status))
  2253. return;
  2254. if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
  2255. mutex_lock(&il->mutex);
  2256. il->is_open = 0;
  2257. mutex_unlock(&il->mutex);
  2258. il3945_down(il);
  2259. ieee80211_restart_hw(il->hw);
  2260. } else {
  2261. il3945_down(il);
  2262. mutex_lock(&il->mutex);
  2263. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2264. mutex_unlock(&il->mutex);
  2265. return;
  2266. }
  2267. __il3945_up(il);
  2268. mutex_unlock(&il->mutex);
  2269. }
  2270. }
  2271. static void
  2272. il3945_bg_rx_replenish(struct work_struct *data)
  2273. {
  2274. struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
  2275. mutex_lock(&il->mutex);
  2276. if (test_bit(S_EXIT_PENDING, &il->status))
  2277. goto out;
  2278. il3945_rx_replenish(il);
  2279. out:
  2280. mutex_unlock(&il->mutex);
  2281. }
  2282. void
  2283. il3945_post_associate(struct il_priv *il)
  2284. {
  2285. int rc = 0;
  2286. if (!il->vif || !il->is_open)
  2287. return;
  2288. D_ASSOC("Associated as %d to: %pM\n", il->vif->bss_conf.aid,
  2289. il->active.bssid_addr);
  2290. if (test_bit(S_EXIT_PENDING, &il->status))
  2291. return;
  2292. il_scan_cancel_timeout(il, 200);
  2293. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2294. il3945_commit_rxon(il);
  2295. rc = il_send_rxon_timing(il);
  2296. if (rc)
  2297. IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
  2298. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2299. il->staging.assoc_id = cpu_to_le16(il->vif->bss_conf.aid);
  2300. D_ASSOC("assoc id %d beacon interval %d\n", il->vif->bss_conf.aid,
  2301. il->vif->bss_conf.beacon_int);
  2302. if (il->vif->bss_conf.use_short_preamble)
  2303. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2304. else
  2305. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2306. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2307. if (il->vif->bss_conf.use_short_slot)
  2308. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2309. else
  2310. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2311. }
  2312. il3945_commit_rxon(il);
  2313. switch (il->vif->type) {
  2314. case NL80211_IFTYPE_STATION:
  2315. il3945_rate_scale_init(il->hw, IL_AP_ID);
  2316. break;
  2317. case NL80211_IFTYPE_ADHOC:
  2318. il3945_send_beacon_cmd(il);
  2319. break;
  2320. default:
  2321. IL_ERR("%s Should not be called in %d mode\n", __func__,
  2322. il->vif->type);
  2323. break;
  2324. }
  2325. }
  2326. /*****************************************************************************
  2327. *
  2328. * mac80211 entry point functions
  2329. *
  2330. *****************************************************************************/
  2331. #define UCODE_READY_TIMEOUT (2 * HZ)
  2332. static int
  2333. il3945_mac_start(struct ieee80211_hw *hw)
  2334. {
  2335. struct il_priv *il = hw->priv;
  2336. int ret;
  2337. /* we should be verifying the device is ready to be opened */
  2338. mutex_lock(&il->mutex);
  2339. D_MAC80211("enter\n");
  2340. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2341. * ucode filename and max sizes are card-specific. */
  2342. if (!il->ucode_code.len) {
  2343. ret = il3945_read_ucode(il);
  2344. if (ret) {
  2345. IL_ERR("Could not read microcode: %d\n", ret);
  2346. mutex_unlock(&il->mutex);
  2347. goto out_release_irq;
  2348. }
  2349. }
  2350. ret = __il3945_up(il);
  2351. mutex_unlock(&il->mutex);
  2352. if (ret)
  2353. goto out_release_irq;
  2354. D_INFO("Start UP work.\n");
  2355. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2356. * mac80211 will not be run successfully. */
  2357. ret = wait_event_timeout(il->wait_command_queue,
  2358. test_bit(S_READY, &il->status),
  2359. UCODE_READY_TIMEOUT);
  2360. if (!ret) {
  2361. if (!test_bit(S_READY, &il->status)) {
  2362. IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
  2363. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2364. ret = -ETIMEDOUT;
  2365. goto out_release_irq;
  2366. }
  2367. }
  2368. /* ucode is running and will send rfkill notifications,
  2369. * no need to poll the killswitch state anymore */
  2370. cancel_delayed_work(&il->_3945.rfkill_poll);
  2371. il->is_open = 1;
  2372. D_MAC80211("leave\n");
  2373. return 0;
  2374. out_release_irq:
  2375. il->is_open = 0;
  2376. D_MAC80211("leave - failed\n");
  2377. return ret;
  2378. }
  2379. static void
  2380. il3945_mac_stop(struct ieee80211_hw *hw)
  2381. {
  2382. struct il_priv *il = hw->priv;
  2383. D_MAC80211("enter\n");
  2384. if (!il->is_open) {
  2385. D_MAC80211("leave - skip\n");
  2386. return;
  2387. }
  2388. il->is_open = 0;
  2389. il3945_down(il);
  2390. flush_workqueue(il->workqueue);
  2391. /* start polling the killswitch state again */
  2392. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2393. round_jiffies_relative(2 * HZ));
  2394. D_MAC80211("leave\n");
  2395. }
  2396. static void
  2397. il3945_mac_tx(struct ieee80211_hw *hw,
  2398. struct ieee80211_tx_control *control,
  2399. struct sk_buff *skb)
  2400. {
  2401. struct il_priv *il = hw->priv;
  2402. D_MAC80211("enter\n");
  2403. D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2404. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2405. if (il3945_tx_skb(il, control->sta, skb))
  2406. dev_kfree_skb_any(skb);
  2407. D_MAC80211("leave\n");
  2408. }
  2409. void
  2410. il3945_config_ap(struct il_priv *il)
  2411. {
  2412. struct ieee80211_vif *vif = il->vif;
  2413. int rc = 0;
  2414. if (test_bit(S_EXIT_PENDING, &il->status))
  2415. return;
  2416. /* The following should be done only at AP bring up */
  2417. if (!(il_is_associated(il))) {
  2418. /* RXON - unassoc (to set timing command) */
  2419. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2420. il3945_commit_rxon(il);
  2421. /* RXON Timing */
  2422. rc = il_send_rxon_timing(il);
  2423. if (rc)
  2424. IL_WARN("C_RXON_TIMING failed - "
  2425. "Attempting to continue.\n");
  2426. il->staging.assoc_id = 0;
  2427. if (vif->bss_conf.use_short_preamble)
  2428. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2429. else
  2430. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2431. if (il->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2432. if (vif->bss_conf.use_short_slot)
  2433. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2434. else
  2435. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2436. }
  2437. /* restore RXON assoc */
  2438. il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2439. il3945_commit_rxon(il);
  2440. }
  2441. il3945_send_beacon_cmd(il);
  2442. }
  2443. static int
  2444. il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2445. struct ieee80211_vif *vif, struct ieee80211_sta *sta,
  2446. struct ieee80211_key_conf *key)
  2447. {
  2448. struct il_priv *il = hw->priv;
  2449. int ret = 0;
  2450. u8 sta_id = IL_INVALID_STATION;
  2451. u8 static_key;
  2452. D_MAC80211("enter\n");
  2453. if (il3945_mod_params.sw_crypto) {
  2454. D_MAC80211("leave - hwcrypto disabled\n");
  2455. return -EOPNOTSUPP;
  2456. }
  2457. /*
  2458. * To support IBSS RSN, don't program group keys in IBSS, the
  2459. * hardware will then not attempt to decrypt the frames.
  2460. */
  2461. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2462. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  2463. D_MAC80211("leave - IBSS RSN\n");
  2464. return -EOPNOTSUPP;
  2465. }
  2466. static_key = !il_is_associated(il);
  2467. if (!static_key) {
  2468. sta_id = il_sta_id_or_broadcast(il, sta);
  2469. if (sta_id == IL_INVALID_STATION) {
  2470. D_MAC80211("leave - station not found\n");
  2471. return -EINVAL;
  2472. }
  2473. }
  2474. mutex_lock(&il->mutex);
  2475. il_scan_cancel_timeout(il, 100);
  2476. switch (cmd) {
  2477. case SET_KEY:
  2478. if (static_key)
  2479. ret = il3945_set_static_key(il, key);
  2480. else
  2481. ret = il3945_set_dynamic_key(il, key, sta_id);
  2482. D_MAC80211("enable hwcrypto key\n");
  2483. break;
  2484. case DISABLE_KEY:
  2485. if (static_key)
  2486. ret = il3945_remove_static_key(il);
  2487. else
  2488. ret = il3945_clear_sta_key_info(il, sta_id);
  2489. D_MAC80211("disable hwcrypto key\n");
  2490. break;
  2491. default:
  2492. ret = -EINVAL;
  2493. }
  2494. D_MAC80211("leave ret %d\n", ret);
  2495. mutex_unlock(&il->mutex);
  2496. return ret;
  2497. }
  2498. static int
  2499. il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2500. struct ieee80211_sta *sta)
  2501. {
  2502. struct il_priv *il = hw->priv;
  2503. struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2504. int ret;
  2505. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2506. u8 sta_id;
  2507. mutex_lock(&il->mutex);
  2508. D_INFO("station %pM\n", sta->addr);
  2509. sta_priv->common.sta_id = IL_INVALID_STATION;
  2510. ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
  2511. if (ret) {
  2512. IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
  2513. /* Should we return success if return code is EEXIST ? */
  2514. mutex_unlock(&il->mutex);
  2515. return ret;
  2516. }
  2517. sta_priv->common.sta_id = sta_id;
  2518. /* Initialize rate scaling */
  2519. D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
  2520. il3945_rs_rate_init(il, sta, sta_id);
  2521. mutex_unlock(&il->mutex);
  2522. return 0;
  2523. }
  2524. static void
  2525. il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
  2526. unsigned int *total_flags, u64 multicast)
  2527. {
  2528. struct il_priv *il = hw->priv;
  2529. __le32 filter_or = 0, filter_nand = 0;
  2530. #define CHK(test, flag) do { \
  2531. if (*total_flags & (test)) \
  2532. filter_or |= (flag); \
  2533. else \
  2534. filter_nand |= (flag); \
  2535. } while (0)
  2536. D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
  2537. *total_flags);
  2538. CHK(FIF_OTHER_BSS, RXON_FILTER_PROMISC_MSK);
  2539. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
  2540. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2541. #undef CHK
  2542. mutex_lock(&il->mutex);
  2543. il->staging.filter_flags &= ~filter_nand;
  2544. il->staging.filter_flags |= filter_or;
  2545. /*
  2546. * Not committing directly because hardware can perform a scan,
  2547. * but even if hw is ready, committing here breaks for some reason,
  2548. * we'll eventually commit the filter flags change anyway.
  2549. */
  2550. mutex_unlock(&il->mutex);
  2551. /*
  2552. * Receiving all multicast frames is always enabled by the
  2553. * default flags setup in il_connection_init_rx_config()
  2554. * since we currently do not support programming multicast
  2555. * filters into the device.
  2556. */
  2557. *total_flags &=
  2558. FIF_OTHER_BSS | FIF_ALLMULTI |
  2559. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2560. }
  2561. /*****************************************************************************
  2562. *
  2563. * sysfs attributes
  2564. *
  2565. *****************************************************************************/
  2566. #ifdef CONFIG_IWLEGACY_DEBUG
  2567. /*
  2568. * The following adds a new attribute to the sysfs representation
  2569. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2570. * used for controlling the debug level.
  2571. *
  2572. * See the level definitions in iwl for details.
  2573. *
  2574. * The debug_level being managed using sysfs below is a per device debug
  2575. * level that is used instead of the global debug level if it (the per
  2576. * device debug level) is set.
  2577. */
  2578. static ssize_t
  2579. il3945_show_debug_level(struct device *d, struct device_attribute *attr,
  2580. char *buf)
  2581. {
  2582. struct il_priv *il = dev_get_drvdata(d);
  2583. return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
  2584. }
  2585. static ssize_t
  2586. il3945_store_debug_level(struct device *d, struct device_attribute *attr,
  2587. const char *buf, size_t count)
  2588. {
  2589. struct il_priv *il = dev_get_drvdata(d);
  2590. unsigned long val;
  2591. int ret;
  2592. ret = kstrtoul(buf, 0, &val);
  2593. if (ret)
  2594. IL_INFO("%s is not in hex or decimal form.\n", buf);
  2595. else
  2596. il->debug_level = val;
  2597. return strnlen(buf, count);
  2598. }
  2599. static DEVICE_ATTR(debug_level, 0644, il3945_show_debug_level,
  2600. il3945_store_debug_level);
  2601. #endif /* CONFIG_IWLEGACY_DEBUG */
  2602. static ssize_t
  2603. il3945_show_temperature(struct device *d, struct device_attribute *attr,
  2604. char *buf)
  2605. {
  2606. struct il_priv *il = dev_get_drvdata(d);
  2607. if (!il_is_alive(il))
  2608. return -EAGAIN;
  2609. return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
  2610. }
  2611. static DEVICE_ATTR(temperature, 0444, il3945_show_temperature, NULL);
  2612. static ssize_t
  2613. il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
  2614. {
  2615. struct il_priv *il = dev_get_drvdata(d);
  2616. return sprintf(buf, "%d\n", il->tx_power_user_lmt);
  2617. }
  2618. static ssize_t
  2619. il3945_store_tx_power(struct device *d, struct device_attribute *attr,
  2620. const char *buf, size_t count)
  2621. {
  2622. struct il_priv *il = dev_get_drvdata(d);
  2623. char *p = (char *)buf;
  2624. u32 val;
  2625. val = simple_strtoul(p, &p, 10);
  2626. if (p == buf)
  2627. IL_INFO(": %s is not in decimal form.\n", buf);
  2628. else
  2629. il3945_hw_reg_set_txpower(il, val);
  2630. return count;
  2631. }
  2632. static DEVICE_ATTR(tx_power, 0644, il3945_show_tx_power, il3945_store_tx_power);
  2633. static ssize_t
  2634. il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
  2635. {
  2636. struct il_priv *il = dev_get_drvdata(d);
  2637. return sprintf(buf, "0x%04X\n", il->active.flags);
  2638. }
  2639. static ssize_t
  2640. il3945_store_flags(struct device *d, struct device_attribute *attr,
  2641. const char *buf, size_t count)
  2642. {
  2643. struct il_priv *il = dev_get_drvdata(d);
  2644. u32 flags = simple_strtoul(buf, NULL, 0);
  2645. mutex_lock(&il->mutex);
  2646. if (le32_to_cpu(il->staging.flags) != flags) {
  2647. /* Cancel any currently running scans... */
  2648. if (il_scan_cancel_timeout(il, 100))
  2649. IL_WARN("Could not cancel scan.\n");
  2650. else {
  2651. D_INFO("Committing rxon.flags = 0x%04X\n", flags);
  2652. il->staging.flags = cpu_to_le32(flags);
  2653. il3945_commit_rxon(il);
  2654. }
  2655. }
  2656. mutex_unlock(&il->mutex);
  2657. return count;
  2658. }
  2659. static DEVICE_ATTR(flags, 0644, il3945_show_flags, il3945_store_flags);
  2660. static ssize_t
  2661. il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
  2662. char *buf)
  2663. {
  2664. struct il_priv *il = dev_get_drvdata(d);
  2665. return sprintf(buf, "0x%04X\n", le32_to_cpu(il->active.filter_flags));
  2666. }
  2667. static ssize_t
  2668. il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
  2669. const char *buf, size_t count)
  2670. {
  2671. struct il_priv *il = dev_get_drvdata(d);
  2672. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2673. mutex_lock(&il->mutex);
  2674. if (le32_to_cpu(il->staging.filter_flags) != filter_flags) {
  2675. /* Cancel any currently running scans... */
  2676. if (il_scan_cancel_timeout(il, 100))
  2677. IL_WARN("Could not cancel scan.\n");
  2678. else {
  2679. D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
  2680. filter_flags);
  2681. il->staging.filter_flags = cpu_to_le32(filter_flags);
  2682. il3945_commit_rxon(il);
  2683. }
  2684. }
  2685. mutex_unlock(&il->mutex);
  2686. return count;
  2687. }
  2688. static DEVICE_ATTR(filter_flags, 0644, il3945_show_filter_flags,
  2689. il3945_store_filter_flags);
  2690. static ssize_t
  2691. il3945_show_measurement(struct device *d, struct device_attribute *attr,
  2692. char *buf)
  2693. {
  2694. struct il_priv *il = dev_get_drvdata(d);
  2695. struct il_spectrum_notification measure_report;
  2696. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2697. u8 *data = (u8 *) &measure_report;
  2698. unsigned long flags;
  2699. spin_lock_irqsave(&il->lock, flags);
  2700. if (!(il->measurement_status & MEASUREMENT_READY)) {
  2701. spin_unlock_irqrestore(&il->lock, flags);
  2702. return 0;
  2703. }
  2704. memcpy(&measure_report, &il->measure_report, size);
  2705. il->measurement_status = 0;
  2706. spin_unlock_irqrestore(&il->lock, flags);
  2707. while (size && PAGE_SIZE - len) {
  2708. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2709. PAGE_SIZE - len, true);
  2710. len = strlen(buf);
  2711. if (PAGE_SIZE - len)
  2712. buf[len++] = '\n';
  2713. ofs += 16;
  2714. size -= min(size, 16U);
  2715. }
  2716. return len;
  2717. }
  2718. static ssize_t
  2719. il3945_store_measurement(struct device *d, struct device_attribute *attr,
  2720. const char *buf, size_t count)
  2721. {
  2722. struct il_priv *il = dev_get_drvdata(d);
  2723. struct ieee80211_measurement_params params = {
  2724. .channel = le16_to_cpu(il->active.channel),
  2725. .start_time = cpu_to_le64(il->_3945.last_tsf),
  2726. .duration = cpu_to_le16(1),
  2727. };
  2728. u8 type = IL_MEASURE_BASIC;
  2729. u8 buffer[32];
  2730. u8 channel;
  2731. if (count) {
  2732. char *p = buffer;
  2733. strlcpy(buffer, buf, sizeof(buffer));
  2734. channel = simple_strtoul(p, NULL, 0);
  2735. if (channel)
  2736. params.channel = channel;
  2737. p = buffer;
  2738. while (*p && *p != ' ')
  2739. p++;
  2740. if (*p)
  2741. type = simple_strtoul(p + 1, NULL, 0);
  2742. }
  2743. D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
  2744. type, params.channel, buf);
  2745. il3945_get_measurement(il, &params, type);
  2746. return count;
  2747. }
  2748. static DEVICE_ATTR(measurement, 0600, il3945_show_measurement,
  2749. il3945_store_measurement);
  2750. static ssize_t
  2751. il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
  2752. const char *buf, size_t count)
  2753. {
  2754. struct il_priv *il = dev_get_drvdata(d);
  2755. il->retry_rate = simple_strtoul(buf, NULL, 0);
  2756. if (il->retry_rate <= 0)
  2757. il->retry_rate = 1;
  2758. return count;
  2759. }
  2760. static ssize_t
  2761. il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
  2762. char *buf)
  2763. {
  2764. struct il_priv *il = dev_get_drvdata(d);
  2765. return sprintf(buf, "%d", il->retry_rate);
  2766. }
  2767. static DEVICE_ATTR(retry_rate, 0600, il3945_show_retry_rate,
  2768. il3945_store_retry_rate);
  2769. static ssize_t
  2770. il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
  2771. {
  2772. /* all this shit doesn't belong into sysfs anyway */
  2773. return 0;
  2774. }
  2775. static DEVICE_ATTR(channels, 0400, il3945_show_channels, NULL);
  2776. static ssize_t
  2777. il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
  2778. {
  2779. struct il_priv *il = dev_get_drvdata(d);
  2780. if (!il_is_alive(il))
  2781. return -EAGAIN;
  2782. return sprintf(buf, "%d\n", il3945_mod_params.antenna);
  2783. }
  2784. static ssize_t
  2785. il3945_store_antenna(struct device *d, struct device_attribute *attr,
  2786. const char *buf, size_t count)
  2787. {
  2788. struct il_priv *il __maybe_unused = dev_get_drvdata(d);
  2789. int ant;
  2790. if (count == 0)
  2791. return 0;
  2792. if (sscanf(buf, "%1i", &ant) != 1) {
  2793. D_INFO("not in hex or decimal form.\n");
  2794. return count;
  2795. }
  2796. if (ant >= 0 && ant <= 2) {
  2797. D_INFO("Setting antenna select to %d.\n", ant);
  2798. il3945_mod_params.antenna = (enum il3945_antenna)ant;
  2799. } else
  2800. D_INFO("Bad antenna select value %d.\n", ant);
  2801. return count;
  2802. }
  2803. static DEVICE_ATTR(antenna, 0644, il3945_show_antenna, il3945_store_antenna);
  2804. static ssize_t
  2805. il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
  2806. {
  2807. struct il_priv *il = dev_get_drvdata(d);
  2808. if (!il_is_alive(il))
  2809. return -EAGAIN;
  2810. return sprintf(buf, "0x%08x\n", (int)il->status);
  2811. }
  2812. static DEVICE_ATTR(status, 0444, il3945_show_status, NULL);
  2813. static ssize_t
  2814. il3945_dump_error_log(struct device *d, struct device_attribute *attr,
  2815. const char *buf, size_t count)
  2816. {
  2817. struct il_priv *il = dev_get_drvdata(d);
  2818. char *p = (char *)buf;
  2819. if (p[0] == '1')
  2820. il3945_dump_nic_error_log(il);
  2821. return strnlen(buf, count);
  2822. }
  2823. static DEVICE_ATTR(dump_errors, 0200, NULL, il3945_dump_error_log);
  2824. /*****************************************************************************
  2825. *
  2826. * driver setup and tear down
  2827. *
  2828. *****************************************************************************/
  2829. static void
  2830. il3945_setup_deferred_work(struct il_priv *il)
  2831. {
  2832. il->workqueue = create_singlethread_workqueue(DRV_NAME);
  2833. init_waitqueue_head(&il->wait_command_queue);
  2834. INIT_WORK(&il->restart, il3945_bg_restart);
  2835. INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
  2836. INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
  2837. INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
  2838. INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
  2839. il_setup_scan_deferred_work(il);
  2840. il3945_hw_setup_deferred_work(il);
  2841. timer_setup(&il->watchdog, il_bg_watchdog, 0);
  2842. tasklet_init(&il->irq_tasklet,
  2843. (void (*)(unsigned long))il3945_irq_tasklet,
  2844. (unsigned long)il);
  2845. }
  2846. static void
  2847. il3945_cancel_deferred_work(struct il_priv *il)
  2848. {
  2849. il3945_hw_cancel_deferred_work(il);
  2850. cancel_delayed_work_sync(&il->init_alive_start);
  2851. cancel_delayed_work(&il->alive_start);
  2852. il_cancel_scan_deferred_work(il);
  2853. }
  2854. static struct attribute *il3945_sysfs_entries[] = {
  2855. &dev_attr_antenna.attr,
  2856. &dev_attr_channels.attr,
  2857. &dev_attr_dump_errors.attr,
  2858. &dev_attr_flags.attr,
  2859. &dev_attr_filter_flags.attr,
  2860. &dev_attr_measurement.attr,
  2861. &dev_attr_retry_rate.attr,
  2862. &dev_attr_status.attr,
  2863. &dev_attr_temperature.attr,
  2864. &dev_attr_tx_power.attr,
  2865. #ifdef CONFIG_IWLEGACY_DEBUG
  2866. &dev_attr_debug_level.attr,
  2867. #endif
  2868. NULL
  2869. };
  2870. static const struct attribute_group il3945_attribute_group = {
  2871. .name = NULL, /* put in device directory */
  2872. .attrs = il3945_sysfs_entries,
  2873. };
  2874. static struct ieee80211_ops il3945_mac_ops __ro_after_init = {
  2875. .tx = il3945_mac_tx,
  2876. .start = il3945_mac_start,
  2877. .stop = il3945_mac_stop,
  2878. .add_interface = il_mac_add_interface,
  2879. .remove_interface = il_mac_remove_interface,
  2880. .change_interface = il_mac_change_interface,
  2881. .config = il_mac_config,
  2882. .configure_filter = il3945_configure_filter,
  2883. .set_key = il3945_mac_set_key,
  2884. .conf_tx = il_mac_conf_tx,
  2885. .reset_tsf = il_mac_reset_tsf,
  2886. .bss_info_changed = il_mac_bss_info_changed,
  2887. .hw_scan = il_mac_hw_scan,
  2888. .sta_add = il3945_mac_sta_add,
  2889. .sta_remove = il_mac_sta_remove,
  2890. .tx_last_beacon = il_mac_tx_last_beacon,
  2891. .flush = il_mac_flush,
  2892. };
  2893. static int
  2894. il3945_init_drv(struct il_priv *il)
  2895. {
  2896. int ret;
  2897. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  2898. il->retry_rate = 1;
  2899. il->beacon_skb = NULL;
  2900. spin_lock_init(&il->sta_lock);
  2901. spin_lock_init(&il->hcmd_lock);
  2902. INIT_LIST_HEAD(&il->free_frames);
  2903. mutex_init(&il->mutex);
  2904. il->ieee_channels = NULL;
  2905. il->ieee_rates = NULL;
  2906. il->band = NL80211_BAND_2GHZ;
  2907. il->iw_mode = NL80211_IFTYPE_STATION;
  2908. il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
  2909. /* initialize force reset */
  2910. il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
  2911. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  2912. IL_WARN("Unsupported EEPROM version: 0x%04X\n",
  2913. eeprom->version);
  2914. ret = -EINVAL;
  2915. goto err;
  2916. }
  2917. ret = il_init_channel_map(il);
  2918. if (ret) {
  2919. IL_ERR("initializing regulatory failed: %d\n", ret);
  2920. goto err;
  2921. }
  2922. /* Set up txpower settings in driver for all channels */
  2923. if (il3945_txpower_set_from_eeprom(il)) {
  2924. ret = -EIO;
  2925. goto err_free_channel_map;
  2926. }
  2927. ret = il_init_geos(il);
  2928. if (ret) {
  2929. IL_ERR("initializing geos failed: %d\n", ret);
  2930. goto err_free_channel_map;
  2931. }
  2932. il3945_init_hw_rates(il, il->ieee_rates);
  2933. return 0;
  2934. err_free_channel_map:
  2935. il_free_channel_map(il);
  2936. err:
  2937. return ret;
  2938. }
  2939. #define IL3945_MAX_PROBE_REQUEST 200
  2940. static int
  2941. il3945_setup_mac(struct il_priv *il)
  2942. {
  2943. int ret;
  2944. struct ieee80211_hw *hw = il->hw;
  2945. hw->rate_control_algorithm = "iwl-3945-rs";
  2946. hw->sta_data_size = sizeof(struct il3945_sta_priv);
  2947. hw->vif_data_size = sizeof(struct il_vif_priv);
  2948. /* Tell mac80211 our characteristics */
  2949. ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
  2950. ieee80211_hw_set(hw, SUPPORTS_PS);
  2951. ieee80211_hw_set(hw, SIGNAL_DBM);
  2952. ieee80211_hw_set(hw, SPECTRUM_MGMT);
  2953. hw->wiphy->interface_modes =
  2954. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
  2955. hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN;
  2956. hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG |
  2957. REGULATORY_DISABLE_BEACON_HINTS;
  2958. hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
  2959. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  2960. /* we create the 802.11 header and a zero-length SSID element */
  2961. hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
  2962. /* Default value; 4 EDCA QOS priorities */
  2963. hw->queues = 4;
  2964. if (il->bands[NL80211_BAND_2GHZ].n_channels)
  2965. il->hw->wiphy->bands[NL80211_BAND_2GHZ] =
  2966. &il->bands[NL80211_BAND_2GHZ];
  2967. if (il->bands[NL80211_BAND_5GHZ].n_channels)
  2968. il->hw->wiphy->bands[NL80211_BAND_5GHZ] =
  2969. &il->bands[NL80211_BAND_5GHZ];
  2970. il_leds_init(il);
  2971. wiphy_ext_feature_set(il->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
  2972. ret = ieee80211_register_hw(il->hw);
  2973. if (ret) {
  2974. IL_ERR("Failed to register hw (error %d)\n", ret);
  2975. return ret;
  2976. }
  2977. il->mac80211_registered = 1;
  2978. return 0;
  2979. }
  2980. static int
  2981. il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  2982. {
  2983. int err = 0;
  2984. struct il_priv *il;
  2985. struct ieee80211_hw *hw;
  2986. struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
  2987. struct il3945_eeprom *eeprom;
  2988. unsigned long flags;
  2989. /***********************
  2990. * 1. Allocating HW data
  2991. * ********************/
  2992. hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops);
  2993. if (!hw) {
  2994. err = -ENOMEM;
  2995. goto out;
  2996. }
  2997. il = hw->priv;
  2998. il->hw = hw;
  2999. SET_IEEE80211_DEV(hw, &pdev->dev);
  3000. il->cmd_queue = IL39_CMD_QUEUE_NUM;
  3001. D_INFO("*** LOAD DRIVER ***\n");
  3002. il->cfg = cfg;
  3003. il->ops = &il3945_ops;
  3004. #ifdef CONFIG_IWLEGACY_DEBUGFS
  3005. il->debugfs_ops = &il3945_debugfs_ops;
  3006. #endif
  3007. il->pci_dev = pdev;
  3008. il->inta_mask = CSR_INI_SET_MASK;
  3009. /***************************
  3010. * 2. Initializing PCI bus
  3011. * *************************/
  3012. pci_disable_link_state(pdev,
  3013. PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  3014. PCIE_LINK_STATE_CLKPM);
  3015. if (pci_enable_device(pdev)) {
  3016. err = -ENODEV;
  3017. goto out_ieee80211_free_hw;
  3018. }
  3019. pci_set_master(pdev);
  3020. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3021. if (!err)
  3022. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3023. if (err) {
  3024. IL_WARN("No suitable DMA available.\n");
  3025. goto out_pci_disable_device;
  3026. }
  3027. pci_set_drvdata(pdev, il);
  3028. err = pci_request_regions(pdev, DRV_NAME);
  3029. if (err)
  3030. goto out_pci_disable_device;
  3031. /***********************
  3032. * 3. Read REV Register
  3033. * ********************/
  3034. il->hw_base = pci_ioremap_bar(pdev, 0);
  3035. if (!il->hw_base) {
  3036. err = -ENODEV;
  3037. goto out_pci_release_regions;
  3038. }
  3039. D_INFO("pci_resource_len = 0x%08llx\n",
  3040. (unsigned long long)pci_resource_len(pdev, 0));
  3041. D_INFO("pci_resource_base = %p\n", il->hw_base);
  3042. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3043. * PCI Tx retries from interfering with C3 CPU state */
  3044. pci_write_config_byte(pdev, 0x41, 0x00);
  3045. /* these spin locks will be used in apm_init and EEPROM access
  3046. * we should init now
  3047. */
  3048. spin_lock_init(&il->reg_lock);
  3049. spin_lock_init(&il->lock);
  3050. /*
  3051. * stop and reset the on-board processor just in case it is in a
  3052. * strange state ... like being left stranded by a primary kernel
  3053. * and this is now the kdump kernel trying to start up
  3054. */
  3055. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3056. /***********************
  3057. * 4. Read EEPROM
  3058. * ********************/
  3059. /* Read the EEPROM */
  3060. err = il_eeprom_init(il);
  3061. if (err) {
  3062. IL_ERR("Unable to init EEPROM\n");
  3063. goto out_iounmap;
  3064. }
  3065. /* MAC Address location in EEPROM same for 3945/4965 */
  3066. eeprom = (struct il3945_eeprom *)il->eeprom;
  3067. D_INFO("MAC address: %pM\n", eeprom->mac_address);
  3068. SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
  3069. /***********************
  3070. * 5. Setup HW Constants
  3071. * ********************/
  3072. /* Device-specific setup */
  3073. err = il3945_hw_set_hw_params(il);
  3074. if (err) {
  3075. IL_ERR("failed to set hw settings\n");
  3076. goto out_eeprom_free;
  3077. }
  3078. /***********************
  3079. * 6. Setup il
  3080. * ********************/
  3081. err = il3945_init_drv(il);
  3082. if (err) {
  3083. IL_ERR("initializing driver failed\n");
  3084. goto out_unset_hw_params;
  3085. }
  3086. IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
  3087. /***********************
  3088. * 7. Setup Services
  3089. * ********************/
  3090. spin_lock_irqsave(&il->lock, flags);
  3091. il_disable_interrupts(il);
  3092. spin_unlock_irqrestore(&il->lock, flags);
  3093. pci_enable_msi(il->pci_dev);
  3094. err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
  3095. if (err) {
  3096. IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
  3097. goto out_disable_msi;
  3098. }
  3099. err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
  3100. if (err) {
  3101. IL_ERR("failed to create sysfs device attributes\n");
  3102. goto out_release_irq;
  3103. }
  3104. il_set_rxon_channel(il, &il->bands[NL80211_BAND_2GHZ].channels[5]);
  3105. il3945_setup_deferred_work(il);
  3106. il3945_setup_handlers(il);
  3107. il_power_initialize(il);
  3108. /*********************************
  3109. * 8. Setup and Register mac80211
  3110. * *******************************/
  3111. il_enable_interrupts(il);
  3112. err = il3945_setup_mac(il);
  3113. if (err)
  3114. goto out_remove_sysfs;
  3115. err = il_dbgfs_register(il, DRV_NAME);
  3116. if (err)
  3117. IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
  3118. err);
  3119. /* Start monitoring the killswitch */
  3120. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
  3121. return 0;
  3122. out_remove_sysfs:
  3123. destroy_workqueue(il->workqueue);
  3124. il->workqueue = NULL;
  3125. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3126. out_release_irq:
  3127. free_irq(il->pci_dev->irq, il);
  3128. out_disable_msi:
  3129. pci_disable_msi(il->pci_dev);
  3130. il_free_geos(il);
  3131. il_free_channel_map(il);
  3132. out_unset_hw_params:
  3133. il3945_unset_hw_params(il);
  3134. out_eeprom_free:
  3135. il_eeprom_free(il);
  3136. out_iounmap:
  3137. iounmap(il->hw_base);
  3138. out_pci_release_regions:
  3139. pci_release_regions(pdev);
  3140. out_pci_disable_device:
  3141. pci_disable_device(pdev);
  3142. out_ieee80211_free_hw:
  3143. ieee80211_free_hw(il->hw);
  3144. out:
  3145. return err;
  3146. }
  3147. static void
  3148. il3945_pci_remove(struct pci_dev *pdev)
  3149. {
  3150. struct il_priv *il = pci_get_drvdata(pdev);
  3151. unsigned long flags;
  3152. if (!il)
  3153. return;
  3154. D_INFO("*** UNLOAD DRIVER ***\n");
  3155. il_dbgfs_unregister(il);
  3156. set_bit(S_EXIT_PENDING, &il->status);
  3157. il_leds_exit(il);
  3158. if (il->mac80211_registered) {
  3159. ieee80211_unregister_hw(il->hw);
  3160. il->mac80211_registered = 0;
  3161. } else {
  3162. il3945_down(il);
  3163. }
  3164. /*
  3165. * Make sure device is reset to low power before unloading driver.
  3166. * This may be redundant with il_down(), but there are paths to
  3167. * run il_down() without calling apm_ops.stop(), and there are
  3168. * paths to avoid running il_down() at all before leaving driver.
  3169. * This (inexpensive) call *makes sure* device is reset.
  3170. */
  3171. il_apm_stop(il);
  3172. /* make sure we flush any pending irq or
  3173. * tasklet for the driver
  3174. */
  3175. spin_lock_irqsave(&il->lock, flags);
  3176. il_disable_interrupts(il);
  3177. spin_unlock_irqrestore(&il->lock, flags);
  3178. il3945_synchronize_irq(il);
  3179. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3180. cancel_delayed_work_sync(&il->_3945.rfkill_poll);
  3181. il3945_dealloc_ucode_pci(il);
  3182. if (il->rxq.bd)
  3183. il3945_rx_queue_free(il, &il->rxq);
  3184. il3945_hw_txq_ctx_free(il);
  3185. il3945_unset_hw_params(il);
  3186. /*netif_stop_queue(dev); */
  3187. flush_workqueue(il->workqueue);
  3188. /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
  3189. * il->workqueue... so we can't take down the workqueue
  3190. * until now... */
  3191. destroy_workqueue(il->workqueue);
  3192. il->workqueue = NULL;
  3193. free_irq(pdev->irq, il);
  3194. pci_disable_msi(pdev);
  3195. iounmap(il->hw_base);
  3196. pci_release_regions(pdev);
  3197. pci_disable_device(pdev);
  3198. il_free_channel_map(il);
  3199. il_free_geos(il);
  3200. kfree(il->scan_cmd);
  3201. if (il->beacon_skb)
  3202. dev_kfree_skb(il->beacon_skb);
  3203. ieee80211_free_hw(il->hw);
  3204. }
  3205. /*****************************************************************************
  3206. *
  3207. * driver and module entry point
  3208. *
  3209. *****************************************************************************/
  3210. static struct pci_driver il3945_driver = {
  3211. .name = DRV_NAME,
  3212. .id_table = il3945_hw_card_ids,
  3213. .probe = il3945_pci_probe,
  3214. .remove = il3945_pci_remove,
  3215. .driver.pm = IL_LEGACY_PM_OPS,
  3216. };
  3217. static int __init
  3218. il3945_init(void)
  3219. {
  3220. int ret;
  3221. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3222. pr_info(DRV_COPYRIGHT "\n");
  3223. /*
  3224. * Disabling hardware scan means that mac80211 will perform scans
  3225. * "the hard way", rather than using device's scan.
  3226. */
  3227. if (il3945_mod_params.disable_hw_scan) {
  3228. pr_info("hw_scan is disabled\n");
  3229. il3945_mac_ops.hw_scan = NULL;
  3230. }
  3231. ret = il3945_rate_control_register();
  3232. if (ret) {
  3233. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3234. return ret;
  3235. }
  3236. ret = pci_register_driver(&il3945_driver);
  3237. if (ret) {
  3238. pr_err("Unable to initialize PCI module\n");
  3239. goto error_register;
  3240. }
  3241. return ret;
  3242. error_register:
  3243. il3945_rate_control_unregister();
  3244. return ret;
  3245. }
  3246. static void __exit
  3247. il3945_exit(void)
  3248. {
  3249. pci_unregister_driver(&il3945_driver);
  3250. il3945_rate_control_unregister();
  3251. }
  3252. MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
  3253. module_param_named(antenna, il3945_mod_params.antenna, int, 0444);
  3254. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3255. module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, 0444);
  3256. MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
  3257. module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
  3258. 0444);
  3259. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
  3260. #ifdef CONFIG_IWLEGACY_DEBUG
  3261. module_param_named(debug, il_debug_level, uint, 0644);
  3262. MODULE_PARM_DESC(debug, "debug output mask");
  3263. #endif
  3264. module_param_named(fw_restart, il3945_mod_params.restart_fw, int, 0444);
  3265. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3266. module_exit(il3945_exit);
  3267. module_init(il3945_init);