main.c 48 KB

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  1. /*
  2. * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
  3. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/moduleparam.h>
  18. #include <linux/if_arp.h>
  19. #include <linux/etherdevice.h>
  20. #include "wil6210.h"
  21. #include "txrx.h"
  22. #include "txrx_edma.h"
  23. #include "wmi.h"
  24. #include "boot_loader.h"
  25. #define WAIT_FOR_HALP_VOTE_MS 100
  26. #define WAIT_FOR_SCAN_ABORT_MS 1000
  27. #define WIL_DEFAULT_NUM_RX_STATUS_RINGS 1
  28. #define WIL_BOARD_FILE_MAX_NAMELEN 128
  29. bool debug_fw; /* = false; */
  30. module_param(debug_fw, bool, 0444);
  31. MODULE_PARM_DESC(debug_fw, " do not perform card reset. For FW debug");
  32. static u8 oob_mode;
  33. module_param(oob_mode, byte, 0444);
  34. MODULE_PARM_DESC(oob_mode,
  35. " enable out of the box (OOB) mode in FW, for diagnostics and certification");
  36. bool no_fw_recovery;
  37. module_param(no_fw_recovery, bool, 0644);
  38. MODULE_PARM_DESC(no_fw_recovery, " disable automatic FW error recovery");
  39. /* if not set via modparam, will be set to default value of 1/8 of
  40. * rx ring size during init flow
  41. */
  42. unsigned short rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_INIT;
  43. module_param(rx_ring_overflow_thrsh, ushort, 0444);
  44. MODULE_PARM_DESC(rx_ring_overflow_thrsh,
  45. " RX ring overflow threshold in descriptors.");
  46. /* We allow allocation of more than 1 page buffers to support large packets.
  47. * It is suboptimal behavior performance wise in case MTU above page size.
  48. */
  49. unsigned int mtu_max = TXRX_BUF_LEN_DEFAULT - WIL_MAX_MPDU_OVERHEAD;
  50. static int mtu_max_set(const char *val, const struct kernel_param *kp)
  51. {
  52. int ret;
  53. /* sets mtu_max directly. no need to restore it in case of
  54. * illegal value since we assume this will fail insmod
  55. */
  56. ret = param_set_uint(val, kp);
  57. if (ret)
  58. return ret;
  59. if (mtu_max < 68 || mtu_max > WIL_MAX_ETH_MTU)
  60. ret = -EINVAL;
  61. return ret;
  62. }
  63. static const struct kernel_param_ops mtu_max_ops = {
  64. .set = mtu_max_set,
  65. .get = param_get_uint,
  66. };
  67. module_param_cb(mtu_max, &mtu_max_ops, &mtu_max, 0444);
  68. MODULE_PARM_DESC(mtu_max, " Max MTU value.");
  69. static uint rx_ring_order = WIL_RX_RING_SIZE_ORDER_DEFAULT;
  70. static uint tx_ring_order = WIL_TX_RING_SIZE_ORDER_DEFAULT;
  71. static uint bcast_ring_order = WIL_BCAST_RING_SIZE_ORDER_DEFAULT;
  72. static int ring_order_set(const char *val, const struct kernel_param *kp)
  73. {
  74. int ret;
  75. uint x;
  76. ret = kstrtouint(val, 0, &x);
  77. if (ret)
  78. return ret;
  79. if ((x < WIL_RING_SIZE_ORDER_MIN) || (x > WIL_RING_SIZE_ORDER_MAX))
  80. return -EINVAL;
  81. *((uint *)kp->arg) = x;
  82. return 0;
  83. }
  84. static const struct kernel_param_ops ring_order_ops = {
  85. .set = ring_order_set,
  86. .get = param_get_uint,
  87. };
  88. module_param_cb(rx_ring_order, &ring_order_ops, &rx_ring_order, 0444);
  89. MODULE_PARM_DESC(rx_ring_order, " Rx ring order; size = 1 << order");
  90. module_param_cb(tx_ring_order, &ring_order_ops, &tx_ring_order, 0444);
  91. MODULE_PARM_DESC(tx_ring_order, " Tx ring order; size = 1 << order");
  92. module_param_cb(bcast_ring_order, &ring_order_ops, &bcast_ring_order, 0444);
  93. MODULE_PARM_DESC(bcast_ring_order, " Bcast ring order; size = 1 << order");
  94. enum {
  95. WIL_BOOT_ERR,
  96. WIL_BOOT_VANILLA,
  97. WIL_BOOT_PRODUCTION,
  98. WIL_BOOT_DEVELOPMENT,
  99. };
  100. enum {
  101. WIL_SIG_STATUS_VANILLA = 0x0,
  102. WIL_SIG_STATUS_DEVELOPMENT = 0x1,
  103. WIL_SIG_STATUS_PRODUCTION = 0x2,
  104. WIL_SIG_STATUS_CORRUPTED_PRODUCTION = 0x3,
  105. };
  106. #define RST_DELAY (20) /* msec, for loop in @wil_wait_device_ready */
  107. #define RST_COUNT (1 + 1000/RST_DELAY) /* round up to be above 1 sec total */
  108. #define PMU_READY_DELAY_MS (4) /* ms, for sleep in @wil_wait_device_ready */
  109. #define OTP_HW_DELAY (200) /* usec, loop in @wil_wait_device_ready_talyn_mb */
  110. /* round up to be above 2 ms total */
  111. #define OTP_HW_COUNT (1 + 2000 / OTP_HW_DELAY)
  112. /*
  113. * Due to a hardware issue,
  114. * one has to read/write to/from NIC in 32-bit chunks;
  115. * regular memcpy_fromio and siblings will
  116. * not work on 64-bit platform - it uses 64-bit transactions
  117. *
  118. * Force 32-bit transactions to enable NIC on 64-bit platforms
  119. *
  120. * To avoid byte swap on big endian host, __raw_{read|write}l
  121. * should be used - {read|write}l would swap bytes to provide
  122. * little endian on PCI value in host endianness.
  123. */
  124. void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
  125. size_t count)
  126. {
  127. u32 *d = dst;
  128. const volatile u32 __iomem *s = src;
  129. for (; count >= 4; count -= 4)
  130. *d++ = __raw_readl(s++);
  131. if (unlikely(count)) {
  132. /* count can be 1..3 */
  133. u32 tmp = __raw_readl(s);
  134. memcpy(d, &tmp, count);
  135. }
  136. }
  137. void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
  138. size_t count)
  139. {
  140. volatile u32 __iomem *d = dst;
  141. const u32 *s = src;
  142. for (; count >= 4; count -= 4)
  143. __raw_writel(*s++, d++);
  144. if (unlikely(count)) {
  145. /* count can be 1..3 */
  146. u32 tmp = 0;
  147. memcpy(&tmp, s, count);
  148. __raw_writel(tmp, d);
  149. }
  150. }
  151. static void wil_ring_fini_tx(struct wil6210_priv *wil, int id)
  152. {
  153. struct wil_ring *ring = &wil->ring_tx[id];
  154. struct wil_ring_tx_data *txdata = &wil->ring_tx_data[id];
  155. lockdep_assert_held(&wil->mutex);
  156. if (!ring->va)
  157. return;
  158. wil_dbg_misc(wil, "vring_fini_tx: id=%d\n", id);
  159. spin_lock_bh(&txdata->lock);
  160. txdata->dot1x_open = false;
  161. txdata->mid = U8_MAX;
  162. txdata->enabled = 0; /* no Tx can be in progress or start anew */
  163. spin_unlock_bh(&txdata->lock);
  164. /* napi_synchronize waits for completion of the current NAPI but will
  165. * not prevent the next NAPI run.
  166. * Add a memory barrier to guarantee that txdata->enabled is zeroed
  167. * before napi_synchronize so that the next scheduled NAPI will not
  168. * handle this vring
  169. */
  170. wmb();
  171. /* make sure NAPI won't touch this vring */
  172. if (test_bit(wil_status_napi_en, wil->status))
  173. napi_synchronize(&wil->napi_tx);
  174. wil->txrx_ops.ring_fini_tx(wil, ring);
  175. }
  176. static void wil_disconnect_cid(struct wil6210_vif *vif, int cid,
  177. u16 reason_code, bool from_event)
  178. __acquires(&sta->tid_rx_lock) __releases(&sta->tid_rx_lock)
  179. {
  180. uint i;
  181. struct wil6210_priv *wil = vif_to_wil(vif);
  182. struct net_device *ndev = vif_to_ndev(vif);
  183. struct wireless_dev *wdev = vif_to_wdev(vif);
  184. struct wil_sta_info *sta = &wil->sta[cid];
  185. might_sleep();
  186. wil_dbg_misc(wil, "disconnect_cid: CID %d, MID %d, status %d\n",
  187. cid, sta->mid, sta->status);
  188. /* inform upper/lower layers */
  189. if (sta->status != wil_sta_unused) {
  190. if (vif->mid != sta->mid) {
  191. wil_err(wil, "STA MID mismatch with VIF MID(%d)\n",
  192. vif->mid);
  193. /* let FW override sta->mid but be more strict with
  194. * user space requests
  195. */
  196. if (!from_event)
  197. return;
  198. }
  199. if (!from_event) {
  200. bool del_sta = (wdev->iftype == NL80211_IFTYPE_AP) ?
  201. disable_ap_sme : false;
  202. wmi_disconnect_sta(vif, sta->addr, reason_code,
  203. true, del_sta);
  204. }
  205. switch (wdev->iftype) {
  206. case NL80211_IFTYPE_AP:
  207. case NL80211_IFTYPE_P2P_GO:
  208. /* AP-like interface */
  209. cfg80211_del_sta(ndev, sta->addr, GFP_KERNEL);
  210. break;
  211. default:
  212. break;
  213. }
  214. sta->status = wil_sta_unused;
  215. sta->mid = U8_MAX;
  216. }
  217. /* reorder buffers */
  218. for (i = 0; i < WIL_STA_TID_NUM; i++) {
  219. struct wil_tid_ampdu_rx *r;
  220. spin_lock_bh(&sta->tid_rx_lock);
  221. r = sta->tid_rx[i];
  222. sta->tid_rx[i] = NULL;
  223. wil_tid_ampdu_rx_free(wil, r);
  224. spin_unlock_bh(&sta->tid_rx_lock);
  225. }
  226. /* crypto context */
  227. memset(sta->tid_crypto_rx, 0, sizeof(sta->tid_crypto_rx));
  228. memset(&sta->group_crypto_rx, 0, sizeof(sta->group_crypto_rx));
  229. /* release vrings */
  230. for (i = 0; i < ARRAY_SIZE(wil->ring_tx); i++) {
  231. if (wil->ring2cid_tid[i][0] == cid)
  232. wil_ring_fini_tx(wil, i);
  233. }
  234. /* statistics */
  235. memset(&sta->stats, 0, sizeof(sta->stats));
  236. sta->stats.tx_latency_min_us = U32_MAX;
  237. }
  238. static bool wil_vif_is_connected(struct wil6210_priv *wil, u8 mid)
  239. {
  240. int i;
  241. for (i = 0; i < ARRAY_SIZE(wil->sta); i++) {
  242. if (wil->sta[i].mid == mid &&
  243. wil->sta[i].status == wil_sta_connected)
  244. return true;
  245. }
  246. return false;
  247. }
  248. static void _wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
  249. u16 reason_code, bool from_event)
  250. {
  251. struct wil6210_priv *wil = vif_to_wil(vif);
  252. int cid = -ENOENT;
  253. struct net_device *ndev;
  254. struct wireless_dev *wdev;
  255. if (unlikely(!vif))
  256. return;
  257. ndev = vif_to_ndev(vif);
  258. wdev = vif_to_wdev(vif);
  259. might_sleep();
  260. wil_info(wil, "bssid=%pM, reason=%d, ev%s\n", bssid,
  261. reason_code, from_event ? "+" : "-");
  262. /* Cases are:
  263. * - disconnect single STA, still connected
  264. * - disconnect single STA, already disconnected
  265. * - disconnect all
  266. *
  267. * For "disconnect all", there are 3 options:
  268. * - bssid == NULL
  269. * - bssid is broadcast address (ff:ff:ff:ff:ff:ff)
  270. * - bssid is our MAC address
  271. */
  272. if (bssid && !is_broadcast_ether_addr(bssid) &&
  273. !ether_addr_equal_unaligned(ndev->dev_addr, bssid)) {
  274. cid = wil_find_cid(wil, vif->mid, bssid);
  275. wil_dbg_misc(wil, "Disconnect %pM, CID=%d, reason=%d\n",
  276. bssid, cid, reason_code);
  277. if (cid >= 0) /* disconnect 1 peer */
  278. wil_disconnect_cid(vif, cid, reason_code, from_event);
  279. } else { /* all */
  280. wil_dbg_misc(wil, "Disconnect all\n");
  281. for (cid = 0; cid < WIL6210_MAX_CID; cid++)
  282. wil_disconnect_cid(vif, cid, reason_code, from_event);
  283. }
  284. /* link state */
  285. switch (wdev->iftype) {
  286. case NL80211_IFTYPE_STATION:
  287. case NL80211_IFTYPE_P2P_CLIENT:
  288. wil_bcast_fini(vif);
  289. wil_update_net_queues_bh(wil, vif, NULL, true);
  290. netif_carrier_off(ndev);
  291. if (!wil_has_other_active_ifaces(wil, ndev, false, true))
  292. wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
  293. if (test_and_clear_bit(wil_vif_fwconnected, vif->status)) {
  294. atomic_dec(&wil->connected_vifs);
  295. cfg80211_disconnected(ndev, reason_code,
  296. NULL, 0,
  297. vif->locally_generated_disc,
  298. GFP_KERNEL);
  299. vif->locally_generated_disc = false;
  300. } else if (test_bit(wil_vif_fwconnecting, vif->status)) {
  301. cfg80211_connect_result(ndev, bssid, NULL, 0, NULL, 0,
  302. WLAN_STATUS_UNSPECIFIED_FAILURE,
  303. GFP_KERNEL);
  304. vif->bss = NULL;
  305. }
  306. clear_bit(wil_vif_fwconnecting, vif->status);
  307. break;
  308. case NL80211_IFTYPE_AP:
  309. case NL80211_IFTYPE_P2P_GO:
  310. if (!wil_vif_is_connected(wil, vif->mid)) {
  311. wil_update_net_queues_bh(wil, vif, NULL, true);
  312. if (test_and_clear_bit(wil_vif_fwconnected,
  313. vif->status))
  314. atomic_dec(&wil->connected_vifs);
  315. } else {
  316. wil_update_net_queues_bh(wil, vif, NULL, false);
  317. }
  318. break;
  319. default:
  320. break;
  321. }
  322. }
  323. void wil_disconnect_worker(struct work_struct *work)
  324. {
  325. struct wil6210_vif *vif = container_of(work,
  326. struct wil6210_vif, disconnect_worker);
  327. struct wil6210_priv *wil = vif_to_wil(vif);
  328. struct net_device *ndev = vif_to_ndev(vif);
  329. int rc;
  330. struct {
  331. struct wmi_cmd_hdr wmi;
  332. struct wmi_disconnect_event evt;
  333. } __packed reply;
  334. if (test_bit(wil_vif_fwconnected, vif->status))
  335. /* connect succeeded after all */
  336. return;
  337. if (!test_bit(wil_vif_fwconnecting, vif->status))
  338. /* already disconnected */
  339. return;
  340. memset(&reply, 0, sizeof(reply));
  341. rc = wmi_call(wil, WMI_DISCONNECT_CMDID, vif->mid, NULL, 0,
  342. WMI_DISCONNECT_EVENTID, &reply, sizeof(reply),
  343. WIL6210_DISCONNECT_TO_MS);
  344. if (rc) {
  345. wil_err(wil, "disconnect error %d\n", rc);
  346. return;
  347. }
  348. wil_update_net_queues_bh(wil, vif, NULL, true);
  349. netif_carrier_off(ndev);
  350. cfg80211_connect_result(ndev, NULL, NULL, 0, NULL, 0,
  351. WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_KERNEL);
  352. clear_bit(wil_vif_fwconnecting, vif->status);
  353. }
  354. static int wil_wait_for_recovery(struct wil6210_priv *wil)
  355. {
  356. if (wait_event_interruptible(wil->wq, wil->recovery_state !=
  357. fw_recovery_pending)) {
  358. wil_err(wil, "Interrupt, canceling recovery\n");
  359. return -ERESTARTSYS;
  360. }
  361. if (wil->recovery_state != fw_recovery_running) {
  362. wil_info(wil, "Recovery cancelled\n");
  363. return -EINTR;
  364. }
  365. wil_info(wil, "Proceed with recovery\n");
  366. return 0;
  367. }
  368. void wil_set_recovery_state(struct wil6210_priv *wil, int state)
  369. {
  370. wil_dbg_misc(wil, "set_recovery_state: %d -> %d\n",
  371. wil->recovery_state, state);
  372. wil->recovery_state = state;
  373. wake_up_interruptible(&wil->wq);
  374. }
  375. bool wil_is_recovery_blocked(struct wil6210_priv *wil)
  376. {
  377. return no_fw_recovery && (wil->recovery_state == fw_recovery_pending);
  378. }
  379. static void wil_fw_error_worker(struct work_struct *work)
  380. {
  381. struct wil6210_priv *wil = container_of(work, struct wil6210_priv,
  382. fw_error_worker);
  383. struct net_device *ndev = wil->main_ndev;
  384. struct wireless_dev *wdev;
  385. wil_dbg_misc(wil, "fw error worker\n");
  386. if (!ndev || !(ndev->flags & IFF_UP)) {
  387. wil_info(wil, "No recovery - interface is down\n");
  388. return;
  389. }
  390. wdev = ndev->ieee80211_ptr;
  391. /* increment @recovery_count if less then WIL6210_FW_RECOVERY_TO
  392. * passed since last recovery attempt
  393. */
  394. if (time_is_after_jiffies(wil->last_fw_recovery +
  395. WIL6210_FW_RECOVERY_TO))
  396. wil->recovery_count++;
  397. else
  398. wil->recovery_count = 1; /* fw was alive for a long time */
  399. if (wil->recovery_count > WIL6210_FW_RECOVERY_RETRIES) {
  400. wil_err(wil, "too many recovery attempts (%d), giving up\n",
  401. wil->recovery_count);
  402. return;
  403. }
  404. wil->last_fw_recovery = jiffies;
  405. wil_info(wil, "fw error recovery requested (try %d)...\n",
  406. wil->recovery_count);
  407. if (!no_fw_recovery)
  408. wil->recovery_state = fw_recovery_running;
  409. if (wil_wait_for_recovery(wil) != 0)
  410. return;
  411. mutex_lock(&wil->mutex);
  412. /* Needs adaptation for multiple VIFs
  413. * need to go over all VIFs and consider the appropriate
  414. * recovery.
  415. */
  416. switch (wdev->iftype) {
  417. case NL80211_IFTYPE_STATION:
  418. case NL80211_IFTYPE_P2P_CLIENT:
  419. case NL80211_IFTYPE_MONITOR:
  420. /* silent recovery, upper layers will see disconnect */
  421. __wil_down(wil);
  422. __wil_up(wil);
  423. break;
  424. case NL80211_IFTYPE_AP:
  425. case NL80211_IFTYPE_P2P_GO:
  426. wil_info(wil, "No recovery for AP-like interface\n");
  427. /* recovery in these modes is done by upper layers */
  428. break;
  429. default:
  430. wil_err(wil, "No recovery - unknown interface type %d\n",
  431. wdev->iftype);
  432. break;
  433. }
  434. mutex_unlock(&wil->mutex);
  435. }
  436. static int wil_find_free_ring(struct wil6210_priv *wil)
  437. {
  438. int i;
  439. int min_ring_id = wil_get_min_tx_ring_id(wil);
  440. for (i = min_ring_id; i < WIL6210_MAX_TX_RINGS; i++) {
  441. if (!wil->ring_tx[i].va)
  442. return i;
  443. }
  444. return -EINVAL;
  445. }
  446. int wil_ring_init_tx(struct wil6210_vif *vif, int cid)
  447. {
  448. struct wil6210_priv *wil = vif_to_wil(vif);
  449. int rc = -EINVAL, ringid;
  450. if (cid < 0) {
  451. wil_err(wil, "No connection pending\n");
  452. goto out;
  453. }
  454. ringid = wil_find_free_ring(wil);
  455. if (ringid < 0) {
  456. wil_err(wil, "No free vring found\n");
  457. goto out;
  458. }
  459. wil_dbg_wmi(wil, "Configure for connection CID %d MID %d ring %d\n",
  460. cid, vif->mid, ringid);
  461. rc = wil->txrx_ops.ring_init_tx(vif, ringid, 1 << tx_ring_order,
  462. cid, 0);
  463. if (rc)
  464. wil_err(wil, "init TX for CID %d MID %d vring %d failed\n",
  465. cid, vif->mid, ringid);
  466. out:
  467. return rc;
  468. }
  469. int wil_bcast_init(struct wil6210_vif *vif)
  470. {
  471. struct wil6210_priv *wil = vif_to_wil(vif);
  472. int ri = vif->bcast_ring, rc;
  473. if (ri >= 0 && wil->ring_tx[ri].va)
  474. return 0;
  475. ri = wil_find_free_ring(wil);
  476. if (ri < 0)
  477. return ri;
  478. vif->bcast_ring = ri;
  479. rc = wil->txrx_ops.ring_init_bcast(vif, ri, 1 << bcast_ring_order);
  480. if (rc)
  481. vif->bcast_ring = -1;
  482. return rc;
  483. }
  484. void wil_bcast_fini(struct wil6210_vif *vif)
  485. {
  486. struct wil6210_priv *wil = vif_to_wil(vif);
  487. int ri = vif->bcast_ring;
  488. if (ri < 0)
  489. return;
  490. vif->bcast_ring = -1;
  491. wil_ring_fini_tx(wil, ri);
  492. }
  493. void wil_bcast_fini_all(struct wil6210_priv *wil)
  494. {
  495. int i;
  496. struct wil6210_vif *vif;
  497. for (i = 0; i < wil->max_vifs; i++) {
  498. vif = wil->vifs[i];
  499. if (vif)
  500. wil_bcast_fini(vif);
  501. }
  502. }
  503. int wil_priv_init(struct wil6210_priv *wil)
  504. {
  505. uint i;
  506. wil_dbg_misc(wil, "priv_init\n");
  507. memset(wil->sta, 0, sizeof(wil->sta));
  508. for (i = 0; i < WIL6210_MAX_CID; i++) {
  509. spin_lock_init(&wil->sta[i].tid_rx_lock);
  510. wil->sta[i].mid = U8_MAX;
  511. }
  512. for (i = 0; i < WIL6210_MAX_TX_RINGS; i++)
  513. spin_lock_init(&wil->ring_tx_data[i].lock);
  514. mutex_init(&wil->mutex);
  515. mutex_init(&wil->vif_mutex);
  516. mutex_init(&wil->wmi_mutex);
  517. mutex_init(&wil->halp.lock);
  518. init_completion(&wil->wmi_ready);
  519. init_completion(&wil->wmi_call);
  520. init_completion(&wil->halp.comp);
  521. INIT_WORK(&wil->wmi_event_worker, wmi_event_worker);
  522. INIT_WORK(&wil->fw_error_worker, wil_fw_error_worker);
  523. INIT_LIST_HEAD(&wil->pending_wmi_ev);
  524. spin_lock_init(&wil->wmi_ev_lock);
  525. spin_lock_init(&wil->net_queue_lock);
  526. init_waitqueue_head(&wil->wq);
  527. wil->wmi_wq = create_singlethread_workqueue(WIL_NAME "_wmi");
  528. if (!wil->wmi_wq)
  529. return -EAGAIN;
  530. wil->wq_service = create_singlethread_workqueue(WIL_NAME "_service");
  531. if (!wil->wq_service)
  532. goto out_wmi_wq;
  533. wil->last_fw_recovery = jiffies;
  534. wil->tx_interframe_timeout = WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT;
  535. wil->rx_interframe_timeout = WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT;
  536. wil->tx_max_burst_duration = WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT;
  537. wil->rx_max_burst_duration = WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT;
  538. if (rx_ring_overflow_thrsh == WIL6210_RX_HIGH_TRSH_INIT)
  539. rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_DEFAULT;
  540. wil->ps_profile = WMI_PS_PROFILE_TYPE_DEFAULT;
  541. wil->wakeup_trigger = WMI_WAKEUP_TRIGGER_UCAST |
  542. WMI_WAKEUP_TRIGGER_BCAST;
  543. memset(&wil->suspend_stats, 0, sizeof(wil->suspend_stats));
  544. wil->ring_idle_trsh = 16;
  545. wil->reply_mid = U8_MAX;
  546. wil->max_vifs = 1;
  547. /* edma configuration can be updated via debugfs before allocation */
  548. wil->num_rx_status_rings = WIL_DEFAULT_NUM_RX_STATUS_RINGS;
  549. wil->use_compressed_rx_status = true;
  550. wil->use_rx_hw_reordering = true;
  551. wil->tx_status_ring_order = WIL_TX_SRING_SIZE_ORDER_DEFAULT;
  552. /* Rx status ring size should be bigger than the number of RX buffers
  553. * in order to prevent backpressure on the status ring, which may
  554. * cause HW freeze.
  555. */
  556. wil->rx_status_ring_order = WIL_RX_SRING_SIZE_ORDER_DEFAULT;
  557. /* Number of RX buffer IDs should be bigger than the RX descriptor
  558. * ring size as in HW reorder flow, the HW can consume additional
  559. * buffers before releasing the previous ones.
  560. */
  561. wil->rx_buff_id_count = WIL_RX_BUFF_ARR_SIZE_DEFAULT;
  562. wil->amsdu_en = 1;
  563. return 0;
  564. out_wmi_wq:
  565. destroy_workqueue(wil->wmi_wq);
  566. return -EAGAIN;
  567. }
  568. void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps)
  569. {
  570. if (wil->platform_ops.bus_request) {
  571. wil->bus_request_kbps = kbps;
  572. wil->platform_ops.bus_request(wil->platform_handle, kbps);
  573. }
  574. }
  575. /**
  576. * wil6210_disconnect - disconnect one connection
  577. * @vif: virtual interface context
  578. * @bssid: peer to disconnect, NULL to disconnect all
  579. * @reason_code: Reason code for the Disassociation frame
  580. * @from_event: whether is invoked from FW event handler
  581. *
  582. * Disconnect and release associated resources. If invoked not from the
  583. * FW event handler, issue WMI command(s) to trigger MAC disconnect.
  584. */
  585. void wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
  586. u16 reason_code, bool from_event)
  587. {
  588. struct wil6210_priv *wil = vif_to_wil(vif);
  589. wil_dbg_misc(wil, "disconnect\n");
  590. del_timer_sync(&vif->connect_timer);
  591. _wil6210_disconnect(vif, bssid, reason_code, from_event);
  592. }
  593. void wil_priv_deinit(struct wil6210_priv *wil)
  594. {
  595. wil_dbg_misc(wil, "priv_deinit\n");
  596. wil_set_recovery_state(wil, fw_recovery_idle);
  597. cancel_work_sync(&wil->fw_error_worker);
  598. wmi_event_flush(wil);
  599. destroy_workqueue(wil->wq_service);
  600. destroy_workqueue(wil->wmi_wq);
  601. }
  602. static void wil_shutdown_bl(struct wil6210_priv *wil)
  603. {
  604. u32 val;
  605. wil_s(wil, RGF_USER_BL +
  606. offsetof(struct bl_dedicated_registers_v1,
  607. bl_shutdown_handshake), BL_SHUTDOWN_HS_GRTD);
  608. usleep_range(100, 150);
  609. val = wil_r(wil, RGF_USER_BL +
  610. offsetof(struct bl_dedicated_registers_v1,
  611. bl_shutdown_handshake));
  612. if (val & BL_SHUTDOWN_HS_RTD) {
  613. wil_dbg_misc(wil, "BL is ready for halt\n");
  614. return;
  615. }
  616. wil_err(wil, "BL did not report ready for halt\n");
  617. }
  618. /* this format is used by ARC embedded CPU for instruction memory */
  619. static inline u32 ARC_me_imm32(u32 d)
  620. {
  621. return ((d & 0xffff0000) >> 16) | ((d & 0x0000ffff) << 16);
  622. }
  623. /* defines access to interrupt vectors for wil_freeze_bl */
  624. #define ARC_IRQ_VECTOR_OFFSET(N) ((N) * 8)
  625. /* ARC long jump instruction */
  626. #define ARC_JAL_INST (0x20200f80)
  627. static void wil_freeze_bl(struct wil6210_priv *wil)
  628. {
  629. u32 jal, upc, saved;
  630. u32 ivt3 = ARC_IRQ_VECTOR_OFFSET(3);
  631. jal = wil_r(wil, wil->iccm_base + ivt3);
  632. if (jal != ARC_me_imm32(ARC_JAL_INST)) {
  633. wil_dbg_misc(wil, "invalid IVT entry found, skipping\n");
  634. return;
  635. }
  636. /* prevent the target from entering deep sleep
  637. * and disabling memory access
  638. */
  639. saved = wil_r(wil, RGF_USER_USAGE_8);
  640. wil_w(wil, RGF_USER_USAGE_8, saved | BIT_USER_PREVENT_DEEP_SLEEP);
  641. usleep_range(20, 25); /* let the BL process the bit */
  642. /* redirect to endless loop in the INT_L1 context and let it trap */
  643. wil_w(wil, wil->iccm_base + ivt3 + 4, ARC_me_imm32(ivt3));
  644. usleep_range(20, 25); /* let the BL get into the trap */
  645. /* verify the BL is frozen */
  646. upc = wil_r(wil, RGF_USER_CPU_PC);
  647. if (upc < ivt3 || (upc > (ivt3 + 8)))
  648. wil_dbg_misc(wil, "BL freeze failed, PC=0x%08X\n", upc);
  649. wil_w(wil, RGF_USER_USAGE_8, saved);
  650. }
  651. static void wil_bl_prepare_halt(struct wil6210_priv *wil)
  652. {
  653. u32 tmp, ver;
  654. /* before halting device CPU driver must make sure BL is not accessing
  655. * host memory. This is done differently depending on BL version:
  656. * 1. For very old BL versions the procedure is skipped
  657. * (not supported).
  658. * 2. For old BL version we use a special trick to freeze the BL
  659. * 3. For new BL versions we shutdown the BL using handshake procedure.
  660. */
  661. tmp = wil_r(wil, RGF_USER_BL +
  662. offsetof(struct bl_dedicated_registers_v0,
  663. boot_loader_struct_version));
  664. if (!tmp) {
  665. wil_dbg_misc(wil, "old BL, skipping halt preparation\n");
  666. return;
  667. }
  668. tmp = wil_r(wil, RGF_USER_BL +
  669. offsetof(struct bl_dedicated_registers_v1,
  670. bl_shutdown_handshake));
  671. ver = BL_SHUTDOWN_HS_PROT_VER(tmp);
  672. if (ver > 0)
  673. wil_shutdown_bl(wil);
  674. else
  675. wil_freeze_bl(wil);
  676. }
  677. static inline void wil_halt_cpu(struct wil6210_priv *wil)
  678. {
  679. if (wil->hw_version >= HW_VER_TALYN_MB) {
  680. wil_w(wil, RGF_USER_USER_CPU_0_TALYN_MB,
  681. BIT_USER_USER_CPU_MAN_RST);
  682. wil_w(wil, RGF_USER_MAC_CPU_0_TALYN_MB,
  683. BIT_USER_MAC_CPU_MAN_RST);
  684. } else {
  685. wil_w(wil, RGF_USER_USER_CPU_0, BIT_USER_USER_CPU_MAN_RST);
  686. wil_w(wil, RGF_USER_MAC_CPU_0, BIT_USER_MAC_CPU_MAN_RST);
  687. }
  688. }
  689. static inline void wil_release_cpu(struct wil6210_priv *wil)
  690. {
  691. /* Start CPU */
  692. if (wil->hw_version >= HW_VER_TALYN_MB)
  693. wil_w(wil, RGF_USER_USER_CPU_0_TALYN_MB, 1);
  694. else
  695. wil_w(wil, RGF_USER_USER_CPU_0, 1);
  696. }
  697. static void wil_set_oob_mode(struct wil6210_priv *wil, u8 mode)
  698. {
  699. wil_info(wil, "oob_mode to %d\n", mode);
  700. switch (mode) {
  701. case 0:
  702. wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE |
  703. BIT_USER_OOB_R2_MODE);
  704. break;
  705. case 1:
  706. wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
  707. wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
  708. break;
  709. case 2:
  710. wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
  711. wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
  712. break;
  713. default:
  714. wil_err(wil, "invalid oob_mode: %d\n", mode);
  715. }
  716. }
  717. static int wil_wait_device_ready(struct wil6210_priv *wil, int no_flash)
  718. {
  719. int delay = 0;
  720. u32 x, x1 = 0;
  721. /* wait until device ready. */
  722. if (no_flash) {
  723. msleep(PMU_READY_DELAY_MS);
  724. wil_dbg_misc(wil, "Reset completed\n");
  725. } else {
  726. do {
  727. msleep(RST_DELAY);
  728. x = wil_r(wil, RGF_USER_BL +
  729. offsetof(struct bl_dedicated_registers_v0,
  730. boot_loader_ready));
  731. if (x1 != x) {
  732. wil_dbg_misc(wil, "BL.ready 0x%08x => 0x%08x\n",
  733. x1, x);
  734. x1 = x;
  735. }
  736. if (delay++ > RST_COUNT) {
  737. wil_err(wil, "Reset not completed, bl.ready 0x%08x\n",
  738. x);
  739. return -ETIME;
  740. }
  741. } while (x != BL_READY);
  742. wil_dbg_misc(wil, "Reset completed in %d ms\n",
  743. delay * RST_DELAY);
  744. }
  745. return 0;
  746. }
  747. static int wil_wait_device_ready_talyn_mb(struct wil6210_priv *wil)
  748. {
  749. u32 otp_hw;
  750. u8 signature_status;
  751. bool otp_signature_err;
  752. bool hw_section_done;
  753. u32 otp_qc_secured;
  754. int delay = 0;
  755. /* Wait for OTP signature test to complete */
  756. usleep_range(2000, 2200);
  757. wil->boot_config = WIL_BOOT_ERR;
  758. /* Poll until OTP signature status is valid.
  759. * In vanilla and development modes, when signature test is complete
  760. * HW sets BIT_OTP_SIGNATURE_ERR_TALYN_MB.
  761. * In production mode BIT_OTP_SIGNATURE_ERR_TALYN_MB remains 0, poll
  762. * for signature status change to 2 or 3.
  763. */
  764. do {
  765. otp_hw = wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1);
  766. signature_status = WIL_GET_BITS(otp_hw, 8, 9);
  767. otp_signature_err = otp_hw & BIT_OTP_SIGNATURE_ERR_TALYN_MB;
  768. if (otp_signature_err &&
  769. signature_status == WIL_SIG_STATUS_VANILLA) {
  770. wil->boot_config = WIL_BOOT_VANILLA;
  771. break;
  772. }
  773. if (otp_signature_err &&
  774. signature_status == WIL_SIG_STATUS_DEVELOPMENT) {
  775. wil->boot_config = WIL_BOOT_DEVELOPMENT;
  776. break;
  777. }
  778. if (!otp_signature_err &&
  779. signature_status == WIL_SIG_STATUS_PRODUCTION) {
  780. wil->boot_config = WIL_BOOT_PRODUCTION;
  781. break;
  782. }
  783. if (!otp_signature_err &&
  784. signature_status ==
  785. WIL_SIG_STATUS_CORRUPTED_PRODUCTION) {
  786. /* Unrecognized OTP signature found. Possibly a
  787. * corrupted production signature, access control
  788. * is applied as in production mode, therefore
  789. * do not fail
  790. */
  791. wil->boot_config = WIL_BOOT_PRODUCTION;
  792. break;
  793. }
  794. if (delay++ > OTP_HW_COUNT)
  795. break;
  796. usleep_range(OTP_HW_DELAY, OTP_HW_DELAY + 10);
  797. } while (!otp_signature_err && signature_status == 0);
  798. if (wil->boot_config == WIL_BOOT_ERR) {
  799. wil_err(wil,
  800. "invalid boot config, signature_status %d otp_signature_err %d\n",
  801. signature_status, otp_signature_err);
  802. return -ETIME;
  803. }
  804. wil_dbg_misc(wil,
  805. "signature test done in %d usec, otp_hw 0x%x, boot_config %d\n",
  806. delay * OTP_HW_DELAY, otp_hw, wil->boot_config);
  807. if (wil->boot_config == WIL_BOOT_VANILLA)
  808. /* Assuming not SPI boot (currently not supported) */
  809. goto out;
  810. hw_section_done = otp_hw & BIT_OTP_HW_SECTION_DONE_TALYN_MB;
  811. delay = 0;
  812. while (!hw_section_done) {
  813. msleep(RST_DELAY);
  814. otp_hw = wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1);
  815. hw_section_done = otp_hw & BIT_OTP_HW_SECTION_DONE_TALYN_MB;
  816. if (delay++ > RST_COUNT) {
  817. wil_err(wil, "TO waiting for hw_section_done\n");
  818. return -ETIME;
  819. }
  820. }
  821. wil_dbg_misc(wil, "HW section done in %d ms\n", delay * RST_DELAY);
  822. otp_qc_secured = wil_r(wil, RGF_OTP_QC_SECURED);
  823. wil->secured_boot = otp_qc_secured & BIT_BOOT_FROM_ROM ? 1 : 0;
  824. wil_dbg_misc(wil, "secured boot is %sabled\n",
  825. wil->secured_boot ? "en" : "dis");
  826. out:
  827. wil_dbg_misc(wil, "Reset completed\n");
  828. return 0;
  829. }
  830. static int wil_target_reset(struct wil6210_priv *wil, int no_flash)
  831. {
  832. u32 x;
  833. int rc;
  834. wil_dbg_misc(wil, "Resetting \"%s\"...\n", wil->hw_name);
  835. /* Clear MAC link up */
  836. wil_s(wil, RGF_HP_CTRL, BIT(15));
  837. wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT_HPAL_PERST_FROM_PAD);
  838. wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT_CAR_PERST_RST);
  839. wil_halt_cpu(wil);
  840. if (!no_flash) {
  841. /* clear all boot loader "ready" bits */
  842. wil_w(wil, RGF_USER_BL +
  843. offsetof(struct bl_dedicated_registers_v0,
  844. boot_loader_ready), 0);
  845. /* this should be safe to write even with old BLs */
  846. wil_w(wil, RGF_USER_BL +
  847. offsetof(struct bl_dedicated_registers_v1,
  848. bl_shutdown_handshake), 0);
  849. }
  850. /* Clear Fw Download notification */
  851. wil_c(wil, RGF_USER_USAGE_6, BIT(0));
  852. wil_s(wil, RGF_CAF_OSC_CONTROL, BIT_CAF_OSC_XTAL_EN);
  853. /* XTAL stabilization should take about 3ms */
  854. usleep_range(5000, 7000);
  855. x = wil_r(wil, RGF_CAF_PLL_LOCK_STATUS);
  856. if (!(x & BIT_CAF_OSC_DIG_XTAL_STABLE)) {
  857. wil_err(wil, "Xtal stabilization timeout\n"
  858. "RGF_CAF_PLL_LOCK_STATUS = 0x%08x\n", x);
  859. return -ETIME;
  860. }
  861. /* switch 10k to XTAL*/
  862. wil_c(wil, RGF_USER_SPARROW_M_4, BIT_SPARROW_M_4_SEL_SLEEP_OR_REF);
  863. /* 40 MHz */
  864. wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_CAR_AHB_SW_SEL);
  865. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x3ff81f);
  866. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0xf);
  867. if (wil->hw_version >= HW_VER_TALYN_MB) {
  868. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x7e000000);
  869. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003f);
  870. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0xc00000f0);
  871. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xffe7fe00);
  872. } else {
  873. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0xfe000000);
  874. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003f);
  875. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x000000f0);
  876. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xffe7fe00);
  877. }
  878. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x0);
  879. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0x0);
  880. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0);
  881. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0);
  882. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0);
  883. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
  884. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x00000003);
  885. /* reset A2 PCIE AHB */
  886. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x00008000);
  887. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
  888. if (wil->hw_version == HW_VER_TALYN_MB)
  889. rc = wil_wait_device_ready_talyn_mb(wil);
  890. else
  891. rc = wil_wait_device_ready(wil, no_flash);
  892. if (rc)
  893. return rc;
  894. wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_RST_PWGD);
  895. /* enable fix for HW bug related to the SA/DA swap in AP Rx */
  896. wil_s(wil, RGF_DMA_OFUL_NID_0, BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN |
  897. BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC);
  898. if (wil->hw_version < HW_VER_TALYN_MB && no_flash) {
  899. /* Reset OTP HW vectors to fit 40MHz */
  900. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME1, 0x60001);
  901. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME2, 0x20027);
  902. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME3, 0x1);
  903. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME4, 0x20027);
  904. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME5, 0x30003);
  905. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME6, 0x20002);
  906. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME7, 0x60001);
  907. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME8, 0x60001);
  908. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME9, 0x60001);
  909. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME10, 0x60001);
  910. wil_w(wil, RGF_USER_XPM_RD_DOUT_SAMPLE_TIME, 0x57);
  911. }
  912. return 0;
  913. }
  914. static void wil_collect_fw_info(struct wil6210_priv *wil)
  915. {
  916. struct wiphy *wiphy = wil_to_wiphy(wil);
  917. u8 retry_short;
  918. int rc;
  919. wil_refresh_fw_capabilities(wil);
  920. rc = wmi_get_mgmt_retry(wil, &retry_short);
  921. if (!rc) {
  922. wiphy->retry_short = retry_short;
  923. wil_dbg_misc(wil, "FW retry_short: %d\n", retry_short);
  924. }
  925. }
  926. void wil_refresh_fw_capabilities(struct wil6210_priv *wil)
  927. {
  928. struct wiphy *wiphy = wil_to_wiphy(wil);
  929. int features;
  930. wil->keep_radio_on_during_sleep =
  931. test_bit(WIL_PLATFORM_CAPA_RADIO_ON_IN_SUSPEND,
  932. wil->platform_capa) &&
  933. test_bit(WMI_FW_CAPABILITY_D3_SUSPEND, wil->fw_capabilities);
  934. wil_info(wil, "keep_radio_on_during_sleep (%d)\n",
  935. wil->keep_radio_on_during_sleep);
  936. if (test_bit(WMI_FW_CAPABILITY_RSSI_REPORTING, wil->fw_capabilities))
  937. wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM;
  938. else
  939. wiphy->signal_type = CFG80211_SIGNAL_TYPE_UNSPEC;
  940. if (test_bit(WMI_FW_CAPABILITY_PNO, wil->fw_capabilities)) {
  941. wiphy->max_sched_scan_reqs = 1;
  942. wiphy->max_sched_scan_ssids = WMI_MAX_PNO_SSID_NUM;
  943. wiphy->max_match_sets = WMI_MAX_PNO_SSID_NUM;
  944. wiphy->max_sched_scan_ie_len = WMI_MAX_IE_LEN;
  945. wiphy->max_sched_scan_plans = WMI_MAX_PLANS_NUM;
  946. }
  947. if (test_bit(WMI_FW_CAPABILITY_TX_REQ_EXT, wil->fw_capabilities))
  948. wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX;
  949. if (wil->platform_ops.set_features) {
  950. features = (test_bit(WMI_FW_CAPABILITY_REF_CLOCK_CONTROL,
  951. wil->fw_capabilities) &&
  952. test_bit(WIL_PLATFORM_CAPA_EXT_CLK,
  953. wil->platform_capa)) ?
  954. BIT(WIL_PLATFORM_FEATURE_FW_EXT_CLK_CONTROL) : 0;
  955. if (wil->n_msi == 3)
  956. features |= BIT(WIL_PLATFORM_FEATURE_TRIPLE_MSI);
  957. wil->platform_ops.set_features(wil->platform_handle, features);
  958. }
  959. if (test_bit(WMI_FW_CAPABILITY_BACK_WIN_SIZE_64,
  960. wil->fw_capabilities)) {
  961. wil->max_agg_wsize = WIL_MAX_AGG_WSIZE_64;
  962. wil->max_ampdu_size = WIL_MAX_AMPDU_SIZE_128;
  963. } else {
  964. wil->max_agg_wsize = WIL_MAX_AGG_WSIZE;
  965. wil->max_ampdu_size = WIL_MAX_AMPDU_SIZE;
  966. }
  967. }
  968. void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r)
  969. {
  970. le32_to_cpus(&r->base);
  971. le16_to_cpus(&r->entry_size);
  972. le16_to_cpus(&r->size);
  973. le32_to_cpus(&r->tail);
  974. le32_to_cpus(&r->head);
  975. }
  976. /* construct actual board file name to use */
  977. void wil_get_board_file(struct wil6210_priv *wil, char *buf, size_t len)
  978. {
  979. const char *board_file;
  980. const char *wil_talyn_fw_name = ftm_mode ? WIL_FW_NAME_FTM_TALYN :
  981. WIL_FW_NAME_TALYN;
  982. if (wil->board_file) {
  983. board_file = wil->board_file;
  984. } else {
  985. /* If specific FW file is used for Talyn,
  986. * use specific board file
  987. */
  988. if (strcmp(wil->wil_fw_name, wil_talyn_fw_name) == 0)
  989. board_file = WIL_BRD_NAME_TALYN;
  990. else
  991. board_file = WIL_BOARD_FILE_NAME;
  992. }
  993. strlcpy(buf, board_file, len);
  994. }
  995. static int wil_get_bl_info(struct wil6210_priv *wil)
  996. {
  997. struct net_device *ndev = wil->main_ndev;
  998. struct wiphy *wiphy = wil_to_wiphy(wil);
  999. union {
  1000. struct bl_dedicated_registers_v0 bl0;
  1001. struct bl_dedicated_registers_v1 bl1;
  1002. } bl;
  1003. u32 bl_ver;
  1004. u8 *mac;
  1005. u16 rf_status;
  1006. wil_memcpy_fromio_32(&bl, wil->csr + HOSTADDR(RGF_USER_BL),
  1007. sizeof(bl));
  1008. bl_ver = le32_to_cpu(bl.bl0.boot_loader_struct_version);
  1009. mac = bl.bl0.mac_address;
  1010. if (bl_ver == 0) {
  1011. le32_to_cpus(&bl.bl0.rf_type);
  1012. le32_to_cpus(&bl.bl0.baseband_type);
  1013. rf_status = 0; /* actually, unknown */
  1014. wil_info(wil,
  1015. "Boot Loader struct v%d: MAC = %pM RF = 0x%08x bband = 0x%08x\n",
  1016. bl_ver, mac,
  1017. bl.bl0.rf_type, bl.bl0.baseband_type);
  1018. wil_info(wil, "Boot Loader build unknown for struct v0\n");
  1019. } else {
  1020. le16_to_cpus(&bl.bl1.rf_type);
  1021. rf_status = le16_to_cpu(bl.bl1.rf_status);
  1022. le32_to_cpus(&bl.bl1.baseband_type);
  1023. le16_to_cpus(&bl.bl1.bl_version_subminor);
  1024. le16_to_cpus(&bl.bl1.bl_version_build);
  1025. wil_info(wil,
  1026. "Boot Loader struct v%d: MAC = %pM RF = 0x%04x (status 0x%04x) bband = 0x%08x\n",
  1027. bl_ver, mac,
  1028. bl.bl1.rf_type, rf_status,
  1029. bl.bl1.baseband_type);
  1030. wil_info(wil, "Boot Loader build %d.%d.%d.%d\n",
  1031. bl.bl1.bl_version_major, bl.bl1.bl_version_minor,
  1032. bl.bl1.bl_version_subminor, bl.bl1.bl_version_build);
  1033. }
  1034. if (!is_valid_ether_addr(mac)) {
  1035. wil_err(wil, "BL: Invalid MAC %pM\n", mac);
  1036. return -EINVAL;
  1037. }
  1038. ether_addr_copy(ndev->perm_addr, mac);
  1039. ether_addr_copy(wiphy->perm_addr, mac);
  1040. if (!is_valid_ether_addr(ndev->dev_addr))
  1041. ether_addr_copy(ndev->dev_addr, mac);
  1042. if (rf_status) {/* bad RF cable? */
  1043. wil_err(wil, "RF communication error 0x%04x",
  1044. rf_status);
  1045. return -EAGAIN;
  1046. }
  1047. return 0;
  1048. }
  1049. static void wil_bl_crash_info(struct wil6210_priv *wil, bool is_err)
  1050. {
  1051. u32 bl_assert_code, bl_assert_blink, bl_magic_number;
  1052. u32 bl_ver = wil_r(wil, RGF_USER_BL +
  1053. offsetof(struct bl_dedicated_registers_v0,
  1054. boot_loader_struct_version));
  1055. if (bl_ver < 2)
  1056. return;
  1057. bl_assert_code = wil_r(wil, RGF_USER_BL +
  1058. offsetof(struct bl_dedicated_registers_v1,
  1059. bl_assert_code));
  1060. bl_assert_blink = wil_r(wil, RGF_USER_BL +
  1061. offsetof(struct bl_dedicated_registers_v1,
  1062. bl_assert_blink));
  1063. bl_magic_number = wil_r(wil, RGF_USER_BL +
  1064. offsetof(struct bl_dedicated_registers_v1,
  1065. bl_magic_number));
  1066. if (is_err) {
  1067. wil_err(wil,
  1068. "BL assert code 0x%08x blink 0x%08x magic 0x%08x\n",
  1069. bl_assert_code, bl_assert_blink, bl_magic_number);
  1070. } else {
  1071. wil_dbg_misc(wil,
  1072. "BL assert code 0x%08x blink 0x%08x magic 0x%08x\n",
  1073. bl_assert_code, bl_assert_blink, bl_magic_number);
  1074. }
  1075. }
  1076. static int wil_get_otp_info(struct wil6210_priv *wil)
  1077. {
  1078. struct net_device *ndev = wil->main_ndev;
  1079. struct wiphy *wiphy = wil_to_wiphy(wil);
  1080. u8 mac[8];
  1081. int mac_addr;
  1082. if (wil->hw_version >= HW_VER_TALYN_MB)
  1083. mac_addr = RGF_OTP_MAC_TALYN_MB;
  1084. else
  1085. mac_addr = RGF_OTP_MAC;
  1086. wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(mac_addr),
  1087. sizeof(mac));
  1088. if (!is_valid_ether_addr(mac)) {
  1089. wil_err(wil, "Invalid MAC %pM\n", mac);
  1090. return -EINVAL;
  1091. }
  1092. ether_addr_copy(ndev->perm_addr, mac);
  1093. ether_addr_copy(wiphy->perm_addr, mac);
  1094. if (!is_valid_ether_addr(ndev->dev_addr))
  1095. ether_addr_copy(ndev->dev_addr, mac);
  1096. return 0;
  1097. }
  1098. static int wil_wait_for_fw_ready(struct wil6210_priv *wil)
  1099. {
  1100. ulong to = msecs_to_jiffies(2000);
  1101. ulong left = wait_for_completion_timeout(&wil->wmi_ready, to);
  1102. if (0 == left) {
  1103. wil_err(wil, "Firmware not ready\n");
  1104. return -ETIME;
  1105. } else {
  1106. wil_info(wil, "FW ready after %d ms. HW version 0x%08x\n",
  1107. jiffies_to_msecs(to-left), wil->hw_version);
  1108. }
  1109. return 0;
  1110. }
  1111. void wil_abort_scan(struct wil6210_vif *vif, bool sync)
  1112. {
  1113. struct wil6210_priv *wil = vif_to_wil(vif);
  1114. int rc;
  1115. struct cfg80211_scan_info info = {
  1116. .aborted = true,
  1117. };
  1118. lockdep_assert_held(&wil->vif_mutex);
  1119. if (!vif->scan_request)
  1120. return;
  1121. wil_dbg_misc(wil, "Abort scan_request 0x%p\n", vif->scan_request);
  1122. del_timer_sync(&vif->scan_timer);
  1123. mutex_unlock(&wil->vif_mutex);
  1124. rc = wmi_abort_scan(vif);
  1125. if (!rc && sync)
  1126. wait_event_interruptible_timeout(wil->wq, !vif->scan_request,
  1127. msecs_to_jiffies(
  1128. WAIT_FOR_SCAN_ABORT_MS));
  1129. mutex_lock(&wil->vif_mutex);
  1130. if (vif->scan_request) {
  1131. cfg80211_scan_done(vif->scan_request, &info);
  1132. vif->scan_request = NULL;
  1133. }
  1134. }
  1135. void wil_abort_scan_all_vifs(struct wil6210_priv *wil, bool sync)
  1136. {
  1137. int i;
  1138. lockdep_assert_held(&wil->vif_mutex);
  1139. for (i = 0; i < wil->max_vifs; i++) {
  1140. struct wil6210_vif *vif = wil->vifs[i];
  1141. if (vif)
  1142. wil_abort_scan(vif, sync);
  1143. }
  1144. }
  1145. int wil_ps_update(struct wil6210_priv *wil, enum wmi_ps_profile_type ps_profile)
  1146. {
  1147. int rc;
  1148. if (!test_bit(WMI_FW_CAPABILITY_PS_CONFIG, wil->fw_capabilities)) {
  1149. wil_err(wil, "set_power_mgmt not supported\n");
  1150. return -EOPNOTSUPP;
  1151. }
  1152. rc = wmi_ps_dev_profile_cfg(wil, ps_profile);
  1153. if (rc)
  1154. wil_err(wil, "wmi_ps_dev_profile_cfg failed (%d)\n", rc);
  1155. else
  1156. wil->ps_profile = ps_profile;
  1157. return rc;
  1158. }
  1159. static void wil_pre_fw_config(struct wil6210_priv *wil)
  1160. {
  1161. /* Mark FW as loaded from host */
  1162. wil_s(wil, RGF_USER_USAGE_6, 1);
  1163. /* clear any interrupts which on-card-firmware
  1164. * may have set
  1165. */
  1166. wil6210_clear_irq(wil);
  1167. /* CAF_ICR - clear and mask */
  1168. /* it is W1C, clear by writing back same value */
  1169. wil_s(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, ICR), 0);
  1170. wil_w(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, IMV), ~0);
  1171. /* clear PAL_UNIT_ICR (potential D0->D3 leftover)
  1172. * In Talyn-MB host cannot access this register due to
  1173. * access control, hence PAL_UNIT_ICR is cleared by the FW
  1174. */
  1175. if (wil->hw_version < HW_VER_TALYN_MB)
  1176. wil_s(wil, RGF_PAL_UNIT_ICR + offsetof(struct RGF_ICR, ICR),
  1177. 0);
  1178. if (wil->fw_calib_result > 0) {
  1179. __le32 val = cpu_to_le32(wil->fw_calib_result |
  1180. (CALIB_RESULT_SIGNATURE << 8));
  1181. wil_w(wil, RGF_USER_FW_CALIB_RESULT, (u32 __force)val);
  1182. }
  1183. }
  1184. static int wil_restore_vifs(struct wil6210_priv *wil)
  1185. {
  1186. struct wil6210_vif *vif;
  1187. struct net_device *ndev;
  1188. struct wireless_dev *wdev;
  1189. int i, rc;
  1190. for (i = 0; i < wil->max_vifs; i++) {
  1191. vif = wil->vifs[i];
  1192. if (!vif)
  1193. continue;
  1194. vif->ap_isolate = 0;
  1195. if (vif->mid) {
  1196. ndev = vif_to_ndev(vif);
  1197. wdev = vif_to_wdev(vif);
  1198. rc = wmi_port_allocate(wil, vif->mid, ndev->dev_addr,
  1199. wdev->iftype);
  1200. if (rc) {
  1201. wil_err(wil, "fail to restore VIF %d type %d, rc %d\n",
  1202. i, wdev->iftype, rc);
  1203. return rc;
  1204. }
  1205. }
  1206. }
  1207. return 0;
  1208. }
  1209. /*
  1210. * We reset all the structures, and we reset the UMAC.
  1211. * After calling this routine, you're expected to reload
  1212. * the firmware.
  1213. */
  1214. int wil_reset(struct wil6210_priv *wil, bool load_fw)
  1215. {
  1216. int rc, i;
  1217. unsigned long status_flags = BIT(wil_status_resetting);
  1218. int no_flash;
  1219. struct wil6210_vif *vif;
  1220. wil_dbg_misc(wil, "reset\n");
  1221. WARN_ON(!mutex_is_locked(&wil->mutex));
  1222. WARN_ON(test_bit(wil_status_napi_en, wil->status));
  1223. if (debug_fw) {
  1224. static const u8 mac[ETH_ALEN] = {
  1225. 0x00, 0xde, 0xad, 0x12, 0x34, 0x56,
  1226. };
  1227. struct net_device *ndev = wil->main_ndev;
  1228. ether_addr_copy(ndev->perm_addr, mac);
  1229. ether_addr_copy(ndev->dev_addr, ndev->perm_addr);
  1230. return 0;
  1231. }
  1232. if (wil->hw_version == HW_VER_UNKNOWN)
  1233. return -ENODEV;
  1234. if (test_bit(WIL_PLATFORM_CAPA_T_PWR_ON_0, wil->platform_capa)) {
  1235. wil_dbg_misc(wil, "Notify FW to set T_POWER_ON=0\n");
  1236. wil_s(wil, RGF_USER_USAGE_8, BIT_USER_SUPPORT_T_POWER_ON_0);
  1237. }
  1238. if (test_bit(WIL_PLATFORM_CAPA_EXT_CLK, wil->platform_capa)) {
  1239. wil_dbg_misc(wil, "Notify FW on ext clock configuration\n");
  1240. wil_s(wil, RGF_USER_USAGE_8, BIT_USER_EXT_CLK);
  1241. }
  1242. if (wil->platform_ops.notify) {
  1243. rc = wil->platform_ops.notify(wil->platform_handle,
  1244. WIL_PLATFORM_EVT_PRE_RESET);
  1245. if (rc)
  1246. wil_err(wil, "PRE_RESET platform notify failed, rc %d\n",
  1247. rc);
  1248. }
  1249. set_bit(wil_status_resetting, wil->status);
  1250. if (test_bit(wil_status_collecting_dumps, wil->status)) {
  1251. /* Device collects crash dump, cancel the reset.
  1252. * following crash dump collection, reset would take place.
  1253. */
  1254. wil_dbg_misc(wil, "reject reset while collecting crash dump\n");
  1255. rc = -EBUSY;
  1256. goto out;
  1257. }
  1258. mutex_lock(&wil->vif_mutex);
  1259. wil_abort_scan_all_vifs(wil, false);
  1260. mutex_unlock(&wil->vif_mutex);
  1261. for (i = 0; i < wil->max_vifs; i++) {
  1262. vif = wil->vifs[i];
  1263. if (vif) {
  1264. cancel_work_sync(&vif->disconnect_worker);
  1265. wil6210_disconnect(vif, NULL,
  1266. WLAN_REASON_DEAUTH_LEAVING, false);
  1267. }
  1268. }
  1269. wil_bcast_fini_all(wil);
  1270. /* Disable device led before reset*/
  1271. wmi_led_cfg(wil, false);
  1272. /* prevent NAPI from being scheduled and prevent wmi commands */
  1273. mutex_lock(&wil->wmi_mutex);
  1274. if (test_bit(wil_status_suspending, wil->status))
  1275. status_flags |= BIT(wil_status_suspending);
  1276. bitmap_and(wil->status, wil->status, &status_flags,
  1277. wil_status_last);
  1278. wil_dbg_misc(wil, "wil->status (0x%lx)\n", *wil->status);
  1279. mutex_unlock(&wil->wmi_mutex);
  1280. wil_mask_irq(wil);
  1281. wmi_event_flush(wil);
  1282. flush_workqueue(wil->wq_service);
  1283. flush_workqueue(wil->wmi_wq);
  1284. no_flash = test_bit(hw_capa_no_flash, wil->hw_capa);
  1285. if (!no_flash)
  1286. wil_bl_crash_info(wil, false);
  1287. wil_disable_irq(wil);
  1288. rc = wil_target_reset(wil, no_flash);
  1289. wil6210_clear_irq(wil);
  1290. wil_enable_irq(wil);
  1291. wil->txrx_ops.rx_fini(wil);
  1292. wil->txrx_ops.tx_fini(wil);
  1293. if (rc) {
  1294. if (!no_flash)
  1295. wil_bl_crash_info(wil, true);
  1296. goto out;
  1297. }
  1298. if (no_flash) {
  1299. rc = wil_get_otp_info(wil);
  1300. } else {
  1301. rc = wil_get_bl_info(wil);
  1302. if (rc == -EAGAIN && !load_fw)
  1303. /* ignore RF error if not going up */
  1304. rc = 0;
  1305. }
  1306. if (rc)
  1307. goto out;
  1308. wil_set_oob_mode(wil, oob_mode);
  1309. if (load_fw) {
  1310. char board_file[WIL_BOARD_FILE_MAX_NAMELEN];
  1311. if (wil->secured_boot) {
  1312. wil_err(wil, "secured boot is not supported\n");
  1313. return -ENOTSUPP;
  1314. }
  1315. board_file[0] = '\0';
  1316. wil_get_board_file(wil, board_file, sizeof(board_file));
  1317. wil_info(wil, "Use firmware <%s> + board <%s>\n",
  1318. wil->wil_fw_name, board_file);
  1319. if (!no_flash)
  1320. wil_bl_prepare_halt(wil);
  1321. wil_halt_cpu(wil);
  1322. memset(wil->fw_version, 0, sizeof(wil->fw_version));
  1323. /* Loading f/w from the file */
  1324. rc = wil_request_firmware(wil, wil->wil_fw_name, true);
  1325. if (rc)
  1326. goto out;
  1327. if (wil->brd_file_addr)
  1328. rc = wil_request_board(wil, board_file);
  1329. else
  1330. rc = wil_request_firmware(wil, board_file, true);
  1331. if (rc)
  1332. goto out;
  1333. wil_pre_fw_config(wil);
  1334. wil_release_cpu(wil);
  1335. }
  1336. /* init after reset */
  1337. reinit_completion(&wil->wmi_ready);
  1338. reinit_completion(&wil->wmi_call);
  1339. reinit_completion(&wil->halp.comp);
  1340. clear_bit(wil_status_resetting, wil->status);
  1341. if (load_fw) {
  1342. wil_unmask_irq(wil);
  1343. /* we just started MAC, wait for FW ready */
  1344. rc = wil_wait_for_fw_ready(wil);
  1345. if (rc)
  1346. return rc;
  1347. /* check FW is responsive */
  1348. rc = wmi_echo(wil);
  1349. if (rc) {
  1350. wil_err(wil, "wmi_echo failed, rc %d\n", rc);
  1351. return rc;
  1352. }
  1353. wil->txrx_ops.configure_interrupt_moderation(wil);
  1354. /* Enable OFU rdy valid bug fix, to prevent hang in oful34_rx
  1355. * while there is back-pressure from Host during RX
  1356. */
  1357. if (wil->hw_version >= HW_VER_TALYN_MB)
  1358. wil_s(wil, RGF_DMA_MISC_CTL,
  1359. BIT_OFUL34_RDY_VALID_BUG_FIX_EN);
  1360. rc = wil_restore_vifs(wil);
  1361. if (rc) {
  1362. wil_err(wil, "failed to restore vifs, rc %d\n", rc);
  1363. return rc;
  1364. }
  1365. wil_collect_fw_info(wil);
  1366. if (wil->ps_profile != WMI_PS_PROFILE_TYPE_DEFAULT)
  1367. wil_ps_update(wil, wil->ps_profile);
  1368. if (wil->platform_ops.notify) {
  1369. rc = wil->platform_ops.notify(wil->platform_handle,
  1370. WIL_PLATFORM_EVT_FW_RDY);
  1371. if (rc) {
  1372. wil_err(wil, "FW_RDY notify failed, rc %d\n",
  1373. rc);
  1374. rc = 0;
  1375. }
  1376. }
  1377. }
  1378. return rc;
  1379. out:
  1380. clear_bit(wil_status_resetting, wil->status);
  1381. return rc;
  1382. }
  1383. void wil_fw_error_recovery(struct wil6210_priv *wil)
  1384. {
  1385. wil_dbg_misc(wil, "starting fw error recovery\n");
  1386. if (test_bit(wil_status_resetting, wil->status)) {
  1387. wil_info(wil, "Reset already in progress\n");
  1388. return;
  1389. }
  1390. wil->recovery_state = fw_recovery_pending;
  1391. schedule_work(&wil->fw_error_worker);
  1392. }
  1393. int __wil_up(struct wil6210_priv *wil)
  1394. {
  1395. struct net_device *ndev = wil->main_ndev;
  1396. struct wireless_dev *wdev = ndev->ieee80211_ptr;
  1397. int rc;
  1398. WARN_ON(!mutex_is_locked(&wil->mutex));
  1399. rc = wil_reset(wil, true);
  1400. if (rc)
  1401. return rc;
  1402. /* Rx RING. After MAC and beacon */
  1403. rc = wil->txrx_ops.rx_init(wil, 1 << rx_ring_order);
  1404. if (rc)
  1405. return rc;
  1406. rc = wil->txrx_ops.tx_init(wil);
  1407. if (rc)
  1408. return rc;
  1409. switch (wdev->iftype) {
  1410. case NL80211_IFTYPE_STATION:
  1411. wil_dbg_misc(wil, "type: STATION\n");
  1412. ndev->type = ARPHRD_ETHER;
  1413. break;
  1414. case NL80211_IFTYPE_AP:
  1415. wil_dbg_misc(wil, "type: AP\n");
  1416. ndev->type = ARPHRD_ETHER;
  1417. break;
  1418. case NL80211_IFTYPE_P2P_CLIENT:
  1419. wil_dbg_misc(wil, "type: P2P_CLIENT\n");
  1420. ndev->type = ARPHRD_ETHER;
  1421. break;
  1422. case NL80211_IFTYPE_P2P_GO:
  1423. wil_dbg_misc(wil, "type: P2P_GO\n");
  1424. ndev->type = ARPHRD_ETHER;
  1425. break;
  1426. case NL80211_IFTYPE_MONITOR:
  1427. wil_dbg_misc(wil, "type: Monitor\n");
  1428. ndev->type = ARPHRD_IEEE80211_RADIOTAP;
  1429. /* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_RADIOTAP ? */
  1430. break;
  1431. default:
  1432. return -EOPNOTSUPP;
  1433. }
  1434. /* MAC address - pre-requisite for other commands */
  1435. wmi_set_mac_address(wil, ndev->dev_addr);
  1436. wil_dbg_misc(wil, "NAPI enable\n");
  1437. napi_enable(&wil->napi_rx);
  1438. napi_enable(&wil->napi_tx);
  1439. set_bit(wil_status_napi_en, wil->status);
  1440. wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
  1441. return 0;
  1442. }
  1443. int wil_up(struct wil6210_priv *wil)
  1444. {
  1445. int rc;
  1446. wil_dbg_misc(wil, "up\n");
  1447. mutex_lock(&wil->mutex);
  1448. rc = __wil_up(wil);
  1449. mutex_unlock(&wil->mutex);
  1450. return rc;
  1451. }
  1452. int __wil_down(struct wil6210_priv *wil)
  1453. {
  1454. WARN_ON(!mutex_is_locked(&wil->mutex));
  1455. set_bit(wil_status_resetting, wil->status);
  1456. wil6210_bus_request(wil, 0);
  1457. wil_disable_irq(wil);
  1458. if (test_and_clear_bit(wil_status_napi_en, wil->status)) {
  1459. napi_disable(&wil->napi_rx);
  1460. napi_disable(&wil->napi_tx);
  1461. wil_dbg_misc(wil, "NAPI disable\n");
  1462. }
  1463. wil_enable_irq(wil);
  1464. mutex_lock(&wil->vif_mutex);
  1465. wil_p2p_stop_radio_operations(wil);
  1466. wil_abort_scan_all_vifs(wil, false);
  1467. mutex_unlock(&wil->vif_mutex);
  1468. return wil_reset(wil, false);
  1469. }
  1470. int wil_down(struct wil6210_priv *wil)
  1471. {
  1472. int rc;
  1473. wil_dbg_misc(wil, "down\n");
  1474. wil_set_recovery_state(wil, fw_recovery_idle);
  1475. mutex_lock(&wil->mutex);
  1476. rc = __wil_down(wil);
  1477. mutex_unlock(&wil->mutex);
  1478. return rc;
  1479. }
  1480. int wil_find_cid(struct wil6210_priv *wil, u8 mid, const u8 *mac)
  1481. {
  1482. int i;
  1483. int rc = -ENOENT;
  1484. for (i = 0; i < ARRAY_SIZE(wil->sta); i++) {
  1485. if (wil->sta[i].mid == mid &&
  1486. wil->sta[i].status != wil_sta_unused &&
  1487. ether_addr_equal(wil->sta[i].addr, mac)) {
  1488. rc = i;
  1489. break;
  1490. }
  1491. }
  1492. return rc;
  1493. }
  1494. void wil_halp_vote(struct wil6210_priv *wil)
  1495. {
  1496. unsigned long rc;
  1497. unsigned long to_jiffies = msecs_to_jiffies(WAIT_FOR_HALP_VOTE_MS);
  1498. mutex_lock(&wil->halp.lock);
  1499. wil_dbg_irq(wil, "halp_vote: start, HALP ref_cnt (%d)\n",
  1500. wil->halp.ref_cnt);
  1501. if (++wil->halp.ref_cnt == 1) {
  1502. reinit_completion(&wil->halp.comp);
  1503. wil6210_set_halp(wil);
  1504. rc = wait_for_completion_timeout(&wil->halp.comp, to_jiffies);
  1505. if (!rc) {
  1506. wil_err(wil, "HALP vote timed out\n");
  1507. /* Mask HALP as done in case the interrupt is raised */
  1508. wil6210_mask_halp(wil);
  1509. } else {
  1510. wil_dbg_irq(wil,
  1511. "halp_vote: HALP vote completed after %d ms\n",
  1512. jiffies_to_msecs(to_jiffies - rc));
  1513. }
  1514. }
  1515. wil_dbg_irq(wil, "halp_vote: end, HALP ref_cnt (%d)\n",
  1516. wil->halp.ref_cnt);
  1517. mutex_unlock(&wil->halp.lock);
  1518. }
  1519. void wil_halp_unvote(struct wil6210_priv *wil)
  1520. {
  1521. WARN_ON(wil->halp.ref_cnt == 0);
  1522. mutex_lock(&wil->halp.lock);
  1523. wil_dbg_irq(wil, "halp_unvote: start, HALP ref_cnt (%d)\n",
  1524. wil->halp.ref_cnt);
  1525. if (--wil->halp.ref_cnt == 0) {
  1526. wil6210_clear_halp(wil);
  1527. wil_dbg_irq(wil, "HALP unvote\n");
  1528. }
  1529. wil_dbg_irq(wil, "halp_unvote:end, HALP ref_cnt (%d)\n",
  1530. wil->halp.ref_cnt);
  1531. mutex_unlock(&wil->halp.lock);
  1532. }
  1533. void wil_init_txrx_ops(struct wil6210_priv *wil)
  1534. {
  1535. if (wil->use_enhanced_dma_hw)
  1536. wil_init_txrx_ops_edma(wil);
  1537. else
  1538. wil_init_txrx_ops_legacy_dma(wil);
  1539. }