wmi.c 300 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
  4. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  5. *
  6. * Permission to use, copy, modify, and/or distribute this software for any
  7. * purpose with or without fee is hereby granted, provided that the above
  8. * copyright notice and this permission notice appear in all copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <linux/skbuff.h>
  19. #include <linux/ctype.h>
  20. #include "core.h"
  21. #include "htc.h"
  22. #include "debug.h"
  23. #include "wmi.h"
  24. #include "wmi-tlv.h"
  25. #include "mac.h"
  26. #include "testmode.h"
  27. #include "wmi-ops.h"
  28. #include "p2p.h"
  29. #include "hw.h"
  30. #include "hif.h"
  31. #include "txrx.h"
  32. #define ATH10K_WMI_BARRIER_ECHO_ID 0xBA991E9
  33. #define ATH10K_WMI_BARRIER_TIMEOUT_HZ (3 * HZ)
  34. #define ATH10K_WMI_DFS_CONF_TIMEOUT_HZ (HZ / 6)
  35. /* MAIN WMI cmd track */
  36. static struct wmi_cmd_map wmi_cmd_map = {
  37. .init_cmdid = WMI_INIT_CMDID,
  38. .start_scan_cmdid = WMI_START_SCAN_CMDID,
  39. .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
  40. .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
  41. .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
  42. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  43. .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
  44. .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
  45. .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
  46. .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
  47. .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
  48. .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
  49. .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
  50. .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
  51. .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
  52. .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
  53. .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  54. .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
  55. .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
  56. .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
  57. .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
  58. .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
  59. .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
  60. .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
  61. .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
  62. .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
  63. .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
  64. .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
  65. .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
  66. .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
  67. .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
  68. .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
  69. .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
  70. .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
  71. .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
  72. .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
  73. .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
  74. .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
  75. .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
  76. .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
  77. .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
  78. .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
  79. .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
  80. .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
  81. .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
  82. .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
  83. .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
  84. .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
  85. .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
  86. .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
  87. .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
  88. .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
  89. .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
  90. .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
  91. .roam_scan_mode = WMI_ROAM_SCAN_MODE,
  92. .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
  93. .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
  94. .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  95. .roam_ap_profile = WMI_ROAM_AP_PROFILE,
  96. .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
  97. .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
  98. .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
  99. .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
  100. .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
  101. .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
  102. .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
  103. .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
  104. .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
  105. .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
  106. .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
  107. .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
  108. .wlan_profile_set_hist_intvl_cmdid =
  109. WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  110. .wlan_profile_get_profile_data_cmdid =
  111. WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  112. .wlan_profile_enable_profile_id_cmdid =
  113. WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  114. .wlan_profile_list_profile_id_cmdid =
  115. WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  116. .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
  117. .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
  118. .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
  119. .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
  120. .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
  121. .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
  122. .wow_enable_disable_wake_event_cmdid =
  123. WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  124. .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
  125. .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  126. .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
  127. .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
  128. .vdev_spectral_scan_configure_cmdid =
  129. WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  130. .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  131. .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
  132. .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
  133. .network_list_offload_config_cmdid =
  134. WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
  135. .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
  136. .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
  137. .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
  138. .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
  139. .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
  140. .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
  141. .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
  142. .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
  143. .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
  144. .echo_cmdid = WMI_ECHO_CMDID,
  145. .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
  146. .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
  147. .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
  148. .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
  149. .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
  150. .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
  151. .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
  152. .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
  153. .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
  154. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  155. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  156. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  157. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  158. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  159. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  160. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  161. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  162. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  163. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  164. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  165. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  166. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  167. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  168. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  169. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  170. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  171. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  172. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  173. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  174. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  175. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  176. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  177. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  178. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  179. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  180. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  181. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  182. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  183. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  184. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  185. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  186. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  187. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  188. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  189. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  190. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  191. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  192. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  193. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  194. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  195. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  196. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  197. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  198. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  199. .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
  200. };
  201. /* 10.X WMI cmd track */
  202. static struct wmi_cmd_map wmi_10x_cmd_map = {
  203. .init_cmdid = WMI_10X_INIT_CMDID,
  204. .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
  205. .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
  206. .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
  207. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  208. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  209. .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
  210. .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
  211. .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
  212. .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
  213. .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
  214. .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
  215. .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
  216. .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
  217. .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
  218. .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
  219. .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  220. .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
  221. .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
  222. .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
  223. .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
  224. .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
  225. .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
  226. .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
  227. .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
  228. .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
  229. .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
  230. .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
  231. .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
  232. .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
  233. .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
  234. .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
  235. .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
  236. .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
  237. .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
  238. .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
  239. .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
  240. .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
  241. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  242. .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
  243. .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
  244. .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
  245. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  246. .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
  247. .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
  248. .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
  249. .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
  250. .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
  251. .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
  252. .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
  253. .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
  254. .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
  255. .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
  256. .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
  257. .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
  258. .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
  259. .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
  260. .roam_scan_rssi_change_threshold =
  261. WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  262. .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
  263. .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
  264. .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
  265. .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
  266. .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
  267. .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
  268. .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
  269. .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
  270. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  271. .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
  272. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  273. .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
  274. .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
  275. .wlan_profile_set_hist_intvl_cmdid =
  276. WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  277. .wlan_profile_get_profile_data_cmdid =
  278. WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  279. .wlan_profile_enable_profile_id_cmdid =
  280. WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  281. .wlan_profile_list_profile_id_cmdid =
  282. WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  283. .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
  284. .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
  285. .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
  286. .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
  287. .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
  288. .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
  289. .wow_enable_disable_wake_event_cmdid =
  290. WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  291. .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
  292. .wow_hostwakeup_from_sleep_cmdid =
  293. WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  294. .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
  295. .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
  296. .vdev_spectral_scan_configure_cmdid =
  297. WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  298. .vdev_spectral_scan_enable_cmdid =
  299. WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  300. .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
  301. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  302. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  303. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  304. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  305. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  306. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  307. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  308. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  309. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  310. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  311. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  312. .echo_cmdid = WMI_10X_ECHO_CMDID,
  313. .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
  314. .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
  315. .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
  316. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  317. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  318. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  319. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  320. .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
  321. .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
  322. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  323. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  324. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  325. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  326. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  327. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  328. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  329. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  330. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  331. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  332. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  333. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  334. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  335. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  336. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  337. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  338. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  339. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  340. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  341. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  342. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  343. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  344. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  345. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  346. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  347. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  348. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  349. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  350. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  351. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  352. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  353. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  354. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  355. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  356. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  357. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  358. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  359. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  360. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  361. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  362. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  363. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  364. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  365. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  366. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  367. .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
  368. };
  369. /* 10.2.4 WMI cmd track */
  370. static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
  371. .init_cmdid = WMI_10_2_INIT_CMDID,
  372. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  373. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  374. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  375. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  376. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  377. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  378. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  379. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  380. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  381. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  382. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  383. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  384. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  385. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  386. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  387. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  388. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  389. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  390. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  391. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  392. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  393. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  394. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  395. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  396. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  397. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  398. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  399. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  400. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  401. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  402. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  403. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  404. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  405. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  406. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  407. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  408. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  409. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  410. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  411. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  412. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  413. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  414. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  415. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  416. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  417. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  418. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  419. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  420. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  421. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  422. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  423. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  424. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  425. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  426. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  427. .roam_scan_rssi_change_threshold =
  428. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  429. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  430. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  431. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  432. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  433. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  434. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  435. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  436. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  437. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  438. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  439. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  440. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  441. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  442. .wlan_profile_set_hist_intvl_cmdid =
  443. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  444. .wlan_profile_get_profile_data_cmdid =
  445. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  446. .wlan_profile_enable_profile_id_cmdid =
  447. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  448. .wlan_profile_list_profile_id_cmdid =
  449. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  450. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  451. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  452. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  453. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  454. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  455. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  456. .wow_enable_disable_wake_event_cmdid =
  457. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  458. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  459. .wow_hostwakeup_from_sleep_cmdid =
  460. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  461. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  462. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  463. .vdev_spectral_scan_configure_cmdid =
  464. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  465. .vdev_spectral_scan_enable_cmdid =
  466. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  467. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  468. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  469. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  470. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  471. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  472. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  473. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  474. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  475. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  476. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  477. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  478. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  479. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  480. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  481. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  482. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  483. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  484. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  485. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  486. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  487. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  488. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  489. .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
  490. .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
  491. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  492. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  493. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  494. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  495. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  496. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  497. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  498. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  499. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  500. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  501. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  502. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  503. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  504. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  505. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  506. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  507. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  508. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  509. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  510. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  511. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  512. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  513. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  514. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  515. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  516. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  517. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  518. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  519. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  520. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  521. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  522. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  523. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  524. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  525. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  526. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  527. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  528. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  529. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  530. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  531. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  532. .pdev_bss_chan_info_request_cmdid =
  533. WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  534. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  535. .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
  536. };
  537. /* 10.4 WMI cmd track */
  538. static struct wmi_cmd_map wmi_10_4_cmd_map = {
  539. .init_cmdid = WMI_10_4_INIT_CMDID,
  540. .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
  541. .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
  542. .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
  543. .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
  544. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  545. .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
  546. .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
  547. .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
  548. .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
  549. .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
  550. .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
  551. .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
  552. .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
  553. .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
  554. .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
  555. .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  556. .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
  557. .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
  558. .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
  559. .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
  560. .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
  561. .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
  562. .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
  563. .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
  564. .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
  565. .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
  566. .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
  567. .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
  568. .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
  569. .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
  570. .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
  571. .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
  572. .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
  573. .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
  574. .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
  575. .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
  576. .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
  577. .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
  578. .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
  579. .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
  580. .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
  581. .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
  582. .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
  583. .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
  584. .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
  585. .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
  586. .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
  587. .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
  588. .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
  589. .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
  590. .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
  591. .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
  592. .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
  593. .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
  594. .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
  595. .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
  596. .roam_scan_rssi_change_threshold =
  597. WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  598. .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
  599. .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
  600. .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
  601. .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
  602. .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
  603. .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
  604. .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
  605. .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
  606. .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
  607. .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
  608. .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
  609. .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
  610. .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
  611. .wlan_profile_set_hist_intvl_cmdid =
  612. WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  613. .wlan_profile_get_profile_data_cmdid =
  614. WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  615. .wlan_profile_enable_profile_id_cmdid =
  616. WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  617. .wlan_profile_list_profile_id_cmdid =
  618. WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  619. .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
  620. .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
  621. .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
  622. .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
  623. .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
  624. .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
  625. .wow_enable_disable_wake_event_cmdid =
  626. WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  627. .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
  628. .wow_hostwakeup_from_sleep_cmdid =
  629. WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  630. .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
  631. .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
  632. .vdev_spectral_scan_configure_cmdid =
  633. WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  634. .vdev_spectral_scan_enable_cmdid =
  635. WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  636. .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
  637. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  638. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  639. .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
  640. .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
  641. .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
  642. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  643. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  644. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  645. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  646. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  647. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  648. .echo_cmdid = WMI_10_4_ECHO_CMDID,
  649. .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
  650. .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
  651. .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
  652. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  653. .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
  654. .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
  655. .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
  656. .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
  657. .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
  658. .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
  659. .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
  660. .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
  661. .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
  662. .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
  663. .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
  664. .wlan_peer_caching_add_peer_cmdid =
  665. WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
  666. .wlan_peer_caching_evict_peer_cmdid =
  667. WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
  668. .wlan_peer_caching_restore_peer_cmdid =
  669. WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
  670. .wlan_peer_caching_print_all_peers_info_cmdid =
  671. WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
  672. .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
  673. .peer_add_proxy_sta_entry_cmdid =
  674. WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
  675. .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
  676. .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
  677. .nan_cmdid = WMI_10_4_NAN_CMDID,
  678. .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
  679. .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
  680. .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
  681. .pdev_smart_ant_set_rx_antenna_cmdid =
  682. WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
  683. .peer_smart_ant_set_tx_antenna_cmdid =
  684. WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
  685. .peer_smart_ant_set_train_info_cmdid =
  686. WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
  687. .peer_smart_ant_set_node_config_ops_cmdid =
  688. WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
  689. .pdev_set_antenna_switch_table_cmdid =
  690. WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
  691. .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
  692. .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
  693. .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
  694. .pdev_ratepwr_chainmsk_table_cmdid =
  695. WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
  696. .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
  697. .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
  698. .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
  699. .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
  700. .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
  701. .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
  702. .pdev_get_ani_ofdm_config_cmdid =
  703. WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
  704. .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
  705. .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
  706. .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
  707. .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
  708. .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
  709. .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
  710. .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
  711. .vdev_filter_neighbor_rx_packets_cmdid =
  712. WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
  713. .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
  714. .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
  715. .pdev_bss_chan_info_request_cmdid =
  716. WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  717. .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
  718. .vdev_set_ie_cmdid = WMI_10_4_VDEV_SET_IE_CMDID,
  719. .set_lteu_config_cmdid = WMI_10_4_SET_LTEU_CONFIG_CMDID,
  720. .atf_ssid_grouping_request_cmdid =
  721. WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
  722. .peer_atf_ext_request_cmdid = WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
  723. .set_periodic_channel_stats_cfg_cmdid =
  724. WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
  725. .peer_bwf_request_cmdid = WMI_10_4_PEER_BWF_REQUEST_CMDID,
  726. .btcoex_cfg_cmdid = WMI_10_4_BTCOEX_CFG_CMDID,
  727. .peer_tx_mu_txmit_count_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
  728. .peer_tx_mu_txmit_rstcnt_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
  729. .peer_gid_userpos_list_cmdid = WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
  730. .pdev_check_cal_version_cmdid = WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
  731. .coex_version_cfg_cmid = WMI_10_4_COEX_VERSION_CFG_CMID,
  732. .pdev_get_rx_filter_cmdid = WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
  733. .pdev_extended_nss_cfg_cmdid = WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
  734. .vdev_set_scan_nac_rssi_cmdid = WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
  735. .prog_gpio_band_select_cmdid = WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
  736. .config_smart_logging_cmdid = WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
  737. .debug_fatal_condition_cmdid = WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
  738. .get_tsf_timer_cmdid = WMI_10_4_GET_TSF_TIMER_CMDID,
  739. .pdev_get_tpc_table_cmdid = WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
  740. .vdev_sifs_trigger_time_cmdid = WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
  741. .pdev_wds_entry_list_cmdid = WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
  742. .tdls_set_state_cmdid = WMI_10_4_TDLS_SET_STATE_CMDID,
  743. .tdls_peer_update_cmdid = WMI_10_4_TDLS_PEER_UPDATE_CMDID,
  744. .tdls_set_offchan_mode_cmdid = WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
  745. .radar_found_cmdid = WMI_10_4_RADAR_FOUND_CMDID,
  746. };
  747. /* MAIN WMI VDEV param map */
  748. static struct wmi_vdev_param_map wmi_vdev_param_map = {
  749. .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
  750. .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  751. .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
  752. .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
  753. .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
  754. .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
  755. .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
  756. .preamble = WMI_VDEV_PARAM_PREAMBLE,
  757. .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
  758. .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
  759. .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
  760. .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
  761. .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
  762. .wmi_vdev_oc_scheduler_air_time_limit =
  763. WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  764. .wds = WMI_VDEV_PARAM_WDS,
  765. .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
  766. .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
  767. .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
  768. .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
  769. .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
  770. .chwidth = WMI_VDEV_PARAM_CHWIDTH,
  771. .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
  772. .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
  773. .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
  774. .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
  775. .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
  776. .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
  777. .sgi = WMI_VDEV_PARAM_SGI,
  778. .ldpc = WMI_VDEV_PARAM_LDPC,
  779. .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
  780. .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
  781. .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
  782. .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
  783. .nss = WMI_VDEV_PARAM_NSS,
  784. .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
  785. .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
  786. .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
  787. .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
  788. .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  789. .ap_keepalive_min_idle_inactive_time_secs =
  790. WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  791. .ap_keepalive_max_idle_inactive_time_secs =
  792. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  793. .ap_keepalive_max_unresponsive_time_secs =
  794. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  795. .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
  796. .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
  797. .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
  798. .txbf = WMI_VDEV_PARAM_TXBF,
  799. .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
  800. .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
  801. .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
  802. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  803. WMI_VDEV_PARAM_UNSUPPORTED,
  804. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  805. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  806. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  807. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  808. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  809. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  810. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  811. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  812. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  813. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  814. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  815. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  816. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  817. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  818. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  819. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  820. };
  821. /* 10.X WMI VDEV param map */
  822. static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
  823. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  824. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  825. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  826. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  827. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  828. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  829. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  830. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  831. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  832. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  833. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  834. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  835. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  836. .wmi_vdev_oc_scheduler_air_time_limit =
  837. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  838. .wds = WMI_10X_VDEV_PARAM_WDS,
  839. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  840. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  841. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  842. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  843. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  844. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  845. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  846. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  847. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  848. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  849. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  850. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  851. .sgi = WMI_10X_VDEV_PARAM_SGI,
  852. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  853. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  854. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  855. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  856. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  857. .nss = WMI_10X_VDEV_PARAM_NSS,
  858. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  859. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  860. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  861. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  862. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  863. .ap_keepalive_min_idle_inactive_time_secs =
  864. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  865. .ap_keepalive_max_idle_inactive_time_secs =
  866. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  867. .ap_keepalive_max_unresponsive_time_secs =
  868. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  869. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  870. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  871. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  872. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  873. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  874. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  875. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  876. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  877. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  878. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  879. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  880. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  881. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  882. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  883. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  884. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  885. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  886. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  887. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  888. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  889. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  890. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  891. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  892. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  893. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  894. };
  895. static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
  896. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  897. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  898. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  899. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  900. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  901. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  902. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  903. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  904. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  905. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  906. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  907. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  908. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  909. .wmi_vdev_oc_scheduler_air_time_limit =
  910. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  911. .wds = WMI_10X_VDEV_PARAM_WDS,
  912. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  913. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  914. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  915. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  916. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  917. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  918. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  919. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  920. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  921. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  922. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  923. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  924. .sgi = WMI_10X_VDEV_PARAM_SGI,
  925. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  926. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  927. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  928. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  929. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  930. .nss = WMI_10X_VDEV_PARAM_NSS,
  931. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  932. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  933. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  934. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  935. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  936. .ap_keepalive_min_idle_inactive_time_secs =
  937. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  938. .ap_keepalive_max_idle_inactive_time_secs =
  939. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  940. .ap_keepalive_max_unresponsive_time_secs =
  941. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  942. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  943. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  944. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  945. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  946. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  947. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  948. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  949. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  950. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  951. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  952. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  953. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  954. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  955. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  956. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  957. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  958. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  959. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  960. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  961. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  962. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  963. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  964. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  965. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  966. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  967. };
  968. static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
  969. .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
  970. .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  971. .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
  972. .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
  973. .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
  974. .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
  975. .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
  976. .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
  977. .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
  978. .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
  979. .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
  980. .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
  981. .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
  982. .wmi_vdev_oc_scheduler_air_time_limit =
  983. WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  984. .wds = WMI_10_4_VDEV_PARAM_WDS,
  985. .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
  986. .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
  987. .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
  988. .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
  989. .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
  990. .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
  991. .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
  992. .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
  993. .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
  994. .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
  995. .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
  996. .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
  997. .sgi = WMI_10_4_VDEV_PARAM_SGI,
  998. .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
  999. .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
  1000. .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
  1001. .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
  1002. .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
  1003. .nss = WMI_10_4_VDEV_PARAM_NSS,
  1004. .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
  1005. .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
  1006. .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
  1007. .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
  1008. .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  1009. .ap_keepalive_min_idle_inactive_time_secs =
  1010. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  1011. .ap_keepalive_max_idle_inactive_time_secs =
  1012. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  1013. .ap_keepalive_max_unresponsive_time_secs =
  1014. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  1015. .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
  1016. .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
  1017. .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
  1018. .txbf = WMI_10_4_VDEV_PARAM_TXBF,
  1019. .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
  1020. .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
  1021. .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
  1022. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  1023. WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  1024. .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
  1025. .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
  1026. .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
  1027. .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
  1028. .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
  1029. .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
  1030. .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
  1031. .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
  1032. .early_rx_bmiss_sample_cycle =
  1033. WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
  1034. .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
  1035. .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
  1036. .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
  1037. .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
  1038. .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
  1039. .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
  1040. .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
  1041. .inc_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
  1042. .dec_tsf = WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
  1043. };
  1044. static struct wmi_pdev_param_map wmi_pdev_param_map = {
  1045. .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
  1046. .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
  1047. .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
  1048. .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
  1049. .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
  1050. .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
  1051. .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
  1052. .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1053. .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
  1054. .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
  1055. .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1056. .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
  1057. .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
  1058. .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1059. .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
  1060. .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1061. .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1062. .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1063. .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1064. .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1065. .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1066. .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
  1067. .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1068. .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
  1069. .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
  1070. .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1071. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1072. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1073. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1074. .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1075. .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1076. .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1077. .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1078. .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
  1079. .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
  1080. .dcs = WMI_PDEV_PARAM_DCS,
  1081. .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
  1082. .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
  1083. .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1084. .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
  1085. .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
  1086. .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
  1087. .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
  1088. .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
  1089. .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
  1090. .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1091. .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
  1092. .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1093. .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
  1094. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1095. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1096. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1097. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1098. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1099. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1100. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1101. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1102. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1103. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1104. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1105. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1106. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1107. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1108. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1109. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1110. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1111. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1112. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1113. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1114. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1115. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1116. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1117. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1118. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1119. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1120. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1121. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1122. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1123. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1124. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1125. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1126. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1127. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1128. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1129. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1130. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1131. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1132. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1133. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1134. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1135. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1136. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1137. };
  1138. static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
  1139. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1140. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1141. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1142. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1143. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1144. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1145. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1146. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1147. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1148. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1149. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1150. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1151. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1152. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1153. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1154. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1155. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1156. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1157. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1158. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1159. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1160. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1161. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1162. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1163. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1164. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1165. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1166. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1167. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1168. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1169. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1170. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1171. .bcnflt_stats_update_period =
  1172. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1173. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1174. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1175. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1176. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1177. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1178. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1179. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1180. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1181. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1182. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1183. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1184. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1185. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1186. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1187. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1188. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1189. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1190. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1191. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1192. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1193. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1194. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1195. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1196. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1197. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1198. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1199. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1200. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1201. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1202. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1203. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1204. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1205. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1206. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1207. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1208. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1209. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1210. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1211. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1212. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1213. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1214. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1215. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1216. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1217. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1218. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1219. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1220. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1221. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1222. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1223. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1224. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1225. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1226. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1227. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1228. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1229. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1230. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1231. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1232. };
  1233. static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
  1234. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1235. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1236. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1237. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1238. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1239. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1240. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1241. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1242. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1243. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1244. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1245. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1246. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1247. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1248. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1249. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1250. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1251. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1252. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1253. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1254. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1255. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1256. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1257. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1258. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1259. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1260. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1261. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1262. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1263. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1264. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1265. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1266. .bcnflt_stats_update_period =
  1267. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1268. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1269. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1270. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1271. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1272. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1273. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1274. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1275. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1276. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1277. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1278. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1279. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1280. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1281. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1282. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1283. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1284. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1285. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1286. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1287. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1288. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1289. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1290. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1291. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1292. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1293. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1294. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1295. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1296. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1297. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1298. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1299. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1300. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1301. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1302. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1303. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1304. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1305. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1306. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1307. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1308. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1309. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1310. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1311. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1312. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1313. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1314. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1315. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1316. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1317. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1318. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1319. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1320. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1321. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1322. .pdev_reset = WMI_10X_PDEV_PARAM_PDEV_RESET,
  1323. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1324. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1325. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1326. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1327. };
  1328. /* firmware 10.2 specific mappings */
  1329. static struct wmi_cmd_map wmi_10_2_cmd_map = {
  1330. .init_cmdid = WMI_10_2_INIT_CMDID,
  1331. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  1332. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  1333. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  1334. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  1335. .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
  1336. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  1337. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  1338. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  1339. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  1340. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  1341. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  1342. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  1343. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  1344. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  1345. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  1346. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  1347. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  1348. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  1349. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  1350. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  1351. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  1352. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  1353. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  1354. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  1355. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  1356. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  1357. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  1358. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  1359. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  1360. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  1361. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  1362. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  1363. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  1364. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  1365. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  1366. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  1367. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1368. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  1369. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  1370. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  1371. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1372. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  1373. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  1374. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  1375. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  1376. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  1377. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  1378. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  1379. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  1380. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  1381. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  1382. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  1383. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  1384. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  1385. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  1386. .roam_scan_rssi_change_threshold =
  1387. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  1388. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  1389. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  1390. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  1391. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  1392. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  1393. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  1394. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  1395. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  1396. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  1397. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  1398. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  1399. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  1400. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  1401. .wlan_profile_set_hist_intvl_cmdid =
  1402. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  1403. .wlan_profile_get_profile_data_cmdid =
  1404. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  1405. .wlan_profile_enable_profile_id_cmdid =
  1406. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  1407. .wlan_profile_list_profile_id_cmdid =
  1408. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  1409. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  1410. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  1411. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  1412. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  1413. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  1414. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  1415. .wow_enable_disable_wake_event_cmdid =
  1416. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  1417. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  1418. .wow_hostwakeup_from_sleep_cmdid =
  1419. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  1420. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  1421. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  1422. .vdev_spectral_scan_configure_cmdid =
  1423. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  1424. .vdev_spectral_scan_enable_cmdid =
  1425. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  1426. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  1427. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1428. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  1429. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1430. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1431. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  1432. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  1433. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  1434. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  1435. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  1436. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  1437. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  1438. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  1439. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  1440. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  1441. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  1442. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  1443. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1444. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1445. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  1446. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  1447. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  1448. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  1449. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  1450. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  1451. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  1452. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  1453. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1454. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1455. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1456. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  1457. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1458. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1459. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1460. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  1461. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  1462. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  1463. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  1464. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1465. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1466. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1467. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  1468. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  1469. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  1470. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  1471. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  1472. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  1473. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  1474. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  1475. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  1476. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  1477. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1478. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1479. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  1480. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  1481. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1482. .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
  1483. .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
  1484. };
  1485. static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
  1486. .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
  1487. .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
  1488. .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
  1489. .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
  1490. .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
  1491. .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
  1492. .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
  1493. .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1494. .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
  1495. .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
  1496. .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1497. .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
  1498. .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
  1499. .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1500. .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
  1501. .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1502. .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1503. .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1504. .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1505. .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1506. .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1507. .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
  1508. .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1509. .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
  1510. .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
  1511. .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1512. .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
  1513. .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1514. .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1515. .pdev_stats_update_period =
  1516. WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1517. .vdev_stats_update_period =
  1518. WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1519. .peer_stats_update_period =
  1520. WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1521. .bcnflt_stats_update_period =
  1522. WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1523. .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
  1524. .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
  1525. .dcs = WMI_10_4_PDEV_PARAM_DCS,
  1526. .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
  1527. .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
  1528. .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1529. .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
  1530. .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
  1531. .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
  1532. .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
  1533. .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
  1534. .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
  1535. .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
  1536. .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
  1537. .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
  1538. .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
  1539. .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
  1540. .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
  1541. .smart_antenna_default_antenna =
  1542. WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
  1543. .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
  1544. .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
  1545. .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
  1546. .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
  1547. .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
  1548. .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
  1549. .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
  1550. .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
  1551. .remove_mcast2ucast_buffer =
  1552. WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
  1553. .peer_sta_ps_statechg_enable =
  1554. WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
  1555. .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
  1556. .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
  1557. .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
  1558. .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
  1559. .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
  1560. .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
  1561. .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
  1562. .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
  1563. .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
  1564. .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
  1565. .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
  1566. .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
  1567. .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
  1568. .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
  1569. .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
  1570. .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
  1571. .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
  1572. .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
  1573. .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
  1574. .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
  1575. .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
  1576. .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
  1577. .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
  1578. .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
  1579. .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
  1580. .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
  1581. .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
  1582. .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
  1583. .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
  1584. .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
  1585. };
  1586. static const struct wmi_peer_flags_map wmi_peer_flags_map = {
  1587. .auth = WMI_PEER_AUTH,
  1588. .qos = WMI_PEER_QOS,
  1589. .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
  1590. .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
  1591. .apsd = WMI_PEER_APSD,
  1592. .ht = WMI_PEER_HT,
  1593. .bw40 = WMI_PEER_40MHZ,
  1594. .stbc = WMI_PEER_STBC,
  1595. .ldbc = WMI_PEER_LDPC,
  1596. .dyn_mimops = WMI_PEER_DYN_MIMOPS,
  1597. .static_mimops = WMI_PEER_STATIC_MIMOPS,
  1598. .spatial_mux = WMI_PEER_SPATIAL_MUX,
  1599. .vht = WMI_PEER_VHT,
  1600. .bw80 = WMI_PEER_80MHZ,
  1601. .vht_2g = WMI_PEER_VHT_2G,
  1602. .pmf = WMI_PEER_PMF,
  1603. .bw160 = WMI_PEER_160MHZ,
  1604. };
  1605. static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
  1606. .auth = WMI_10X_PEER_AUTH,
  1607. .qos = WMI_10X_PEER_QOS,
  1608. .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
  1609. .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
  1610. .apsd = WMI_10X_PEER_APSD,
  1611. .ht = WMI_10X_PEER_HT,
  1612. .bw40 = WMI_10X_PEER_40MHZ,
  1613. .stbc = WMI_10X_PEER_STBC,
  1614. .ldbc = WMI_10X_PEER_LDPC,
  1615. .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
  1616. .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
  1617. .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
  1618. .vht = WMI_10X_PEER_VHT,
  1619. .bw80 = WMI_10X_PEER_80MHZ,
  1620. .bw160 = WMI_10X_PEER_160MHZ,
  1621. };
  1622. static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
  1623. .auth = WMI_10_2_PEER_AUTH,
  1624. .qos = WMI_10_2_PEER_QOS,
  1625. .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
  1626. .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
  1627. .apsd = WMI_10_2_PEER_APSD,
  1628. .ht = WMI_10_2_PEER_HT,
  1629. .bw40 = WMI_10_2_PEER_40MHZ,
  1630. .stbc = WMI_10_2_PEER_STBC,
  1631. .ldbc = WMI_10_2_PEER_LDPC,
  1632. .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
  1633. .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
  1634. .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
  1635. .vht = WMI_10_2_PEER_VHT,
  1636. .bw80 = WMI_10_2_PEER_80MHZ,
  1637. .vht_2g = WMI_10_2_PEER_VHT_2G,
  1638. .pmf = WMI_10_2_PEER_PMF,
  1639. .bw160 = WMI_10_2_PEER_160MHZ,
  1640. };
  1641. void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
  1642. const struct wmi_channel_arg *arg)
  1643. {
  1644. u32 flags = 0;
  1645. memset(ch, 0, sizeof(*ch));
  1646. if (arg->passive)
  1647. flags |= WMI_CHAN_FLAG_PASSIVE;
  1648. if (arg->allow_ibss)
  1649. flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
  1650. if (arg->allow_ht)
  1651. flags |= WMI_CHAN_FLAG_ALLOW_HT;
  1652. if (arg->allow_vht)
  1653. flags |= WMI_CHAN_FLAG_ALLOW_VHT;
  1654. if (arg->ht40plus)
  1655. flags |= WMI_CHAN_FLAG_HT40_PLUS;
  1656. if (arg->chan_radar)
  1657. flags |= WMI_CHAN_FLAG_DFS;
  1658. ch->mhz = __cpu_to_le32(arg->freq);
  1659. ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
  1660. if (arg->mode == MODE_11AC_VHT80_80)
  1661. ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2);
  1662. else
  1663. ch->band_center_freq2 = 0;
  1664. ch->min_power = arg->min_power;
  1665. ch->max_power = arg->max_power;
  1666. ch->reg_power = arg->max_reg_power;
  1667. ch->antenna_max = arg->max_antenna_gain;
  1668. ch->max_tx_power = arg->max_power;
  1669. /* mode & flags share storage */
  1670. ch->mode = arg->mode;
  1671. ch->flags |= __cpu_to_le32(flags);
  1672. }
  1673. int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
  1674. {
  1675. unsigned long time_left;
  1676. time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
  1677. WMI_SERVICE_READY_TIMEOUT_HZ);
  1678. if (!time_left)
  1679. return -ETIMEDOUT;
  1680. return 0;
  1681. }
  1682. int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
  1683. {
  1684. unsigned long time_left;
  1685. time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
  1686. WMI_UNIFIED_READY_TIMEOUT_HZ);
  1687. if (!time_left)
  1688. return -ETIMEDOUT;
  1689. return 0;
  1690. }
  1691. struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
  1692. {
  1693. struct sk_buff *skb;
  1694. u32 round_len = roundup(len, 4);
  1695. skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
  1696. if (!skb)
  1697. return NULL;
  1698. skb_reserve(skb, WMI_SKB_HEADROOM);
  1699. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1700. ath10k_warn(ar, "Unaligned WMI skb\n");
  1701. skb_put(skb, round_len);
  1702. memset(skb->data, 0, round_len);
  1703. return skb;
  1704. }
  1705. static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  1706. {
  1707. dev_kfree_skb(skb);
  1708. }
  1709. int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
  1710. u32 cmd_id)
  1711. {
  1712. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
  1713. struct wmi_cmd_hdr *cmd_hdr;
  1714. int ret;
  1715. u32 cmd = 0;
  1716. if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  1717. return -ENOMEM;
  1718. cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
  1719. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  1720. cmd_hdr->cmd_id = __cpu_to_le32(cmd);
  1721. memset(skb_cb, 0, sizeof(*skb_cb));
  1722. trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len);
  1723. ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
  1724. if (ret)
  1725. goto err_pull;
  1726. return 0;
  1727. err_pull:
  1728. skb_pull(skb, sizeof(struct wmi_cmd_hdr));
  1729. return ret;
  1730. }
  1731. static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
  1732. {
  1733. struct ath10k *ar = arvif->ar;
  1734. struct ath10k_skb_cb *cb;
  1735. struct sk_buff *bcn;
  1736. bool dtim_zero;
  1737. bool deliver_cab;
  1738. int ret;
  1739. spin_lock_bh(&ar->data_lock);
  1740. bcn = arvif->beacon;
  1741. if (!bcn)
  1742. goto unlock;
  1743. cb = ATH10K_SKB_CB(bcn);
  1744. switch (arvif->beacon_state) {
  1745. case ATH10K_BEACON_SENDING:
  1746. case ATH10K_BEACON_SENT:
  1747. break;
  1748. case ATH10K_BEACON_SCHEDULED:
  1749. arvif->beacon_state = ATH10K_BEACON_SENDING;
  1750. spin_unlock_bh(&ar->data_lock);
  1751. dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
  1752. deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
  1753. ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
  1754. arvif->vdev_id,
  1755. bcn->data, bcn->len,
  1756. cb->paddr,
  1757. dtim_zero,
  1758. deliver_cab);
  1759. spin_lock_bh(&ar->data_lock);
  1760. if (ret == 0)
  1761. arvif->beacon_state = ATH10K_BEACON_SENT;
  1762. else
  1763. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  1764. }
  1765. unlock:
  1766. spin_unlock_bh(&ar->data_lock);
  1767. }
  1768. static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
  1769. struct ieee80211_vif *vif)
  1770. {
  1771. struct ath10k_vif *arvif = (void *)vif->drv_priv;
  1772. ath10k_wmi_tx_beacon_nowait(arvif);
  1773. }
  1774. static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
  1775. {
  1776. ieee80211_iterate_active_interfaces_atomic(ar->hw,
  1777. IEEE80211_IFACE_ITER_NORMAL,
  1778. ath10k_wmi_tx_beacons_iter,
  1779. NULL);
  1780. }
  1781. static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
  1782. {
  1783. /* try to send pending beacons first. they take priority */
  1784. ath10k_wmi_tx_beacons_nowait(ar);
  1785. wake_up(&ar->wmi.tx_credits_wq);
  1786. }
  1787. int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
  1788. {
  1789. int ret = -EOPNOTSUPP;
  1790. might_sleep();
  1791. if (cmd_id == WMI_CMD_UNSUPPORTED) {
  1792. ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
  1793. cmd_id);
  1794. return ret;
  1795. }
  1796. wait_event_timeout(ar->wmi.tx_credits_wq, ({
  1797. /* try to send pending beacons first. they take priority */
  1798. ath10k_wmi_tx_beacons_nowait(ar);
  1799. ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
  1800. if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
  1801. ret = -ESHUTDOWN;
  1802. (ret != -EAGAIN);
  1803. }), 3 * HZ);
  1804. if (ret)
  1805. dev_kfree_skb_any(skb);
  1806. return ret;
  1807. }
  1808. static struct sk_buff *
  1809. ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
  1810. {
  1811. struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
  1812. struct ath10k_vif *arvif;
  1813. struct wmi_mgmt_tx_cmd *cmd;
  1814. struct ieee80211_hdr *hdr;
  1815. struct sk_buff *skb;
  1816. int len;
  1817. u32 vdev_id;
  1818. u32 buf_len = msdu->len;
  1819. u16 fc;
  1820. hdr = (struct ieee80211_hdr *)msdu->data;
  1821. fc = le16_to_cpu(hdr->frame_control);
  1822. if (cb->vif) {
  1823. arvif = (void *)cb->vif->drv_priv;
  1824. vdev_id = arvif->vdev_id;
  1825. } else {
  1826. vdev_id = 0;
  1827. }
  1828. if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
  1829. return ERR_PTR(-EINVAL);
  1830. len = sizeof(cmd->hdr) + msdu->len;
  1831. if ((ieee80211_is_action(hdr->frame_control) ||
  1832. ieee80211_is_deauth(hdr->frame_control) ||
  1833. ieee80211_is_disassoc(hdr->frame_control)) &&
  1834. ieee80211_has_protected(hdr->frame_control)) {
  1835. len += IEEE80211_CCMP_MIC_LEN;
  1836. buf_len += IEEE80211_CCMP_MIC_LEN;
  1837. }
  1838. len = round_up(len, 4);
  1839. skb = ath10k_wmi_alloc_skb(ar, len);
  1840. if (!skb)
  1841. return ERR_PTR(-ENOMEM);
  1842. cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
  1843. cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
  1844. cmd->hdr.tx_rate = 0;
  1845. cmd->hdr.tx_power = 0;
  1846. cmd->hdr.buf_len = __cpu_to_le32(buf_len);
  1847. ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
  1848. memcpy(cmd->buf, msdu->data, msdu->len);
  1849. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n",
  1850. msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
  1851. fc & IEEE80211_FCTL_STYPE);
  1852. trace_ath10k_tx_hdr(ar, skb->data, skb->len);
  1853. trace_ath10k_tx_payload(ar, skb->data, skb->len);
  1854. return skb;
  1855. }
  1856. static void ath10k_wmi_event_scan_started(struct ath10k *ar)
  1857. {
  1858. lockdep_assert_held(&ar->data_lock);
  1859. switch (ar->scan.state) {
  1860. case ATH10K_SCAN_IDLE:
  1861. case ATH10K_SCAN_RUNNING:
  1862. case ATH10K_SCAN_ABORTING:
  1863. ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
  1864. ath10k_scan_state_str(ar->scan.state),
  1865. ar->scan.state);
  1866. break;
  1867. case ATH10K_SCAN_STARTING:
  1868. ar->scan.state = ATH10K_SCAN_RUNNING;
  1869. if (ar->scan.is_roc)
  1870. ieee80211_ready_on_channel(ar->hw);
  1871. complete(&ar->scan.started);
  1872. break;
  1873. }
  1874. }
  1875. static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
  1876. {
  1877. lockdep_assert_held(&ar->data_lock);
  1878. switch (ar->scan.state) {
  1879. case ATH10K_SCAN_IDLE:
  1880. case ATH10K_SCAN_RUNNING:
  1881. case ATH10K_SCAN_ABORTING:
  1882. ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
  1883. ath10k_scan_state_str(ar->scan.state),
  1884. ar->scan.state);
  1885. break;
  1886. case ATH10K_SCAN_STARTING:
  1887. complete(&ar->scan.started);
  1888. __ath10k_scan_finish(ar);
  1889. break;
  1890. }
  1891. }
  1892. static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
  1893. {
  1894. lockdep_assert_held(&ar->data_lock);
  1895. switch (ar->scan.state) {
  1896. case ATH10K_SCAN_IDLE:
  1897. case ATH10K_SCAN_STARTING:
  1898. /* One suspected reason scan can be completed while starting is
  1899. * if firmware fails to deliver all scan events to the host,
  1900. * e.g. when transport pipe is full. This has been observed
  1901. * with spectral scan phyerr events starving wmi transport
  1902. * pipe. In such case the "scan completed" event should be (and
  1903. * is) ignored by the host as it may be just firmware's scan
  1904. * state machine recovering.
  1905. */
  1906. ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
  1907. ath10k_scan_state_str(ar->scan.state),
  1908. ar->scan.state);
  1909. break;
  1910. case ATH10K_SCAN_RUNNING:
  1911. case ATH10K_SCAN_ABORTING:
  1912. __ath10k_scan_finish(ar);
  1913. break;
  1914. }
  1915. }
  1916. static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
  1917. {
  1918. lockdep_assert_held(&ar->data_lock);
  1919. switch (ar->scan.state) {
  1920. case ATH10K_SCAN_IDLE:
  1921. case ATH10K_SCAN_STARTING:
  1922. ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
  1923. ath10k_scan_state_str(ar->scan.state),
  1924. ar->scan.state);
  1925. break;
  1926. case ATH10K_SCAN_RUNNING:
  1927. case ATH10K_SCAN_ABORTING:
  1928. ar->scan_channel = NULL;
  1929. break;
  1930. }
  1931. }
  1932. static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
  1933. {
  1934. lockdep_assert_held(&ar->data_lock);
  1935. switch (ar->scan.state) {
  1936. case ATH10K_SCAN_IDLE:
  1937. case ATH10K_SCAN_STARTING:
  1938. ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
  1939. ath10k_scan_state_str(ar->scan.state),
  1940. ar->scan.state);
  1941. break;
  1942. case ATH10K_SCAN_RUNNING:
  1943. case ATH10K_SCAN_ABORTING:
  1944. ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
  1945. if (ar->scan.is_roc && ar->scan.roc_freq == freq)
  1946. complete(&ar->scan.on_channel);
  1947. break;
  1948. }
  1949. }
  1950. static const char *
  1951. ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
  1952. enum wmi_scan_completion_reason reason)
  1953. {
  1954. switch (type) {
  1955. case WMI_SCAN_EVENT_STARTED:
  1956. return "started";
  1957. case WMI_SCAN_EVENT_COMPLETED:
  1958. switch (reason) {
  1959. case WMI_SCAN_REASON_COMPLETED:
  1960. return "completed";
  1961. case WMI_SCAN_REASON_CANCELLED:
  1962. return "completed [cancelled]";
  1963. case WMI_SCAN_REASON_PREEMPTED:
  1964. return "completed [preempted]";
  1965. case WMI_SCAN_REASON_TIMEDOUT:
  1966. return "completed [timedout]";
  1967. case WMI_SCAN_REASON_INTERNAL_FAILURE:
  1968. return "completed [internal err]";
  1969. case WMI_SCAN_REASON_MAX:
  1970. break;
  1971. }
  1972. return "completed [unknown]";
  1973. case WMI_SCAN_EVENT_BSS_CHANNEL:
  1974. return "bss channel";
  1975. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  1976. return "foreign channel";
  1977. case WMI_SCAN_EVENT_DEQUEUED:
  1978. return "dequeued";
  1979. case WMI_SCAN_EVENT_PREEMPTED:
  1980. return "preempted";
  1981. case WMI_SCAN_EVENT_START_FAILED:
  1982. return "start failed";
  1983. case WMI_SCAN_EVENT_RESTARTED:
  1984. return "restarted";
  1985. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  1986. return "foreign channel exit";
  1987. default:
  1988. return "unknown";
  1989. }
  1990. }
  1991. static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
  1992. struct wmi_scan_ev_arg *arg)
  1993. {
  1994. struct wmi_scan_event *ev = (void *)skb->data;
  1995. if (skb->len < sizeof(*ev))
  1996. return -EPROTO;
  1997. skb_pull(skb, sizeof(*ev));
  1998. arg->event_type = ev->event_type;
  1999. arg->reason = ev->reason;
  2000. arg->channel_freq = ev->channel_freq;
  2001. arg->scan_req_id = ev->scan_req_id;
  2002. arg->scan_id = ev->scan_id;
  2003. arg->vdev_id = ev->vdev_id;
  2004. return 0;
  2005. }
  2006. int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
  2007. {
  2008. struct wmi_scan_ev_arg arg = {};
  2009. enum wmi_scan_event_type event_type;
  2010. enum wmi_scan_completion_reason reason;
  2011. u32 freq;
  2012. u32 req_id;
  2013. u32 scan_id;
  2014. u32 vdev_id;
  2015. int ret;
  2016. ret = ath10k_wmi_pull_scan(ar, skb, &arg);
  2017. if (ret) {
  2018. ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
  2019. return ret;
  2020. }
  2021. event_type = __le32_to_cpu(arg.event_type);
  2022. reason = __le32_to_cpu(arg.reason);
  2023. freq = __le32_to_cpu(arg.channel_freq);
  2024. req_id = __le32_to_cpu(arg.scan_req_id);
  2025. scan_id = __le32_to_cpu(arg.scan_id);
  2026. vdev_id = __le32_to_cpu(arg.vdev_id);
  2027. spin_lock_bh(&ar->data_lock);
  2028. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2029. "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
  2030. ath10k_wmi_event_scan_type_str(event_type, reason),
  2031. event_type, reason, freq, req_id, scan_id, vdev_id,
  2032. ath10k_scan_state_str(ar->scan.state), ar->scan.state);
  2033. switch (event_type) {
  2034. case WMI_SCAN_EVENT_STARTED:
  2035. ath10k_wmi_event_scan_started(ar);
  2036. break;
  2037. case WMI_SCAN_EVENT_COMPLETED:
  2038. ath10k_wmi_event_scan_completed(ar);
  2039. break;
  2040. case WMI_SCAN_EVENT_BSS_CHANNEL:
  2041. ath10k_wmi_event_scan_bss_chan(ar);
  2042. break;
  2043. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  2044. ath10k_wmi_event_scan_foreign_chan(ar, freq);
  2045. break;
  2046. case WMI_SCAN_EVENT_START_FAILED:
  2047. ath10k_warn(ar, "received scan start failure event\n");
  2048. ath10k_wmi_event_scan_start_failed(ar);
  2049. break;
  2050. case WMI_SCAN_EVENT_DEQUEUED:
  2051. case WMI_SCAN_EVENT_PREEMPTED:
  2052. case WMI_SCAN_EVENT_RESTARTED:
  2053. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  2054. default:
  2055. break;
  2056. }
  2057. spin_unlock_bh(&ar->data_lock);
  2058. return 0;
  2059. }
  2060. /* If keys are configured, HW decrypts all frames
  2061. * with protected bit set. Mark such frames as decrypted.
  2062. */
  2063. static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
  2064. struct sk_buff *skb,
  2065. struct ieee80211_rx_status *status)
  2066. {
  2067. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2068. unsigned int hdrlen;
  2069. bool peer_key;
  2070. u8 *addr, keyidx;
  2071. if (!ieee80211_is_auth(hdr->frame_control) ||
  2072. !ieee80211_has_protected(hdr->frame_control))
  2073. return;
  2074. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  2075. if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
  2076. return;
  2077. keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
  2078. addr = ieee80211_get_SA(hdr);
  2079. spin_lock_bh(&ar->data_lock);
  2080. peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
  2081. spin_unlock_bh(&ar->data_lock);
  2082. if (peer_key) {
  2083. ath10k_dbg(ar, ATH10K_DBG_MAC,
  2084. "mac wep key present for peer %pM\n", addr);
  2085. status->flag |= RX_FLAG_DECRYPTED;
  2086. }
  2087. }
  2088. static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
  2089. struct wmi_mgmt_rx_ev_arg *arg)
  2090. {
  2091. struct wmi_mgmt_rx_event_v1 *ev_v1;
  2092. struct wmi_mgmt_rx_event_v2 *ev_v2;
  2093. struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
  2094. struct wmi_mgmt_rx_ext_info *ext_info;
  2095. size_t pull_len;
  2096. u32 msdu_len;
  2097. u32 len;
  2098. if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
  2099. ar->running_fw->fw_file.fw_features)) {
  2100. ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
  2101. ev_hdr = &ev_v2->hdr.v1;
  2102. pull_len = sizeof(*ev_v2);
  2103. } else {
  2104. ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
  2105. ev_hdr = &ev_v1->hdr;
  2106. pull_len = sizeof(*ev_v1);
  2107. }
  2108. if (skb->len < pull_len)
  2109. return -EPROTO;
  2110. skb_pull(skb, pull_len);
  2111. arg->channel = ev_hdr->channel;
  2112. arg->buf_len = ev_hdr->buf_len;
  2113. arg->status = ev_hdr->status;
  2114. arg->snr = ev_hdr->snr;
  2115. arg->phy_mode = ev_hdr->phy_mode;
  2116. arg->rate = ev_hdr->rate;
  2117. msdu_len = __le32_to_cpu(arg->buf_len);
  2118. if (skb->len < msdu_len)
  2119. return -EPROTO;
  2120. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2121. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2122. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2123. memcpy(&arg->ext_info, ext_info,
  2124. sizeof(struct wmi_mgmt_rx_ext_info));
  2125. }
  2126. /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
  2127. * trailer with credit update. Trim the excess garbage.
  2128. */
  2129. skb_trim(skb, msdu_len);
  2130. return 0;
  2131. }
  2132. static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
  2133. struct sk_buff *skb,
  2134. struct wmi_mgmt_rx_ev_arg *arg)
  2135. {
  2136. struct wmi_10_4_mgmt_rx_event *ev;
  2137. struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
  2138. size_t pull_len;
  2139. u32 msdu_len;
  2140. struct wmi_mgmt_rx_ext_info *ext_info;
  2141. u32 len;
  2142. ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
  2143. ev_hdr = &ev->hdr;
  2144. pull_len = sizeof(*ev);
  2145. if (skb->len < pull_len)
  2146. return -EPROTO;
  2147. skb_pull(skb, pull_len);
  2148. arg->channel = ev_hdr->channel;
  2149. arg->buf_len = ev_hdr->buf_len;
  2150. arg->status = ev_hdr->status;
  2151. arg->snr = ev_hdr->snr;
  2152. arg->phy_mode = ev_hdr->phy_mode;
  2153. arg->rate = ev_hdr->rate;
  2154. msdu_len = __le32_to_cpu(arg->buf_len);
  2155. if (skb->len < msdu_len)
  2156. return -EPROTO;
  2157. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2158. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2159. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2160. memcpy(&arg->ext_info, ext_info,
  2161. sizeof(struct wmi_mgmt_rx_ext_info));
  2162. }
  2163. /* Make sure bytes added for padding are removed. */
  2164. skb_trim(skb, msdu_len);
  2165. return 0;
  2166. }
  2167. static bool ath10k_wmi_rx_is_decrypted(struct ath10k *ar,
  2168. struct ieee80211_hdr *hdr)
  2169. {
  2170. if (!ieee80211_has_protected(hdr->frame_control))
  2171. return false;
  2172. /* FW delivers WEP Shared Auth frame with Protected Bit set and
  2173. * encrypted payload. However in case of PMF it delivers decrypted
  2174. * frames with Protected Bit set.
  2175. */
  2176. if (ieee80211_is_auth(hdr->frame_control))
  2177. return false;
  2178. /* qca99x0 based FW delivers broadcast or multicast management frames
  2179. * (ex: group privacy action frames in mesh) as encrypted payload.
  2180. */
  2181. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) &&
  2182. ar->hw_params.sw_decrypt_mcast_mgmt)
  2183. return false;
  2184. return true;
  2185. }
  2186. static int wmi_process_mgmt_tx_comp(struct ath10k *ar, u32 desc_id,
  2187. u32 status)
  2188. {
  2189. struct ath10k_mgmt_tx_pkt_addr *pkt_addr;
  2190. struct ath10k_wmi *wmi = &ar->wmi;
  2191. struct ieee80211_tx_info *info;
  2192. struct sk_buff *msdu;
  2193. int ret;
  2194. spin_lock_bh(&ar->data_lock);
  2195. pkt_addr = idr_find(&wmi->mgmt_pending_tx, desc_id);
  2196. if (!pkt_addr) {
  2197. ath10k_warn(ar, "received mgmt tx completion for invalid msdu_id: %d\n",
  2198. desc_id);
  2199. ret = -ENOENT;
  2200. goto out;
  2201. }
  2202. msdu = pkt_addr->vaddr;
  2203. dma_unmap_single(ar->dev, pkt_addr->paddr,
  2204. msdu->len, DMA_FROM_DEVICE);
  2205. info = IEEE80211_SKB_CB(msdu);
  2206. info->flags |= status;
  2207. ieee80211_tx_status_irqsafe(ar->hw, msdu);
  2208. ret = 0;
  2209. out:
  2210. idr_remove(&wmi->mgmt_pending_tx, desc_id);
  2211. spin_unlock_bh(&ar->data_lock);
  2212. return ret;
  2213. }
  2214. int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb)
  2215. {
  2216. struct wmi_tlv_mgmt_tx_compl_ev_arg arg;
  2217. int ret;
  2218. ret = ath10k_wmi_pull_mgmt_tx_compl(ar, skb, &arg);
  2219. if (ret) {
  2220. ath10k_warn(ar, "failed to parse mgmt comp event: %d\n", ret);
  2221. return ret;
  2222. }
  2223. wmi_process_mgmt_tx_comp(ar, __le32_to_cpu(arg.desc_id),
  2224. __le32_to_cpu(arg.status));
  2225. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv evnt mgmt tx completion\n");
  2226. return 0;
  2227. }
  2228. int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
  2229. {
  2230. struct wmi_mgmt_rx_ev_arg arg = {};
  2231. struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  2232. struct ieee80211_hdr *hdr;
  2233. struct ieee80211_supported_band *sband;
  2234. u32 rx_status;
  2235. u32 channel;
  2236. u32 phy_mode;
  2237. u32 snr;
  2238. u32 rate;
  2239. u16 fc;
  2240. int ret;
  2241. ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
  2242. if (ret) {
  2243. ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
  2244. dev_kfree_skb(skb);
  2245. return ret;
  2246. }
  2247. channel = __le32_to_cpu(arg.channel);
  2248. rx_status = __le32_to_cpu(arg.status);
  2249. snr = __le32_to_cpu(arg.snr);
  2250. phy_mode = __le32_to_cpu(arg.phy_mode);
  2251. rate = __le32_to_cpu(arg.rate);
  2252. memset(status, 0, sizeof(*status));
  2253. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2254. "event mgmt rx status %08x\n", rx_status);
  2255. if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
  2256. (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
  2257. WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
  2258. dev_kfree_skb(skb);
  2259. return 0;
  2260. }
  2261. if (rx_status & WMI_RX_STATUS_ERR_MIC)
  2262. status->flag |= RX_FLAG_MMIC_ERROR;
  2263. if (rx_status & WMI_RX_STATUS_EXT_INFO) {
  2264. status->mactime =
  2265. __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
  2266. status->flag |= RX_FLAG_MACTIME_END;
  2267. }
  2268. /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
  2269. * MODE_11B. This means phy_mode is not a reliable source for the band
  2270. * of mgmt rx.
  2271. */
  2272. if (channel >= 1 && channel <= 14) {
  2273. status->band = NL80211_BAND_2GHZ;
  2274. } else if (channel >= 36 && channel <= ATH10K_MAX_5G_CHAN) {
  2275. status->band = NL80211_BAND_5GHZ;
  2276. } else {
  2277. /* Shouldn't happen unless list of advertised channels to
  2278. * mac80211 has been changed.
  2279. */
  2280. WARN_ON_ONCE(1);
  2281. dev_kfree_skb(skb);
  2282. return 0;
  2283. }
  2284. if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
  2285. ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
  2286. sband = &ar->mac.sbands[status->band];
  2287. status->freq = ieee80211_channel_to_frequency(channel, status->band);
  2288. status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
  2289. status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
  2290. hdr = (struct ieee80211_hdr *)skb->data;
  2291. fc = le16_to_cpu(hdr->frame_control);
  2292. /* Firmware is guaranteed to report all essential management frames via
  2293. * WMI while it can deliver some extra via HTT. Since there can be
  2294. * duplicates split the reporting wrt monitor/sniffing.
  2295. */
  2296. status->flag |= RX_FLAG_SKIP_MONITOR;
  2297. ath10k_wmi_handle_wep_reauth(ar, skb, status);
  2298. if (ath10k_wmi_rx_is_decrypted(ar, hdr)) {
  2299. status->flag |= RX_FLAG_DECRYPTED;
  2300. if (!ieee80211_is_action(hdr->frame_control) &&
  2301. !ieee80211_is_deauth(hdr->frame_control) &&
  2302. !ieee80211_is_disassoc(hdr->frame_control)) {
  2303. status->flag |= RX_FLAG_IV_STRIPPED |
  2304. RX_FLAG_MMIC_STRIPPED;
  2305. hdr->frame_control = __cpu_to_le16(fc &
  2306. ~IEEE80211_FCTL_PROTECTED);
  2307. }
  2308. }
  2309. if (ieee80211_is_beacon(hdr->frame_control))
  2310. ath10k_mac_handle_beacon(ar, skb);
  2311. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2312. "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
  2313. skb, skb->len,
  2314. fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
  2315. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2316. "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
  2317. status->freq, status->band, status->signal,
  2318. status->rate_idx);
  2319. ieee80211_rx(ar->hw, skb);
  2320. return 0;
  2321. }
  2322. static int freq_to_idx(struct ath10k *ar, int freq)
  2323. {
  2324. struct ieee80211_supported_band *sband;
  2325. int band, ch, idx = 0;
  2326. for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
  2327. sband = ar->hw->wiphy->bands[band];
  2328. if (!sband)
  2329. continue;
  2330. for (ch = 0; ch < sband->n_channels; ch++, idx++)
  2331. if (sband->channels[ch].center_freq == freq)
  2332. goto exit;
  2333. }
  2334. exit:
  2335. return idx;
  2336. }
  2337. static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
  2338. struct wmi_ch_info_ev_arg *arg)
  2339. {
  2340. struct wmi_chan_info_event *ev = (void *)skb->data;
  2341. if (skb->len < sizeof(*ev))
  2342. return -EPROTO;
  2343. skb_pull(skb, sizeof(*ev));
  2344. arg->err_code = ev->err_code;
  2345. arg->freq = ev->freq;
  2346. arg->cmd_flags = ev->cmd_flags;
  2347. arg->noise_floor = ev->noise_floor;
  2348. arg->rx_clear_count = ev->rx_clear_count;
  2349. arg->cycle_count = ev->cycle_count;
  2350. return 0;
  2351. }
  2352. static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
  2353. struct sk_buff *skb,
  2354. struct wmi_ch_info_ev_arg *arg)
  2355. {
  2356. struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
  2357. if (skb->len < sizeof(*ev))
  2358. return -EPROTO;
  2359. skb_pull(skb, sizeof(*ev));
  2360. arg->err_code = ev->err_code;
  2361. arg->freq = ev->freq;
  2362. arg->cmd_flags = ev->cmd_flags;
  2363. arg->noise_floor = ev->noise_floor;
  2364. arg->rx_clear_count = ev->rx_clear_count;
  2365. arg->cycle_count = ev->cycle_count;
  2366. arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
  2367. arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
  2368. arg->rx_frame_count = ev->rx_frame_count;
  2369. return 0;
  2370. }
  2371. void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
  2372. {
  2373. struct wmi_ch_info_ev_arg arg = {};
  2374. struct survey_info *survey;
  2375. u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
  2376. int idx, ret;
  2377. ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
  2378. if (ret) {
  2379. ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
  2380. return;
  2381. }
  2382. err_code = __le32_to_cpu(arg.err_code);
  2383. freq = __le32_to_cpu(arg.freq);
  2384. cmd_flags = __le32_to_cpu(arg.cmd_flags);
  2385. noise_floor = __le32_to_cpu(arg.noise_floor);
  2386. rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
  2387. cycle_count = __le32_to_cpu(arg.cycle_count);
  2388. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2389. "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
  2390. err_code, freq, cmd_flags, noise_floor, rx_clear_count,
  2391. cycle_count);
  2392. spin_lock_bh(&ar->data_lock);
  2393. switch (ar->scan.state) {
  2394. case ATH10K_SCAN_IDLE:
  2395. case ATH10K_SCAN_STARTING:
  2396. ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
  2397. goto exit;
  2398. case ATH10K_SCAN_RUNNING:
  2399. case ATH10K_SCAN_ABORTING:
  2400. break;
  2401. }
  2402. idx = freq_to_idx(ar, freq);
  2403. if (idx >= ARRAY_SIZE(ar->survey)) {
  2404. ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
  2405. freq, idx);
  2406. goto exit;
  2407. }
  2408. if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
  2409. if (ar->ch_info_can_report_survey) {
  2410. survey = &ar->survey[idx];
  2411. survey->noise = noise_floor;
  2412. survey->filled = SURVEY_INFO_NOISE_DBM;
  2413. ath10k_hw_fill_survey_time(ar,
  2414. survey,
  2415. cycle_count,
  2416. rx_clear_count,
  2417. ar->survey_last_cycle_count,
  2418. ar->survey_last_rx_clear_count);
  2419. }
  2420. ar->ch_info_can_report_survey = false;
  2421. } else {
  2422. ar->ch_info_can_report_survey = true;
  2423. }
  2424. if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
  2425. ar->survey_last_rx_clear_count = rx_clear_count;
  2426. ar->survey_last_cycle_count = cycle_count;
  2427. }
  2428. exit:
  2429. spin_unlock_bh(&ar->data_lock);
  2430. }
  2431. void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
  2432. {
  2433. struct wmi_echo_ev_arg arg = {};
  2434. int ret;
  2435. ret = ath10k_wmi_pull_echo_ev(ar, skb, &arg);
  2436. if (ret) {
  2437. ath10k_warn(ar, "failed to parse echo: %d\n", ret);
  2438. return;
  2439. }
  2440. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2441. "wmi event echo value 0x%08x\n",
  2442. le32_to_cpu(arg.value));
  2443. if (le32_to_cpu(arg.value) == ATH10K_WMI_BARRIER_ECHO_ID)
  2444. complete(&ar->wmi.barrier);
  2445. }
  2446. int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
  2447. {
  2448. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
  2449. skb->len);
  2450. trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
  2451. return 0;
  2452. }
  2453. void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
  2454. struct ath10k_fw_stats_pdev *dst)
  2455. {
  2456. dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
  2457. dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
  2458. dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
  2459. dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
  2460. dst->cycle_count = __le32_to_cpu(src->cycle_count);
  2461. dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
  2462. dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
  2463. }
  2464. void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
  2465. struct ath10k_fw_stats_pdev *dst)
  2466. {
  2467. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2468. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2469. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2470. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2471. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2472. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2473. dst->local_freed = __le32_to_cpu(src->local_freed);
  2474. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2475. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2476. dst->underrun = __le32_to_cpu(src->underrun);
  2477. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2478. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2479. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2480. dst->data_rc = __le32_to_cpu(src->data_rc);
  2481. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2482. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2483. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2484. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2485. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2486. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2487. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2488. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2489. }
  2490. static void
  2491. ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
  2492. struct ath10k_fw_stats_pdev *dst)
  2493. {
  2494. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2495. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2496. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2497. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2498. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2499. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2500. dst->local_freed = __le32_to_cpu(src->local_freed);
  2501. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2502. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2503. dst->underrun = __le32_to_cpu(src->underrun);
  2504. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2505. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2506. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2507. dst->data_rc = __le32_to_cpu(src->data_rc);
  2508. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2509. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2510. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2511. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2512. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2513. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2514. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2515. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2516. dst->hw_paused = __le32_to_cpu(src->hw_paused);
  2517. dst->seq_posted = __le32_to_cpu(src->seq_posted);
  2518. dst->seq_failed_queueing =
  2519. __le32_to_cpu(src->seq_failed_queueing);
  2520. dst->seq_completed = __le32_to_cpu(src->seq_completed);
  2521. dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
  2522. dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
  2523. dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
  2524. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2525. dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
  2526. dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
  2527. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2528. dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
  2529. }
  2530. void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
  2531. struct ath10k_fw_stats_pdev *dst)
  2532. {
  2533. dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
  2534. dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
  2535. dst->r0_frags = __le32_to_cpu(src->r0_frags);
  2536. dst->r1_frags = __le32_to_cpu(src->r1_frags);
  2537. dst->r2_frags = __le32_to_cpu(src->r2_frags);
  2538. dst->r3_frags = __le32_to_cpu(src->r3_frags);
  2539. dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
  2540. dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
  2541. dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
  2542. dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
  2543. dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
  2544. dst->phy_errs = __le32_to_cpu(src->phy_errs);
  2545. dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
  2546. dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
  2547. }
  2548. void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
  2549. struct ath10k_fw_stats_pdev *dst)
  2550. {
  2551. dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
  2552. dst->rts_bad = __le32_to_cpu(src->rts_bad);
  2553. dst->rts_good = __le32_to_cpu(src->rts_good);
  2554. dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
  2555. dst->no_beacons = __le32_to_cpu(src->no_beacons);
  2556. dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
  2557. }
  2558. void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
  2559. struct ath10k_fw_stats_peer *dst)
  2560. {
  2561. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2562. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2563. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2564. }
  2565. static void
  2566. ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
  2567. struct ath10k_fw_stats_peer *dst)
  2568. {
  2569. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2570. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2571. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2572. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2573. }
  2574. static void
  2575. ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd *src,
  2576. struct ath10k_fw_stats_vdev_extd *dst)
  2577. {
  2578. dst->vdev_id = __le32_to_cpu(src->vdev_id);
  2579. dst->ppdu_aggr_cnt = __le32_to_cpu(src->ppdu_aggr_cnt);
  2580. dst->ppdu_noack = __le32_to_cpu(src->ppdu_noack);
  2581. dst->mpdu_queued = __le32_to_cpu(src->mpdu_queued);
  2582. dst->ppdu_nonaggr_cnt = __le32_to_cpu(src->ppdu_nonaggr_cnt);
  2583. dst->mpdu_sw_requeued = __le32_to_cpu(src->mpdu_sw_requeued);
  2584. dst->mpdu_suc_retry = __le32_to_cpu(src->mpdu_suc_retry);
  2585. dst->mpdu_suc_multitry = __le32_to_cpu(src->mpdu_suc_multitry);
  2586. dst->mpdu_fail_retry = __le32_to_cpu(src->mpdu_fail_retry);
  2587. dst->tx_ftm_suc = __le32_to_cpu(src->tx_ftm_suc);
  2588. dst->tx_ftm_suc_retry = __le32_to_cpu(src->tx_ftm_suc_retry);
  2589. dst->tx_ftm_fail = __le32_to_cpu(src->tx_ftm_fail);
  2590. dst->rx_ftmr_cnt = __le32_to_cpu(src->rx_ftmr_cnt);
  2591. dst->rx_ftmr_dup_cnt = __le32_to_cpu(src->rx_ftmr_dup_cnt);
  2592. dst->rx_iftmr_cnt = __le32_to_cpu(src->rx_iftmr_cnt);
  2593. dst->rx_iftmr_dup_cnt = __le32_to_cpu(src->rx_iftmr_dup_cnt);
  2594. }
  2595. static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
  2596. struct sk_buff *skb,
  2597. struct ath10k_fw_stats *stats)
  2598. {
  2599. const struct wmi_stats_event *ev = (void *)skb->data;
  2600. u32 num_pdev_stats, num_peer_stats;
  2601. int i;
  2602. if (!skb_pull(skb, sizeof(*ev)))
  2603. return -EPROTO;
  2604. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2605. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2606. for (i = 0; i < num_pdev_stats; i++) {
  2607. const struct wmi_pdev_stats *src;
  2608. struct ath10k_fw_stats_pdev *dst;
  2609. src = (void *)skb->data;
  2610. if (!skb_pull(skb, sizeof(*src)))
  2611. return -EPROTO;
  2612. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2613. if (!dst)
  2614. continue;
  2615. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2616. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2617. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2618. list_add_tail(&dst->list, &stats->pdevs);
  2619. }
  2620. /* fw doesn't implement vdev stats */
  2621. for (i = 0; i < num_peer_stats; i++) {
  2622. const struct wmi_peer_stats *src;
  2623. struct ath10k_fw_stats_peer *dst;
  2624. src = (void *)skb->data;
  2625. if (!skb_pull(skb, sizeof(*src)))
  2626. return -EPROTO;
  2627. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2628. if (!dst)
  2629. continue;
  2630. ath10k_wmi_pull_peer_stats(src, dst);
  2631. list_add_tail(&dst->list, &stats->peers);
  2632. }
  2633. return 0;
  2634. }
  2635. static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
  2636. struct sk_buff *skb,
  2637. struct ath10k_fw_stats *stats)
  2638. {
  2639. const struct wmi_stats_event *ev = (void *)skb->data;
  2640. u32 num_pdev_stats, num_peer_stats;
  2641. int i;
  2642. if (!skb_pull(skb, sizeof(*ev)))
  2643. return -EPROTO;
  2644. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2645. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2646. for (i = 0; i < num_pdev_stats; i++) {
  2647. const struct wmi_10x_pdev_stats *src;
  2648. struct ath10k_fw_stats_pdev *dst;
  2649. src = (void *)skb->data;
  2650. if (!skb_pull(skb, sizeof(*src)))
  2651. return -EPROTO;
  2652. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2653. if (!dst)
  2654. continue;
  2655. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2656. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2657. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2658. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2659. list_add_tail(&dst->list, &stats->pdevs);
  2660. }
  2661. /* fw doesn't implement vdev stats */
  2662. for (i = 0; i < num_peer_stats; i++) {
  2663. const struct wmi_10x_peer_stats *src;
  2664. struct ath10k_fw_stats_peer *dst;
  2665. src = (void *)skb->data;
  2666. if (!skb_pull(skb, sizeof(*src)))
  2667. return -EPROTO;
  2668. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2669. if (!dst)
  2670. continue;
  2671. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2672. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2673. list_add_tail(&dst->list, &stats->peers);
  2674. }
  2675. return 0;
  2676. }
  2677. static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
  2678. struct sk_buff *skb,
  2679. struct ath10k_fw_stats *stats)
  2680. {
  2681. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2682. u32 num_pdev_stats;
  2683. u32 num_pdev_ext_stats;
  2684. u32 num_peer_stats;
  2685. int i;
  2686. if (!skb_pull(skb, sizeof(*ev)))
  2687. return -EPROTO;
  2688. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2689. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2690. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2691. for (i = 0; i < num_pdev_stats; i++) {
  2692. const struct wmi_10_2_pdev_stats *src;
  2693. struct ath10k_fw_stats_pdev *dst;
  2694. src = (void *)skb->data;
  2695. if (!skb_pull(skb, sizeof(*src)))
  2696. return -EPROTO;
  2697. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2698. if (!dst)
  2699. continue;
  2700. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2701. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2702. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2703. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2704. /* FIXME: expose 10.2 specific values */
  2705. list_add_tail(&dst->list, &stats->pdevs);
  2706. }
  2707. for (i = 0; i < num_pdev_ext_stats; i++) {
  2708. const struct wmi_10_2_pdev_ext_stats *src;
  2709. src = (void *)skb->data;
  2710. if (!skb_pull(skb, sizeof(*src)))
  2711. return -EPROTO;
  2712. /* FIXME: expose values to userspace
  2713. *
  2714. * Note: Even though this loop seems to do nothing it is
  2715. * required to parse following sub-structures properly.
  2716. */
  2717. }
  2718. /* fw doesn't implement vdev stats */
  2719. for (i = 0; i < num_peer_stats; i++) {
  2720. const struct wmi_10_2_peer_stats *src;
  2721. struct ath10k_fw_stats_peer *dst;
  2722. src = (void *)skb->data;
  2723. if (!skb_pull(skb, sizeof(*src)))
  2724. return -EPROTO;
  2725. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2726. if (!dst)
  2727. continue;
  2728. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2729. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2730. /* FIXME: expose 10.2 specific values */
  2731. list_add_tail(&dst->list, &stats->peers);
  2732. }
  2733. return 0;
  2734. }
  2735. static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
  2736. struct sk_buff *skb,
  2737. struct ath10k_fw_stats *stats)
  2738. {
  2739. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2740. u32 num_pdev_stats;
  2741. u32 num_pdev_ext_stats;
  2742. u32 num_peer_stats;
  2743. int i;
  2744. if (!skb_pull(skb, sizeof(*ev)))
  2745. return -EPROTO;
  2746. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2747. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2748. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2749. for (i = 0; i < num_pdev_stats; i++) {
  2750. const struct wmi_10_2_pdev_stats *src;
  2751. struct ath10k_fw_stats_pdev *dst;
  2752. src = (void *)skb->data;
  2753. if (!skb_pull(skb, sizeof(*src)))
  2754. return -EPROTO;
  2755. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2756. if (!dst)
  2757. continue;
  2758. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2759. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2760. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2761. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2762. /* FIXME: expose 10.2 specific values */
  2763. list_add_tail(&dst->list, &stats->pdevs);
  2764. }
  2765. for (i = 0; i < num_pdev_ext_stats; i++) {
  2766. const struct wmi_10_2_pdev_ext_stats *src;
  2767. src = (void *)skb->data;
  2768. if (!skb_pull(skb, sizeof(*src)))
  2769. return -EPROTO;
  2770. /* FIXME: expose values to userspace
  2771. *
  2772. * Note: Even though this loop seems to do nothing it is
  2773. * required to parse following sub-structures properly.
  2774. */
  2775. }
  2776. /* fw doesn't implement vdev stats */
  2777. for (i = 0; i < num_peer_stats; i++) {
  2778. const struct wmi_10_2_4_ext_peer_stats *src;
  2779. struct ath10k_fw_stats_peer *dst;
  2780. int stats_len;
  2781. if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
  2782. stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
  2783. else
  2784. stats_len = sizeof(struct wmi_10_2_4_peer_stats);
  2785. src = (void *)skb->data;
  2786. if (!skb_pull(skb, stats_len))
  2787. return -EPROTO;
  2788. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2789. if (!dst)
  2790. continue;
  2791. ath10k_wmi_pull_peer_stats(&src->common.old, dst);
  2792. dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
  2793. if (ath10k_peer_stats_enabled(ar))
  2794. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2795. /* FIXME: expose 10.2 specific values */
  2796. list_add_tail(&dst->list, &stats->peers);
  2797. }
  2798. return 0;
  2799. }
  2800. static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
  2801. struct sk_buff *skb,
  2802. struct ath10k_fw_stats *stats)
  2803. {
  2804. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2805. u32 num_pdev_stats;
  2806. u32 num_pdev_ext_stats;
  2807. u32 num_vdev_stats;
  2808. u32 num_peer_stats;
  2809. u32 num_bcnflt_stats;
  2810. u32 stats_id;
  2811. int i;
  2812. if (!skb_pull(skb, sizeof(*ev)))
  2813. return -EPROTO;
  2814. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2815. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2816. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2817. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2818. num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats);
  2819. stats_id = __le32_to_cpu(ev->stats_id);
  2820. for (i = 0; i < num_pdev_stats; i++) {
  2821. const struct wmi_10_4_pdev_stats *src;
  2822. struct ath10k_fw_stats_pdev *dst;
  2823. src = (void *)skb->data;
  2824. if (!skb_pull(skb, sizeof(*src)))
  2825. return -EPROTO;
  2826. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2827. if (!dst)
  2828. continue;
  2829. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2830. ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
  2831. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2832. dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
  2833. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2834. list_add_tail(&dst->list, &stats->pdevs);
  2835. }
  2836. for (i = 0; i < num_pdev_ext_stats; i++) {
  2837. const struct wmi_10_2_pdev_ext_stats *src;
  2838. src = (void *)skb->data;
  2839. if (!skb_pull(skb, sizeof(*src)))
  2840. return -EPROTO;
  2841. /* FIXME: expose values to userspace
  2842. *
  2843. * Note: Even though this loop seems to do nothing it is
  2844. * required to parse following sub-structures properly.
  2845. */
  2846. }
  2847. for (i = 0; i < num_vdev_stats; i++) {
  2848. const struct wmi_vdev_stats *src;
  2849. /* Ignore vdev stats here as it has only vdev id. Actual vdev
  2850. * stats will be retrieved from vdev extended stats.
  2851. */
  2852. src = (void *)skb->data;
  2853. if (!skb_pull(skb, sizeof(*src)))
  2854. return -EPROTO;
  2855. }
  2856. for (i = 0; i < num_peer_stats; i++) {
  2857. const struct wmi_10_4_peer_stats *src;
  2858. struct ath10k_fw_stats_peer *dst;
  2859. src = (void *)skb->data;
  2860. if (!skb_pull(skb, sizeof(*src)))
  2861. return -EPROTO;
  2862. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2863. if (!dst)
  2864. continue;
  2865. ath10k_wmi_10_4_pull_peer_stats(src, dst);
  2866. list_add_tail(&dst->list, &stats->peers);
  2867. }
  2868. for (i = 0; i < num_bcnflt_stats; i++) {
  2869. const struct wmi_10_4_bss_bcn_filter_stats *src;
  2870. src = (void *)skb->data;
  2871. if (!skb_pull(skb, sizeof(*src)))
  2872. return -EPROTO;
  2873. /* FIXME: expose values to userspace
  2874. *
  2875. * Note: Even though this loop seems to do nothing it is
  2876. * required to parse following sub-structures properly.
  2877. */
  2878. }
  2879. if (stats_id & WMI_10_4_STAT_PEER_EXTD) {
  2880. stats->extended = true;
  2881. for (i = 0; i < num_peer_stats; i++) {
  2882. const struct wmi_10_4_peer_extd_stats *src;
  2883. struct ath10k_fw_extd_stats_peer *dst;
  2884. src = (void *)skb->data;
  2885. if (!skb_pull(skb, sizeof(*src)))
  2886. return -EPROTO;
  2887. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2888. if (!dst)
  2889. continue;
  2890. ether_addr_copy(dst->peer_macaddr,
  2891. src->peer_macaddr.addr);
  2892. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2893. list_add_tail(&dst->list, &stats->peers_extd);
  2894. }
  2895. }
  2896. if (stats_id & WMI_10_4_STAT_VDEV_EXTD) {
  2897. for (i = 0; i < num_vdev_stats; i++) {
  2898. const struct wmi_vdev_stats_extd *src;
  2899. struct ath10k_fw_stats_vdev_extd *dst;
  2900. src = (void *)skb->data;
  2901. if (!skb_pull(skb, sizeof(*src)))
  2902. return -EPROTO;
  2903. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2904. if (!dst)
  2905. continue;
  2906. ath10k_wmi_10_4_pull_vdev_stats(src, dst);
  2907. list_add_tail(&dst->list, &stats->vdevs);
  2908. }
  2909. }
  2910. return 0;
  2911. }
  2912. void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
  2913. {
  2914. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
  2915. ath10k_debug_fw_stats_process(ar, skb);
  2916. }
  2917. static int
  2918. ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
  2919. struct wmi_vdev_start_ev_arg *arg)
  2920. {
  2921. struct wmi_vdev_start_response_event *ev = (void *)skb->data;
  2922. if (skb->len < sizeof(*ev))
  2923. return -EPROTO;
  2924. skb_pull(skb, sizeof(*ev));
  2925. arg->vdev_id = ev->vdev_id;
  2926. arg->req_id = ev->req_id;
  2927. arg->resp_type = ev->resp_type;
  2928. arg->status = ev->status;
  2929. return 0;
  2930. }
  2931. void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
  2932. {
  2933. struct wmi_vdev_start_ev_arg arg = {};
  2934. int ret;
  2935. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
  2936. ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
  2937. if (ret) {
  2938. ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
  2939. return;
  2940. }
  2941. if (WARN_ON(__le32_to_cpu(arg.status)))
  2942. return;
  2943. complete(&ar->vdev_setup_done);
  2944. }
  2945. void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
  2946. {
  2947. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
  2948. complete(&ar->vdev_setup_done);
  2949. }
  2950. static int
  2951. ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
  2952. struct wmi_peer_kick_ev_arg *arg)
  2953. {
  2954. struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
  2955. if (skb->len < sizeof(*ev))
  2956. return -EPROTO;
  2957. skb_pull(skb, sizeof(*ev));
  2958. arg->mac_addr = ev->peer_macaddr.addr;
  2959. return 0;
  2960. }
  2961. void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
  2962. {
  2963. struct wmi_peer_kick_ev_arg arg = {};
  2964. struct ieee80211_sta *sta;
  2965. int ret;
  2966. ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
  2967. if (ret) {
  2968. ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
  2969. ret);
  2970. return;
  2971. }
  2972. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
  2973. arg.mac_addr);
  2974. rcu_read_lock();
  2975. sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
  2976. if (!sta) {
  2977. ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
  2978. arg.mac_addr);
  2979. goto exit;
  2980. }
  2981. ieee80211_report_low_ack(sta, 10);
  2982. exit:
  2983. rcu_read_unlock();
  2984. }
  2985. /*
  2986. * FIXME
  2987. *
  2988. * We don't report to mac80211 sleep state of connected
  2989. * stations. Due to this mac80211 can't fill in TIM IE
  2990. * correctly.
  2991. *
  2992. * I know of no way of getting nullfunc frames that contain
  2993. * sleep transition from connected stations - these do not
  2994. * seem to be sent from the target to the host. There also
  2995. * doesn't seem to be a dedicated event for that. So the
  2996. * only way left to do this would be to read tim_bitmap
  2997. * during SWBA.
  2998. *
  2999. * We could probably try using tim_bitmap from SWBA to tell
  3000. * mac80211 which stations are asleep and which are not. The
  3001. * problem here is calling mac80211 functions so many times
  3002. * could take too long and make us miss the time to submit
  3003. * the beacon to the target.
  3004. *
  3005. * So as a workaround we try to extend the TIM IE if there
  3006. * is unicast buffered for stations with aid > 7 and fill it
  3007. * in ourselves.
  3008. */
  3009. static void ath10k_wmi_update_tim(struct ath10k *ar,
  3010. struct ath10k_vif *arvif,
  3011. struct sk_buff *bcn,
  3012. const struct wmi_tim_info_arg *tim_info)
  3013. {
  3014. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
  3015. struct ieee80211_tim_ie *tim;
  3016. u8 *ies, *ie;
  3017. u8 ie_len, pvm_len;
  3018. __le32 t;
  3019. u32 v, tim_len;
  3020. /* When FW reports 0 in tim_len, ensure atleast first byte
  3021. * in tim_bitmap is considered for pvm calculation.
  3022. */
  3023. tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
  3024. /* if next SWBA has no tim_changed the tim_bitmap is garbage.
  3025. * we must copy the bitmap upon change and reuse it later
  3026. */
  3027. if (__le32_to_cpu(tim_info->tim_changed)) {
  3028. int i;
  3029. if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
  3030. ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
  3031. tim_len, sizeof(arvif->u.ap.tim_bitmap));
  3032. tim_len = sizeof(arvif->u.ap.tim_bitmap);
  3033. }
  3034. for (i = 0; i < tim_len; i++) {
  3035. t = tim_info->tim_bitmap[i / 4];
  3036. v = __le32_to_cpu(t);
  3037. arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
  3038. }
  3039. /* FW reports either length 0 or length based on max supported
  3040. * station. so we calculate this on our own
  3041. */
  3042. arvif->u.ap.tim_len = 0;
  3043. for (i = 0; i < tim_len; i++)
  3044. if (arvif->u.ap.tim_bitmap[i])
  3045. arvif->u.ap.tim_len = i;
  3046. arvif->u.ap.tim_len++;
  3047. }
  3048. ies = bcn->data;
  3049. ies += ieee80211_hdrlen(hdr->frame_control);
  3050. ies += 12; /* fixed parameters */
  3051. ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
  3052. (u8 *)skb_tail_pointer(bcn) - ies);
  3053. if (!ie) {
  3054. if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
  3055. ath10k_warn(ar, "no tim ie found;\n");
  3056. return;
  3057. }
  3058. tim = (void *)ie + 2;
  3059. ie_len = ie[1];
  3060. pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
  3061. if (pvm_len < arvif->u.ap.tim_len) {
  3062. int expand_size = tim_len - pvm_len;
  3063. int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
  3064. void *next_ie = ie + 2 + ie_len;
  3065. if (skb_put(bcn, expand_size)) {
  3066. memmove(next_ie + expand_size, next_ie, move_size);
  3067. ie[1] += expand_size;
  3068. ie_len += expand_size;
  3069. pvm_len += expand_size;
  3070. } else {
  3071. ath10k_warn(ar, "tim expansion failed\n");
  3072. }
  3073. }
  3074. if (pvm_len > tim_len) {
  3075. ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
  3076. return;
  3077. }
  3078. tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
  3079. memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
  3080. if (tim->dtim_count == 0) {
  3081. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
  3082. if (__le32_to_cpu(tim_info->tim_mcast) == 1)
  3083. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
  3084. }
  3085. ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
  3086. tim->dtim_count, tim->dtim_period,
  3087. tim->bitmap_ctrl, pvm_len);
  3088. }
  3089. static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
  3090. struct sk_buff *bcn,
  3091. const struct wmi_p2p_noa_info *noa)
  3092. {
  3093. if (!arvif->vif->p2p)
  3094. return;
  3095. ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
  3096. if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
  3097. ath10k_p2p_noa_update(arvif, noa);
  3098. if (arvif->u.ap.noa_data)
  3099. if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
  3100. skb_put_data(bcn, arvif->u.ap.noa_data,
  3101. arvif->u.ap.noa_len);
  3102. }
  3103. static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
  3104. struct wmi_swba_ev_arg *arg)
  3105. {
  3106. struct wmi_host_swba_event *ev = (void *)skb->data;
  3107. u32 map;
  3108. size_t i;
  3109. if (skb->len < sizeof(*ev))
  3110. return -EPROTO;
  3111. skb_pull(skb, sizeof(*ev));
  3112. arg->vdev_map = ev->vdev_map;
  3113. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3114. if (!(map & BIT(0)))
  3115. continue;
  3116. /* If this happens there were some changes in firmware and
  3117. * ath10k should update the max size of tim_info array.
  3118. */
  3119. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3120. break;
  3121. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3122. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3123. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3124. return -EPROTO;
  3125. }
  3126. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3127. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3128. arg->tim_info[i].tim_bitmap =
  3129. ev->bcn_info[i].tim_info.tim_bitmap;
  3130. arg->tim_info[i].tim_changed =
  3131. ev->bcn_info[i].tim_info.tim_changed;
  3132. arg->tim_info[i].tim_num_ps_pending =
  3133. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3134. arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
  3135. i++;
  3136. }
  3137. return 0;
  3138. }
  3139. static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
  3140. struct sk_buff *skb,
  3141. struct wmi_swba_ev_arg *arg)
  3142. {
  3143. struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
  3144. u32 map;
  3145. size_t i;
  3146. if (skb->len < sizeof(*ev))
  3147. return -EPROTO;
  3148. skb_pull(skb, sizeof(*ev));
  3149. arg->vdev_map = ev->vdev_map;
  3150. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3151. if (!(map & BIT(0)))
  3152. continue;
  3153. /* If this happens there were some changes in firmware and
  3154. * ath10k should update the max size of tim_info array.
  3155. */
  3156. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3157. break;
  3158. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3159. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3160. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3161. return -EPROTO;
  3162. }
  3163. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3164. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3165. arg->tim_info[i].tim_bitmap =
  3166. ev->bcn_info[i].tim_info.tim_bitmap;
  3167. arg->tim_info[i].tim_changed =
  3168. ev->bcn_info[i].tim_info.tim_changed;
  3169. arg->tim_info[i].tim_num_ps_pending =
  3170. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3171. i++;
  3172. }
  3173. return 0;
  3174. }
  3175. static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
  3176. struct sk_buff *skb,
  3177. struct wmi_swba_ev_arg *arg)
  3178. {
  3179. struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
  3180. u32 map, tim_len;
  3181. size_t i;
  3182. if (skb->len < sizeof(*ev))
  3183. return -EPROTO;
  3184. skb_pull(skb, sizeof(*ev));
  3185. arg->vdev_map = ev->vdev_map;
  3186. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3187. if (!(map & BIT(0)))
  3188. continue;
  3189. /* If this happens there were some changes in firmware and
  3190. * ath10k should update the max size of tim_info array.
  3191. */
  3192. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3193. break;
  3194. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3195. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3196. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3197. return -EPROTO;
  3198. }
  3199. tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
  3200. if (tim_len) {
  3201. /* Exclude 4 byte guard length */
  3202. tim_len -= 4;
  3203. arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
  3204. } else {
  3205. arg->tim_info[i].tim_len = 0;
  3206. }
  3207. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3208. arg->tim_info[i].tim_bitmap =
  3209. ev->bcn_info[i].tim_info.tim_bitmap;
  3210. arg->tim_info[i].tim_changed =
  3211. ev->bcn_info[i].tim_info.tim_changed;
  3212. arg->tim_info[i].tim_num_ps_pending =
  3213. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3214. /* 10.4 firmware doesn't have p2p support. notice of absence
  3215. * info can be ignored for now.
  3216. */
  3217. i++;
  3218. }
  3219. return 0;
  3220. }
  3221. static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
  3222. {
  3223. return WMI_TXBF_CONF_BEFORE_ASSOC;
  3224. }
  3225. void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
  3226. {
  3227. struct wmi_swba_ev_arg arg = {};
  3228. u32 map;
  3229. int i = -1;
  3230. const struct wmi_tim_info_arg *tim_info;
  3231. const struct wmi_p2p_noa_info *noa_info;
  3232. struct ath10k_vif *arvif;
  3233. struct sk_buff *bcn;
  3234. dma_addr_t paddr;
  3235. int ret, vdev_id = 0;
  3236. ret = ath10k_wmi_pull_swba(ar, skb, &arg);
  3237. if (ret) {
  3238. ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
  3239. return;
  3240. }
  3241. map = __le32_to_cpu(arg.vdev_map);
  3242. ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
  3243. map);
  3244. for (; map; map >>= 1, vdev_id++) {
  3245. if (!(map & 0x1))
  3246. continue;
  3247. i++;
  3248. if (i >= WMI_MAX_AP_VDEV) {
  3249. ath10k_warn(ar, "swba has corrupted vdev map\n");
  3250. break;
  3251. }
  3252. tim_info = &arg.tim_info[i];
  3253. noa_info = arg.noa_info[i];
  3254. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  3255. "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
  3256. i,
  3257. __le32_to_cpu(tim_info->tim_len),
  3258. __le32_to_cpu(tim_info->tim_mcast),
  3259. __le32_to_cpu(tim_info->tim_changed),
  3260. __le32_to_cpu(tim_info->tim_num_ps_pending),
  3261. __le32_to_cpu(tim_info->tim_bitmap[3]),
  3262. __le32_to_cpu(tim_info->tim_bitmap[2]),
  3263. __le32_to_cpu(tim_info->tim_bitmap[1]),
  3264. __le32_to_cpu(tim_info->tim_bitmap[0]));
  3265. /* TODO: Only first 4 word from tim_bitmap is dumped.
  3266. * Extend debug code to dump full tim_bitmap.
  3267. */
  3268. arvif = ath10k_get_arvif(ar, vdev_id);
  3269. if (arvif == NULL) {
  3270. ath10k_warn(ar, "no vif for vdev_id %d found\n",
  3271. vdev_id);
  3272. continue;
  3273. }
  3274. /* mac80211 would have already asked us to stop beaconing and
  3275. * bring the vdev down, so continue in that case
  3276. */
  3277. if (!arvif->is_up)
  3278. continue;
  3279. /* There are no completions for beacons so wait for next SWBA
  3280. * before telling mac80211 to decrement CSA counter
  3281. *
  3282. * Once CSA counter is completed stop sending beacons until
  3283. * actual channel switch is done
  3284. */
  3285. if (arvif->vif->csa_active &&
  3286. ieee80211_csa_is_complete(arvif->vif)) {
  3287. ieee80211_csa_finish(arvif->vif);
  3288. continue;
  3289. }
  3290. bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
  3291. if (!bcn) {
  3292. ath10k_warn(ar, "could not get mac80211 beacon\n");
  3293. continue;
  3294. }
  3295. ath10k_tx_h_seq_no(arvif->vif, bcn);
  3296. ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
  3297. ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
  3298. spin_lock_bh(&ar->data_lock);
  3299. if (arvif->beacon) {
  3300. switch (arvif->beacon_state) {
  3301. case ATH10K_BEACON_SENT:
  3302. break;
  3303. case ATH10K_BEACON_SCHEDULED:
  3304. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
  3305. arvif->vdev_id);
  3306. break;
  3307. case ATH10K_BEACON_SENDING:
  3308. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
  3309. arvif->vdev_id);
  3310. dev_kfree_skb(bcn);
  3311. goto skip;
  3312. }
  3313. ath10k_mac_vif_beacon_free(arvif);
  3314. }
  3315. if (!arvif->beacon_buf) {
  3316. paddr = dma_map_single(arvif->ar->dev, bcn->data,
  3317. bcn->len, DMA_TO_DEVICE);
  3318. ret = dma_mapping_error(arvif->ar->dev, paddr);
  3319. if (ret) {
  3320. ath10k_warn(ar, "failed to map beacon: %d\n",
  3321. ret);
  3322. dev_kfree_skb_any(bcn);
  3323. goto skip;
  3324. }
  3325. ATH10K_SKB_CB(bcn)->paddr = paddr;
  3326. } else {
  3327. if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
  3328. ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
  3329. bcn->len, IEEE80211_MAX_FRAME_LEN);
  3330. skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
  3331. }
  3332. memcpy(arvif->beacon_buf, bcn->data, bcn->len);
  3333. ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
  3334. }
  3335. arvif->beacon = bcn;
  3336. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  3337. trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
  3338. trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
  3339. skip:
  3340. spin_unlock_bh(&ar->data_lock);
  3341. }
  3342. ath10k_wmi_tx_beacons_nowait(ar);
  3343. }
  3344. void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
  3345. {
  3346. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
  3347. }
  3348. static void ath10k_radar_detected(struct ath10k *ar)
  3349. {
  3350. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
  3351. ATH10K_DFS_STAT_INC(ar, radar_detected);
  3352. /* Control radar events reporting in debugfs file
  3353. * dfs_block_radar_events
  3354. */
  3355. if (ar->dfs_block_radar_events)
  3356. ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
  3357. else
  3358. ieee80211_radar_detected(ar->hw);
  3359. }
  3360. static void ath10k_radar_confirmation_work(struct work_struct *work)
  3361. {
  3362. struct ath10k *ar = container_of(work, struct ath10k,
  3363. radar_confirmation_work);
  3364. struct ath10k_radar_found_info radar_info;
  3365. int ret, time_left;
  3366. reinit_completion(&ar->wmi.radar_confirm);
  3367. spin_lock_bh(&ar->data_lock);
  3368. memcpy(&radar_info, &ar->last_radar_info, sizeof(radar_info));
  3369. spin_unlock_bh(&ar->data_lock);
  3370. ret = ath10k_wmi_report_radar_found(ar, &radar_info);
  3371. if (ret) {
  3372. ath10k_warn(ar, "failed to send radar found %d\n", ret);
  3373. goto wait_complete;
  3374. }
  3375. time_left = wait_for_completion_timeout(&ar->wmi.radar_confirm,
  3376. ATH10K_WMI_DFS_CONF_TIMEOUT_HZ);
  3377. if (time_left) {
  3378. /* DFS Confirmation status event received and
  3379. * necessary action completed.
  3380. */
  3381. goto wait_complete;
  3382. } else {
  3383. /* DFS Confirmation event not received from FW.Considering this
  3384. * as real radar.
  3385. */
  3386. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3387. "dfs confirmation not received from fw, considering as radar\n");
  3388. goto radar_detected;
  3389. }
  3390. radar_detected:
  3391. ath10k_radar_detected(ar);
  3392. /* Reset state to allow sending confirmation on consecutive radar
  3393. * detections, unless radar confirmation is disabled/stopped.
  3394. */
  3395. wait_complete:
  3396. spin_lock_bh(&ar->data_lock);
  3397. if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_STOPPED)
  3398. ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_IDLE;
  3399. spin_unlock_bh(&ar->data_lock);
  3400. }
  3401. static void ath10k_dfs_radar_report(struct ath10k *ar,
  3402. struct wmi_phyerr_ev_arg *phyerr,
  3403. const struct phyerr_radar_report *rr,
  3404. u64 tsf)
  3405. {
  3406. u32 reg0, reg1, tsf32l;
  3407. struct ieee80211_channel *ch;
  3408. struct pulse_event pe;
  3409. struct radar_detector_specs rs;
  3410. u64 tsf64;
  3411. u8 rssi, width;
  3412. struct ath10k_radar_found_info *radar_info;
  3413. reg0 = __le32_to_cpu(rr->reg0);
  3414. reg1 = __le32_to_cpu(rr->reg1);
  3415. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3416. "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
  3417. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
  3418. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
  3419. MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
  3420. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
  3421. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3422. "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
  3423. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
  3424. MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
  3425. MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
  3426. MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
  3427. MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
  3428. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3429. "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
  3430. MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
  3431. MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
  3432. if (!ar->dfs_detector)
  3433. return;
  3434. spin_lock_bh(&ar->data_lock);
  3435. ch = ar->rx_channel;
  3436. /* fetch target operating channel during channel change */
  3437. if (!ch)
  3438. ch = ar->tgt_oper_chan;
  3439. spin_unlock_bh(&ar->data_lock);
  3440. if (!ch) {
  3441. ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
  3442. goto radar_detected;
  3443. }
  3444. /* report event to DFS pattern detector */
  3445. tsf32l = phyerr->tsf_timestamp;
  3446. tsf64 = tsf & (~0xFFFFFFFFULL);
  3447. tsf64 |= tsf32l;
  3448. width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
  3449. rssi = phyerr->rssi_combined;
  3450. /* hardware store this as 8 bit signed value,
  3451. * set to zero if negative number
  3452. */
  3453. if (rssi & 0x80)
  3454. rssi = 0;
  3455. pe.ts = tsf64;
  3456. pe.freq = ch->center_freq;
  3457. pe.width = width;
  3458. pe.rssi = rssi;
  3459. pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
  3460. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3461. "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
  3462. pe.freq, pe.width, pe.rssi, pe.ts);
  3463. ATH10K_DFS_STAT_INC(ar, pulses_detected);
  3464. if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe, &rs)) {
  3465. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3466. "dfs no pulse pattern detected, yet\n");
  3467. return;
  3468. }
  3469. if ((test_bit(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, ar->wmi.svc_map)) &&
  3470. ar->dfs_detector->region == NL80211_DFS_FCC) {
  3471. /* Consecutive radar indications need not be
  3472. * sent to the firmware until we get confirmation
  3473. * for the previous detected radar.
  3474. */
  3475. spin_lock_bh(&ar->data_lock);
  3476. if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_IDLE) {
  3477. spin_unlock_bh(&ar->data_lock);
  3478. return;
  3479. }
  3480. ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_INPROGRESS;
  3481. radar_info = &ar->last_radar_info;
  3482. radar_info->pri_min = rs.pri_min;
  3483. radar_info->pri_max = rs.pri_max;
  3484. radar_info->width_min = rs.width_min;
  3485. radar_info->width_max = rs.width_max;
  3486. /*TODO Find sidx_min and sidx_max */
  3487. radar_info->sidx_min = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
  3488. radar_info->sidx_max = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
  3489. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3490. "sending wmi radar found cmd pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
  3491. radar_info->pri_min, radar_info->pri_max,
  3492. radar_info->width_min, radar_info->width_max,
  3493. radar_info->sidx_min, radar_info->sidx_max);
  3494. ieee80211_queue_work(ar->hw, &ar->radar_confirmation_work);
  3495. spin_unlock_bh(&ar->data_lock);
  3496. return;
  3497. }
  3498. radar_detected:
  3499. ath10k_radar_detected(ar);
  3500. }
  3501. static int ath10k_dfs_fft_report(struct ath10k *ar,
  3502. struct wmi_phyerr_ev_arg *phyerr,
  3503. const struct phyerr_fft_report *fftr,
  3504. u64 tsf)
  3505. {
  3506. u32 reg0, reg1;
  3507. u8 rssi, peak_mag;
  3508. reg0 = __le32_to_cpu(fftr->reg0);
  3509. reg1 = __le32_to_cpu(fftr->reg1);
  3510. rssi = phyerr->rssi_combined;
  3511. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3512. "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
  3513. MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
  3514. MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
  3515. MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
  3516. MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
  3517. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3518. "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
  3519. MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
  3520. MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
  3521. MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
  3522. MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
  3523. peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
  3524. /* false event detection */
  3525. if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
  3526. peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
  3527. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
  3528. ATH10K_DFS_STAT_INC(ar, pulses_discarded);
  3529. return -EINVAL;
  3530. }
  3531. return 0;
  3532. }
  3533. void ath10k_wmi_event_dfs(struct ath10k *ar,
  3534. struct wmi_phyerr_ev_arg *phyerr,
  3535. u64 tsf)
  3536. {
  3537. int buf_len, tlv_len, res, i = 0;
  3538. const struct phyerr_tlv *tlv;
  3539. const struct phyerr_radar_report *rr;
  3540. const struct phyerr_fft_report *fftr;
  3541. const u8 *tlv_buf;
  3542. buf_len = phyerr->buf_len;
  3543. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3544. "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
  3545. phyerr->phy_err_code, phyerr->rssi_combined,
  3546. phyerr->tsf_timestamp, tsf, buf_len);
  3547. /* Skip event if DFS disabled */
  3548. if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED))
  3549. return;
  3550. ATH10K_DFS_STAT_INC(ar, pulses_total);
  3551. while (i < buf_len) {
  3552. if (i + sizeof(*tlv) > buf_len) {
  3553. ath10k_warn(ar, "too short buf for tlv header (%d)\n",
  3554. i);
  3555. return;
  3556. }
  3557. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3558. tlv_len = __le16_to_cpu(tlv->len);
  3559. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3560. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3561. "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
  3562. tlv_len, tlv->tag, tlv->sig);
  3563. switch (tlv->tag) {
  3564. case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
  3565. if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
  3566. ath10k_warn(ar, "too short radar pulse summary (%d)\n",
  3567. i);
  3568. return;
  3569. }
  3570. rr = (struct phyerr_radar_report *)tlv_buf;
  3571. ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
  3572. break;
  3573. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3574. if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
  3575. ath10k_warn(ar, "too short fft report (%d)\n",
  3576. i);
  3577. return;
  3578. }
  3579. fftr = (struct phyerr_fft_report *)tlv_buf;
  3580. res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
  3581. if (res)
  3582. return;
  3583. break;
  3584. }
  3585. i += sizeof(*tlv) + tlv_len;
  3586. }
  3587. }
  3588. void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
  3589. struct wmi_phyerr_ev_arg *phyerr,
  3590. u64 tsf)
  3591. {
  3592. int buf_len, tlv_len, res, i = 0;
  3593. struct phyerr_tlv *tlv;
  3594. const void *tlv_buf;
  3595. const struct phyerr_fft_report *fftr;
  3596. size_t fftr_len;
  3597. buf_len = phyerr->buf_len;
  3598. while (i < buf_len) {
  3599. if (i + sizeof(*tlv) > buf_len) {
  3600. ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
  3601. i);
  3602. return;
  3603. }
  3604. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3605. tlv_len = __le16_to_cpu(tlv->len);
  3606. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3607. if (i + sizeof(*tlv) + tlv_len > buf_len) {
  3608. ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
  3609. i);
  3610. return;
  3611. }
  3612. switch (tlv->tag) {
  3613. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3614. if (sizeof(*fftr) > tlv_len) {
  3615. ath10k_warn(ar, "failed to parse fft report at byte %d\n",
  3616. i);
  3617. return;
  3618. }
  3619. fftr_len = tlv_len - sizeof(*fftr);
  3620. fftr = tlv_buf;
  3621. res = ath10k_spectral_process_fft(ar, phyerr,
  3622. fftr, fftr_len,
  3623. tsf);
  3624. if (res < 0) {
  3625. ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
  3626. res);
  3627. return;
  3628. }
  3629. break;
  3630. }
  3631. i += sizeof(*tlv) + tlv_len;
  3632. }
  3633. }
  3634. static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3635. struct sk_buff *skb,
  3636. struct wmi_phyerr_hdr_arg *arg)
  3637. {
  3638. struct wmi_phyerr_event *ev = (void *)skb->data;
  3639. if (skb->len < sizeof(*ev))
  3640. return -EPROTO;
  3641. arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
  3642. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3643. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3644. arg->buf_len = skb->len - sizeof(*ev);
  3645. arg->phyerrs = ev->phyerrs;
  3646. return 0;
  3647. }
  3648. static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3649. struct sk_buff *skb,
  3650. struct wmi_phyerr_hdr_arg *arg)
  3651. {
  3652. struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
  3653. if (skb->len < sizeof(*ev))
  3654. return -EPROTO;
  3655. /* 10.4 firmware always reports only one phyerr */
  3656. arg->num_phyerrs = 1;
  3657. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3658. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3659. arg->buf_len = skb->len;
  3660. arg->phyerrs = skb->data;
  3661. return 0;
  3662. }
  3663. int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
  3664. const void *phyerr_buf,
  3665. int left_len,
  3666. struct wmi_phyerr_ev_arg *arg)
  3667. {
  3668. const struct wmi_phyerr *phyerr = phyerr_buf;
  3669. int i;
  3670. if (left_len < sizeof(*phyerr)) {
  3671. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3672. left_len, sizeof(*phyerr));
  3673. return -EINVAL;
  3674. }
  3675. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3676. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3677. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3678. arg->rssi_combined = phyerr->rssi_combined;
  3679. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3680. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3681. arg->buf = phyerr->buf;
  3682. arg->hdr_len = sizeof(*phyerr);
  3683. for (i = 0; i < 4; i++)
  3684. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3685. switch (phyerr->phy_err_code) {
  3686. case PHY_ERROR_GEN_SPECTRAL_SCAN:
  3687. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3688. break;
  3689. case PHY_ERROR_GEN_FALSE_RADAR_EXT:
  3690. arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
  3691. break;
  3692. case PHY_ERROR_GEN_RADAR:
  3693. arg->phy_err_code = PHY_ERROR_RADAR;
  3694. break;
  3695. default:
  3696. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3697. break;
  3698. }
  3699. return 0;
  3700. }
  3701. static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
  3702. const void *phyerr_buf,
  3703. int left_len,
  3704. struct wmi_phyerr_ev_arg *arg)
  3705. {
  3706. const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
  3707. u32 phy_err_mask;
  3708. int i;
  3709. if (left_len < sizeof(*phyerr)) {
  3710. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3711. left_len, sizeof(*phyerr));
  3712. return -EINVAL;
  3713. }
  3714. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3715. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3716. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3717. arg->rssi_combined = phyerr->rssi_combined;
  3718. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3719. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3720. arg->buf = phyerr->buf;
  3721. arg->hdr_len = sizeof(*phyerr);
  3722. for (i = 0; i < 4; i++)
  3723. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3724. phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
  3725. if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
  3726. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3727. else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
  3728. arg->phy_err_code = PHY_ERROR_RADAR;
  3729. else
  3730. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3731. return 0;
  3732. }
  3733. void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
  3734. {
  3735. struct wmi_phyerr_hdr_arg hdr_arg = {};
  3736. struct wmi_phyerr_ev_arg phyerr_arg = {};
  3737. const void *phyerr;
  3738. u32 count, i, buf_len, phy_err_code;
  3739. u64 tsf;
  3740. int left_len, ret;
  3741. ATH10K_DFS_STAT_INC(ar, phy_errors);
  3742. ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
  3743. if (ret) {
  3744. ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
  3745. return;
  3746. }
  3747. /* Check number of included events */
  3748. count = hdr_arg.num_phyerrs;
  3749. left_len = hdr_arg.buf_len;
  3750. tsf = hdr_arg.tsf_u32;
  3751. tsf <<= 32;
  3752. tsf |= hdr_arg.tsf_l32;
  3753. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3754. "wmi event phyerr count %d tsf64 0x%llX\n",
  3755. count, tsf);
  3756. phyerr = hdr_arg.phyerrs;
  3757. for (i = 0; i < count; i++) {
  3758. ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
  3759. if (ret) {
  3760. ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
  3761. i);
  3762. return;
  3763. }
  3764. left_len -= phyerr_arg.hdr_len;
  3765. buf_len = phyerr_arg.buf_len;
  3766. phy_err_code = phyerr_arg.phy_err_code;
  3767. if (left_len < buf_len) {
  3768. ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
  3769. return;
  3770. }
  3771. left_len -= buf_len;
  3772. switch (phy_err_code) {
  3773. case PHY_ERROR_RADAR:
  3774. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3775. break;
  3776. case PHY_ERROR_SPECTRAL_SCAN:
  3777. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3778. break;
  3779. case PHY_ERROR_FALSE_RADAR_EXT:
  3780. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3781. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3782. break;
  3783. default:
  3784. break;
  3785. }
  3786. phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
  3787. }
  3788. }
  3789. static int
  3790. ath10k_wmi_10_4_op_pull_dfs_status_ev(struct ath10k *ar, struct sk_buff *skb,
  3791. struct wmi_dfs_status_ev_arg *arg)
  3792. {
  3793. struct wmi_dfs_status_ev_arg *ev = (void *)skb->data;
  3794. if (skb->len < sizeof(*ev))
  3795. return -EPROTO;
  3796. arg->status = ev->status;
  3797. return 0;
  3798. }
  3799. static void
  3800. ath10k_wmi_event_dfs_status_check(struct ath10k *ar, struct sk_buff *skb)
  3801. {
  3802. struct wmi_dfs_status_ev_arg status_arg = {};
  3803. int ret;
  3804. ret = ath10k_wmi_pull_dfs_status(ar, skb, &status_arg);
  3805. if (ret) {
  3806. ath10k_warn(ar, "failed to parse dfs status event: %d\n", ret);
  3807. return;
  3808. }
  3809. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3810. "dfs status event received from fw: %d\n",
  3811. status_arg.status);
  3812. /* Even in case of radar detection failure we follow the same
  3813. * behaviour as if radar is detected i.e to switch to a different
  3814. * channel.
  3815. */
  3816. if (status_arg.status == WMI_HW_RADAR_DETECTED ||
  3817. status_arg.status == WMI_RADAR_DETECTION_FAIL)
  3818. ath10k_radar_detected(ar);
  3819. complete(&ar->wmi.radar_confirm);
  3820. }
  3821. void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
  3822. {
  3823. struct wmi_roam_ev_arg arg = {};
  3824. int ret;
  3825. u32 vdev_id;
  3826. u32 reason;
  3827. s32 rssi;
  3828. ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
  3829. if (ret) {
  3830. ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
  3831. return;
  3832. }
  3833. vdev_id = __le32_to_cpu(arg.vdev_id);
  3834. reason = __le32_to_cpu(arg.reason);
  3835. rssi = __le32_to_cpu(arg.rssi);
  3836. rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
  3837. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3838. "wmi roam event vdev %u reason 0x%08x rssi %d\n",
  3839. vdev_id, reason, rssi);
  3840. if (reason >= WMI_ROAM_REASON_MAX)
  3841. ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
  3842. reason, vdev_id);
  3843. switch (reason) {
  3844. case WMI_ROAM_REASON_BEACON_MISS:
  3845. ath10k_mac_handle_beacon_miss(ar, vdev_id);
  3846. break;
  3847. case WMI_ROAM_REASON_BETTER_AP:
  3848. case WMI_ROAM_REASON_LOW_RSSI:
  3849. case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
  3850. case WMI_ROAM_REASON_HO_FAILED:
  3851. ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
  3852. reason, vdev_id);
  3853. break;
  3854. }
  3855. }
  3856. void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
  3857. {
  3858. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
  3859. }
  3860. void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
  3861. {
  3862. char buf[101], c;
  3863. int i;
  3864. for (i = 0; i < sizeof(buf) - 1; i++) {
  3865. if (i >= skb->len)
  3866. break;
  3867. c = skb->data[i];
  3868. if (c == '\0')
  3869. break;
  3870. if (isascii(c) && isprint(c))
  3871. buf[i] = c;
  3872. else
  3873. buf[i] = '.';
  3874. }
  3875. if (i == sizeof(buf) - 1)
  3876. ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
  3877. /* for some reason the debug prints end with \n, remove that */
  3878. if (skb->data[i - 1] == '\n')
  3879. i--;
  3880. /* the last byte is always reserved for the null character */
  3881. buf[i] = '\0';
  3882. ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
  3883. }
  3884. void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
  3885. {
  3886. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
  3887. }
  3888. void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
  3889. {
  3890. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
  3891. }
  3892. void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
  3893. struct sk_buff *skb)
  3894. {
  3895. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
  3896. }
  3897. void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
  3898. struct sk_buff *skb)
  3899. {
  3900. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
  3901. }
  3902. void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
  3903. {
  3904. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
  3905. }
  3906. void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
  3907. {
  3908. struct wmi_wow_ev_arg ev = {};
  3909. int ret;
  3910. complete(&ar->wow.wakeup_completed);
  3911. ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
  3912. if (ret) {
  3913. ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
  3914. return;
  3915. }
  3916. ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
  3917. wow_reason(ev.wake_reason));
  3918. }
  3919. void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
  3920. {
  3921. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
  3922. }
  3923. static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
  3924. struct wmi_pdev_tpc_config_event *ev,
  3925. u32 rate_idx, u32 num_chains,
  3926. u32 rate_code, u8 type)
  3927. {
  3928. u8 tpc, num_streams, preamble, ch, stm_idx;
  3929. num_streams = ATH10K_HW_NSS(rate_code);
  3930. preamble = ATH10K_HW_PREAMBLE(rate_code);
  3931. ch = num_chains - 1;
  3932. tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
  3933. if (__le32_to_cpu(ev->num_tx_chain) <= 1)
  3934. goto out;
  3935. if (preamble == WMI_RATE_PREAMBLE_CCK)
  3936. goto out;
  3937. stm_idx = num_streams - 1;
  3938. if (num_chains <= num_streams)
  3939. goto out;
  3940. switch (type) {
  3941. case WMI_TPC_TABLE_TYPE_STBC:
  3942. tpc = min_t(u8, tpc,
  3943. ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
  3944. break;
  3945. case WMI_TPC_TABLE_TYPE_TXBF:
  3946. tpc = min_t(u8, tpc,
  3947. ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
  3948. break;
  3949. case WMI_TPC_TABLE_TYPE_CDD:
  3950. tpc = min_t(u8, tpc,
  3951. ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
  3952. break;
  3953. default:
  3954. ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
  3955. tpc = 0;
  3956. break;
  3957. }
  3958. out:
  3959. return tpc;
  3960. }
  3961. static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
  3962. struct wmi_pdev_tpc_config_event *ev,
  3963. struct ath10k_tpc_stats *tpc_stats,
  3964. u8 *rate_code, u16 *pream_table, u8 type)
  3965. {
  3966. u32 i, j, pream_idx, flags;
  3967. u8 tpc[WMI_TPC_TX_N_CHAIN];
  3968. char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  3969. char buff[WMI_TPC_BUF_SIZE];
  3970. flags = __le32_to_cpu(ev->flags);
  3971. switch (type) {
  3972. case WMI_TPC_TABLE_TYPE_CDD:
  3973. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
  3974. ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
  3975. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3976. return;
  3977. }
  3978. break;
  3979. case WMI_TPC_TABLE_TYPE_STBC:
  3980. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
  3981. ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
  3982. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3983. return;
  3984. }
  3985. break;
  3986. case WMI_TPC_TABLE_TYPE_TXBF:
  3987. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
  3988. ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
  3989. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3990. return;
  3991. }
  3992. break;
  3993. default:
  3994. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3995. "invalid table type in wmi tpc event: %d\n", type);
  3996. return;
  3997. }
  3998. pream_idx = 0;
  3999. for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
  4000. memset(tpc_value, 0, sizeof(tpc_value));
  4001. memset(buff, 0, sizeof(buff));
  4002. if (i == pream_table[pream_idx])
  4003. pream_idx++;
  4004. for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
  4005. if (j >= __le32_to_cpu(ev->num_tx_chain))
  4006. break;
  4007. tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
  4008. rate_code[i],
  4009. type);
  4010. snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
  4011. strlcat(tpc_value, buff, sizeof(tpc_value));
  4012. }
  4013. tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
  4014. tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
  4015. memcpy(tpc_stats->tpc_table[type].tpc_value[i],
  4016. tpc_value, sizeof(tpc_value));
  4017. }
  4018. }
  4019. void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
  4020. u32 num_tx_chain)
  4021. {
  4022. u32 i, j, pream_idx;
  4023. u8 rate_idx;
  4024. /* Create the rate code table based on the chains supported */
  4025. rate_idx = 0;
  4026. pream_idx = 0;
  4027. /* Fill CCK rate code */
  4028. for (i = 0; i < 4; i++) {
  4029. rate_code[rate_idx] =
  4030. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
  4031. rate_idx++;
  4032. }
  4033. pream_table[pream_idx] = rate_idx;
  4034. pream_idx++;
  4035. /* Fill OFDM rate code */
  4036. for (i = 0; i < 8; i++) {
  4037. rate_code[rate_idx] =
  4038. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
  4039. rate_idx++;
  4040. }
  4041. pream_table[pream_idx] = rate_idx;
  4042. pream_idx++;
  4043. /* Fill HT20 rate code */
  4044. for (i = 0; i < num_tx_chain; i++) {
  4045. for (j = 0; j < 8; j++) {
  4046. rate_code[rate_idx] =
  4047. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  4048. rate_idx++;
  4049. }
  4050. }
  4051. pream_table[pream_idx] = rate_idx;
  4052. pream_idx++;
  4053. /* Fill HT40 rate code */
  4054. for (i = 0; i < num_tx_chain; i++) {
  4055. for (j = 0; j < 8; j++) {
  4056. rate_code[rate_idx] =
  4057. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  4058. rate_idx++;
  4059. }
  4060. }
  4061. pream_table[pream_idx] = rate_idx;
  4062. pream_idx++;
  4063. /* Fill VHT20 rate code */
  4064. for (i = 0; i < num_tx_chain; i++) {
  4065. for (j = 0; j < 10; j++) {
  4066. rate_code[rate_idx] =
  4067. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  4068. rate_idx++;
  4069. }
  4070. }
  4071. pream_table[pream_idx] = rate_idx;
  4072. pream_idx++;
  4073. /* Fill VHT40 rate code */
  4074. for (i = 0; i < num_tx_chain; i++) {
  4075. for (j = 0; j < 10; j++) {
  4076. rate_code[rate_idx] =
  4077. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  4078. rate_idx++;
  4079. }
  4080. }
  4081. pream_table[pream_idx] = rate_idx;
  4082. pream_idx++;
  4083. /* Fill VHT80 rate code */
  4084. for (i = 0; i < num_tx_chain; i++) {
  4085. for (j = 0; j < 10; j++) {
  4086. rate_code[rate_idx] =
  4087. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  4088. rate_idx++;
  4089. }
  4090. }
  4091. pream_table[pream_idx] = rate_idx;
  4092. pream_idx++;
  4093. rate_code[rate_idx++] =
  4094. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  4095. rate_code[rate_idx++] =
  4096. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  4097. rate_code[rate_idx++] =
  4098. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  4099. rate_code[rate_idx++] =
  4100. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  4101. rate_code[rate_idx++] =
  4102. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  4103. pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
  4104. }
  4105. void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
  4106. {
  4107. u32 num_tx_chain;
  4108. u8 rate_code[WMI_TPC_RATE_MAX];
  4109. u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
  4110. struct wmi_pdev_tpc_config_event *ev;
  4111. struct ath10k_tpc_stats *tpc_stats;
  4112. ev = (struct wmi_pdev_tpc_config_event *)skb->data;
  4113. num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  4114. if (num_tx_chain > WMI_TPC_TX_N_CHAIN) {
  4115. ath10k_warn(ar, "number of tx chain is %d greater than TPC configured tx chain %d\n",
  4116. num_tx_chain, WMI_TPC_TX_N_CHAIN);
  4117. return;
  4118. }
  4119. tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
  4120. if (!tpc_stats)
  4121. return;
  4122. ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
  4123. num_tx_chain);
  4124. tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
  4125. tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
  4126. tpc_stats->ctl = __le32_to_cpu(ev->ctl);
  4127. tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
  4128. tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
  4129. tpc_stats->twice_antenna_reduction =
  4130. __le32_to_cpu(ev->twice_antenna_reduction);
  4131. tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
  4132. tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
  4133. tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  4134. tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
  4135. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  4136. rate_code, pream_table,
  4137. WMI_TPC_TABLE_TYPE_CDD);
  4138. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  4139. rate_code, pream_table,
  4140. WMI_TPC_TABLE_TYPE_STBC);
  4141. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  4142. rate_code, pream_table,
  4143. WMI_TPC_TABLE_TYPE_TXBF);
  4144. ath10k_debug_tpc_stats_process(ar, tpc_stats);
  4145. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4146. "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
  4147. __le32_to_cpu(ev->chan_freq),
  4148. __le32_to_cpu(ev->phy_mode),
  4149. __le32_to_cpu(ev->ctl),
  4150. __le32_to_cpu(ev->reg_domain),
  4151. a_sle32_to_cpu(ev->twice_antenna_gain),
  4152. __le32_to_cpu(ev->twice_antenna_reduction),
  4153. __le32_to_cpu(ev->power_limit),
  4154. __le32_to_cpu(ev->twice_max_rd_power) / 2,
  4155. __le32_to_cpu(ev->num_tx_chain),
  4156. __le32_to_cpu(ev->rate_max));
  4157. }
  4158. static u8
  4159. ath10k_wmi_tpc_final_get_rate(struct ath10k *ar,
  4160. struct wmi_pdev_tpc_final_table_event *ev,
  4161. u32 rate_idx, u32 num_chains,
  4162. u32 rate_code, u8 type, u32 pream_idx)
  4163. {
  4164. u8 tpc, num_streams, preamble, ch, stm_idx;
  4165. s8 pow_agcdd, pow_agstbc, pow_agtxbf;
  4166. int pream;
  4167. num_streams = ATH10K_HW_NSS(rate_code);
  4168. preamble = ATH10K_HW_PREAMBLE(rate_code);
  4169. ch = num_chains - 1;
  4170. stm_idx = num_streams - 1;
  4171. pream = -1;
  4172. if (__le32_to_cpu(ev->chan_freq) <= 2483) {
  4173. switch (pream_idx) {
  4174. case WMI_TPC_PREAM_2GHZ_CCK:
  4175. pream = 0;
  4176. break;
  4177. case WMI_TPC_PREAM_2GHZ_OFDM:
  4178. pream = 1;
  4179. break;
  4180. case WMI_TPC_PREAM_2GHZ_HT20:
  4181. case WMI_TPC_PREAM_2GHZ_VHT20:
  4182. pream = 2;
  4183. break;
  4184. case WMI_TPC_PREAM_2GHZ_HT40:
  4185. case WMI_TPC_PREAM_2GHZ_VHT40:
  4186. pream = 3;
  4187. break;
  4188. case WMI_TPC_PREAM_2GHZ_VHT80:
  4189. pream = 4;
  4190. break;
  4191. default:
  4192. pream = -1;
  4193. break;
  4194. }
  4195. }
  4196. if (__le32_to_cpu(ev->chan_freq) >= 5180) {
  4197. switch (pream_idx) {
  4198. case WMI_TPC_PREAM_5GHZ_OFDM:
  4199. pream = 0;
  4200. break;
  4201. case WMI_TPC_PREAM_5GHZ_HT20:
  4202. case WMI_TPC_PREAM_5GHZ_VHT20:
  4203. pream = 1;
  4204. break;
  4205. case WMI_TPC_PREAM_5GHZ_HT40:
  4206. case WMI_TPC_PREAM_5GHZ_VHT40:
  4207. pream = 2;
  4208. break;
  4209. case WMI_TPC_PREAM_5GHZ_VHT80:
  4210. pream = 3;
  4211. break;
  4212. case WMI_TPC_PREAM_5GHZ_HTCUP:
  4213. pream = 4;
  4214. break;
  4215. default:
  4216. pream = -1;
  4217. break;
  4218. }
  4219. }
  4220. if (pream == 4)
  4221. tpc = min_t(u8, ev->rates_array[rate_idx],
  4222. ev->max_reg_allow_pow[ch]);
  4223. else
  4224. tpc = min_t(u8, min_t(u8, ev->rates_array[rate_idx],
  4225. ev->max_reg_allow_pow[ch]),
  4226. ev->ctl_power_table[0][pream][stm_idx]);
  4227. if (__le32_to_cpu(ev->num_tx_chain) <= 1)
  4228. goto out;
  4229. if (preamble == WMI_RATE_PREAMBLE_CCK)
  4230. goto out;
  4231. if (num_chains <= num_streams)
  4232. goto out;
  4233. switch (type) {
  4234. case WMI_TPC_TABLE_TYPE_STBC:
  4235. pow_agstbc = ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx];
  4236. if (pream == 4)
  4237. tpc = min_t(u8, tpc, pow_agstbc);
  4238. else
  4239. tpc = min_t(u8, min_t(u8, tpc, pow_agstbc),
  4240. ev->ctl_power_table[0][pream][stm_idx]);
  4241. break;
  4242. case WMI_TPC_TABLE_TYPE_TXBF:
  4243. pow_agtxbf = ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx];
  4244. if (pream == 4)
  4245. tpc = min_t(u8, tpc, pow_agtxbf);
  4246. else
  4247. tpc = min_t(u8, min_t(u8, tpc, pow_agtxbf),
  4248. ev->ctl_power_table[1][pream][stm_idx]);
  4249. break;
  4250. case WMI_TPC_TABLE_TYPE_CDD:
  4251. pow_agcdd = ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx];
  4252. if (pream == 4)
  4253. tpc = min_t(u8, tpc, pow_agcdd);
  4254. else
  4255. tpc = min_t(u8, min_t(u8, tpc, pow_agcdd),
  4256. ev->ctl_power_table[0][pream][stm_idx]);
  4257. break;
  4258. default:
  4259. ath10k_warn(ar, "unknown wmi tpc final table type: %d\n", type);
  4260. tpc = 0;
  4261. break;
  4262. }
  4263. out:
  4264. return tpc;
  4265. }
  4266. static void
  4267. ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k *ar,
  4268. struct wmi_pdev_tpc_final_table_event *ev,
  4269. struct ath10k_tpc_stats_final *tpc_stats,
  4270. u8 *rate_code, u16 *pream_table, u8 type)
  4271. {
  4272. u32 i, j, pream_idx, flags;
  4273. u8 tpc[WMI_TPC_TX_N_CHAIN];
  4274. char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  4275. char buff[WMI_TPC_BUF_SIZE];
  4276. flags = __le32_to_cpu(ev->flags);
  4277. switch (type) {
  4278. case WMI_TPC_TABLE_TYPE_CDD:
  4279. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
  4280. ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
  4281. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4282. return;
  4283. }
  4284. break;
  4285. case WMI_TPC_TABLE_TYPE_STBC:
  4286. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
  4287. ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
  4288. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4289. return;
  4290. }
  4291. break;
  4292. case WMI_TPC_TABLE_TYPE_TXBF:
  4293. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
  4294. ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
  4295. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  4296. return;
  4297. }
  4298. break;
  4299. default:
  4300. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4301. "invalid table type in wmi tpc event: %d\n", type);
  4302. return;
  4303. }
  4304. pream_idx = 0;
  4305. for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
  4306. memset(tpc_value, 0, sizeof(tpc_value));
  4307. memset(buff, 0, sizeof(buff));
  4308. if (i == pream_table[pream_idx])
  4309. pream_idx++;
  4310. for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
  4311. if (j >= __le32_to_cpu(ev->num_tx_chain))
  4312. break;
  4313. tpc[j] = ath10k_wmi_tpc_final_get_rate(ar, ev, i, j + 1,
  4314. rate_code[i],
  4315. type, pream_idx);
  4316. snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
  4317. strlcat(tpc_value, buff, sizeof(tpc_value));
  4318. }
  4319. tpc_stats->tpc_table_final[type].pream_idx[i] = pream_idx;
  4320. tpc_stats->tpc_table_final[type].rate_code[i] = rate_code[i];
  4321. memcpy(tpc_stats->tpc_table_final[type].tpc_value[i],
  4322. tpc_value, sizeof(tpc_value));
  4323. }
  4324. }
  4325. void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb)
  4326. {
  4327. u32 num_tx_chain;
  4328. u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
  4329. u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
  4330. struct wmi_pdev_tpc_final_table_event *ev;
  4331. struct ath10k_tpc_stats_final *tpc_stats;
  4332. ev = (struct wmi_pdev_tpc_final_table_event *)skb->data;
  4333. tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
  4334. if (!tpc_stats)
  4335. return;
  4336. num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  4337. ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
  4338. num_tx_chain);
  4339. tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
  4340. tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
  4341. tpc_stats->ctl = __le32_to_cpu(ev->ctl);
  4342. tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
  4343. tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
  4344. tpc_stats->twice_antenna_reduction =
  4345. __le32_to_cpu(ev->twice_antenna_reduction);
  4346. tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
  4347. tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
  4348. tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  4349. tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
  4350. ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
  4351. rate_code, pream_table,
  4352. WMI_TPC_TABLE_TYPE_CDD);
  4353. ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
  4354. rate_code, pream_table,
  4355. WMI_TPC_TABLE_TYPE_STBC);
  4356. ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
  4357. rate_code, pream_table,
  4358. WMI_TPC_TABLE_TYPE_TXBF);
  4359. ath10k_debug_tpc_stats_final_process(ar, tpc_stats);
  4360. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4361. "wmi event tpc final table channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
  4362. __le32_to_cpu(ev->chan_freq),
  4363. __le32_to_cpu(ev->phy_mode),
  4364. __le32_to_cpu(ev->ctl),
  4365. __le32_to_cpu(ev->reg_domain),
  4366. a_sle32_to_cpu(ev->twice_antenna_gain),
  4367. __le32_to_cpu(ev->twice_antenna_reduction),
  4368. __le32_to_cpu(ev->power_limit),
  4369. __le32_to_cpu(ev->twice_max_rd_power) / 2,
  4370. __le32_to_cpu(ev->num_tx_chain),
  4371. __le32_to_cpu(ev->rate_max));
  4372. }
  4373. static void
  4374. ath10k_wmi_handle_tdls_peer_event(struct ath10k *ar, struct sk_buff *skb)
  4375. {
  4376. struct wmi_tdls_peer_event *ev;
  4377. struct ath10k_peer *peer;
  4378. struct ath10k_vif *arvif;
  4379. int vdev_id;
  4380. int peer_status;
  4381. int peer_reason;
  4382. u8 reason;
  4383. if (skb->len < sizeof(*ev)) {
  4384. ath10k_err(ar, "received tdls peer event with invalid size (%d bytes)\n",
  4385. skb->len);
  4386. return;
  4387. }
  4388. ev = (struct wmi_tdls_peer_event *)skb->data;
  4389. vdev_id = __le32_to_cpu(ev->vdev_id);
  4390. peer_status = __le32_to_cpu(ev->peer_status);
  4391. peer_reason = __le32_to_cpu(ev->peer_reason);
  4392. spin_lock_bh(&ar->data_lock);
  4393. peer = ath10k_peer_find(ar, vdev_id, ev->peer_macaddr.addr);
  4394. spin_unlock_bh(&ar->data_lock);
  4395. if (!peer) {
  4396. ath10k_warn(ar, "failed to find peer entry for %pM\n",
  4397. ev->peer_macaddr.addr);
  4398. return;
  4399. }
  4400. switch (peer_status) {
  4401. case WMI_TDLS_SHOULD_TEARDOWN:
  4402. switch (peer_reason) {
  4403. case WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT:
  4404. case WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE:
  4405. case WMI_TDLS_TEARDOWN_REASON_RSSI:
  4406. reason = WLAN_REASON_TDLS_TEARDOWN_UNREACHABLE;
  4407. break;
  4408. default:
  4409. reason = WLAN_REASON_TDLS_TEARDOWN_UNSPECIFIED;
  4410. break;
  4411. }
  4412. arvif = ath10k_get_arvif(ar, vdev_id);
  4413. if (!arvif) {
  4414. ath10k_warn(ar, "received tdls peer event for invalid vdev id %u\n",
  4415. vdev_id);
  4416. return;
  4417. }
  4418. ieee80211_tdls_oper_request(arvif->vif, ev->peer_macaddr.addr,
  4419. NL80211_TDLS_TEARDOWN, reason,
  4420. GFP_ATOMIC);
  4421. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4422. "received tdls teardown event for peer %pM reason %u\n",
  4423. ev->peer_macaddr.addr, peer_reason);
  4424. break;
  4425. default:
  4426. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4427. "received unknown tdls peer event %u\n",
  4428. peer_status);
  4429. break;
  4430. }
  4431. }
  4432. void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
  4433. {
  4434. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
  4435. }
  4436. void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
  4437. {
  4438. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
  4439. }
  4440. void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
  4441. {
  4442. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
  4443. }
  4444. void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
  4445. {
  4446. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
  4447. }
  4448. void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
  4449. {
  4450. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
  4451. }
  4452. void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
  4453. struct sk_buff *skb)
  4454. {
  4455. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
  4456. }
  4457. void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
  4458. {
  4459. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
  4460. }
  4461. void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
  4462. {
  4463. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
  4464. }
  4465. void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
  4466. {
  4467. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
  4468. }
  4469. static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
  4470. u32 num_units, u32 unit_len)
  4471. {
  4472. dma_addr_t paddr;
  4473. u32 pool_size;
  4474. int idx = ar->wmi.num_mem_chunks;
  4475. void *vaddr;
  4476. pool_size = num_units * round_up(unit_len, 4);
  4477. vaddr = dma_zalloc_coherent(ar->dev, pool_size, &paddr, GFP_KERNEL);
  4478. if (!vaddr)
  4479. return -ENOMEM;
  4480. ar->wmi.mem_chunks[idx].vaddr = vaddr;
  4481. ar->wmi.mem_chunks[idx].paddr = paddr;
  4482. ar->wmi.mem_chunks[idx].len = pool_size;
  4483. ar->wmi.mem_chunks[idx].req_id = req_id;
  4484. ar->wmi.num_mem_chunks++;
  4485. return num_units;
  4486. }
  4487. static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
  4488. u32 num_units, u32 unit_len)
  4489. {
  4490. int ret;
  4491. while (num_units) {
  4492. ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
  4493. if (ret < 0)
  4494. return ret;
  4495. num_units -= ret;
  4496. }
  4497. return 0;
  4498. }
  4499. static bool
  4500. ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
  4501. const struct wlan_host_mem_req **mem_reqs,
  4502. u32 num_mem_reqs)
  4503. {
  4504. u32 req_id, num_units, unit_size, num_unit_info;
  4505. u32 pool_size;
  4506. int i, j;
  4507. bool found;
  4508. if (ar->wmi.num_mem_chunks != num_mem_reqs)
  4509. return false;
  4510. for (i = 0; i < num_mem_reqs; ++i) {
  4511. req_id = __le32_to_cpu(mem_reqs[i]->req_id);
  4512. num_units = __le32_to_cpu(mem_reqs[i]->num_units);
  4513. unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
  4514. num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
  4515. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4516. if (ar->num_active_peers)
  4517. num_units = ar->num_active_peers + 1;
  4518. else
  4519. num_units = ar->max_num_peers + 1;
  4520. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4521. num_units = ar->max_num_peers + 1;
  4522. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4523. num_units = ar->max_num_vdevs + 1;
  4524. }
  4525. found = false;
  4526. for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
  4527. if (ar->wmi.mem_chunks[j].req_id == req_id) {
  4528. pool_size = num_units * round_up(unit_size, 4);
  4529. if (ar->wmi.mem_chunks[j].len == pool_size) {
  4530. found = true;
  4531. break;
  4532. }
  4533. }
  4534. }
  4535. if (!found)
  4536. return false;
  4537. }
  4538. return true;
  4539. }
  4540. static int
  4541. ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4542. struct wmi_svc_rdy_ev_arg *arg)
  4543. {
  4544. struct wmi_service_ready_event *ev;
  4545. size_t i, n;
  4546. if (skb->len < sizeof(*ev))
  4547. return -EPROTO;
  4548. ev = (void *)skb->data;
  4549. skb_pull(skb, sizeof(*ev));
  4550. arg->min_tx_power = ev->hw_min_tx_power;
  4551. arg->max_tx_power = ev->hw_max_tx_power;
  4552. arg->ht_cap = ev->ht_cap_info;
  4553. arg->vht_cap = ev->vht_cap_info;
  4554. arg->sw_ver0 = ev->sw_version;
  4555. arg->sw_ver1 = ev->sw_version_1;
  4556. arg->phy_capab = ev->phy_capability;
  4557. arg->num_rf_chains = ev->num_rf_chains;
  4558. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4559. arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
  4560. arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
  4561. arg->num_mem_reqs = ev->num_mem_reqs;
  4562. arg->service_map = ev->wmi_service_bitmap;
  4563. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4564. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4565. ARRAY_SIZE(arg->mem_reqs));
  4566. for (i = 0; i < n; i++)
  4567. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4568. if (skb->len <
  4569. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4570. return -EPROTO;
  4571. return 0;
  4572. }
  4573. static int
  4574. ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4575. struct wmi_svc_rdy_ev_arg *arg)
  4576. {
  4577. struct wmi_10x_service_ready_event *ev;
  4578. int i, n;
  4579. if (skb->len < sizeof(*ev))
  4580. return -EPROTO;
  4581. ev = (void *)skb->data;
  4582. skb_pull(skb, sizeof(*ev));
  4583. arg->min_tx_power = ev->hw_min_tx_power;
  4584. arg->max_tx_power = ev->hw_max_tx_power;
  4585. arg->ht_cap = ev->ht_cap_info;
  4586. arg->vht_cap = ev->vht_cap_info;
  4587. arg->sw_ver0 = ev->sw_version;
  4588. arg->phy_capab = ev->phy_capability;
  4589. arg->num_rf_chains = ev->num_rf_chains;
  4590. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4591. arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
  4592. arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
  4593. arg->num_mem_reqs = ev->num_mem_reqs;
  4594. arg->service_map = ev->wmi_service_bitmap;
  4595. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4596. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4597. ARRAY_SIZE(arg->mem_reqs));
  4598. for (i = 0; i < n; i++)
  4599. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4600. if (skb->len <
  4601. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4602. return -EPROTO;
  4603. return 0;
  4604. }
  4605. static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
  4606. {
  4607. struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
  4608. struct sk_buff *skb = ar->svc_rdy_skb;
  4609. struct wmi_svc_rdy_ev_arg arg = {};
  4610. u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
  4611. int ret;
  4612. bool allocated;
  4613. if (!skb) {
  4614. ath10k_warn(ar, "invalid service ready event skb\n");
  4615. return;
  4616. }
  4617. ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
  4618. if (ret) {
  4619. ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
  4620. return;
  4621. }
  4622. ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
  4623. arg.service_map_len);
  4624. ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
  4625. ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
  4626. ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
  4627. ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
  4628. ar->fw_version_major =
  4629. (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
  4630. ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
  4631. ar->fw_version_release =
  4632. (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
  4633. ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
  4634. ar->phy_capability = __le32_to_cpu(arg.phy_capab);
  4635. ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
  4636. ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
  4637. ar->low_5ghz_chan = __le32_to_cpu(arg.low_5ghz_chan);
  4638. ar->high_5ghz_chan = __le32_to_cpu(arg.high_5ghz_chan);
  4639. ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
  4640. arg.service_map, arg.service_map_len);
  4641. if (ar->num_rf_chains > ar->max_spatial_stream) {
  4642. ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
  4643. ar->num_rf_chains, ar->max_spatial_stream);
  4644. ar->num_rf_chains = ar->max_spatial_stream;
  4645. }
  4646. if (!ar->cfg_tx_chainmask) {
  4647. ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
  4648. ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
  4649. }
  4650. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  4651. snprintf(ar->hw->wiphy->fw_version,
  4652. sizeof(ar->hw->wiphy->fw_version),
  4653. "%u.%u.%u.%u",
  4654. ar->fw_version_major,
  4655. ar->fw_version_minor,
  4656. ar->fw_version_release,
  4657. ar->fw_version_build);
  4658. }
  4659. num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
  4660. if (num_mem_reqs > WMI_MAX_MEM_REQS) {
  4661. ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
  4662. num_mem_reqs);
  4663. return;
  4664. }
  4665. if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
  4666. if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
  4667. ar->running_fw->fw_file.fw_features))
  4668. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
  4669. ar->max_num_vdevs;
  4670. else
  4671. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
  4672. ar->max_num_vdevs;
  4673. ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
  4674. ar->max_num_vdevs;
  4675. ar->num_tids = ar->num_active_peers * 2;
  4676. ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
  4677. }
  4678. /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
  4679. * and WMI_SERVICE_IRAM_TIDS, etc.
  4680. */
  4681. allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
  4682. num_mem_reqs);
  4683. if (allocated)
  4684. goto skip_mem_alloc;
  4685. /* Either this event is received during boot time or there is a change
  4686. * in memory requirement from firmware when compared to last request.
  4687. * Free any old memory and do a fresh allocation based on the current
  4688. * memory requirement.
  4689. */
  4690. ath10k_wmi_free_host_mem(ar);
  4691. for (i = 0; i < num_mem_reqs; ++i) {
  4692. req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
  4693. num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
  4694. unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
  4695. num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
  4696. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4697. if (ar->num_active_peers)
  4698. num_units = ar->num_active_peers + 1;
  4699. else
  4700. num_units = ar->max_num_peers + 1;
  4701. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4702. /* number of units to allocate is number of
  4703. * peers, 1 extra for self peer on target
  4704. * this needs to be tied, host and target
  4705. * can get out of sync
  4706. */
  4707. num_units = ar->max_num_peers + 1;
  4708. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4709. num_units = ar->max_num_vdevs + 1;
  4710. }
  4711. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4712. "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
  4713. req_id,
  4714. __le32_to_cpu(arg.mem_reqs[i]->num_units),
  4715. num_unit_info,
  4716. unit_size,
  4717. num_units);
  4718. ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
  4719. unit_size);
  4720. if (ret)
  4721. return;
  4722. }
  4723. skip_mem_alloc:
  4724. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4725. "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
  4726. __le32_to_cpu(arg.min_tx_power),
  4727. __le32_to_cpu(arg.max_tx_power),
  4728. __le32_to_cpu(arg.ht_cap),
  4729. __le32_to_cpu(arg.vht_cap),
  4730. __le32_to_cpu(arg.sw_ver0),
  4731. __le32_to_cpu(arg.sw_ver1),
  4732. __le32_to_cpu(arg.fw_build),
  4733. __le32_to_cpu(arg.phy_capab),
  4734. __le32_to_cpu(arg.num_rf_chains),
  4735. __le32_to_cpu(arg.eeprom_rd),
  4736. __le32_to_cpu(arg.num_mem_reqs));
  4737. dev_kfree_skb(skb);
  4738. ar->svc_rdy_skb = NULL;
  4739. complete(&ar->wmi.service_ready);
  4740. }
  4741. void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
  4742. {
  4743. ar->svc_rdy_skb = skb;
  4744. queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
  4745. }
  4746. static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4747. struct wmi_rdy_ev_arg *arg)
  4748. {
  4749. struct wmi_ready_event *ev = (void *)skb->data;
  4750. if (skb->len < sizeof(*ev))
  4751. return -EPROTO;
  4752. skb_pull(skb, sizeof(*ev));
  4753. arg->sw_version = ev->sw_version;
  4754. arg->abi_version = ev->abi_version;
  4755. arg->status = ev->status;
  4756. arg->mac_addr = ev->mac_addr.addr;
  4757. return 0;
  4758. }
  4759. static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
  4760. struct wmi_roam_ev_arg *arg)
  4761. {
  4762. struct wmi_roam_ev *ev = (void *)skb->data;
  4763. if (skb->len < sizeof(*ev))
  4764. return -EPROTO;
  4765. skb_pull(skb, sizeof(*ev));
  4766. arg->vdev_id = ev->vdev_id;
  4767. arg->reason = ev->reason;
  4768. return 0;
  4769. }
  4770. static int ath10k_wmi_op_pull_echo_ev(struct ath10k *ar,
  4771. struct sk_buff *skb,
  4772. struct wmi_echo_ev_arg *arg)
  4773. {
  4774. struct wmi_echo_event *ev = (void *)skb->data;
  4775. arg->value = ev->value;
  4776. return 0;
  4777. }
  4778. int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
  4779. {
  4780. struct wmi_rdy_ev_arg arg = {};
  4781. int ret;
  4782. ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
  4783. if (ret) {
  4784. ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
  4785. return ret;
  4786. }
  4787. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4788. "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
  4789. __le32_to_cpu(arg.sw_version),
  4790. __le32_to_cpu(arg.abi_version),
  4791. arg.mac_addr,
  4792. __le32_to_cpu(arg.status));
  4793. ether_addr_copy(ar->mac_addr, arg.mac_addr);
  4794. complete(&ar->wmi.unified_ready);
  4795. return 0;
  4796. }
  4797. void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb)
  4798. {
  4799. int ret;
  4800. struct wmi_svc_avail_ev_arg arg = {};
  4801. ret = ath10k_wmi_pull_svc_avail(ar, skb, &arg);
  4802. if (ret) {
  4803. ath10k_warn(ar, "failed to parse service available event: %d\n",
  4804. ret);
  4805. }
  4806. ath10k_wmi_map_svc_ext(ar, arg.service_map_ext, ar->wmi.svc_map,
  4807. __le32_to_cpu(arg.service_map_ext_len));
  4808. }
  4809. static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
  4810. {
  4811. const struct wmi_pdev_temperature_event *ev;
  4812. ev = (struct wmi_pdev_temperature_event *)skb->data;
  4813. if (WARN_ON(skb->len < sizeof(*ev)))
  4814. return -EPROTO;
  4815. ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
  4816. return 0;
  4817. }
  4818. static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
  4819. struct sk_buff *skb)
  4820. {
  4821. struct wmi_pdev_bss_chan_info_event *ev;
  4822. struct survey_info *survey;
  4823. u64 busy, total, tx, rx, rx_bss;
  4824. u32 freq, noise_floor;
  4825. u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
  4826. int idx;
  4827. ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
  4828. if (WARN_ON(skb->len < sizeof(*ev)))
  4829. return -EPROTO;
  4830. freq = __le32_to_cpu(ev->freq);
  4831. noise_floor = __le32_to_cpu(ev->noise_floor);
  4832. busy = __le64_to_cpu(ev->cycle_busy);
  4833. total = __le64_to_cpu(ev->cycle_total);
  4834. tx = __le64_to_cpu(ev->cycle_tx);
  4835. rx = __le64_to_cpu(ev->cycle_rx);
  4836. rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
  4837. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4838. "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
  4839. freq, noise_floor, busy, total, tx, rx, rx_bss);
  4840. spin_lock_bh(&ar->data_lock);
  4841. idx = freq_to_idx(ar, freq);
  4842. if (idx >= ARRAY_SIZE(ar->survey)) {
  4843. ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
  4844. freq, idx);
  4845. goto exit;
  4846. }
  4847. survey = &ar->survey[idx];
  4848. survey->noise = noise_floor;
  4849. survey->time = div_u64(total, cc_freq_hz);
  4850. survey->time_busy = div_u64(busy, cc_freq_hz);
  4851. survey->time_rx = div_u64(rx_bss, cc_freq_hz);
  4852. survey->time_tx = div_u64(tx, cc_freq_hz);
  4853. survey->filled |= (SURVEY_INFO_NOISE_DBM |
  4854. SURVEY_INFO_TIME |
  4855. SURVEY_INFO_TIME_BUSY |
  4856. SURVEY_INFO_TIME_RX |
  4857. SURVEY_INFO_TIME_TX);
  4858. exit:
  4859. spin_unlock_bh(&ar->data_lock);
  4860. complete(&ar->bss_survey_done);
  4861. return 0;
  4862. }
  4863. static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar)
  4864. {
  4865. if (ar->hw_params.hw_ops->set_coverage_class) {
  4866. spin_lock_bh(&ar->data_lock);
  4867. /* This call only ensures that the modified coverage class
  4868. * persists in case the firmware sets the registers back to
  4869. * their default value. So calling it is only necessary if the
  4870. * coverage class has a non-zero value.
  4871. */
  4872. if (ar->fw_coverage.coverage_class)
  4873. queue_work(ar->workqueue, &ar->set_coverage_class_work);
  4874. spin_unlock_bh(&ar->data_lock);
  4875. }
  4876. }
  4877. static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4878. {
  4879. struct wmi_cmd_hdr *cmd_hdr;
  4880. enum wmi_event_id id;
  4881. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4882. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4883. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4884. goto out;
  4885. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4886. switch (id) {
  4887. case WMI_MGMT_RX_EVENTID:
  4888. ath10k_wmi_event_mgmt_rx(ar, skb);
  4889. /* mgmt_rx() owns the skb now! */
  4890. return;
  4891. case WMI_SCAN_EVENTID:
  4892. ath10k_wmi_event_scan(ar, skb);
  4893. ath10k_wmi_queue_set_coverage_class_work(ar);
  4894. break;
  4895. case WMI_CHAN_INFO_EVENTID:
  4896. ath10k_wmi_event_chan_info(ar, skb);
  4897. break;
  4898. case WMI_ECHO_EVENTID:
  4899. ath10k_wmi_event_echo(ar, skb);
  4900. break;
  4901. case WMI_DEBUG_MESG_EVENTID:
  4902. ath10k_wmi_event_debug_mesg(ar, skb);
  4903. ath10k_wmi_queue_set_coverage_class_work(ar);
  4904. break;
  4905. case WMI_UPDATE_STATS_EVENTID:
  4906. ath10k_wmi_event_update_stats(ar, skb);
  4907. break;
  4908. case WMI_VDEV_START_RESP_EVENTID:
  4909. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4910. ath10k_wmi_queue_set_coverage_class_work(ar);
  4911. break;
  4912. case WMI_VDEV_STOPPED_EVENTID:
  4913. ath10k_wmi_event_vdev_stopped(ar, skb);
  4914. ath10k_wmi_queue_set_coverage_class_work(ar);
  4915. break;
  4916. case WMI_PEER_STA_KICKOUT_EVENTID:
  4917. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4918. break;
  4919. case WMI_HOST_SWBA_EVENTID:
  4920. ath10k_wmi_event_host_swba(ar, skb);
  4921. break;
  4922. case WMI_TBTTOFFSET_UPDATE_EVENTID:
  4923. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4924. break;
  4925. case WMI_PHYERR_EVENTID:
  4926. ath10k_wmi_event_phyerr(ar, skb);
  4927. break;
  4928. case WMI_ROAM_EVENTID:
  4929. ath10k_wmi_event_roam(ar, skb);
  4930. ath10k_wmi_queue_set_coverage_class_work(ar);
  4931. break;
  4932. case WMI_PROFILE_MATCH:
  4933. ath10k_wmi_event_profile_match(ar, skb);
  4934. break;
  4935. case WMI_DEBUG_PRINT_EVENTID:
  4936. ath10k_wmi_event_debug_print(ar, skb);
  4937. ath10k_wmi_queue_set_coverage_class_work(ar);
  4938. break;
  4939. case WMI_PDEV_QVIT_EVENTID:
  4940. ath10k_wmi_event_pdev_qvit(ar, skb);
  4941. break;
  4942. case WMI_WLAN_PROFILE_DATA_EVENTID:
  4943. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4944. break;
  4945. case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
  4946. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4947. break;
  4948. case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
  4949. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4950. break;
  4951. case WMI_RTT_ERROR_REPORT_EVENTID:
  4952. ath10k_wmi_event_rtt_error_report(ar, skb);
  4953. break;
  4954. case WMI_WOW_WAKEUP_HOST_EVENTID:
  4955. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4956. break;
  4957. case WMI_DCS_INTERFERENCE_EVENTID:
  4958. ath10k_wmi_event_dcs_interference(ar, skb);
  4959. break;
  4960. case WMI_PDEV_TPC_CONFIG_EVENTID:
  4961. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4962. break;
  4963. case WMI_PDEV_FTM_INTG_EVENTID:
  4964. ath10k_wmi_event_pdev_ftm_intg(ar, skb);
  4965. break;
  4966. case WMI_GTK_OFFLOAD_STATUS_EVENTID:
  4967. ath10k_wmi_event_gtk_offload_status(ar, skb);
  4968. break;
  4969. case WMI_GTK_REKEY_FAIL_EVENTID:
  4970. ath10k_wmi_event_gtk_rekey_fail(ar, skb);
  4971. break;
  4972. case WMI_TX_DELBA_COMPLETE_EVENTID:
  4973. ath10k_wmi_event_delba_complete(ar, skb);
  4974. break;
  4975. case WMI_TX_ADDBA_COMPLETE_EVENTID:
  4976. ath10k_wmi_event_addba_complete(ar, skb);
  4977. break;
  4978. case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
  4979. ath10k_wmi_event_vdev_install_key_complete(ar, skb);
  4980. break;
  4981. case WMI_SERVICE_READY_EVENTID:
  4982. ath10k_wmi_event_service_ready(ar, skb);
  4983. return;
  4984. case WMI_READY_EVENTID:
  4985. ath10k_wmi_event_ready(ar, skb);
  4986. ath10k_wmi_queue_set_coverage_class_work(ar);
  4987. break;
  4988. case WMI_SERVICE_AVAILABLE_EVENTID:
  4989. ath10k_wmi_event_service_available(ar, skb);
  4990. break;
  4991. default:
  4992. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4993. break;
  4994. }
  4995. out:
  4996. dev_kfree_skb(skb);
  4997. }
  4998. static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4999. {
  5000. struct wmi_cmd_hdr *cmd_hdr;
  5001. enum wmi_10x_event_id id;
  5002. bool consumed;
  5003. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  5004. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  5005. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  5006. goto out;
  5007. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  5008. consumed = ath10k_tm_event_wmi(ar, id, skb);
  5009. /* Ready event must be handled normally also in UTF mode so that we
  5010. * know the UTF firmware has booted, others we are just bypass WMI
  5011. * events to testmode.
  5012. */
  5013. if (consumed && id != WMI_10X_READY_EVENTID) {
  5014. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5015. "wmi testmode consumed 0x%x\n", id);
  5016. goto out;
  5017. }
  5018. switch (id) {
  5019. case WMI_10X_MGMT_RX_EVENTID:
  5020. ath10k_wmi_event_mgmt_rx(ar, skb);
  5021. /* mgmt_rx() owns the skb now! */
  5022. return;
  5023. case WMI_10X_SCAN_EVENTID:
  5024. ath10k_wmi_event_scan(ar, skb);
  5025. ath10k_wmi_queue_set_coverage_class_work(ar);
  5026. break;
  5027. case WMI_10X_CHAN_INFO_EVENTID:
  5028. ath10k_wmi_event_chan_info(ar, skb);
  5029. break;
  5030. case WMI_10X_ECHO_EVENTID:
  5031. ath10k_wmi_event_echo(ar, skb);
  5032. break;
  5033. case WMI_10X_DEBUG_MESG_EVENTID:
  5034. ath10k_wmi_event_debug_mesg(ar, skb);
  5035. ath10k_wmi_queue_set_coverage_class_work(ar);
  5036. break;
  5037. case WMI_10X_UPDATE_STATS_EVENTID:
  5038. ath10k_wmi_event_update_stats(ar, skb);
  5039. break;
  5040. case WMI_10X_VDEV_START_RESP_EVENTID:
  5041. ath10k_wmi_event_vdev_start_resp(ar, skb);
  5042. ath10k_wmi_queue_set_coverage_class_work(ar);
  5043. break;
  5044. case WMI_10X_VDEV_STOPPED_EVENTID:
  5045. ath10k_wmi_event_vdev_stopped(ar, skb);
  5046. ath10k_wmi_queue_set_coverage_class_work(ar);
  5047. break;
  5048. case WMI_10X_PEER_STA_KICKOUT_EVENTID:
  5049. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  5050. break;
  5051. case WMI_10X_HOST_SWBA_EVENTID:
  5052. ath10k_wmi_event_host_swba(ar, skb);
  5053. break;
  5054. case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
  5055. ath10k_wmi_event_tbttoffset_update(ar, skb);
  5056. break;
  5057. case WMI_10X_PHYERR_EVENTID:
  5058. ath10k_wmi_event_phyerr(ar, skb);
  5059. break;
  5060. case WMI_10X_ROAM_EVENTID:
  5061. ath10k_wmi_event_roam(ar, skb);
  5062. ath10k_wmi_queue_set_coverage_class_work(ar);
  5063. break;
  5064. case WMI_10X_PROFILE_MATCH:
  5065. ath10k_wmi_event_profile_match(ar, skb);
  5066. break;
  5067. case WMI_10X_DEBUG_PRINT_EVENTID:
  5068. ath10k_wmi_event_debug_print(ar, skb);
  5069. ath10k_wmi_queue_set_coverage_class_work(ar);
  5070. break;
  5071. case WMI_10X_PDEV_QVIT_EVENTID:
  5072. ath10k_wmi_event_pdev_qvit(ar, skb);
  5073. break;
  5074. case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
  5075. ath10k_wmi_event_wlan_profile_data(ar, skb);
  5076. break;
  5077. case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
  5078. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  5079. break;
  5080. case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
  5081. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  5082. break;
  5083. case WMI_10X_RTT_ERROR_REPORT_EVENTID:
  5084. ath10k_wmi_event_rtt_error_report(ar, skb);
  5085. break;
  5086. case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
  5087. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  5088. break;
  5089. case WMI_10X_DCS_INTERFERENCE_EVENTID:
  5090. ath10k_wmi_event_dcs_interference(ar, skb);
  5091. break;
  5092. case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
  5093. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  5094. break;
  5095. case WMI_10X_INST_RSSI_STATS_EVENTID:
  5096. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  5097. break;
  5098. case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
  5099. ath10k_wmi_event_vdev_standby_req(ar, skb);
  5100. break;
  5101. case WMI_10X_VDEV_RESUME_REQ_EVENTID:
  5102. ath10k_wmi_event_vdev_resume_req(ar, skb);
  5103. break;
  5104. case WMI_10X_SERVICE_READY_EVENTID:
  5105. ath10k_wmi_event_service_ready(ar, skb);
  5106. return;
  5107. case WMI_10X_READY_EVENTID:
  5108. ath10k_wmi_event_ready(ar, skb);
  5109. ath10k_wmi_queue_set_coverage_class_work(ar);
  5110. break;
  5111. case WMI_10X_PDEV_UTF_EVENTID:
  5112. /* ignore utf events */
  5113. break;
  5114. default:
  5115. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  5116. break;
  5117. }
  5118. out:
  5119. dev_kfree_skb(skb);
  5120. }
  5121. static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
  5122. {
  5123. struct wmi_cmd_hdr *cmd_hdr;
  5124. enum wmi_10_2_event_id id;
  5125. bool consumed;
  5126. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  5127. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  5128. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  5129. goto out;
  5130. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  5131. consumed = ath10k_tm_event_wmi(ar, id, skb);
  5132. /* Ready event must be handled normally also in UTF mode so that we
  5133. * know the UTF firmware has booted, others we are just bypass WMI
  5134. * events to testmode.
  5135. */
  5136. if (consumed && id != WMI_10_2_READY_EVENTID) {
  5137. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5138. "wmi testmode consumed 0x%x\n", id);
  5139. goto out;
  5140. }
  5141. switch (id) {
  5142. case WMI_10_2_MGMT_RX_EVENTID:
  5143. ath10k_wmi_event_mgmt_rx(ar, skb);
  5144. /* mgmt_rx() owns the skb now! */
  5145. return;
  5146. case WMI_10_2_SCAN_EVENTID:
  5147. ath10k_wmi_event_scan(ar, skb);
  5148. ath10k_wmi_queue_set_coverage_class_work(ar);
  5149. break;
  5150. case WMI_10_2_CHAN_INFO_EVENTID:
  5151. ath10k_wmi_event_chan_info(ar, skb);
  5152. break;
  5153. case WMI_10_2_ECHO_EVENTID:
  5154. ath10k_wmi_event_echo(ar, skb);
  5155. break;
  5156. case WMI_10_2_DEBUG_MESG_EVENTID:
  5157. ath10k_wmi_event_debug_mesg(ar, skb);
  5158. ath10k_wmi_queue_set_coverage_class_work(ar);
  5159. break;
  5160. case WMI_10_2_UPDATE_STATS_EVENTID:
  5161. ath10k_wmi_event_update_stats(ar, skb);
  5162. break;
  5163. case WMI_10_2_VDEV_START_RESP_EVENTID:
  5164. ath10k_wmi_event_vdev_start_resp(ar, skb);
  5165. ath10k_wmi_queue_set_coverage_class_work(ar);
  5166. break;
  5167. case WMI_10_2_VDEV_STOPPED_EVENTID:
  5168. ath10k_wmi_event_vdev_stopped(ar, skb);
  5169. ath10k_wmi_queue_set_coverage_class_work(ar);
  5170. break;
  5171. case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
  5172. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  5173. break;
  5174. case WMI_10_2_HOST_SWBA_EVENTID:
  5175. ath10k_wmi_event_host_swba(ar, skb);
  5176. break;
  5177. case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
  5178. ath10k_wmi_event_tbttoffset_update(ar, skb);
  5179. break;
  5180. case WMI_10_2_PHYERR_EVENTID:
  5181. ath10k_wmi_event_phyerr(ar, skb);
  5182. break;
  5183. case WMI_10_2_ROAM_EVENTID:
  5184. ath10k_wmi_event_roam(ar, skb);
  5185. ath10k_wmi_queue_set_coverage_class_work(ar);
  5186. break;
  5187. case WMI_10_2_PROFILE_MATCH:
  5188. ath10k_wmi_event_profile_match(ar, skb);
  5189. break;
  5190. case WMI_10_2_DEBUG_PRINT_EVENTID:
  5191. ath10k_wmi_event_debug_print(ar, skb);
  5192. ath10k_wmi_queue_set_coverage_class_work(ar);
  5193. break;
  5194. case WMI_10_2_PDEV_QVIT_EVENTID:
  5195. ath10k_wmi_event_pdev_qvit(ar, skb);
  5196. break;
  5197. case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
  5198. ath10k_wmi_event_wlan_profile_data(ar, skb);
  5199. break;
  5200. case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
  5201. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  5202. break;
  5203. case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
  5204. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  5205. break;
  5206. case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
  5207. ath10k_wmi_event_rtt_error_report(ar, skb);
  5208. break;
  5209. case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
  5210. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  5211. break;
  5212. case WMI_10_2_DCS_INTERFERENCE_EVENTID:
  5213. ath10k_wmi_event_dcs_interference(ar, skb);
  5214. break;
  5215. case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
  5216. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  5217. break;
  5218. case WMI_10_2_INST_RSSI_STATS_EVENTID:
  5219. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  5220. break;
  5221. case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
  5222. ath10k_wmi_event_vdev_standby_req(ar, skb);
  5223. ath10k_wmi_queue_set_coverage_class_work(ar);
  5224. break;
  5225. case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
  5226. ath10k_wmi_event_vdev_resume_req(ar, skb);
  5227. ath10k_wmi_queue_set_coverage_class_work(ar);
  5228. break;
  5229. case WMI_10_2_SERVICE_READY_EVENTID:
  5230. ath10k_wmi_event_service_ready(ar, skb);
  5231. return;
  5232. case WMI_10_2_READY_EVENTID:
  5233. ath10k_wmi_event_ready(ar, skb);
  5234. ath10k_wmi_queue_set_coverage_class_work(ar);
  5235. break;
  5236. case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
  5237. ath10k_wmi_event_temperature(ar, skb);
  5238. break;
  5239. case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
  5240. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  5241. break;
  5242. case WMI_10_2_RTT_KEEPALIVE_EVENTID:
  5243. case WMI_10_2_GPIO_INPUT_EVENTID:
  5244. case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
  5245. case WMI_10_2_GENERIC_BUFFER_EVENTID:
  5246. case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
  5247. case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
  5248. case WMI_10_2_WDS_PEER_EVENTID:
  5249. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5250. "received event id %d not implemented\n", id);
  5251. break;
  5252. default:
  5253. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  5254. break;
  5255. }
  5256. out:
  5257. dev_kfree_skb(skb);
  5258. }
  5259. static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
  5260. {
  5261. struct wmi_cmd_hdr *cmd_hdr;
  5262. enum wmi_10_4_event_id id;
  5263. bool consumed;
  5264. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  5265. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  5266. if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
  5267. goto out;
  5268. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  5269. consumed = ath10k_tm_event_wmi(ar, id, skb);
  5270. /* Ready event must be handled normally also in UTF mode so that we
  5271. * know the UTF firmware has booted, others we are just bypass WMI
  5272. * events to testmode.
  5273. */
  5274. if (consumed && id != WMI_10_4_READY_EVENTID) {
  5275. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5276. "wmi testmode consumed 0x%x\n", id);
  5277. goto out;
  5278. }
  5279. switch (id) {
  5280. case WMI_10_4_MGMT_RX_EVENTID:
  5281. ath10k_wmi_event_mgmt_rx(ar, skb);
  5282. /* mgmt_rx() owns the skb now! */
  5283. return;
  5284. case WMI_10_4_ECHO_EVENTID:
  5285. ath10k_wmi_event_echo(ar, skb);
  5286. break;
  5287. case WMI_10_4_DEBUG_MESG_EVENTID:
  5288. ath10k_wmi_event_debug_mesg(ar, skb);
  5289. ath10k_wmi_queue_set_coverage_class_work(ar);
  5290. break;
  5291. case WMI_10_4_SERVICE_READY_EVENTID:
  5292. ath10k_wmi_event_service_ready(ar, skb);
  5293. return;
  5294. case WMI_10_4_SCAN_EVENTID:
  5295. ath10k_wmi_event_scan(ar, skb);
  5296. ath10k_wmi_queue_set_coverage_class_work(ar);
  5297. break;
  5298. case WMI_10_4_CHAN_INFO_EVENTID:
  5299. ath10k_wmi_event_chan_info(ar, skb);
  5300. break;
  5301. case WMI_10_4_PHYERR_EVENTID:
  5302. ath10k_wmi_event_phyerr(ar, skb);
  5303. break;
  5304. case WMI_10_4_READY_EVENTID:
  5305. ath10k_wmi_event_ready(ar, skb);
  5306. ath10k_wmi_queue_set_coverage_class_work(ar);
  5307. break;
  5308. case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
  5309. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  5310. break;
  5311. case WMI_10_4_ROAM_EVENTID:
  5312. ath10k_wmi_event_roam(ar, skb);
  5313. ath10k_wmi_queue_set_coverage_class_work(ar);
  5314. break;
  5315. case WMI_10_4_HOST_SWBA_EVENTID:
  5316. ath10k_wmi_event_host_swba(ar, skb);
  5317. break;
  5318. case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
  5319. ath10k_wmi_event_tbttoffset_update(ar, skb);
  5320. break;
  5321. case WMI_10_4_DEBUG_PRINT_EVENTID:
  5322. ath10k_wmi_event_debug_print(ar, skb);
  5323. ath10k_wmi_queue_set_coverage_class_work(ar);
  5324. break;
  5325. case WMI_10_4_VDEV_START_RESP_EVENTID:
  5326. ath10k_wmi_event_vdev_start_resp(ar, skb);
  5327. ath10k_wmi_queue_set_coverage_class_work(ar);
  5328. break;
  5329. case WMI_10_4_VDEV_STOPPED_EVENTID:
  5330. ath10k_wmi_event_vdev_stopped(ar, skb);
  5331. ath10k_wmi_queue_set_coverage_class_work(ar);
  5332. break;
  5333. case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
  5334. case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
  5335. case WMI_10_4_WDS_PEER_EVENTID:
  5336. case WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID:
  5337. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5338. "received event id %d not implemented\n", id);
  5339. break;
  5340. case WMI_10_4_UPDATE_STATS_EVENTID:
  5341. ath10k_wmi_event_update_stats(ar, skb);
  5342. break;
  5343. case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
  5344. ath10k_wmi_event_temperature(ar, skb);
  5345. break;
  5346. case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
  5347. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  5348. break;
  5349. case WMI_10_4_PDEV_TPC_CONFIG_EVENTID:
  5350. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  5351. break;
  5352. case WMI_10_4_TDLS_PEER_EVENTID:
  5353. ath10k_wmi_handle_tdls_peer_event(ar, skb);
  5354. break;
  5355. case WMI_10_4_PDEV_TPC_TABLE_EVENTID:
  5356. ath10k_wmi_event_tpc_final_table(ar, skb);
  5357. break;
  5358. case WMI_10_4_DFS_STATUS_CHECK_EVENTID:
  5359. ath10k_wmi_event_dfs_status_check(ar, skb);
  5360. break;
  5361. default:
  5362. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  5363. break;
  5364. }
  5365. out:
  5366. dev_kfree_skb(skb);
  5367. }
  5368. static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
  5369. {
  5370. int ret;
  5371. ret = ath10k_wmi_rx(ar, skb);
  5372. if (ret)
  5373. ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
  5374. }
  5375. int ath10k_wmi_connect(struct ath10k *ar)
  5376. {
  5377. int status;
  5378. struct ath10k_htc_svc_conn_req conn_req;
  5379. struct ath10k_htc_svc_conn_resp conn_resp;
  5380. memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
  5381. memset(&conn_req, 0, sizeof(conn_req));
  5382. memset(&conn_resp, 0, sizeof(conn_resp));
  5383. /* these fields are the same for all service endpoints */
  5384. conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
  5385. conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
  5386. conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
  5387. /* connect to control service */
  5388. conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
  5389. status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
  5390. if (status) {
  5391. ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
  5392. status);
  5393. return status;
  5394. }
  5395. ar->wmi.eid = conn_resp.eid;
  5396. return 0;
  5397. }
  5398. static struct sk_buff *
  5399. ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
  5400. u16 ctl2g, u16 ctl5g,
  5401. enum wmi_dfs_region dfs_reg)
  5402. {
  5403. struct wmi_pdev_set_regdomain_cmd *cmd;
  5404. struct sk_buff *skb;
  5405. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5406. if (!skb)
  5407. return ERR_PTR(-ENOMEM);
  5408. cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
  5409. cmd->reg_domain = __cpu_to_le32(rd);
  5410. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  5411. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  5412. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  5413. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  5414. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5415. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
  5416. rd, rd2g, rd5g, ctl2g, ctl5g);
  5417. return skb;
  5418. }
  5419. static struct sk_buff *
  5420. ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
  5421. rd5g, u16 ctl2g, u16 ctl5g,
  5422. enum wmi_dfs_region dfs_reg)
  5423. {
  5424. struct wmi_pdev_set_regdomain_cmd_10x *cmd;
  5425. struct sk_buff *skb;
  5426. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5427. if (!skb)
  5428. return ERR_PTR(-ENOMEM);
  5429. cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
  5430. cmd->reg_domain = __cpu_to_le32(rd);
  5431. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  5432. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  5433. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  5434. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  5435. cmd->dfs_domain = __cpu_to_le32(dfs_reg);
  5436. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5437. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
  5438. rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
  5439. return skb;
  5440. }
  5441. static struct sk_buff *
  5442. ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
  5443. {
  5444. struct wmi_pdev_suspend_cmd *cmd;
  5445. struct sk_buff *skb;
  5446. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5447. if (!skb)
  5448. return ERR_PTR(-ENOMEM);
  5449. cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
  5450. cmd->suspend_opt = __cpu_to_le32(suspend_opt);
  5451. return skb;
  5452. }
  5453. static struct sk_buff *
  5454. ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
  5455. {
  5456. struct sk_buff *skb;
  5457. skb = ath10k_wmi_alloc_skb(ar, 0);
  5458. if (!skb)
  5459. return ERR_PTR(-ENOMEM);
  5460. return skb;
  5461. }
  5462. static struct sk_buff *
  5463. ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
  5464. {
  5465. struct wmi_pdev_set_param_cmd *cmd;
  5466. struct sk_buff *skb;
  5467. if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
  5468. ath10k_warn(ar, "pdev param %d not supported by firmware\n",
  5469. id);
  5470. return ERR_PTR(-EOPNOTSUPP);
  5471. }
  5472. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5473. if (!skb)
  5474. return ERR_PTR(-ENOMEM);
  5475. cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
  5476. cmd->param_id = __cpu_to_le32(id);
  5477. cmd->param_value = __cpu_to_le32(value);
  5478. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
  5479. id, value);
  5480. return skb;
  5481. }
  5482. void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
  5483. struct wmi_host_mem_chunks *chunks)
  5484. {
  5485. struct host_memory_chunk *chunk;
  5486. int i;
  5487. chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
  5488. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  5489. chunk = &chunks->items[i];
  5490. chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
  5491. chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
  5492. chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
  5493. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5494. "wmi chunk %d len %d requested, addr 0x%llx\n",
  5495. i,
  5496. ar->wmi.mem_chunks[i].len,
  5497. (unsigned long long)ar->wmi.mem_chunks[i].paddr);
  5498. }
  5499. }
  5500. static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
  5501. {
  5502. struct wmi_init_cmd *cmd;
  5503. struct sk_buff *buf;
  5504. struct wmi_resource_config config = {};
  5505. u32 len, val;
  5506. config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
  5507. config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
  5508. config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
  5509. config.num_offload_reorder_bufs =
  5510. __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
  5511. config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
  5512. config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
  5513. config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
  5514. config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
  5515. config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
  5516. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5517. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5518. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5519. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
  5520. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5521. config.scan_max_pending_reqs =
  5522. __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
  5523. config.bmiss_offload_max_vdev =
  5524. __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
  5525. config.roam_offload_max_vdev =
  5526. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
  5527. config.roam_offload_max_ap_profiles =
  5528. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5529. config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
  5530. config.num_mcast_table_elems =
  5531. __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
  5532. config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
  5533. config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
  5534. config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
  5535. config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
  5536. config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
  5537. val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5538. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5539. config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
  5540. config.gtk_offload_max_vdev =
  5541. __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
  5542. config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
  5543. config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
  5544. len = sizeof(*cmd) +
  5545. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5546. buf = ath10k_wmi_alloc_skb(ar, len);
  5547. if (!buf)
  5548. return ERR_PTR(-ENOMEM);
  5549. cmd = (struct wmi_init_cmd *)buf->data;
  5550. memcpy(&cmd->resource_config, &config, sizeof(config));
  5551. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5552. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
  5553. return buf;
  5554. }
  5555. static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
  5556. {
  5557. struct wmi_init_cmd_10x *cmd;
  5558. struct sk_buff *buf;
  5559. struct wmi_resource_config_10x config = {};
  5560. u32 len, val;
  5561. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5562. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5563. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5564. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5565. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5566. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5567. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5568. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5569. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5570. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5571. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5572. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5573. config.scan_max_pending_reqs =
  5574. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5575. config.bmiss_offload_max_vdev =
  5576. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5577. config.roam_offload_max_vdev =
  5578. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5579. config.roam_offload_max_ap_profiles =
  5580. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5581. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5582. config.num_mcast_table_elems =
  5583. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5584. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5585. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5586. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5587. config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
  5588. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5589. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5590. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5591. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5592. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5593. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5594. len = sizeof(*cmd) +
  5595. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5596. buf = ath10k_wmi_alloc_skb(ar, len);
  5597. if (!buf)
  5598. return ERR_PTR(-ENOMEM);
  5599. cmd = (struct wmi_init_cmd_10x *)buf->data;
  5600. memcpy(&cmd->resource_config, &config, sizeof(config));
  5601. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5602. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
  5603. return buf;
  5604. }
  5605. static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
  5606. {
  5607. struct wmi_init_cmd_10_2 *cmd;
  5608. struct sk_buff *buf;
  5609. struct wmi_resource_config_10x config = {};
  5610. u32 len, val, features;
  5611. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5612. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5613. if (ath10k_peer_stats_enabled(ar)) {
  5614. config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
  5615. config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
  5616. } else {
  5617. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5618. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5619. }
  5620. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5621. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5622. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5623. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5624. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5625. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5626. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5627. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5628. config.scan_max_pending_reqs =
  5629. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5630. config.bmiss_offload_max_vdev =
  5631. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5632. config.roam_offload_max_vdev =
  5633. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5634. config.roam_offload_max_ap_profiles =
  5635. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5636. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5637. config.num_mcast_table_elems =
  5638. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5639. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5640. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5641. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5642. config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
  5643. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5644. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5645. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5646. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5647. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5648. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5649. len = sizeof(*cmd) +
  5650. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5651. buf = ath10k_wmi_alloc_skb(ar, len);
  5652. if (!buf)
  5653. return ERR_PTR(-ENOMEM);
  5654. cmd = (struct wmi_init_cmd_10_2 *)buf->data;
  5655. features = WMI_10_2_RX_BATCH_MODE;
  5656. if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
  5657. test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
  5658. features |= WMI_10_2_COEX_GPIO;
  5659. if (ath10k_peer_stats_enabled(ar))
  5660. features |= WMI_10_2_PEER_STATS;
  5661. if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
  5662. features |= WMI_10_2_BSS_CHAN_INFO;
  5663. cmd->resource_config.feature_mask = __cpu_to_le32(features);
  5664. memcpy(&cmd->resource_config.common, &config, sizeof(config));
  5665. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5666. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
  5667. return buf;
  5668. }
  5669. static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
  5670. {
  5671. struct wmi_init_cmd_10_4 *cmd;
  5672. struct sk_buff *buf;
  5673. struct wmi_resource_config_10_4 config = {};
  5674. u32 len;
  5675. config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
  5676. config.num_peers = __cpu_to_le32(ar->max_num_peers);
  5677. config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
  5678. config.num_tids = __cpu_to_le32(ar->num_tids);
  5679. config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
  5680. config.num_offload_reorder_buffs =
  5681. __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
  5682. config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
  5683. config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
  5684. config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
  5685. config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
  5686. config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5687. config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5688. config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5689. config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
  5690. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5691. config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
  5692. config.bmiss_offload_max_vdev =
  5693. __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
  5694. config.roam_offload_max_vdev =
  5695. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
  5696. config.roam_offload_max_ap_profiles =
  5697. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
  5698. config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
  5699. config.num_mcast_table_elems =
  5700. __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
  5701. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
  5702. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
  5703. config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
  5704. config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
  5705. config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
  5706. config.rx_skip_defrag_timeout_dup_detection_check =
  5707. __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
  5708. config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
  5709. config.gtk_offload_max_vdev =
  5710. __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
  5711. config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
  5712. config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
  5713. config.max_peer_ext_stats =
  5714. __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
  5715. config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
  5716. config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
  5717. config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
  5718. config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
  5719. config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
  5720. config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
  5721. config.tt_support =
  5722. __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
  5723. config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
  5724. config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
  5725. config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
  5726. len = sizeof(*cmd) +
  5727. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5728. buf = ath10k_wmi_alloc_skb(ar, len);
  5729. if (!buf)
  5730. return ERR_PTR(-ENOMEM);
  5731. cmd = (struct wmi_init_cmd_10_4 *)buf->data;
  5732. memcpy(&cmd->resource_config, &config, sizeof(config));
  5733. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5734. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
  5735. return buf;
  5736. }
  5737. int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
  5738. {
  5739. if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
  5740. return -EINVAL;
  5741. if (arg->n_channels > ARRAY_SIZE(arg->channels))
  5742. return -EINVAL;
  5743. if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
  5744. return -EINVAL;
  5745. if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
  5746. return -EINVAL;
  5747. return 0;
  5748. }
  5749. static size_t
  5750. ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
  5751. {
  5752. int len = 0;
  5753. if (arg->ie_len) {
  5754. len += sizeof(struct wmi_ie_data);
  5755. len += roundup(arg->ie_len, 4);
  5756. }
  5757. if (arg->n_channels) {
  5758. len += sizeof(struct wmi_chan_list);
  5759. len += sizeof(__le32) * arg->n_channels;
  5760. }
  5761. if (arg->n_ssids) {
  5762. len += sizeof(struct wmi_ssid_list);
  5763. len += sizeof(struct wmi_ssid) * arg->n_ssids;
  5764. }
  5765. if (arg->n_bssids) {
  5766. len += sizeof(struct wmi_bssid_list);
  5767. len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5768. }
  5769. return len;
  5770. }
  5771. void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
  5772. const struct wmi_start_scan_arg *arg)
  5773. {
  5774. u32 scan_id;
  5775. u32 scan_req_id;
  5776. scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
  5777. scan_id |= arg->scan_id;
  5778. scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5779. scan_req_id |= arg->scan_req_id;
  5780. cmn->scan_id = __cpu_to_le32(scan_id);
  5781. cmn->scan_req_id = __cpu_to_le32(scan_req_id);
  5782. cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
  5783. cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
  5784. cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
  5785. cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
  5786. cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
  5787. cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
  5788. cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
  5789. cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
  5790. cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
  5791. cmn->idle_time = __cpu_to_le32(arg->idle_time);
  5792. cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
  5793. cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
  5794. cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
  5795. }
  5796. static void
  5797. ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
  5798. const struct wmi_start_scan_arg *arg)
  5799. {
  5800. struct wmi_ie_data *ie;
  5801. struct wmi_chan_list *channels;
  5802. struct wmi_ssid_list *ssids;
  5803. struct wmi_bssid_list *bssids;
  5804. void *ptr = tlvs->tlvs;
  5805. int i;
  5806. if (arg->n_channels) {
  5807. channels = ptr;
  5808. channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
  5809. channels->num_chan = __cpu_to_le32(arg->n_channels);
  5810. for (i = 0; i < arg->n_channels; i++)
  5811. channels->channel_list[i].freq =
  5812. __cpu_to_le16(arg->channels[i]);
  5813. ptr += sizeof(*channels);
  5814. ptr += sizeof(__le32) * arg->n_channels;
  5815. }
  5816. if (arg->n_ssids) {
  5817. ssids = ptr;
  5818. ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
  5819. ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
  5820. for (i = 0; i < arg->n_ssids; i++) {
  5821. ssids->ssids[i].ssid_len =
  5822. __cpu_to_le32(arg->ssids[i].len);
  5823. memcpy(&ssids->ssids[i].ssid,
  5824. arg->ssids[i].ssid,
  5825. arg->ssids[i].len);
  5826. }
  5827. ptr += sizeof(*ssids);
  5828. ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
  5829. }
  5830. if (arg->n_bssids) {
  5831. bssids = ptr;
  5832. bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
  5833. bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
  5834. for (i = 0; i < arg->n_bssids; i++)
  5835. ether_addr_copy(bssids->bssid_list[i].addr,
  5836. arg->bssids[i].bssid);
  5837. ptr += sizeof(*bssids);
  5838. ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5839. }
  5840. if (arg->ie_len) {
  5841. ie = ptr;
  5842. ie->tag = __cpu_to_le32(WMI_IE_TAG);
  5843. ie->ie_len = __cpu_to_le32(arg->ie_len);
  5844. memcpy(ie->ie_data, arg->ie, arg->ie_len);
  5845. ptr += sizeof(*ie);
  5846. ptr += roundup(arg->ie_len, 4);
  5847. }
  5848. }
  5849. static struct sk_buff *
  5850. ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
  5851. const struct wmi_start_scan_arg *arg)
  5852. {
  5853. struct wmi_start_scan_cmd *cmd;
  5854. struct sk_buff *skb;
  5855. size_t len;
  5856. int ret;
  5857. ret = ath10k_wmi_start_scan_verify(arg);
  5858. if (ret)
  5859. return ERR_PTR(ret);
  5860. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5861. skb = ath10k_wmi_alloc_skb(ar, len);
  5862. if (!skb)
  5863. return ERR_PTR(-ENOMEM);
  5864. cmd = (struct wmi_start_scan_cmd *)skb->data;
  5865. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5866. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5867. cmd->burst_duration_ms = __cpu_to_le32(0);
  5868. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
  5869. return skb;
  5870. }
  5871. static struct sk_buff *
  5872. ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
  5873. const struct wmi_start_scan_arg *arg)
  5874. {
  5875. struct wmi_10x_start_scan_cmd *cmd;
  5876. struct sk_buff *skb;
  5877. size_t len;
  5878. int ret;
  5879. ret = ath10k_wmi_start_scan_verify(arg);
  5880. if (ret)
  5881. return ERR_PTR(ret);
  5882. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5883. skb = ath10k_wmi_alloc_skb(ar, len);
  5884. if (!skb)
  5885. return ERR_PTR(-ENOMEM);
  5886. cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
  5887. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5888. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5889. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
  5890. return skb;
  5891. }
  5892. void ath10k_wmi_start_scan_init(struct ath10k *ar,
  5893. struct wmi_start_scan_arg *arg)
  5894. {
  5895. /* setup commonly used values */
  5896. arg->scan_req_id = 1;
  5897. arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
  5898. arg->dwell_time_active = 50;
  5899. arg->dwell_time_passive = 150;
  5900. arg->min_rest_time = 50;
  5901. arg->max_rest_time = 500;
  5902. arg->repeat_probe_time = 0;
  5903. arg->probe_spacing_time = 0;
  5904. arg->idle_time = 0;
  5905. arg->max_scan_time = 20000;
  5906. arg->probe_delay = 5;
  5907. arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
  5908. | WMI_SCAN_EVENT_COMPLETED
  5909. | WMI_SCAN_EVENT_BSS_CHANNEL
  5910. | WMI_SCAN_EVENT_FOREIGN_CHANNEL
  5911. | WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT
  5912. | WMI_SCAN_EVENT_DEQUEUED;
  5913. arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
  5914. arg->n_bssids = 1;
  5915. arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
  5916. }
  5917. static struct sk_buff *
  5918. ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
  5919. const struct wmi_stop_scan_arg *arg)
  5920. {
  5921. struct wmi_stop_scan_cmd *cmd;
  5922. struct sk_buff *skb;
  5923. u32 scan_id;
  5924. u32 req_id;
  5925. if (arg->req_id > 0xFFF)
  5926. return ERR_PTR(-EINVAL);
  5927. if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
  5928. return ERR_PTR(-EINVAL);
  5929. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5930. if (!skb)
  5931. return ERR_PTR(-ENOMEM);
  5932. scan_id = arg->u.scan_id;
  5933. scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
  5934. req_id = arg->req_id;
  5935. req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5936. cmd = (struct wmi_stop_scan_cmd *)skb->data;
  5937. cmd->req_type = __cpu_to_le32(arg->req_type);
  5938. cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
  5939. cmd->scan_id = __cpu_to_le32(scan_id);
  5940. cmd->scan_req_id = __cpu_to_le32(req_id);
  5941. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5942. "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
  5943. arg->req_id, arg->req_type, arg->u.scan_id);
  5944. return skb;
  5945. }
  5946. static struct sk_buff *
  5947. ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
  5948. enum wmi_vdev_type type,
  5949. enum wmi_vdev_subtype subtype,
  5950. const u8 macaddr[ETH_ALEN])
  5951. {
  5952. struct wmi_vdev_create_cmd *cmd;
  5953. struct sk_buff *skb;
  5954. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5955. if (!skb)
  5956. return ERR_PTR(-ENOMEM);
  5957. cmd = (struct wmi_vdev_create_cmd *)skb->data;
  5958. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5959. cmd->vdev_type = __cpu_to_le32(type);
  5960. cmd->vdev_subtype = __cpu_to_le32(subtype);
  5961. ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
  5962. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5963. "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
  5964. vdev_id, type, subtype, macaddr);
  5965. return skb;
  5966. }
  5967. static struct sk_buff *
  5968. ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
  5969. {
  5970. struct wmi_vdev_delete_cmd *cmd;
  5971. struct sk_buff *skb;
  5972. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5973. if (!skb)
  5974. return ERR_PTR(-ENOMEM);
  5975. cmd = (struct wmi_vdev_delete_cmd *)skb->data;
  5976. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5977. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5978. "WMI vdev delete id %d\n", vdev_id);
  5979. return skb;
  5980. }
  5981. static struct sk_buff *
  5982. ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
  5983. const struct wmi_vdev_start_request_arg *arg,
  5984. bool restart)
  5985. {
  5986. struct wmi_vdev_start_request_cmd *cmd;
  5987. struct sk_buff *skb;
  5988. const char *cmdname;
  5989. u32 flags = 0;
  5990. if (WARN_ON(arg->hidden_ssid && !arg->ssid))
  5991. return ERR_PTR(-EINVAL);
  5992. if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
  5993. return ERR_PTR(-EINVAL);
  5994. if (restart)
  5995. cmdname = "restart";
  5996. else
  5997. cmdname = "start";
  5998. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5999. if (!skb)
  6000. return ERR_PTR(-ENOMEM);
  6001. if (arg->hidden_ssid)
  6002. flags |= WMI_VDEV_START_HIDDEN_SSID;
  6003. if (arg->pmf_enabled)
  6004. flags |= WMI_VDEV_START_PMF_ENABLED;
  6005. cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
  6006. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  6007. cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
  6008. cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
  6009. cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
  6010. cmd->flags = __cpu_to_le32(flags);
  6011. cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
  6012. cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
  6013. if (arg->ssid) {
  6014. cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
  6015. memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
  6016. }
  6017. ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
  6018. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6019. "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
  6020. cmdname, arg->vdev_id,
  6021. flags, arg->channel.freq, arg->channel.mode,
  6022. cmd->chan.flags, arg->channel.max_power);
  6023. return skb;
  6024. }
  6025. static struct sk_buff *
  6026. ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
  6027. {
  6028. struct wmi_vdev_stop_cmd *cmd;
  6029. struct sk_buff *skb;
  6030. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6031. if (!skb)
  6032. return ERR_PTR(-ENOMEM);
  6033. cmd = (struct wmi_vdev_stop_cmd *)skb->data;
  6034. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6035. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
  6036. return skb;
  6037. }
  6038. static struct sk_buff *
  6039. ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
  6040. const u8 *bssid)
  6041. {
  6042. struct wmi_vdev_up_cmd *cmd;
  6043. struct sk_buff *skb;
  6044. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6045. if (!skb)
  6046. return ERR_PTR(-ENOMEM);
  6047. cmd = (struct wmi_vdev_up_cmd *)skb->data;
  6048. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6049. cmd->vdev_assoc_id = __cpu_to_le32(aid);
  6050. ether_addr_copy(cmd->vdev_bssid.addr, bssid);
  6051. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6052. "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
  6053. vdev_id, aid, bssid);
  6054. return skb;
  6055. }
  6056. static struct sk_buff *
  6057. ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
  6058. {
  6059. struct wmi_vdev_down_cmd *cmd;
  6060. struct sk_buff *skb;
  6061. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6062. if (!skb)
  6063. return ERR_PTR(-ENOMEM);
  6064. cmd = (struct wmi_vdev_down_cmd *)skb->data;
  6065. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6066. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6067. "wmi mgmt vdev down id 0x%x\n", vdev_id);
  6068. return skb;
  6069. }
  6070. static struct sk_buff *
  6071. ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
  6072. u32 param_id, u32 param_value)
  6073. {
  6074. struct wmi_vdev_set_param_cmd *cmd;
  6075. struct sk_buff *skb;
  6076. if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
  6077. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6078. "vdev param %d not supported by firmware\n",
  6079. param_id);
  6080. return ERR_PTR(-EOPNOTSUPP);
  6081. }
  6082. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6083. if (!skb)
  6084. return ERR_PTR(-ENOMEM);
  6085. cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
  6086. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6087. cmd->param_id = __cpu_to_le32(param_id);
  6088. cmd->param_value = __cpu_to_le32(param_value);
  6089. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6090. "wmi vdev id 0x%x set param %d value %d\n",
  6091. vdev_id, param_id, param_value);
  6092. return skb;
  6093. }
  6094. static struct sk_buff *
  6095. ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
  6096. const struct wmi_vdev_install_key_arg *arg)
  6097. {
  6098. struct wmi_vdev_install_key_cmd *cmd;
  6099. struct sk_buff *skb;
  6100. if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
  6101. return ERR_PTR(-EINVAL);
  6102. if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
  6103. return ERR_PTR(-EINVAL);
  6104. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
  6105. if (!skb)
  6106. return ERR_PTR(-ENOMEM);
  6107. cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
  6108. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  6109. cmd->key_idx = __cpu_to_le32(arg->key_idx);
  6110. cmd->key_flags = __cpu_to_le32(arg->key_flags);
  6111. cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
  6112. cmd->key_len = __cpu_to_le32(arg->key_len);
  6113. cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
  6114. cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
  6115. if (arg->macaddr)
  6116. ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
  6117. if (arg->key_data)
  6118. memcpy(cmd->key_data, arg->key_data, arg->key_len);
  6119. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6120. "wmi vdev install key idx %d cipher %d len %d\n",
  6121. arg->key_idx, arg->key_cipher, arg->key_len);
  6122. return skb;
  6123. }
  6124. static struct sk_buff *
  6125. ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
  6126. const struct wmi_vdev_spectral_conf_arg *arg)
  6127. {
  6128. struct wmi_vdev_spectral_conf_cmd *cmd;
  6129. struct sk_buff *skb;
  6130. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6131. if (!skb)
  6132. return ERR_PTR(-ENOMEM);
  6133. cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
  6134. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  6135. cmd->scan_count = __cpu_to_le32(arg->scan_count);
  6136. cmd->scan_period = __cpu_to_le32(arg->scan_period);
  6137. cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
  6138. cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
  6139. cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
  6140. cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
  6141. cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
  6142. cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
  6143. cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
  6144. cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
  6145. cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
  6146. cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
  6147. cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
  6148. cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
  6149. cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
  6150. cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
  6151. cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
  6152. cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
  6153. return skb;
  6154. }
  6155. static struct sk_buff *
  6156. ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
  6157. u32 trigger, u32 enable)
  6158. {
  6159. struct wmi_vdev_spectral_enable_cmd *cmd;
  6160. struct sk_buff *skb;
  6161. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6162. if (!skb)
  6163. return ERR_PTR(-ENOMEM);
  6164. cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
  6165. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6166. cmd->trigger_cmd = __cpu_to_le32(trigger);
  6167. cmd->enable_cmd = __cpu_to_le32(enable);
  6168. return skb;
  6169. }
  6170. static struct sk_buff *
  6171. ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
  6172. const u8 peer_addr[ETH_ALEN],
  6173. enum wmi_peer_type peer_type)
  6174. {
  6175. struct wmi_peer_create_cmd *cmd;
  6176. struct sk_buff *skb;
  6177. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6178. if (!skb)
  6179. return ERR_PTR(-ENOMEM);
  6180. cmd = (struct wmi_peer_create_cmd *)skb->data;
  6181. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6182. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6183. cmd->peer_type = __cpu_to_le32(peer_type);
  6184. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6185. "wmi peer create vdev_id %d peer_addr %pM\n",
  6186. vdev_id, peer_addr);
  6187. return skb;
  6188. }
  6189. static struct sk_buff *
  6190. ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
  6191. const u8 peer_addr[ETH_ALEN])
  6192. {
  6193. struct wmi_peer_delete_cmd *cmd;
  6194. struct sk_buff *skb;
  6195. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6196. if (!skb)
  6197. return ERR_PTR(-ENOMEM);
  6198. cmd = (struct wmi_peer_delete_cmd *)skb->data;
  6199. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6200. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6201. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6202. "wmi peer delete vdev_id %d peer_addr %pM\n",
  6203. vdev_id, peer_addr);
  6204. return skb;
  6205. }
  6206. static struct sk_buff *
  6207. ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
  6208. const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
  6209. {
  6210. struct wmi_peer_flush_tids_cmd *cmd;
  6211. struct sk_buff *skb;
  6212. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6213. if (!skb)
  6214. return ERR_PTR(-ENOMEM);
  6215. cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
  6216. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6217. cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
  6218. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6219. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6220. "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
  6221. vdev_id, peer_addr, tid_bitmap);
  6222. return skb;
  6223. }
  6224. static struct sk_buff *
  6225. ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
  6226. const u8 *peer_addr,
  6227. enum wmi_peer_param param_id,
  6228. u32 param_value)
  6229. {
  6230. struct wmi_peer_set_param_cmd *cmd;
  6231. struct sk_buff *skb;
  6232. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6233. if (!skb)
  6234. return ERR_PTR(-ENOMEM);
  6235. cmd = (struct wmi_peer_set_param_cmd *)skb->data;
  6236. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6237. cmd->param_id = __cpu_to_le32(param_id);
  6238. cmd->param_value = __cpu_to_le32(param_value);
  6239. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  6240. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6241. "wmi vdev %d peer 0x%pM set param %d value %d\n",
  6242. vdev_id, peer_addr, param_id, param_value);
  6243. return skb;
  6244. }
  6245. static struct sk_buff *
  6246. ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
  6247. enum wmi_sta_ps_mode psmode)
  6248. {
  6249. struct wmi_sta_powersave_mode_cmd *cmd;
  6250. struct sk_buff *skb;
  6251. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6252. if (!skb)
  6253. return ERR_PTR(-ENOMEM);
  6254. cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
  6255. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6256. cmd->sta_ps_mode = __cpu_to_le32(psmode);
  6257. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6258. "wmi set powersave id 0x%x mode %d\n",
  6259. vdev_id, psmode);
  6260. return skb;
  6261. }
  6262. static struct sk_buff *
  6263. ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
  6264. enum wmi_sta_powersave_param param_id,
  6265. u32 value)
  6266. {
  6267. struct wmi_sta_powersave_param_cmd *cmd;
  6268. struct sk_buff *skb;
  6269. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6270. if (!skb)
  6271. return ERR_PTR(-ENOMEM);
  6272. cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
  6273. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6274. cmd->param_id = __cpu_to_le32(param_id);
  6275. cmd->param_value = __cpu_to_le32(value);
  6276. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6277. "wmi sta ps param vdev_id 0x%x param %d value %d\n",
  6278. vdev_id, param_id, value);
  6279. return skb;
  6280. }
  6281. static struct sk_buff *
  6282. ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6283. enum wmi_ap_ps_peer_param param_id, u32 value)
  6284. {
  6285. struct wmi_ap_ps_peer_cmd *cmd;
  6286. struct sk_buff *skb;
  6287. if (!mac)
  6288. return ERR_PTR(-EINVAL);
  6289. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6290. if (!skb)
  6291. return ERR_PTR(-ENOMEM);
  6292. cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
  6293. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6294. cmd->param_id = __cpu_to_le32(param_id);
  6295. cmd->param_value = __cpu_to_le32(value);
  6296. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6297. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6298. "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
  6299. vdev_id, param_id, value, mac);
  6300. return skb;
  6301. }
  6302. static struct sk_buff *
  6303. ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
  6304. const struct wmi_scan_chan_list_arg *arg)
  6305. {
  6306. struct wmi_scan_chan_list_cmd *cmd;
  6307. struct sk_buff *skb;
  6308. struct wmi_channel_arg *ch;
  6309. struct wmi_channel *ci;
  6310. int len;
  6311. int i;
  6312. len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
  6313. skb = ath10k_wmi_alloc_skb(ar, len);
  6314. if (!skb)
  6315. return ERR_PTR(-EINVAL);
  6316. cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
  6317. cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
  6318. for (i = 0; i < arg->n_channels; i++) {
  6319. ch = &arg->channels[i];
  6320. ci = &cmd->chan_info[i];
  6321. ath10k_wmi_put_wmi_channel(ci, ch);
  6322. }
  6323. return skb;
  6324. }
  6325. static void
  6326. ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
  6327. const struct wmi_peer_assoc_complete_arg *arg)
  6328. {
  6329. struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
  6330. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  6331. cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
  6332. cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
  6333. cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
  6334. cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
  6335. cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
  6336. cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
  6337. cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
  6338. cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
  6339. cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
  6340. cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
  6341. cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
  6342. cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
  6343. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  6344. cmd->peer_legacy_rates.num_rates =
  6345. __cpu_to_le32(arg->peer_legacy_rates.num_rates);
  6346. memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
  6347. arg->peer_legacy_rates.num_rates);
  6348. cmd->peer_ht_rates.num_rates =
  6349. __cpu_to_le32(arg->peer_ht_rates.num_rates);
  6350. memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
  6351. arg->peer_ht_rates.num_rates);
  6352. cmd->peer_vht_rates.rx_max_rate =
  6353. __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
  6354. cmd->peer_vht_rates.rx_mcs_set =
  6355. __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
  6356. cmd->peer_vht_rates.tx_max_rate =
  6357. __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
  6358. cmd->peer_vht_rates.tx_mcs_set =
  6359. __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
  6360. }
  6361. static void
  6362. ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
  6363. const struct wmi_peer_assoc_complete_arg *arg)
  6364. {
  6365. struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
  6366. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  6367. memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
  6368. }
  6369. static void
  6370. ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
  6371. const struct wmi_peer_assoc_complete_arg *arg)
  6372. {
  6373. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  6374. }
  6375. static void
  6376. ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
  6377. const struct wmi_peer_assoc_complete_arg *arg)
  6378. {
  6379. struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
  6380. int max_mcs, max_nss;
  6381. u32 info0;
  6382. /* TODO: Is using max values okay with firmware? */
  6383. max_mcs = 0xf;
  6384. max_nss = 0xf;
  6385. info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
  6386. SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
  6387. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  6388. cmd->info0 = __cpu_to_le32(info0);
  6389. }
  6390. static void
  6391. ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
  6392. const struct wmi_peer_assoc_complete_arg *arg)
  6393. {
  6394. struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
  6395. ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
  6396. if (arg->peer_bw_rxnss_override)
  6397. cmd->peer_bw_rxnss_override =
  6398. __cpu_to_le32((arg->peer_bw_rxnss_override - 1) |
  6399. BIT(PEER_BW_RXNSS_OVERRIDE_OFFSET));
  6400. else
  6401. cmd->peer_bw_rxnss_override = 0;
  6402. }
  6403. static int
  6404. ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
  6405. {
  6406. if (arg->peer_mpdu_density > 16)
  6407. return -EINVAL;
  6408. if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
  6409. return -EINVAL;
  6410. if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
  6411. return -EINVAL;
  6412. return 0;
  6413. }
  6414. static struct sk_buff *
  6415. ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
  6416. const struct wmi_peer_assoc_complete_arg *arg)
  6417. {
  6418. size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
  6419. struct sk_buff *skb;
  6420. int ret;
  6421. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6422. if (ret)
  6423. return ERR_PTR(ret);
  6424. skb = ath10k_wmi_alloc_skb(ar, len);
  6425. if (!skb)
  6426. return ERR_PTR(-ENOMEM);
  6427. ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
  6428. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6429. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6430. arg->vdev_id, arg->addr,
  6431. arg->peer_reassoc ? "reassociate" : "new");
  6432. return skb;
  6433. }
  6434. static struct sk_buff *
  6435. ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
  6436. const struct wmi_peer_assoc_complete_arg *arg)
  6437. {
  6438. size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
  6439. struct sk_buff *skb;
  6440. int ret;
  6441. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6442. if (ret)
  6443. return ERR_PTR(ret);
  6444. skb = ath10k_wmi_alloc_skb(ar, len);
  6445. if (!skb)
  6446. return ERR_PTR(-ENOMEM);
  6447. ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
  6448. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6449. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6450. arg->vdev_id, arg->addr,
  6451. arg->peer_reassoc ? "reassociate" : "new");
  6452. return skb;
  6453. }
  6454. static struct sk_buff *
  6455. ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
  6456. const struct wmi_peer_assoc_complete_arg *arg)
  6457. {
  6458. size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
  6459. struct sk_buff *skb;
  6460. int ret;
  6461. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6462. if (ret)
  6463. return ERR_PTR(ret);
  6464. skb = ath10k_wmi_alloc_skb(ar, len);
  6465. if (!skb)
  6466. return ERR_PTR(-ENOMEM);
  6467. ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
  6468. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6469. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6470. arg->vdev_id, arg->addr,
  6471. arg->peer_reassoc ? "reassociate" : "new");
  6472. return skb;
  6473. }
  6474. static struct sk_buff *
  6475. ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
  6476. const struct wmi_peer_assoc_complete_arg *arg)
  6477. {
  6478. size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
  6479. struct sk_buff *skb;
  6480. int ret;
  6481. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  6482. if (ret)
  6483. return ERR_PTR(ret);
  6484. skb = ath10k_wmi_alloc_skb(ar, len);
  6485. if (!skb)
  6486. return ERR_PTR(-ENOMEM);
  6487. ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
  6488. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6489. "wmi peer assoc vdev %d addr %pM (%s)\n",
  6490. arg->vdev_id, arg->addr,
  6491. arg->peer_reassoc ? "reassociate" : "new");
  6492. return skb;
  6493. }
  6494. static struct sk_buff *
  6495. ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
  6496. {
  6497. struct sk_buff *skb;
  6498. skb = ath10k_wmi_alloc_skb(ar, 0);
  6499. if (!skb)
  6500. return ERR_PTR(-ENOMEM);
  6501. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
  6502. return skb;
  6503. }
  6504. static struct sk_buff *
  6505. ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
  6506. enum wmi_bss_survey_req_type type)
  6507. {
  6508. struct wmi_pdev_chan_info_req_cmd *cmd;
  6509. struct sk_buff *skb;
  6510. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6511. if (!skb)
  6512. return ERR_PTR(-ENOMEM);
  6513. cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
  6514. cmd->type = __cpu_to_le32(type);
  6515. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6516. "wmi pdev bss info request type %d\n", type);
  6517. return skb;
  6518. }
  6519. /* This function assumes the beacon is already DMA mapped */
  6520. static struct sk_buff *
  6521. ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
  6522. size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
  6523. bool deliver_cab)
  6524. {
  6525. struct wmi_bcn_tx_ref_cmd *cmd;
  6526. struct sk_buff *skb;
  6527. struct ieee80211_hdr *hdr;
  6528. u16 fc;
  6529. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6530. if (!skb)
  6531. return ERR_PTR(-ENOMEM);
  6532. hdr = (struct ieee80211_hdr *)bcn;
  6533. fc = le16_to_cpu(hdr->frame_control);
  6534. cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
  6535. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6536. cmd->data_len = __cpu_to_le32(bcn_len);
  6537. cmd->data_ptr = __cpu_to_le32(bcn_paddr);
  6538. cmd->msdu_id = 0;
  6539. cmd->frame_control = __cpu_to_le32(fc);
  6540. cmd->flags = 0;
  6541. cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
  6542. if (dtim_zero)
  6543. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
  6544. if (deliver_cab)
  6545. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
  6546. return skb;
  6547. }
  6548. void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
  6549. const struct wmi_wmm_params_arg *arg)
  6550. {
  6551. params->cwmin = __cpu_to_le32(arg->cwmin);
  6552. params->cwmax = __cpu_to_le32(arg->cwmax);
  6553. params->aifs = __cpu_to_le32(arg->aifs);
  6554. params->txop = __cpu_to_le32(arg->txop);
  6555. params->acm = __cpu_to_le32(arg->acm);
  6556. params->no_ack = __cpu_to_le32(arg->no_ack);
  6557. }
  6558. static struct sk_buff *
  6559. ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
  6560. const struct wmi_wmm_params_all_arg *arg)
  6561. {
  6562. struct wmi_pdev_set_wmm_params *cmd;
  6563. struct sk_buff *skb;
  6564. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6565. if (!skb)
  6566. return ERR_PTR(-ENOMEM);
  6567. cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
  6568. ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
  6569. ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
  6570. ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
  6571. ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
  6572. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
  6573. return skb;
  6574. }
  6575. static struct sk_buff *
  6576. ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
  6577. {
  6578. struct wmi_request_stats_cmd *cmd;
  6579. struct sk_buff *skb;
  6580. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6581. if (!skb)
  6582. return ERR_PTR(-ENOMEM);
  6583. cmd = (struct wmi_request_stats_cmd *)skb->data;
  6584. cmd->stats_id = __cpu_to_le32(stats_mask);
  6585. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
  6586. stats_mask);
  6587. return skb;
  6588. }
  6589. static struct sk_buff *
  6590. ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
  6591. enum wmi_force_fw_hang_type type, u32 delay_ms)
  6592. {
  6593. struct wmi_force_fw_hang_cmd *cmd;
  6594. struct sk_buff *skb;
  6595. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6596. if (!skb)
  6597. return ERR_PTR(-ENOMEM);
  6598. cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
  6599. cmd->type = __cpu_to_le32(type);
  6600. cmd->delay_ms = __cpu_to_le32(delay_ms);
  6601. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
  6602. type, delay_ms);
  6603. return skb;
  6604. }
  6605. static struct sk_buff *
  6606. ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6607. u32 log_level)
  6608. {
  6609. struct wmi_dbglog_cfg_cmd *cmd;
  6610. struct sk_buff *skb;
  6611. u32 cfg;
  6612. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6613. if (!skb)
  6614. return ERR_PTR(-ENOMEM);
  6615. cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
  6616. if (module_enable) {
  6617. cfg = SM(log_level,
  6618. ATH10K_DBGLOG_CFG_LOG_LVL);
  6619. } else {
  6620. /* set back defaults, all modules with WARN level */
  6621. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6622. ATH10K_DBGLOG_CFG_LOG_LVL);
  6623. module_enable = ~0;
  6624. }
  6625. cmd->module_enable = __cpu_to_le32(module_enable);
  6626. cmd->module_valid = __cpu_to_le32(~0);
  6627. cmd->config_enable = __cpu_to_le32(cfg);
  6628. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6629. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6630. "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
  6631. __le32_to_cpu(cmd->module_enable),
  6632. __le32_to_cpu(cmd->module_valid),
  6633. __le32_to_cpu(cmd->config_enable),
  6634. __le32_to_cpu(cmd->config_valid));
  6635. return skb;
  6636. }
  6637. static struct sk_buff *
  6638. ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6639. u32 log_level)
  6640. {
  6641. struct wmi_10_4_dbglog_cfg_cmd *cmd;
  6642. struct sk_buff *skb;
  6643. u32 cfg;
  6644. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6645. if (!skb)
  6646. return ERR_PTR(-ENOMEM);
  6647. cmd = (struct wmi_10_4_dbglog_cfg_cmd *)skb->data;
  6648. if (module_enable) {
  6649. cfg = SM(log_level,
  6650. ATH10K_DBGLOG_CFG_LOG_LVL);
  6651. } else {
  6652. /* set back defaults, all modules with WARN level */
  6653. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6654. ATH10K_DBGLOG_CFG_LOG_LVL);
  6655. module_enable = ~0;
  6656. }
  6657. cmd->module_enable = __cpu_to_le64(module_enable);
  6658. cmd->module_valid = __cpu_to_le64(~0);
  6659. cmd->config_enable = __cpu_to_le32(cfg);
  6660. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6661. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6662. "wmi dbglog cfg modules 0x%016llx 0x%016llx config %08x %08x\n",
  6663. __le64_to_cpu(cmd->module_enable),
  6664. __le64_to_cpu(cmd->module_valid),
  6665. __le32_to_cpu(cmd->config_enable),
  6666. __le32_to_cpu(cmd->config_valid));
  6667. return skb;
  6668. }
  6669. static struct sk_buff *
  6670. ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
  6671. {
  6672. struct wmi_pdev_pktlog_enable_cmd *cmd;
  6673. struct sk_buff *skb;
  6674. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6675. if (!skb)
  6676. return ERR_PTR(-ENOMEM);
  6677. ev_bitmap &= ATH10K_PKTLOG_ANY;
  6678. cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
  6679. cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
  6680. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
  6681. ev_bitmap);
  6682. return skb;
  6683. }
  6684. static struct sk_buff *
  6685. ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
  6686. {
  6687. struct sk_buff *skb;
  6688. skb = ath10k_wmi_alloc_skb(ar, 0);
  6689. if (!skb)
  6690. return ERR_PTR(-ENOMEM);
  6691. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
  6692. return skb;
  6693. }
  6694. static struct sk_buff *
  6695. ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
  6696. u32 duration, u32 next_offset,
  6697. u32 enabled)
  6698. {
  6699. struct wmi_pdev_set_quiet_cmd *cmd;
  6700. struct sk_buff *skb;
  6701. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6702. if (!skb)
  6703. return ERR_PTR(-ENOMEM);
  6704. cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
  6705. cmd->period = __cpu_to_le32(period);
  6706. cmd->duration = __cpu_to_le32(duration);
  6707. cmd->next_start = __cpu_to_le32(next_offset);
  6708. cmd->enabled = __cpu_to_le32(enabled);
  6709. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6710. "wmi quiet param: period %u duration %u enabled %d\n",
  6711. period, duration, enabled);
  6712. return skb;
  6713. }
  6714. static struct sk_buff *
  6715. ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
  6716. const u8 *mac)
  6717. {
  6718. struct wmi_addba_clear_resp_cmd *cmd;
  6719. struct sk_buff *skb;
  6720. if (!mac)
  6721. return ERR_PTR(-EINVAL);
  6722. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6723. if (!skb)
  6724. return ERR_PTR(-ENOMEM);
  6725. cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
  6726. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6727. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6728. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6729. "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
  6730. vdev_id, mac);
  6731. return skb;
  6732. }
  6733. static struct sk_buff *
  6734. ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6735. u32 tid, u32 buf_size)
  6736. {
  6737. struct wmi_addba_send_cmd *cmd;
  6738. struct sk_buff *skb;
  6739. if (!mac)
  6740. return ERR_PTR(-EINVAL);
  6741. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6742. if (!skb)
  6743. return ERR_PTR(-ENOMEM);
  6744. cmd = (struct wmi_addba_send_cmd *)skb->data;
  6745. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6746. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6747. cmd->tid = __cpu_to_le32(tid);
  6748. cmd->buffersize = __cpu_to_le32(buf_size);
  6749. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6750. "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
  6751. vdev_id, mac, tid, buf_size);
  6752. return skb;
  6753. }
  6754. static struct sk_buff *
  6755. ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6756. u32 tid, u32 status)
  6757. {
  6758. struct wmi_addba_setresponse_cmd *cmd;
  6759. struct sk_buff *skb;
  6760. if (!mac)
  6761. return ERR_PTR(-EINVAL);
  6762. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6763. if (!skb)
  6764. return ERR_PTR(-ENOMEM);
  6765. cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
  6766. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6767. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6768. cmd->tid = __cpu_to_le32(tid);
  6769. cmd->statuscode = __cpu_to_le32(status);
  6770. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6771. "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
  6772. vdev_id, mac, tid, status);
  6773. return skb;
  6774. }
  6775. static struct sk_buff *
  6776. ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6777. u32 tid, u32 initiator, u32 reason)
  6778. {
  6779. struct wmi_delba_send_cmd *cmd;
  6780. struct sk_buff *skb;
  6781. if (!mac)
  6782. return ERR_PTR(-EINVAL);
  6783. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6784. if (!skb)
  6785. return ERR_PTR(-ENOMEM);
  6786. cmd = (struct wmi_delba_send_cmd *)skb->data;
  6787. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6788. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6789. cmd->tid = __cpu_to_le32(tid);
  6790. cmd->initiator = __cpu_to_le32(initiator);
  6791. cmd->reasoncode = __cpu_to_le32(reason);
  6792. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6793. "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
  6794. vdev_id, mac, tid, initiator, reason);
  6795. return skb;
  6796. }
  6797. static struct sk_buff *
  6798. ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
  6799. {
  6800. struct wmi_pdev_get_tpc_config_cmd *cmd;
  6801. struct sk_buff *skb;
  6802. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6803. if (!skb)
  6804. return ERR_PTR(-ENOMEM);
  6805. cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
  6806. cmd->param = __cpu_to_le32(param);
  6807. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6808. "wmi pdev get tpc config param %d\n", param);
  6809. return skb;
  6810. }
  6811. size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
  6812. {
  6813. struct ath10k_fw_stats_peer *i;
  6814. size_t num = 0;
  6815. list_for_each_entry(i, head, list)
  6816. ++num;
  6817. return num;
  6818. }
  6819. size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
  6820. {
  6821. struct ath10k_fw_stats_vdev *i;
  6822. size_t num = 0;
  6823. list_for_each_entry(i, head, list)
  6824. ++num;
  6825. return num;
  6826. }
  6827. static void
  6828. ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6829. char *buf, u32 *length)
  6830. {
  6831. u32 len = *length;
  6832. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6833. len += scnprintf(buf + len, buf_len - len, "\n");
  6834. len += scnprintf(buf + len, buf_len - len, "%30s\n",
  6835. "ath10k PDEV stats");
  6836. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6837. "=================");
  6838. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6839. "Channel noise floor", pdev->ch_noise_floor);
  6840. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6841. "Channel TX power", pdev->chan_tx_power);
  6842. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6843. "TX frame count", pdev->tx_frame_count);
  6844. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6845. "RX frame count", pdev->rx_frame_count);
  6846. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6847. "RX clear count", pdev->rx_clear_count);
  6848. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6849. "Cycle count", pdev->cycle_count);
  6850. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6851. "PHY error count", pdev->phy_err_count);
  6852. *length = len;
  6853. }
  6854. static void
  6855. ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6856. char *buf, u32 *length)
  6857. {
  6858. u32 len = *length;
  6859. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6860. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6861. "RTS bad count", pdev->rts_bad);
  6862. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6863. "RTS good count", pdev->rts_good);
  6864. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6865. "FCS bad count", pdev->fcs_bad);
  6866. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6867. "No beacon count", pdev->no_beacons);
  6868. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6869. "MIB int count", pdev->mib_int_count);
  6870. len += scnprintf(buf + len, buf_len - len, "\n");
  6871. *length = len;
  6872. }
  6873. static void
  6874. ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6875. char *buf, u32 *length)
  6876. {
  6877. u32 len = *length;
  6878. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6879. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6880. "ath10k PDEV TX stats");
  6881. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6882. "=================");
  6883. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6884. "HTT cookies queued", pdev->comp_queued);
  6885. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6886. "HTT cookies disp.", pdev->comp_delivered);
  6887. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6888. "MSDU queued", pdev->msdu_enqued);
  6889. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6890. "MPDU queued", pdev->mpdu_enqued);
  6891. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6892. "MSDUs dropped", pdev->wmm_drop);
  6893. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6894. "Local enqued", pdev->local_enqued);
  6895. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6896. "Local freed", pdev->local_freed);
  6897. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6898. "HW queued", pdev->hw_queued);
  6899. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6900. "PPDUs reaped", pdev->hw_reaped);
  6901. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6902. "Num underruns", pdev->underrun);
  6903. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6904. "PPDUs cleaned", pdev->tx_abort);
  6905. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6906. "MPDUs requed", pdev->mpdus_requed);
  6907. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6908. "Excessive retries", pdev->tx_ko);
  6909. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6910. "HW rate", pdev->data_rc);
  6911. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6912. "Sched self triggers", pdev->self_triggers);
  6913. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6914. "Dropped due to SW retries",
  6915. pdev->sw_retry_failure);
  6916. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6917. "Illegal rate phy errors",
  6918. pdev->illgl_rate_phy_err);
  6919. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6920. "Pdev continuous xretry", pdev->pdev_cont_xretry);
  6921. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6922. "TX timeout", pdev->pdev_tx_timeout);
  6923. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6924. "PDEV resets", pdev->pdev_resets);
  6925. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6926. "PHY underrun", pdev->phy_underrun);
  6927. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6928. "MPDU is more than txop limit", pdev->txop_ovf);
  6929. *length = len;
  6930. }
  6931. static void
  6932. ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6933. char *buf, u32 *length)
  6934. {
  6935. u32 len = *length;
  6936. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6937. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6938. "ath10k PDEV RX stats");
  6939. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6940. "=================");
  6941. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6942. "Mid PPDU route change",
  6943. pdev->mid_ppdu_route_change);
  6944. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6945. "Tot. number of statuses", pdev->status_rcvd);
  6946. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6947. "Extra frags on rings 0", pdev->r0_frags);
  6948. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6949. "Extra frags on rings 1", pdev->r1_frags);
  6950. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6951. "Extra frags on rings 2", pdev->r2_frags);
  6952. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6953. "Extra frags on rings 3", pdev->r3_frags);
  6954. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6955. "MSDUs delivered to HTT", pdev->htt_msdus);
  6956. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6957. "MPDUs delivered to HTT", pdev->htt_mpdus);
  6958. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6959. "MSDUs delivered to stack", pdev->loc_msdus);
  6960. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6961. "MPDUs delivered to stack", pdev->loc_mpdus);
  6962. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6963. "Oversized AMSUs", pdev->oversize_amsdu);
  6964. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6965. "PHY errors", pdev->phy_errs);
  6966. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6967. "PHY errors drops", pdev->phy_err_drop);
  6968. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6969. "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
  6970. *length = len;
  6971. }
  6972. static void
  6973. ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
  6974. char *buf, u32 *length)
  6975. {
  6976. u32 len = *length;
  6977. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6978. int i;
  6979. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6980. "vdev id", vdev->vdev_id);
  6981. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6982. "beacon snr", vdev->beacon_snr);
  6983. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6984. "data snr", vdev->data_snr);
  6985. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6986. "num rx frames", vdev->num_rx_frames);
  6987. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6988. "num rts fail", vdev->num_rts_fail);
  6989. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6990. "num rts success", vdev->num_rts_success);
  6991. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6992. "num rx err", vdev->num_rx_err);
  6993. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6994. "num rx discard", vdev->num_rx_discard);
  6995. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6996. "num tx not acked", vdev->num_tx_not_acked);
  6997. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
  6998. len += scnprintf(buf + len, buf_len - len,
  6999. "%25s [%02d] %u\n",
  7000. "num tx frames", i,
  7001. vdev->num_tx_frames[i]);
  7002. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
  7003. len += scnprintf(buf + len, buf_len - len,
  7004. "%25s [%02d] %u\n",
  7005. "num tx frames retries", i,
  7006. vdev->num_tx_frames_retries[i]);
  7007. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
  7008. len += scnprintf(buf + len, buf_len - len,
  7009. "%25s [%02d] %u\n",
  7010. "num tx frames failures", i,
  7011. vdev->num_tx_frames_failures[i]);
  7012. for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
  7013. len += scnprintf(buf + len, buf_len - len,
  7014. "%25s [%02d] 0x%08x\n",
  7015. "tx rate history", i,
  7016. vdev->tx_rate_history[i]);
  7017. for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
  7018. len += scnprintf(buf + len, buf_len - len,
  7019. "%25s [%02d] %u\n",
  7020. "beacon rssi history", i,
  7021. vdev->beacon_rssi_history[i]);
  7022. len += scnprintf(buf + len, buf_len - len, "\n");
  7023. *length = len;
  7024. }
  7025. static void
  7026. ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
  7027. char *buf, u32 *length)
  7028. {
  7029. u32 len = *length;
  7030. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7031. len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
  7032. "Peer MAC address", peer->peer_macaddr);
  7033. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7034. "Peer RSSI", peer->peer_rssi);
  7035. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7036. "Peer TX rate", peer->peer_tx_rate);
  7037. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7038. "Peer RX rate", peer->peer_rx_rate);
  7039. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7040. "Peer RX duration", peer->rx_duration);
  7041. len += scnprintf(buf + len, buf_len - len, "\n");
  7042. *length = len;
  7043. }
  7044. void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
  7045. struct ath10k_fw_stats *fw_stats,
  7046. char *buf)
  7047. {
  7048. u32 len = 0;
  7049. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7050. const struct ath10k_fw_stats_pdev *pdev;
  7051. const struct ath10k_fw_stats_vdev *vdev;
  7052. const struct ath10k_fw_stats_peer *peer;
  7053. size_t num_peers;
  7054. size_t num_vdevs;
  7055. spin_lock_bh(&ar->data_lock);
  7056. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  7057. struct ath10k_fw_stats_pdev, list);
  7058. if (!pdev) {
  7059. ath10k_warn(ar, "failed to get pdev stats\n");
  7060. goto unlock;
  7061. }
  7062. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  7063. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  7064. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  7065. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  7066. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  7067. len += scnprintf(buf + len, buf_len - len, "\n");
  7068. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7069. "ath10k VDEV stats", num_vdevs);
  7070. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7071. "=================");
  7072. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  7073. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  7074. }
  7075. len += scnprintf(buf + len, buf_len - len, "\n");
  7076. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7077. "ath10k PEER stats", num_peers);
  7078. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7079. "=================");
  7080. list_for_each_entry(peer, &fw_stats->peers, list) {
  7081. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  7082. }
  7083. unlock:
  7084. spin_unlock_bh(&ar->data_lock);
  7085. if (len >= buf_len)
  7086. buf[len - 1] = 0;
  7087. else
  7088. buf[len] = 0;
  7089. }
  7090. void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
  7091. struct ath10k_fw_stats *fw_stats,
  7092. char *buf)
  7093. {
  7094. unsigned int len = 0;
  7095. unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7096. const struct ath10k_fw_stats_pdev *pdev;
  7097. const struct ath10k_fw_stats_vdev *vdev;
  7098. const struct ath10k_fw_stats_peer *peer;
  7099. size_t num_peers;
  7100. size_t num_vdevs;
  7101. spin_lock_bh(&ar->data_lock);
  7102. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  7103. struct ath10k_fw_stats_pdev, list);
  7104. if (!pdev) {
  7105. ath10k_warn(ar, "failed to get pdev stats\n");
  7106. goto unlock;
  7107. }
  7108. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  7109. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  7110. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  7111. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  7112. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  7113. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  7114. len += scnprintf(buf + len, buf_len - len, "\n");
  7115. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7116. "ath10k VDEV stats", num_vdevs);
  7117. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7118. "=================");
  7119. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  7120. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  7121. }
  7122. len += scnprintf(buf + len, buf_len - len, "\n");
  7123. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7124. "ath10k PEER stats", num_peers);
  7125. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7126. "=================");
  7127. list_for_each_entry(peer, &fw_stats->peers, list) {
  7128. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  7129. }
  7130. unlock:
  7131. spin_unlock_bh(&ar->data_lock);
  7132. if (len >= buf_len)
  7133. buf[len - 1] = 0;
  7134. else
  7135. buf[len] = 0;
  7136. }
  7137. static struct sk_buff *
  7138. ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
  7139. u32 detect_level, u32 detect_margin)
  7140. {
  7141. struct wmi_pdev_set_adaptive_cca_params *cmd;
  7142. struct sk_buff *skb;
  7143. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7144. if (!skb)
  7145. return ERR_PTR(-ENOMEM);
  7146. cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
  7147. cmd->enable = __cpu_to_le32(enable);
  7148. cmd->cca_detect_level = __cpu_to_le32(detect_level);
  7149. cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
  7150. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7151. "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
  7152. enable, detect_level, detect_margin);
  7153. return skb;
  7154. }
  7155. static void
  7156. ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd *vdev,
  7157. char *buf, u32 *length)
  7158. {
  7159. u32 len = *length;
  7160. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7161. u32 val;
  7162. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7163. "vdev id", vdev->vdev_id);
  7164. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7165. "ppdu aggr count", vdev->ppdu_aggr_cnt);
  7166. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7167. "ppdu noack", vdev->ppdu_noack);
  7168. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7169. "mpdu queued", vdev->mpdu_queued);
  7170. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7171. "ppdu nonaggr count", vdev->ppdu_nonaggr_cnt);
  7172. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7173. "mpdu sw requeued", vdev->mpdu_sw_requeued);
  7174. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7175. "mpdu success retry", vdev->mpdu_suc_retry);
  7176. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7177. "mpdu success multitry", vdev->mpdu_suc_multitry);
  7178. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7179. "mpdu fail retry", vdev->mpdu_fail_retry);
  7180. val = vdev->tx_ftm_suc;
  7181. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7182. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7183. "tx ftm success",
  7184. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7185. val = vdev->tx_ftm_suc_retry;
  7186. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7187. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7188. "tx ftm success retry",
  7189. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7190. val = vdev->tx_ftm_fail;
  7191. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7192. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7193. "tx ftm fail",
  7194. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7195. val = vdev->rx_ftmr_cnt;
  7196. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7197. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7198. "rx ftm request count",
  7199. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7200. val = vdev->rx_ftmr_dup_cnt;
  7201. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7202. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7203. "rx ftm request dup count",
  7204. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7205. val = vdev->rx_iftmr_cnt;
  7206. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7207. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7208. "rx initial ftm req count",
  7209. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7210. val = vdev->rx_iftmr_dup_cnt;
  7211. if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
  7212. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  7213. "rx initial ftm req dup cnt",
  7214. MS(val, WMI_VDEV_STATS_FTM_COUNT));
  7215. len += scnprintf(buf + len, buf_len - len, "\n");
  7216. *length = len;
  7217. }
  7218. void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
  7219. struct ath10k_fw_stats *fw_stats,
  7220. char *buf)
  7221. {
  7222. u32 len = 0;
  7223. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  7224. const struct ath10k_fw_stats_pdev *pdev;
  7225. const struct ath10k_fw_stats_vdev_extd *vdev;
  7226. const struct ath10k_fw_stats_peer *peer;
  7227. size_t num_peers;
  7228. size_t num_vdevs;
  7229. spin_lock_bh(&ar->data_lock);
  7230. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  7231. struct ath10k_fw_stats_pdev, list);
  7232. if (!pdev) {
  7233. ath10k_warn(ar, "failed to get pdev stats\n");
  7234. goto unlock;
  7235. }
  7236. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  7237. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  7238. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  7239. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  7240. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  7241. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7242. "HW paused", pdev->hw_paused);
  7243. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7244. "Seqs posted", pdev->seq_posted);
  7245. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7246. "Seqs failed queueing", pdev->seq_failed_queueing);
  7247. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7248. "Seqs completed", pdev->seq_completed);
  7249. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7250. "Seqs restarted", pdev->seq_restarted);
  7251. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7252. "MU Seqs posted", pdev->mu_seq_posted);
  7253. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7254. "MPDUs SW flushed", pdev->mpdus_sw_flush);
  7255. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7256. "MPDUs HW filtered", pdev->mpdus_hw_filter);
  7257. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7258. "MPDUs truncated", pdev->mpdus_truncated);
  7259. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7260. "MPDUs receive no ACK", pdev->mpdus_ack_failed);
  7261. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7262. "MPDUs expired", pdev->mpdus_expired);
  7263. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  7264. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  7265. "Num Rx Overflow errors", pdev->rx_ovfl_errs);
  7266. len += scnprintf(buf + len, buf_len - len, "\n");
  7267. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7268. "ath10k VDEV stats", num_vdevs);
  7269. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7270. "=================");
  7271. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  7272. ath10k_wmi_fw_vdev_stats_extd_fill(vdev, buf, &len);
  7273. }
  7274. len += scnprintf(buf + len, buf_len - len, "\n");
  7275. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  7276. "ath10k PEER stats", num_peers);
  7277. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  7278. "=================");
  7279. list_for_each_entry(peer, &fw_stats->peers, list) {
  7280. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  7281. }
  7282. unlock:
  7283. spin_unlock_bh(&ar->data_lock);
  7284. if (len >= buf_len)
  7285. buf[len - 1] = 0;
  7286. else
  7287. buf[len] = 0;
  7288. }
  7289. int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
  7290. enum wmi_vdev_subtype subtype)
  7291. {
  7292. switch (subtype) {
  7293. case WMI_VDEV_SUBTYPE_NONE:
  7294. return WMI_VDEV_SUBTYPE_LEGACY_NONE;
  7295. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  7296. return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
  7297. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  7298. return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
  7299. case WMI_VDEV_SUBTYPE_P2P_GO:
  7300. return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
  7301. case WMI_VDEV_SUBTYPE_PROXY_STA:
  7302. return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
  7303. case WMI_VDEV_SUBTYPE_MESH_11S:
  7304. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  7305. return -ENOTSUPP;
  7306. }
  7307. return -ENOTSUPP;
  7308. }
  7309. static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
  7310. enum wmi_vdev_subtype subtype)
  7311. {
  7312. switch (subtype) {
  7313. case WMI_VDEV_SUBTYPE_NONE:
  7314. return WMI_VDEV_SUBTYPE_10_2_4_NONE;
  7315. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  7316. return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
  7317. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  7318. return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
  7319. case WMI_VDEV_SUBTYPE_P2P_GO:
  7320. return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
  7321. case WMI_VDEV_SUBTYPE_PROXY_STA:
  7322. return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
  7323. case WMI_VDEV_SUBTYPE_MESH_11S:
  7324. return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
  7325. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  7326. return -ENOTSUPP;
  7327. }
  7328. return -ENOTSUPP;
  7329. }
  7330. static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
  7331. enum wmi_vdev_subtype subtype)
  7332. {
  7333. switch (subtype) {
  7334. case WMI_VDEV_SUBTYPE_NONE:
  7335. return WMI_VDEV_SUBTYPE_10_4_NONE;
  7336. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  7337. return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
  7338. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  7339. return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
  7340. case WMI_VDEV_SUBTYPE_P2P_GO:
  7341. return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
  7342. case WMI_VDEV_SUBTYPE_PROXY_STA:
  7343. return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
  7344. case WMI_VDEV_SUBTYPE_MESH_11S:
  7345. return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
  7346. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  7347. return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
  7348. }
  7349. return -ENOTSUPP;
  7350. }
  7351. static struct sk_buff *
  7352. ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
  7353. enum wmi_host_platform_type type,
  7354. u32 fw_feature_bitmap)
  7355. {
  7356. struct wmi_ext_resource_config_10_4_cmd *cmd;
  7357. struct sk_buff *skb;
  7358. u32 num_tdls_sleep_sta = 0;
  7359. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7360. if (!skb)
  7361. return ERR_PTR(-ENOMEM);
  7362. if (test_bit(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, ar->wmi.svc_map))
  7363. num_tdls_sleep_sta = TARGET_10_4_NUM_TDLS_SLEEP_STA;
  7364. cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
  7365. cmd->host_platform_config = __cpu_to_le32(type);
  7366. cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
  7367. cmd->wlan_gpio_priority = __cpu_to_le32(-1);
  7368. cmd->coex_version = __cpu_to_le32(WMI_NO_COEX_VERSION_SUPPORT);
  7369. cmd->coex_gpio_pin1 = __cpu_to_le32(-1);
  7370. cmd->coex_gpio_pin2 = __cpu_to_le32(-1);
  7371. cmd->coex_gpio_pin3 = __cpu_to_le32(-1);
  7372. cmd->num_tdls_vdevs = __cpu_to_le32(TARGET_10_4_NUM_TDLS_VDEVS);
  7373. cmd->num_tdls_conn_table_entries = __cpu_to_le32(20);
  7374. cmd->max_tdls_concurrent_sleep_sta = __cpu_to_le32(num_tdls_sleep_sta);
  7375. cmd->max_tdls_concurrent_buffer_sta =
  7376. __cpu_to_le32(TARGET_10_4_NUM_TDLS_BUFFER_STA);
  7377. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7378. "wmi ext resource config host type %d firmware feature bitmap %08x\n",
  7379. type, fw_feature_bitmap);
  7380. return skb;
  7381. }
  7382. static struct sk_buff *
  7383. ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k *ar, u32 vdev_id,
  7384. enum wmi_tdls_state state)
  7385. {
  7386. struct wmi_10_4_tdls_set_state_cmd *cmd;
  7387. struct sk_buff *skb;
  7388. u32 options = 0;
  7389. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7390. if (!skb)
  7391. return ERR_PTR(-ENOMEM);
  7392. if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, ar->wmi.svc_map) &&
  7393. state == WMI_TDLS_ENABLE_ACTIVE)
  7394. state = WMI_TDLS_ENABLE_PASSIVE;
  7395. if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, ar->wmi.svc_map))
  7396. options |= WMI_TDLS_BUFFER_STA_EN;
  7397. cmd = (struct wmi_10_4_tdls_set_state_cmd *)skb->data;
  7398. cmd->vdev_id = __cpu_to_le32(vdev_id);
  7399. cmd->state = __cpu_to_le32(state);
  7400. cmd->notification_interval_ms = __cpu_to_le32(5000);
  7401. cmd->tx_discovery_threshold = __cpu_to_le32(100);
  7402. cmd->tx_teardown_threshold = __cpu_to_le32(5);
  7403. cmd->rssi_teardown_threshold = __cpu_to_le32(-75);
  7404. cmd->rssi_delta = __cpu_to_le32(-20);
  7405. cmd->tdls_options = __cpu_to_le32(options);
  7406. cmd->tdls_peer_traffic_ind_window = __cpu_to_le32(2);
  7407. cmd->tdls_peer_traffic_response_timeout_ms = __cpu_to_le32(5000);
  7408. cmd->tdls_puapsd_mask = __cpu_to_le32(0xf);
  7409. cmd->tdls_puapsd_inactivity_time_ms = __cpu_to_le32(0);
  7410. cmd->tdls_puapsd_rx_frame_threshold = __cpu_to_le32(10);
  7411. cmd->teardown_notification_ms = __cpu_to_le32(10);
  7412. cmd->tdls_peer_kickout_threshold = __cpu_to_le32(96);
  7413. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi update fw tdls state %d for vdev %i\n",
  7414. state, vdev_id);
  7415. return skb;
  7416. }
  7417. static u32 ath10k_wmi_prepare_peer_qos(u8 uapsd_queues, u8 sp)
  7418. {
  7419. u32 peer_qos = 0;
  7420. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO)
  7421. peer_qos |= WMI_TDLS_PEER_QOS_AC_VO;
  7422. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI)
  7423. peer_qos |= WMI_TDLS_PEER_QOS_AC_VI;
  7424. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
  7425. peer_qos |= WMI_TDLS_PEER_QOS_AC_BK;
  7426. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE)
  7427. peer_qos |= WMI_TDLS_PEER_QOS_AC_BE;
  7428. peer_qos |= SM(sp, WMI_TDLS_PEER_SP);
  7429. return peer_qos;
  7430. }
  7431. static struct sk_buff *
  7432. ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k *ar, u32 param)
  7433. {
  7434. struct wmi_pdev_get_tpc_table_cmd *cmd;
  7435. struct sk_buff *skb;
  7436. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7437. if (!skb)
  7438. return ERR_PTR(-ENOMEM);
  7439. cmd = (struct wmi_pdev_get_tpc_table_cmd *)skb->data;
  7440. cmd->param = __cpu_to_le32(param);
  7441. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7442. "wmi pdev get tpc table param:%d\n", param);
  7443. return skb;
  7444. }
  7445. static struct sk_buff *
  7446. ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k *ar,
  7447. const struct wmi_tdls_peer_update_cmd_arg *arg,
  7448. const struct wmi_tdls_peer_capab_arg *cap,
  7449. const struct wmi_channel_arg *chan_arg)
  7450. {
  7451. struct wmi_10_4_tdls_peer_update_cmd *cmd;
  7452. struct wmi_tdls_peer_capabilities *peer_cap;
  7453. struct wmi_channel *chan;
  7454. struct sk_buff *skb;
  7455. u32 peer_qos;
  7456. int len, chan_len;
  7457. int i;
  7458. /* tdls peer update cmd has place holder for one channel*/
  7459. chan_len = cap->peer_chan_len ? (cap->peer_chan_len - 1) : 0;
  7460. len = sizeof(*cmd) + chan_len * sizeof(*chan);
  7461. skb = ath10k_wmi_alloc_skb(ar, len);
  7462. if (!skb)
  7463. return ERR_PTR(-ENOMEM);
  7464. memset(skb->data, 0, sizeof(*cmd));
  7465. cmd = (struct wmi_10_4_tdls_peer_update_cmd *)skb->data;
  7466. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  7467. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  7468. cmd->peer_state = __cpu_to_le32(arg->peer_state);
  7469. peer_qos = ath10k_wmi_prepare_peer_qos(cap->peer_uapsd_queues,
  7470. cap->peer_max_sp);
  7471. peer_cap = &cmd->peer_capab;
  7472. peer_cap->peer_qos = __cpu_to_le32(peer_qos);
  7473. peer_cap->buff_sta_support = __cpu_to_le32(cap->buff_sta_support);
  7474. peer_cap->off_chan_support = __cpu_to_le32(cap->off_chan_support);
  7475. peer_cap->peer_curr_operclass = __cpu_to_le32(cap->peer_curr_operclass);
  7476. peer_cap->self_curr_operclass = __cpu_to_le32(cap->self_curr_operclass);
  7477. peer_cap->peer_chan_len = __cpu_to_le32(cap->peer_chan_len);
  7478. peer_cap->peer_operclass_len = __cpu_to_le32(cap->peer_operclass_len);
  7479. for (i = 0; i < WMI_TDLS_MAX_SUPP_OPER_CLASSES; i++)
  7480. peer_cap->peer_operclass[i] = cap->peer_operclass[i];
  7481. peer_cap->is_peer_responder = __cpu_to_le32(cap->is_peer_responder);
  7482. peer_cap->pref_offchan_num = __cpu_to_le32(cap->pref_offchan_num);
  7483. peer_cap->pref_offchan_bw = __cpu_to_le32(cap->pref_offchan_bw);
  7484. for (i = 0; i < cap->peer_chan_len; i++) {
  7485. chan = (struct wmi_channel *)&peer_cap->peer_chan_list[i];
  7486. ath10k_wmi_put_wmi_channel(chan, &chan_arg[i]);
  7487. }
  7488. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7489. "wmi tdls peer update vdev %i state %d n_chans %u\n",
  7490. arg->vdev_id, arg->peer_state, cap->peer_chan_len);
  7491. return skb;
  7492. }
  7493. static struct sk_buff *
  7494. ath10k_wmi_10_4_gen_radar_found(struct ath10k *ar,
  7495. const struct ath10k_radar_found_info *arg)
  7496. {
  7497. struct wmi_radar_found_info *cmd;
  7498. struct sk_buff *skb;
  7499. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7500. if (!skb)
  7501. return ERR_PTR(-ENOMEM);
  7502. cmd = (struct wmi_radar_found_info *)skb->data;
  7503. cmd->pri_min = __cpu_to_le32(arg->pri_min);
  7504. cmd->pri_max = __cpu_to_le32(arg->pri_max);
  7505. cmd->width_min = __cpu_to_le32(arg->width_min);
  7506. cmd->width_max = __cpu_to_le32(arg->width_max);
  7507. cmd->sidx_min = __cpu_to_le32(arg->sidx_min);
  7508. cmd->sidx_max = __cpu_to_le32(arg->sidx_max);
  7509. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7510. "wmi radar found pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
  7511. arg->pri_min, arg->pri_max, arg->width_min,
  7512. arg->width_max, arg->sidx_min, arg->sidx_max);
  7513. return skb;
  7514. }
  7515. static struct sk_buff *
  7516. ath10k_wmi_op_gen_echo(struct ath10k *ar, u32 value)
  7517. {
  7518. struct wmi_echo_cmd *cmd;
  7519. struct sk_buff *skb;
  7520. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  7521. if (!skb)
  7522. return ERR_PTR(-ENOMEM);
  7523. cmd = (struct wmi_echo_cmd *)skb->data;
  7524. cmd->value = cpu_to_le32(value);
  7525. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7526. "wmi echo value 0x%08x\n", value);
  7527. return skb;
  7528. }
  7529. int
  7530. ath10k_wmi_barrier(struct ath10k *ar)
  7531. {
  7532. int ret;
  7533. int time_left;
  7534. spin_lock_bh(&ar->data_lock);
  7535. reinit_completion(&ar->wmi.barrier);
  7536. spin_unlock_bh(&ar->data_lock);
  7537. ret = ath10k_wmi_echo(ar, ATH10K_WMI_BARRIER_ECHO_ID);
  7538. if (ret) {
  7539. ath10k_warn(ar, "failed to submit wmi echo: %d\n", ret);
  7540. return ret;
  7541. }
  7542. time_left = wait_for_completion_timeout(&ar->wmi.barrier,
  7543. ATH10K_WMI_BARRIER_TIMEOUT_HZ);
  7544. if (!time_left)
  7545. return -ETIMEDOUT;
  7546. return 0;
  7547. }
  7548. static const struct wmi_ops wmi_ops = {
  7549. .rx = ath10k_wmi_op_rx,
  7550. .map_svc = wmi_main_svc_map,
  7551. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7552. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7553. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7554. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7555. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7556. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7557. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7558. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7559. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  7560. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7561. .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
  7562. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7563. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7564. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7565. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7566. .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
  7567. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7568. .gen_init = ath10k_wmi_op_gen_init,
  7569. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  7570. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7571. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7572. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7573. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7574. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7575. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7576. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7577. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7578. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7579. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7580. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7581. /* .gen_vdev_wmm_conf not implemented */
  7582. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7583. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7584. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7585. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7586. .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
  7587. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7588. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7589. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7590. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7591. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7592. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7593. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7594. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7595. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7596. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7597. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7598. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7599. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7600. /* .gen_pdev_get_temperature not implemented */
  7601. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7602. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7603. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7604. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7605. .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
  7606. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7607. .gen_echo = ath10k_wmi_op_gen_echo,
  7608. /* .gen_bcn_tmpl not implemented */
  7609. /* .gen_prb_tmpl not implemented */
  7610. /* .gen_p2p_go_bcn_ie not implemented */
  7611. /* .gen_adaptive_qcs not implemented */
  7612. /* .gen_pdev_enable_adaptive_cca not implemented */
  7613. };
  7614. static const struct wmi_ops wmi_10_1_ops = {
  7615. .rx = ath10k_wmi_10_1_op_rx,
  7616. .map_svc = wmi_10x_svc_map,
  7617. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7618. .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
  7619. .gen_init = ath10k_wmi_10_1_op_gen_init,
  7620. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7621. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7622. .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
  7623. /* .gen_pdev_get_temperature not implemented */
  7624. /* shared with main branch */
  7625. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7626. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7627. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7628. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7629. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7630. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7631. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7632. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7633. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7634. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7635. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7636. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7637. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7638. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7639. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7640. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7641. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7642. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7643. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7644. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7645. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7646. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7647. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7648. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7649. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7650. /* .gen_vdev_wmm_conf not implemented */
  7651. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7652. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7653. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7654. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7655. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7656. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7657. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7658. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7659. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7660. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7661. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7662. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7663. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7664. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7665. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7666. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7667. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7668. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7669. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7670. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7671. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7672. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7673. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7674. .gen_echo = ath10k_wmi_op_gen_echo,
  7675. /* .gen_bcn_tmpl not implemented */
  7676. /* .gen_prb_tmpl not implemented */
  7677. /* .gen_p2p_go_bcn_ie not implemented */
  7678. /* .gen_adaptive_qcs not implemented */
  7679. /* .gen_pdev_enable_adaptive_cca not implemented */
  7680. };
  7681. static const struct wmi_ops wmi_10_2_ops = {
  7682. .rx = ath10k_wmi_10_2_op_rx,
  7683. .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
  7684. .gen_init = ath10k_wmi_10_2_op_gen_init,
  7685. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  7686. /* .gen_pdev_get_temperature not implemented */
  7687. /* shared with 10.1 */
  7688. .map_svc = wmi_10x_svc_map,
  7689. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7690. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7691. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7692. .gen_echo = ath10k_wmi_op_gen_echo,
  7693. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7694. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7695. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7696. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7697. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7698. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7699. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7700. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7701. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7702. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7703. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7704. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7705. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7706. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7707. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7708. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7709. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7710. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7711. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7712. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7713. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7714. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7715. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7716. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7717. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7718. /* .gen_vdev_wmm_conf not implemented */
  7719. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7720. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7721. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7722. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7723. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7724. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7725. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7726. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7727. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7728. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7729. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7730. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7731. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7732. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7733. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7734. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7735. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7736. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7737. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7738. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7739. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7740. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7741. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7742. /* .gen_pdev_enable_adaptive_cca not implemented */
  7743. };
  7744. static const struct wmi_ops wmi_10_2_4_ops = {
  7745. .rx = ath10k_wmi_10_2_op_rx,
  7746. .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
  7747. .gen_init = ath10k_wmi_10_2_op_gen_init,
  7748. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  7749. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  7750. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  7751. /* shared with 10.1 */
  7752. .map_svc = wmi_10x_svc_map,
  7753. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7754. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7755. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7756. .gen_echo = ath10k_wmi_op_gen_echo,
  7757. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7758. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7759. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7760. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7761. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7762. .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
  7763. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7764. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7765. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7766. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7767. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7768. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7769. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7770. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7771. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7772. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7773. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7774. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7775. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7776. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7777. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7778. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7779. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7780. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7781. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7782. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7783. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7784. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7785. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7786. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7787. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7788. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7789. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7790. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7791. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7792. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7793. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7794. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7795. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7796. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7797. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7798. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7799. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7800. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7801. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7802. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7803. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  7804. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7805. .gen_pdev_enable_adaptive_cca =
  7806. ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
  7807. .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
  7808. /* .gen_bcn_tmpl not implemented */
  7809. /* .gen_prb_tmpl not implemented */
  7810. /* .gen_p2p_go_bcn_ie not implemented */
  7811. /* .gen_adaptive_qcs not implemented */
  7812. };
  7813. static const struct wmi_ops wmi_10_4_ops = {
  7814. .rx = ath10k_wmi_10_4_op_rx,
  7815. .map_svc = wmi_10_4_svc_map,
  7816. .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
  7817. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7818. .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
  7819. .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
  7820. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7821. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7822. .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
  7823. .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
  7824. .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
  7825. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  7826. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7827. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7828. .pull_dfs_status_ev = ath10k_wmi_10_4_op_pull_dfs_status_ev,
  7829. .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
  7830. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7831. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7832. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7833. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7834. .gen_init = ath10k_wmi_10_4_op_gen_init,
  7835. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  7836. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7837. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7838. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7839. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7840. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7841. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7842. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7843. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7844. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7845. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7846. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7847. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7848. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7849. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7850. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7851. .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
  7852. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7853. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7854. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7855. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7856. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7857. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7858. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7859. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7860. .gen_dbglog_cfg = ath10k_wmi_10_4_op_gen_dbglog_cfg,
  7861. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7862. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7863. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7864. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7865. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7866. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7867. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7868. .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
  7869. .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
  7870. .gen_update_fw_tdls_state = ath10k_wmi_10_4_gen_update_fw_tdls_state,
  7871. .gen_tdls_peer_update = ath10k_wmi_10_4_gen_tdls_peer_update,
  7872. .gen_pdev_get_tpc_table_cmdid =
  7873. ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid,
  7874. .gen_radar_found = ath10k_wmi_10_4_gen_radar_found,
  7875. /* shared with 10.2 */
  7876. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7877. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7878. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  7879. .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
  7880. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  7881. .gen_echo = ath10k_wmi_op_gen_echo,
  7882. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  7883. };
  7884. int ath10k_wmi_attach(struct ath10k *ar)
  7885. {
  7886. switch (ar->running_fw->fw_file.wmi_op_version) {
  7887. case ATH10K_FW_WMI_OP_VERSION_10_4:
  7888. ar->wmi.ops = &wmi_10_4_ops;
  7889. ar->wmi.cmd = &wmi_10_4_cmd_map;
  7890. ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
  7891. ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
  7892. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7893. break;
  7894. case ATH10K_FW_WMI_OP_VERSION_10_2_4:
  7895. ar->wmi.cmd = &wmi_10_2_4_cmd_map;
  7896. ar->wmi.ops = &wmi_10_2_4_ops;
  7897. ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
  7898. ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
  7899. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7900. break;
  7901. case ATH10K_FW_WMI_OP_VERSION_10_2:
  7902. ar->wmi.cmd = &wmi_10_2_cmd_map;
  7903. ar->wmi.ops = &wmi_10_2_ops;
  7904. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  7905. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  7906. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7907. break;
  7908. case ATH10K_FW_WMI_OP_VERSION_10_1:
  7909. ar->wmi.cmd = &wmi_10x_cmd_map;
  7910. ar->wmi.ops = &wmi_10_1_ops;
  7911. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  7912. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  7913. ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
  7914. break;
  7915. case ATH10K_FW_WMI_OP_VERSION_MAIN:
  7916. ar->wmi.cmd = &wmi_cmd_map;
  7917. ar->wmi.ops = &wmi_ops;
  7918. ar->wmi.vdev_param = &wmi_vdev_param_map;
  7919. ar->wmi.pdev_param = &wmi_pdev_param_map;
  7920. ar->wmi.peer_flags = &wmi_peer_flags_map;
  7921. break;
  7922. case ATH10K_FW_WMI_OP_VERSION_TLV:
  7923. ath10k_wmi_tlv_attach(ar);
  7924. break;
  7925. case ATH10K_FW_WMI_OP_VERSION_UNSET:
  7926. case ATH10K_FW_WMI_OP_VERSION_MAX:
  7927. ath10k_err(ar, "unsupported WMI op version: %d\n",
  7928. ar->running_fw->fw_file.wmi_op_version);
  7929. return -EINVAL;
  7930. }
  7931. init_completion(&ar->wmi.service_ready);
  7932. init_completion(&ar->wmi.unified_ready);
  7933. init_completion(&ar->wmi.barrier);
  7934. init_completion(&ar->wmi.radar_confirm);
  7935. INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
  7936. INIT_WORK(&ar->radar_confirmation_work,
  7937. ath10k_radar_confirmation_work);
  7938. if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF,
  7939. ar->running_fw->fw_file.fw_features)) {
  7940. idr_init(&ar->wmi.mgmt_pending_tx);
  7941. }
  7942. return 0;
  7943. }
  7944. void ath10k_wmi_free_host_mem(struct ath10k *ar)
  7945. {
  7946. int i;
  7947. /* free the host memory chunks requested by firmware */
  7948. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  7949. dma_free_coherent(ar->dev,
  7950. ar->wmi.mem_chunks[i].len,
  7951. ar->wmi.mem_chunks[i].vaddr,
  7952. ar->wmi.mem_chunks[i].paddr);
  7953. }
  7954. ar->wmi.num_mem_chunks = 0;
  7955. }
  7956. static int ath10k_wmi_mgmt_tx_clean_up_pending(int msdu_id, void *ptr,
  7957. void *ctx)
  7958. {
  7959. struct ath10k_mgmt_tx_pkt_addr *pkt_addr = ptr;
  7960. struct ath10k *ar = ctx;
  7961. struct sk_buff *msdu;
  7962. ath10k_dbg(ar, ATH10K_DBG_WMI,
  7963. "force cleanup mgmt msdu_id %hu\n", msdu_id);
  7964. msdu = pkt_addr->vaddr;
  7965. dma_unmap_single(ar->dev, pkt_addr->paddr,
  7966. msdu->len, DMA_FROM_DEVICE);
  7967. ieee80211_free_txskb(ar->hw, msdu);
  7968. return 0;
  7969. }
  7970. void ath10k_wmi_detach(struct ath10k *ar)
  7971. {
  7972. if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF,
  7973. ar->running_fw->fw_file.fw_features)) {
  7974. spin_lock_bh(&ar->data_lock);
  7975. idr_for_each(&ar->wmi.mgmt_pending_tx,
  7976. ath10k_wmi_mgmt_tx_clean_up_pending, ar);
  7977. idr_destroy(&ar->wmi.mgmt_pending_tx);
  7978. spin_unlock_bh(&ar->data_lock);
  7979. }
  7980. cancel_work_sync(&ar->svc_rdy_work);
  7981. if (ar->svc_rdy_skb)
  7982. dev_kfree_skb(ar->svc_rdy_skb);
  7983. }