core.h 28 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
  4. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  5. *
  6. * Permission to use, copy, modify, and/or distribute this software for any
  7. * purpose with or without fee is hereby granted, provided that the above
  8. * copyright notice and this permission notice appear in all copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _CORE_H_
  19. #define _CORE_H_
  20. #include <linux/completion.h>
  21. #include <linux/if_ether.h>
  22. #include <linux/types.h>
  23. #include <linux/pci.h>
  24. #include <linux/uuid.h>
  25. #include <linux/time.h>
  26. #include "htt.h"
  27. #include "htc.h"
  28. #include "hw.h"
  29. #include "targaddrs.h"
  30. #include "wmi.h"
  31. #include "../ath.h"
  32. #include "../regd.h"
  33. #include "../dfs_pattern_detector.h"
  34. #include "spectral.h"
  35. #include "thermal.h"
  36. #include "wow.h"
  37. #include "swap.h"
  38. #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
  39. #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
  40. #define WO(_f) ((_f##_OFFSET) >> 2)
  41. #define ATH10K_SCAN_ID 0
  42. #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */
  43. #define WMI_READY_TIMEOUT (5 * HZ)
  44. #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ)
  45. #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ)
  46. #define ATH10K_NUM_CHANS 41
  47. #define ATH10K_MAX_5G_CHAN 173
  48. /* Antenna noise floor */
  49. #define ATH10K_DEFAULT_NOISE_FLOOR -95
  50. #define ATH10K_INVALID_RSSI 128
  51. #define ATH10K_MAX_NUM_MGMT_PENDING 128
  52. /* number of failed packets (20 packets with 16 sw reties each) */
  53. #define ATH10K_KICKOUT_THRESHOLD (20 * 16)
  54. /*
  55. * Use insanely high numbers to make sure that the firmware implementation
  56. * won't start, we have the same functionality already in hostapd. Unit
  57. * is seconds.
  58. */
  59. #define ATH10K_KEEPALIVE_MIN_IDLE 3747
  60. #define ATH10K_KEEPALIVE_MAX_IDLE 3895
  61. #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
  62. /* NAPI poll budget */
  63. #define ATH10K_NAPI_BUDGET 64
  64. /* SMBIOS type containing Board Data File Name Extension */
  65. #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8
  66. /* SMBIOS type structure length (excluding strings-set) */
  67. #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9
  68. /* Offset pointing to Board Data File Name Extension */
  69. #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8
  70. /* Board Data File Name Extension string length.
  71. * String format: BDF_<Customer ID>_<Extension>\0
  72. */
  73. #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20
  74. /* The magic used by QCA spec */
  75. #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_"
  76. struct ath10k;
  77. enum ath10k_bus {
  78. ATH10K_BUS_PCI,
  79. ATH10K_BUS_AHB,
  80. ATH10K_BUS_SDIO,
  81. ATH10K_BUS_USB,
  82. ATH10K_BUS_SNOC,
  83. };
  84. static inline const char *ath10k_bus_str(enum ath10k_bus bus)
  85. {
  86. switch (bus) {
  87. case ATH10K_BUS_PCI:
  88. return "pci";
  89. case ATH10K_BUS_AHB:
  90. return "ahb";
  91. case ATH10K_BUS_SDIO:
  92. return "sdio";
  93. case ATH10K_BUS_USB:
  94. return "usb";
  95. case ATH10K_BUS_SNOC:
  96. return "snoc";
  97. }
  98. return "unknown";
  99. }
  100. enum ath10k_skb_flags {
  101. ATH10K_SKB_F_NO_HWCRYPT = BIT(0),
  102. ATH10K_SKB_F_DTIM_ZERO = BIT(1),
  103. ATH10K_SKB_F_DELIVER_CAB = BIT(2),
  104. ATH10K_SKB_F_MGMT = BIT(3),
  105. ATH10K_SKB_F_QOS = BIT(4),
  106. };
  107. struct ath10k_skb_cb {
  108. dma_addr_t paddr;
  109. u8 flags;
  110. u8 eid;
  111. u16 msdu_id;
  112. struct ieee80211_vif *vif;
  113. struct ieee80211_txq *txq;
  114. } __packed;
  115. struct ath10k_skb_rxcb {
  116. dma_addr_t paddr;
  117. struct hlist_node hlist;
  118. };
  119. static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
  120. {
  121. BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
  122. IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
  123. return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
  124. }
  125. static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)
  126. {
  127. BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));
  128. return (struct ath10k_skb_rxcb *)skb->cb;
  129. }
  130. #define ATH10K_RXCB_SKB(rxcb) \
  131. container_of((void *)rxcb, struct sk_buff, cb)
  132. static inline u32 host_interest_item_address(u32 item_offset)
  133. {
  134. return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
  135. }
  136. struct ath10k_bmi {
  137. bool done_sent;
  138. };
  139. struct ath10k_mem_chunk {
  140. void *vaddr;
  141. dma_addr_t paddr;
  142. u32 len;
  143. u32 req_id;
  144. };
  145. struct ath10k_wmi {
  146. enum ath10k_htc_ep_id eid;
  147. struct completion service_ready;
  148. struct completion unified_ready;
  149. struct completion barrier;
  150. struct completion radar_confirm;
  151. wait_queue_head_t tx_credits_wq;
  152. DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
  153. struct wmi_cmd_map *cmd;
  154. struct wmi_vdev_param_map *vdev_param;
  155. struct wmi_pdev_param_map *pdev_param;
  156. const struct wmi_ops *ops;
  157. const struct wmi_peer_flags_map *peer_flags;
  158. u32 mgmt_max_num_pending_tx;
  159. /* Protected by data_lock */
  160. struct idr mgmt_pending_tx;
  161. u32 num_mem_chunks;
  162. u32 rx_decap_mode;
  163. struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
  164. };
  165. struct ath10k_fw_stats_peer {
  166. struct list_head list;
  167. u8 peer_macaddr[ETH_ALEN];
  168. u32 peer_rssi;
  169. u32 peer_tx_rate;
  170. u32 peer_rx_rate; /* 10x only */
  171. u32 rx_duration;
  172. };
  173. struct ath10k_fw_extd_stats_peer {
  174. struct list_head list;
  175. u8 peer_macaddr[ETH_ALEN];
  176. u32 rx_duration;
  177. };
  178. struct ath10k_fw_stats_vdev {
  179. struct list_head list;
  180. u32 vdev_id;
  181. u32 beacon_snr;
  182. u32 data_snr;
  183. u32 num_tx_frames[4];
  184. u32 num_rx_frames;
  185. u32 num_tx_frames_retries[4];
  186. u32 num_tx_frames_failures[4];
  187. u32 num_rts_fail;
  188. u32 num_rts_success;
  189. u32 num_rx_err;
  190. u32 num_rx_discard;
  191. u32 num_tx_not_acked;
  192. u32 tx_rate_history[10];
  193. u32 beacon_rssi_history[10];
  194. };
  195. struct ath10k_fw_stats_vdev_extd {
  196. struct list_head list;
  197. u32 vdev_id;
  198. u32 ppdu_aggr_cnt;
  199. u32 ppdu_noack;
  200. u32 mpdu_queued;
  201. u32 ppdu_nonaggr_cnt;
  202. u32 mpdu_sw_requeued;
  203. u32 mpdu_suc_retry;
  204. u32 mpdu_suc_multitry;
  205. u32 mpdu_fail_retry;
  206. u32 tx_ftm_suc;
  207. u32 tx_ftm_suc_retry;
  208. u32 tx_ftm_fail;
  209. u32 rx_ftmr_cnt;
  210. u32 rx_ftmr_dup_cnt;
  211. u32 rx_iftmr_cnt;
  212. u32 rx_iftmr_dup_cnt;
  213. };
  214. struct ath10k_fw_stats_pdev {
  215. struct list_head list;
  216. /* PDEV stats */
  217. s32 ch_noise_floor;
  218. u32 tx_frame_count; /* Cycles spent transmitting frames */
  219. u32 rx_frame_count; /* Cycles spent receiving frames */
  220. u32 rx_clear_count; /* Total channel busy time, evidently */
  221. u32 cycle_count; /* Total on-channel time */
  222. u32 phy_err_count;
  223. u32 chan_tx_power;
  224. u32 ack_rx_bad;
  225. u32 rts_bad;
  226. u32 rts_good;
  227. u32 fcs_bad;
  228. u32 no_beacons;
  229. u32 mib_int_count;
  230. /* PDEV TX stats */
  231. s32 comp_queued;
  232. s32 comp_delivered;
  233. s32 msdu_enqued;
  234. s32 mpdu_enqued;
  235. s32 wmm_drop;
  236. s32 local_enqued;
  237. s32 local_freed;
  238. s32 hw_queued;
  239. s32 hw_reaped;
  240. s32 underrun;
  241. u32 hw_paused;
  242. s32 tx_abort;
  243. s32 mpdus_requed;
  244. u32 tx_ko;
  245. u32 data_rc;
  246. u32 self_triggers;
  247. u32 sw_retry_failure;
  248. u32 illgl_rate_phy_err;
  249. u32 pdev_cont_xretry;
  250. u32 pdev_tx_timeout;
  251. u32 pdev_resets;
  252. u32 phy_underrun;
  253. u32 txop_ovf;
  254. u32 seq_posted;
  255. u32 seq_failed_queueing;
  256. u32 seq_completed;
  257. u32 seq_restarted;
  258. u32 mu_seq_posted;
  259. u32 mpdus_sw_flush;
  260. u32 mpdus_hw_filter;
  261. u32 mpdus_truncated;
  262. u32 mpdus_ack_failed;
  263. u32 mpdus_expired;
  264. /* PDEV RX stats */
  265. s32 mid_ppdu_route_change;
  266. s32 status_rcvd;
  267. s32 r0_frags;
  268. s32 r1_frags;
  269. s32 r2_frags;
  270. s32 r3_frags;
  271. s32 htt_msdus;
  272. s32 htt_mpdus;
  273. s32 loc_msdus;
  274. s32 loc_mpdus;
  275. s32 oversize_amsdu;
  276. s32 phy_errs;
  277. s32 phy_err_drop;
  278. s32 mpdu_errs;
  279. s32 rx_ovfl_errs;
  280. };
  281. struct ath10k_fw_stats {
  282. bool extended;
  283. struct list_head pdevs;
  284. struct list_head vdevs;
  285. struct list_head peers;
  286. struct list_head peers_extd;
  287. };
  288. #define ATH10K_TPC_TABLE_TYPE_FLAG 1
  289. #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF
  290. struct ath10k_tpc_table {
  291. u32 pream_idx[WMI_TPC_RATE_MAX];
  292. u8 rate_code[WMI_TPC_RATE_MAX];
  293. char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  294. };
  295. struct ath10k_tpc_stats {
  296. u32 reg_domain;
  297. u32 chan_freq;
  298. u32 phy_mode;
  299. u32 twice_antenna_reduction;
  300. u32 twice_max_rd_power;
  301. s32 twice_antenna_gain;
  302. u32 power_limit;
  303. u32 num_tx_chain;
  304. u32 ctl;
  305. u32 rate_max;
  306. u8 flag[WMI_TPC_FLAG];
  307. struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG];
  308. };
  309. struct ath10k_tpc_table_final {
  310. u32 pream_idx[WMI_TPC_FINAL_RATE_MAX];
  311. u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
  312. char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  313. };
  314. struct ath10k_tpc_stats_final {
  315. u32 reg_domain;
  316. u32 chan_freq;
  317. u32 phy_mode;
  318. u32 twice_antenna_reduction;
  319. u32 twice_max_rd_power;
  320. s32 twice_antenna_gain;
  321. u32 power_limit;
  322. u32 num_tx_chain;
  323. u32 ctl;
  324. u32 rate_max;
  325. u8 flag[WMI_TPC_FLAG];
  326. struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG];
  327. };
  328. struct ath10k_dfs_stats {
  329. u32 phy_errors;
  330. u32 pulses_total;
  331. u32 pulses_detected;
  332. u32 pulses_discarded;
  333. u32 radar_detected;
  334. };
  335. enum ath10k_radar_confirmation_state {
  336. ATH10K_RADAR_CONFIRMATION_IDLE = 0,
  337. ATH10K_RADAR_CONFIRMATION_INPROGRESS,
  338. ATH10K_RADAR_CONFIRMATION_STOPPED,
  339. };
  340. struct ath10k_radar_found_info {
  341. u32 pri_min;
  342. u32 pri_max;
  343. u32 width_min;
  344. u32 width_max;
  345. u32 sidx_min;
  346. u32 sidx_max;
  347. };
  348. #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
  349. struct ath10k_peer {
  350. struct list_head list;
  351. struct ieee80211_vif *vif;
  352. struct ieee80211_sta *sta;
  353. bool removed;
  354. int vdev_id;
  355. u8 addr[ETH_ALEN];
  356. DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
  357. /* protected by ar->data_lock */
  358. struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
  359. };
  360. struct ath10k_txq {
  361. struct list_head list;
  362. unsigned long num_fw_queued;
  363. unsigned long num_push_allowed;
  364. };
  365. enum ath10k_pkt_rx_err {
  366. ATH10K_PKT_RX_ERR_FCS,
  367. ATH10K_PKT_RX_ERR_TKIP,
  368. ATH10K_PKT_RX_ERR_CRYPT,
  369. ATH10K_PKT_RX_ERR_PEER_IDX_INVAL,
  370. ATH10K_PKT_RX_ERR_MAX,
  371. };
  372. enum ath10k_ampdu_subfrm_num {
  373. ATH10K_AMPDU_SUBFRM_NUM_10,
  374. ATH10K_AMPDU_SUBFRM_NUM_20,
  375. ATH10K_AMPDU_SUBFRM_NUM_30,
  376. ATH10K_AMPDU_SUBFRM_NUM_40,
  377. ATH10K_AMPDU_SUBFRM_NUM_50,
  378. ATH10K_AMPDU_SUBFRM_NUM_60,
  379. ATH10K_AMPDU_SUBFRM_NUM_MORE,
  380. ATH10K_AMPDU_SUBFRM_NUM_MAX,
  381. };
  382. enum ath10k_amsdu_subfrm_num {
  383. ATH10K_AMSDU_SUBFRM_NUM_1,
  384. ATH10K_AMSDU_SUBFRM_NUM_2,
  385. ATH10K_AMSDU_SUBFRM_NUM_3,
  386. ATH10K_AMSDU_SUBFRM_NUM_4,
  387. ATH10K_AMSDU_SUBFRM_NUM_MORE,
  388. ATH10K_AMSDU_SUBFRM_NUM_MAX,
  389. };
  390. struct ath10k_sta_tid_stats {
  391. unsigned long int rx_pkt_from_fw;
  392. unsigned long int rx_pkt_unchained;
  393. unsigned long int rx_pkt_drop_chained;
  394. unsigned long int rx_pkt_drop_filter;
  395. unsigned long int rx_pkt_err[ATH10K_PKT_RX_ERR_MAX];
  396. unsigned long int rx_pkt_queued_for_mac;
  397. unsigned long int rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX];
  398. unsigned long int rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX];
  399. };
  400. struct ath10k_sta {
  401. struct ath10k_vif *arvif;
  402. /* the following are protected by ar->data_lock */
  403. u32 changed; /* IEEE80211_RC_* */
  404. u32 bw;
  405. u32 nss;
  406. u32 smps;
  407. u16 peer_id;
  408. struct rate_info txrate;
  409. struct work_struct update_wk;
  410. u64 rx_duration;
  411. #ifdef CONFIG_MAC80211_DEBUGFS
  412. /* protected by conf_mutex */
  413. bool aggr_mode;
  414. /* Protected with ar->data_lock */
  415. struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1];
  416. #endif
  417. };
  418. #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ)
  419. enum ath10k_beacon_state {
  420. ATH10K_BEACON_SCHEDULED = 0,
  421. ATH10K_BEACON_SENDING,
  422. ATH10K_BEACON_SENT,
  423. };
  424. struct ath10k_vif {
  425. struct list_head list;
  426. u32 vdev_id;
  427. u16 peer_id;
  428. enum wmi_vdev_type vdev_type;
  429. enum wmi_vdev_subtype vdev_subtype;
  430. u32 beacon_interval;
  431. u32 dtim_period;
  432. struct sk_buff *beacon;
  433. /* protected by data_lock */
  434. enum ath10k_beacon_state beacon_state;
  435. void *beacon_buf;
  436. dma_addr_t beacon_paddr;
  437. unsigned long tx_paused; /* arbitrary values defined by target */
  438. struct ath10k *ar;
  439. struct ieee80211_vif *vif;
  440. bool is_started;
  441. bool is_up;
  442. bool spectral_enabled;
  443. bool ps;
  444. u32 aid;
  445. u8 bssid[ETH_ALEN];
  446. struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
  447. s8 def_wep_key_idx;
  448. u16 tx_seq_no;
  449. union {
  450. struct {
  451. u32 uapsd;
  452. } sta;
  453. struct {
  454. /* 512 stations */
  455. u8 tim_bitmap[64];
  456. u8 tim_len;
  457. u32 ssid_len;
  458. u8 ssid[IEEE80211_MAX_SSID_LEN];
  459. bool hidden_ssid;
  460. /* P2P_IE with NoA attribute for P2P_GO case */
  461. u32 noa_len;
  462. u8 *noa_data;
  463. } ap;
  464. } u;
  465. bool use_cts_prot;
  466. bool nohwcrypt;
  467. int num_legacy_stations;
  468. int txpower;
  469. struct wmi_wmm_params_all_arg wmm_params;
  470. struct work_struct ap_csa_work;
  471. struct delayed_work connection_loss_work;
  472. struct cfg80211_bitrate_mask bitrate_mask;
  473. };
  474. struct ath10k_vif_iter {
  475. u32 vdev_id;
  476. struct ath10k_vif *arvif;
  477. };
  478. /* Copy Engine register dump, protected by ce-lock */
  479. struct ath10k_ce_crash_data {
  480. __le32 base_addr;
  481. __le32 src_wr_idx;
  482. __le32 src_r_idx;
  483. __le32 dst_wr_idx;
  484. __le32 dst_r_idx;
  485. };
  486. struct ath10k_ce_crash_hdr {
  487. __le32 ce_count;
  488. __le32 reserved[3]; /* for future use */
  489. struct ath10k_ce_crash_data entries[];
  490. };
  491. #define MAX_MEM_DUMP_TYPE 5
  492. /* used for crash-dump storage, protected by data-lock */
  493. struct ath10k_fw_crash_data {
  494. guid_t guid;
  495. struct timespec64 timestamp;
  496. __le32 registers[REG_DUMP_COUNT_QCA988X];
  497. struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX];
  498. u8 *ramdump_buf;
  499. size_t ramdump_buf_len;
  500. };
  501. struct ath10k_debug {
  502. struct dentry *debugfs_phy;
  503. struct ath10k_fw_stats fw_stats;
  504. struct completion fw_stats_complete;
  505. bool fw_stats_done;
  506. unsigned long htt_stats_mask;
  507. struct delayed_work htt_stats_dwork;
  508. struct ath10k_dfs_stats dfs_stats;
  509. struct ath_dfs_pool_stats dfs_pool_stats;
  510. /* used for tpc-dump storage, protected by data-lock */
  511. struct ath10k_tpc_stats *tpc_stats;
  512. struct ath10k_tpc_stats_final *tpc_stats_final;
  513. struct completion tpc_complete;
  514. /* protected by conf_mutex */
  515. u64 fw_dbglog_mask;
  516. u32 fw_dbglog_level;
  517. u32 reg_addr;
  518. u32 nf_cal_period;
  519. void *cal_data;
  520. };
  521. enum ath10k_state {
  522. ATH10K_STATE_OFF = 0,
  523. ATH10K_STATE_ON,
  524. /* When doing firmware recovery the device is first powered down.
  525. * mac80211 is supposed to call in to start() hook later on. It is
  526. * however possible that driver unloading and firmware crash overlap.
  527. * mac80211 can wait on conf_mutex in stop() while the device is
  528. * stopped in ath10k_core_restart() work holding conf_mutex. The state
  529. * RESTARTED means that the device is up and mac80211 has started hw
  530. * reconfiguration. Once mac80211 is done with the reconfiguration we
  531. * set the state to STATE_ON in reconfig_complete().
  532. */
  533. ATH10K_STATE_RESTARTING,
  534. ATH10K_STATE_RESTARTED,
  535. /* The device has crashed while restarting hw. This state is like ON
  536. * but commands are blocked in HTC and -ECOMM response is given. This
  537. * prevents completion timeouts and makes the driver more responsive to
  538. * userspace commands. This is also prevents recursive recovery.
  539. */
  540. ATH10K_STATE_WEDGED,
  541. /* factory tests */
  542. ATH10K_STATE_UTF,
  543. };
  544. enum ath10k_firmware_mode {
  545. /* the default mode, standard 802.11 functionality */
  546. ATH10K_FIRMWARE_MODE_NORMAL,
  547. /* factory tests etc */
  548. ATH10K_FIRMWARE_MODE_UTF,
  549. };
  550. enum ath10k_fw_features {
  551. /* wmi_mgmt_rx_hdr contains extra RSSI information */
  552. ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
  553. /* Firmware from 10X branch. Deprecated, don't use in new code. */
  554. ATH10K_FW_FEATURE_WMI_10X = 1,
  555. /* firmware support tx frame management over WMI, otherwise it's HTT */
  556. ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
  557. /* Firmware does not support P2P */
  558. ATH10K_FW_FEATURE_NO_P2P = 3,
  559. /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature
  560. * bit is required to be set as well. Deprecated, don't use in new
  561. * code.
  562. */
  563. ATH10K_FW_FEATURE_WMI_10_2 = 4,
  564. /* Some firmware revisions lack proper multi-interface client powersave
  565. * implementation. Enabling PS could result in connection drops,
  566. * traffic stalls, etc.
  567. */
  568. ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,
  569. /* Some firmware revisions have an incomplete WoWLAN implementation
  570. * despite WMI service bit being advertised. This feature flag is used
  571. * to distinguish whether WoWLAN is really supported or not.
  572. */
  573. ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,
  574. /* Don't trust error code from otp.bin */
  575. ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7,
  576. /* Some firmware revisions pad 4th hw address to 4 byte boundary making
  577. * it 8 bytes long in Native Wifi Rx decap.
  578. */
  579. ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8,
  580. /* Firmware supports bypassing PLL setting on init. */
  581. ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
  582. /* Raw mode support. If supported, FW supports receiving and trasmitting
  583. * frames in raw mode.
  584. */
  585. ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,
  586. /* Firmware Supports Adaptive CCA*/
  587. ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11,
  588. /* Firmware supports management frame protection */
  589. ATH10K_FW_FEATURE_MFP_SUPPORT = 12,
  590. /* Firmware supports pull-push model where host shares it's software
  591. * queue state with firmware and firmware generates fetch requests
  592. * telling host which queues to dequeue tx from.
  593. *
  594. * Primary function of this is improved MU-MIMO performance with
  595. * multiple clients.
  596. */
  597. ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13,
  598. /* Firmware supports BT-Coex without reloading firmware via pdev param.
  599. * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of
  600. * extended resource config should be enabled always. This firmware IE
  601. * is used to configure WMI_COEX_GPIO_SUPPORT.
  602. */
  603. ATH10K_FW_FEATURE_BTCOEX_PARAM = 14,
  604. /* Unused flag and proven to be not working, enable this if you want
  605. * to experiment sending NULL func data frames in HTT TX
  606. */
  607. ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15,
  608. /* Firmware allow other BSS mesh broadcast/multicast frames without
  609. * creating monitor interface. Appropriate rxfilters are programmed for
  610. * mesh vdev by firmware itself. This feature flags will be used for
  611. * not creating monitor vdev while configuring mesh node.
  612. */
  613. ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16,
  614. /* Firmware does not support power save in station mode. */
  615. ATH10K_FW_FEATURE_NO_PS = 17,
  616. /* Firmware allows management tx by reference instead of by value. */
  617. ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18,
  618. /* Firmware load is done externally, not by bmi */
  619. ATH10K_FW_FEATURE_NON_BMI = 19,
  620. /* keep last */
  621. ATH10K_FW_FEATURE_COUNT,
  622. };
  623. enum ath10k_dev_flags {
  624. /* Indicates that ath10k device is during CAC phase of DFS */
  625. ATH10K_CAC_RUNNING,
  626. ATH10K_FLAG_CORE_REGISTERED,
  627. /* Device has crashed and needs to restart. This indicates any pending
  628. * waiters should immediately cancel instead of waiting for a time out.
  629. */
  630. ATH10K_FLAG_CRASH_FLUSH,
  631. /* Use Raw mode instead of native WiFi Tx/Rx encap mode.
  632. * Raw mode supports both hardware and software crypto. Native WiFi only
  633. * supports hardware crypto.
  634. */
  635. ATH10K_FLAG_RAW_MODE,
  636. /* Disable HW crypto engine */
  637. ATH10K_FLAG_HW_CRYPTO_DISABLED,
  638. /* Bluetooth coexistance enabled */
  639. ATH10K_FLAG_BTCOEX,
  640. /* Per Station statistics service */
  641. ATH10K_FLAG_PEER_STATS,
  642. };
  643. enum ath10k_cal_mode {
  644. ATH10K_CAL_MODE_FILE,
  645. ATH10K_CAL_MODE_OTP,
  646. ATH10K_CAL_MODE_DT,
  647. ATH10K_PRE_CAL_MODE_FILE,
  648. ATH10K_PRE_CAL_MODE_DT,
  649. ATH10K_CAL_MODE_EEPROM,
  650. };
  651. enum ath10k_crypt_mode {
  652. /* Only use hardware crypto engine */
  653. ATH10K_CRYPT_MODE_HW,
  654. /* Only use software crypto engine */
  655. ATH10K_CRYPT_MODE_SW,
  656. };
  657. static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
  658. {
  659. switch (mode) {
  660. case ATH10K_CAL_MODE_FILE:
  661. return "file";
  662. case ATH10K_CAL_MODE_OTP:
  663. return "otp";
  664. case ATH10K_CAL_MODE_DT:
  665. return "dt";
  666. case ATH10K_PRE_CAL_MODE_FILE:
  667. return "pre-cal-file";
  668. case ATH10K_PRE_CAL_MODE_DT:
  669. return "pre-cal-dt";
  670. case ATH10K_CAL_MODE_EEPROM:
  671. return "eeprom";
  672. }
  673. return "unknown";
  674. }
  675. enum ath10k_scan_state {
  676. ATH10K_SCAN_IDLE,
  677. ATH10K_SCAN_STARTING,
  678. ATH10K_SCAN_RUNNING,
  679. ATH10K_SCAN_ABORTING,
  680. };
  681. static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
  682. {
  683. switch (state) {
  684. case ATH10K_SCAN_IDLE:
  685. return "idle";
  686. case ATH10K_SCAN_STARTING:
  687. return "starting";
  688. case ATH10K_SCAN_RUNNING:
  689. return "running";
  690. case ATH10K_SCAN_ABORTING:
  691. return "aborting";
  692. }
  693. return "unknown";
  694. }
  695. enum ath10k_tx_pause_reason {
  696. ATH10K_TX_PAUSE_Q_FULL,
  697. ATH10K_TX_PAUSE_MAX,
  698. };
  699. struct ath10k_fw_file {
  700. const struct firmware *firmware;
  701. char fw_version[ETHTOOL_FWVERS_LEN];
  702. DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
  703. enum ath10k_fw_wmi_op_version wmi_op_version;
  704. enum ath10k_fw_htt_op_version htt_op_version;
  705. const void *firmware_data;
  706. size_t firmware_len;
  707. const void *otp_data;
  708. size_t otp_len;
  709. const void *codeswap_data;
  710. size_t codeswap_len;
  711. /* The original idea of struct ath10k_fw_file was that it only
  712. * contains struct firmware and pointers to various parts (actual
  713. * firmware binary, otp, metadata etc) of the file. This seg_info
  714. * is actually created separate but as this is used similarly as
  715. * the other firmware components it's more convenient to have it
  716. * here.
  717. */
  718. struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;
  719. };
  720. struct ath10k_fw_components {
  721. const struct firmware *board;
  722. const void *board_data;
  723. size_t board_len;
  724. struct ath10k_fw_file fw_file;
  725. };
  726. struct ath10k_per_peer_tx_stats {
  727. u32 succ_bytes;
  728. u32 retry_bytes;
  729. u32 failed_bytes;
  730. u8 ratecode;
  731. u8 flags;
  732. u16 peer_id;
  733. u16 succ_pkts;
  734. u16 retry_pkts;
  735. u16 failed_pkts;
  736. u16 duration;
  737. u32 reserved1;
  738. u32 reserved2;
  739. };
  740. struct ath10k {
  741. struct ath_common ath_common;
  742. struct ieee80211_hw *hw;
  743. struct ieee80211_ops *ops;
  744. struct device *dev;
  745. u8 mac_addr[ETH_ALEN];
  746. enum ath10k_hw_rev hw_rev;
  747. u16 dev_id;
  748. u32 chip_id;
  749. u32 target_version;
  750. u8 fw_version_major;
  751. u32 fw_version_minor;
  752. u16 fw_version_release;
  753. u16 fw_version_build;
  754. u32 fw_stats_req_mask;
  755. u32 phy_capability;
  756. u32 hw_min_tx_power;
  757. u32 hw_max_tx_power;
  758. u32 hw_eeprom_rd;
  759. u32 ht_cap_info;
  760. u32 vht_cap_info;
  761. u32 num_rf_chains;
  762. u32 max_spatial_stream;
  763. /* protected by conf_mutex */
  764. u32 low_5ghz_chan;
  765. u32 high_5ghz_chan;
  766. bool ani_enabled;
  767. bool p2p;
  768. struct {
  769. enum ath10k_bus bus;
  770. const struct ath10k_hif_ops *ops;
  771. } hif;
  772. struct completion target_suspend;
  773. const struct ath10k_hw_regs *regs;
  774. const struct ath10k_hw_ce_regs *hw_ce_regs;
  775. const struct ath10k_hw_values *hw_values;
  776. struct ath10k_bmi bmi;
  777. struct ath10k_wmi wmi;
  778. struct ath10k_htc htc;
  779. struct ath10k_htt htt;
  780. struct ath10k_hw_params hw_params;
  781. /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */
  782. struct ath10k_fw_components normal_mode_fw;
  783. /* READ-ONLY images of the running firmware, which can be either
  784. * normal or UTF. Do not modify, release etc!
  785. */
  786. const struct ath10k_fw_components *running_fw;
  787. const struct firmware *pre_cal_file;
  788. const struct firmware *cal_file;
  789. struct {
  790. u32 vendor;
  791. u32 device;
  792. u32 subsystem_vendor;
  793. u32 subsystem_device;
  794. bool bmi_ids_valid;
  795. u8 bmi_board_id;
  796. u8 bmi_chip_id;
  797. char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH];
  798. } id;
  799. int fw_api;
  800. int bd_api;
  801. enum ath10k_cal_mode cal_mode;
  802. struct {
  803. struct completion started;
  804. struct completion completed;
  805. struct completion on_channel;
  806. struct delayed_work timeout;
  807. enum ath10k_scan_state state;
  808. bool is_roc;
  809. int vdev_id;
  810. int roc_freq;
  811. bool roc_notify;
  812. } scan;
  813. struct {
  814. struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
  815. } mac;
  816. /* should never be NULL; needed for regular htt rx */
  817. struct ieee80211_channel *rx_channel;
  818. /* valid during scan; needed for mgmt rx during scan */
  819. struct ieee80211_channel *scan_channel;
  820. /* current operating channel definition */
  821. struct cfg80211_chan_def chandef;
  822. /* currently configured operating channel in firmware */
  823. struct ieee80211_channel *tgt_oper_chan;
  824. unsigned long long free_vdev_map;
  825. struct ath10k_vif *monitor_arvif;
  826. bool monitor;
  827. int monitor_vdev_id;
  828. bool monitor_started;
  829. unsigned int filter_flags;
  830. unsigned long dev_flags;
  831. bool dfs_block_radar_events;
  832. /* protected by conf_mutex */
  833. bool radar_enabled;
  834. int num_started_vdevs;
  835. /* Protected by conf-mutex */
  836. u8 cfg_tx_chainmask;
  837. u8 cfg_rx_chainmask;
  838. struct completion install_key_done;
  839. struct completion vdev_setup_done;
  840. struct workqueue_struct *workqueue;
  841. /* Auxiliary workqueue */
  842. struct workqueue_struct *workqueue_aux;
  843. /* prevents concurrent FW reconfiguration */
  844. struct mutex conf_mutex;
  845. /* protects shared structure data */
  846. spinlock_t data_lock;
  847. /* protects: ar->txqs, artxq->list */
  848. spinlock_t txqs_lock;
  849. struct list_head txqs;
  850. struct list_head arvifs;
  851. struct list_head peers;
  852. struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS];
  853. wait_queue_head_t peer_mapping_wq;
  854. /* protected by conf_mutex */
  855. int num_peers;
  856. int num_stations;
  857. int max_num_peers;
  858. int max_num_stations;
  859. int max_num_vdevs;
  860. int max_num_tdls_vdevs;
  861. int num_active_peers;
  862. int num_tids;
  863. struct work_struct svc_rdy_work;
  864. struct sk_buff *svc_rdy_skb;
  865. struct work_struct offchan_tx_work;
  866. struct sk_buff_head offchan_tx_queue;
  867. struct completion offchan_tx_completed;
  868. struct sk_buff *offchan_tx_skb;
  869. struct work_struct wmi_mgmt_tx_work;
  870. struct sk_buff_head wmi_mgmt_tx_queue;
  871. enum ath10k_state state;
  872. struct work_struct register_work;
  873. struct work_struct restart_work;
  874. /* cycle count is reported twice for each visited channel during scan.
  875. * access protected by data_lock
  876. */
  877. u32 survey_last_rx_clear_count;
  878. u32 survey_last_cycle_count;
  879. struct survey_info survey[ATH10K_NUM_CHANS];
  880. /* Channel info events are expected to come in pairs without and with
  881. * COMPLETE flag set respectively for each channel visit during scan.
  882. *
  883. * However there are deviations from this rule. This flag is used to
  884. * avoid reporting garbage data.
  885. */
  886. bool ch_info_can_report_survey;
  887. struct completion bss_survey_done;
  888. struct dfs_pattern_detector *dfs_detector;
  889. unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
  890. #ifdef CONFIG_ATH10K_DEBUGFS
  891. struct ath10k_debug debug;
  892. struct {
  893. /* relay(fs) channel for spectral scan */
  894. struct rchan *rfs_chan_spec_scan;
  895. /* spectral_mode and spec_config are protected by conf_mutex */
  896. enum ath10k_spectral_mode mode;
  897. struct ath10k_spec_scan config;
  898. } spectral;
  899. #endif
  900. u32 pktlog_filter;
  901. #ifdef CONFIG_DEV_COREDUMP
  902. struct {
  903. struct ath10k_fw_crash_data *fw_crash_data;
  904. } coredump;
  905. #endif
  906. struct {
  907. /* protected by conf_mutex */
  908. struct ath10k_fw_components utf_mode_fw;
  909. /* protected by data_lock */
  910. bool utf_monitor;
  911. } testmode;
  912. struct {
  913. /* protected by data_lock */
  914. u32 fw_crash_counter;
  915. u32 fw_warm_reset_counter;
  916. u32 fw_cold_reset_counter;
  917. } stats;
  918. struct ath10k_thermal thermal;
  919. struct ath10k_wow wow;
  920. struct ath10k_per_peer_tx_stats peer_tx_stats;
  921. /* NAPI */
  922. struct net_device napi_dev;
  923. struct napi_struct napi;
  924. struct work_struct set_coverage_class_work;
  925. /* protected by conf_mutex */
  926. struct {
  927. /* writing also protected by data_lock */
  928. s16 coverage_class;
  929. u32 reg_phyclk;
  930. u32 reg_slottime_conf;
  931. u32 reg_slottime_orig;
  932. u32 reg_ack_cts_timeout_conf;
  933. u32 reg_ack_cts_timeout_orig;
  934. } fw_coverage;
  935. u32 ampdu_reference;
  936. void *ce_priv;
  937. u32 sta_tid_stats_mask;
  938. /* protected by data_lock */
  939. enum ath10k_radar_confirmation_state radar_conf_state;
  940. struct ath10k_radar_found_info last_radar_info;
  941. struct work_struct radar_confirmation_work;
  942. /* must be last */
  943. u8 drv_priv[0] __aligned(sizeof(void *));
  944. };
  945. static inline bool ath10k_peer_stats_enabled(struct ath10k *ar)
  946. {
  947. if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) &&
  948. test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
  949. return true;
  950. return false;
  951. }
  952. extern unsigned long ath10k_coredump_mask;
  953. struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
  954. enum ath10k_bus bus,
  955. enum ath10k_hw_rev hw_rev,
  956. const struct ath10k_hif_ops *hif_ops);
  957. void ath10k_core_destroy(struct ath10k *ar);
  958. void ath10k_core_get_fw_features_str(struct ath10k *ar,
  959. char *buf,
  960. size_t max_len);
  961. int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
  962. struct ath10k_fw_file *fw_file);
  963. int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
  964. const struct ath10k_fw_components *fw_components);
  965. int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
  966. void ath10k_core_stop(struct ath10k *ar);
  967. int ath10k_core_register(struct ath10k *ar, u32 chip_id);
  968. void ath10k_core_unregister(struct ath10k *ar);
  969. #endif /* _CORE_H_ */