m00233_video_measure_memmap_package.h 6.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright 2014-2015 Cisco Systems, Inc. and/or its affiliates.
  4. * All rights reserved.
  5. */
  6. #ifndef M00233_VIDEO_MEASURE_MEMMAP_PACKAGE_H
  7. #define M00233_VIDEO_MEASURE_MEMMAP_PACKAGE_H
  8. /*******************************************************************
  9. * Register Block
  10. * M00233_VIDEO_MEASURE_MEMMAP_PACKAGE_VHD_REGMAP
  11. *******************************************************************/
  12. struct m00233_video_measure_regmap {
  13. uint32_t irq_status; /* Reg 0x0000 */
  14. /* The vertical counter starts on rising edge of vsync */
  15. uint32_t vsync_time; /* Reg 0x0004 */
  16. uint32_t vback_porch; /* Reg 0x0008 */
  17. uint32_t vactive_area; /* Reg 0x000c */
  18. uint32_t vfront_porch; /* Reg 0x0010 */
  19. /* The horizontal counter starts on rising edge of hsync. */
  20. uint32_t hsync_time; /* Reg 0x0014 */
  21. uint32_t hback_porch; /* Reg 0x0018 */
  22. uint32_t hactive_area; /* Reg 0x001c */
  23. uint32_t hfront_porch; /* Reg 0x0020 */
  24. uint32_t control; /* Reg 0x0024, Default=0x0 */
  25. uint32_t irq_triggers; /* Reg 0x0028, Default=0xff */
  26. /* Value is given in number of register bus clock periods between */
  27. /* falling and rising edge of hsync. Must be non-zero. */
  28. uint32_t hsync_timeout_val; /* Reg 0x002c, Default=0x1fff */
  29. uint32_t status; /* Reg 0x0030 */
  30. };
  31. #define M00233_VIDEO_MEASURE_REG_IRQ_STATUS_OFST 0
  32. #define M00233_VIDEO_MEASURE_REG_VSYNC_TIME_OFST 4
  33. #define M00233_VIDEO_MEASURE_REG_VBACK_PORCH_OFST 8
  34. #define M00233_VIDEO_MEASURE_REG_VACTIVE_AREA_OFST 12
  35. #define M00233_VIDEO_MEASURE_REG_VFRONT_PORCH_OFST 16
  36. #define M00233_VIDEO_MEASURE_REG_HSYNC_TIME_OFST 20
  37. #define M00233_VIDEO_MEASURE_REG_HBACK_PORCH_OFST 24
  38. #define M00233_VIDEO_MEASURE_REG_HACTIVE_AREA_OFST 28
  39. #define M00233_VIDEO_MEASURE_REG_HFRONT_PORCH_OFST 32
  40. #define M00233_VIDEO_MEASURE_REG_CONTROL_OFST 36
  41. #define M00233_VIDEO_MEASURE_REG_IRQ_TRIGGERS_OFST 40
  42. #define M00233_VIDEO_MEASURE_REG_HSYNC_TIMEOUT_VAL_OFST 44
  43. #define M00233_VIDEO_MEASURE_REG_STATUS_OFST 48
  44. /*******************************************************************
  45. * Bit Mask for register
  46. * M00233_VIDEO_MEASURE_MEMMAP_PACKAGE_VHD_BITMAP
  47. *******************************************************************/
  48. /* irq_status [7:0] */
  49. #define M00233_IRQ_STATUS_BITMAP_VSYNC_TIME_OFST (0)
  50. #define M00233_IRQ_STATUS_BITMAP_VSYNC_TIME_MSK (0x1 << M00233_IRQ_STATUS_BITMAP_VSYNC_TIME_OFST)
  51. #define M00233_IRQ_STATUS_BITMAP_VBACK_PORCH_OFST (1)
  52. #define M00233_IRQ_STATUS_BITMAP_VBACK_PORCH_MSK (0x1 << M00233_IRQ_STATUS_BITMAP_VBACK_PORCH_OFST)
  53. #define M00233_IRQ_STATUS_BITMAP_VACTIVE_AREA_OFST (2)
  54. #define M00233_IRQ_STATUS_BITMAP_VACTIVE_AREA_MSK (0x1 << M00233_IRQ_STATUS_BITMAP_VACTIVE_AREA_OFST)
  55. #define M00233_IRQ_STATUS_BITMAP_VFRONT_PORCH_OFST (3)
  56. #define M00233_IRQ_STATUS_BITMAP_VFRONT_PORCH_MSK (0x1 << M00233_IRQ_STATUS_BITMAP_VFRONT_PORCH_OFST)
  57. #define M00233_IRQ_STATUS_BITMAP_HSYNC_TIME_OFST (4)
  58. #define M00233_IRQ_STATUS_BITMAP_HSYNC_TIME_MSK (0x1 << M00233_IRQ_STATUS_BITMAP_HSYNC_TIME_OFST)
  59. #define M00233_IRQ_STATUS_BITMAP_HBACK_PORCH_OFST (5)
  60. #define M00233_IRQ_STATUS_BITMAP_HBACK_PORCH_MSK (0x1 << M00233_IRQ_STATUS_BITMAP_HBACK_PORCH_OFST)
  61. #define M00233_IRQ_STATUS_BITMAP_HACTIVE_AREA_OFST (6)
  62. #define M00233_IRQ_STATUS_BITMAP_HACTIVE_AREA_MSK (0x1 << M00233_IRQ_STATUS_BITMAP_HACTIVE_AREA_OFST)
  63. #define M00233_IRQ_STATUS_BITMAP_HFRONT_PORCH_OFST (7)
  64. #define M00233_IRQ_STATUS_BITMAP_HFRONT_PORCH_MSK (0x1 << M00233_IRQ_STATUS_BITMAP_HFRONT_PORCH_OFST)
  65. /* control [4:0] */
  66. #define M00233_CONTROL_BITMAP_HSYNC_POLARITY_LOW_OFST (0)
  67. #define M00233_CONTROL_BITMAP_HSYNC_POLARITY_LOW_MSK (0x1 << M00233_CONTROL_BITMAP_HSYNC_POLARITY_LOW_OFST)
  68. #define M00233_CONTROL_BITMAP_VSYNC_POLARITY_LOW_OFST (1)
  69. #define M00233_CONTROL_BITMAP_VSYNC_POLARITY_LOW_MSK (0x1 << M00233_CONTROL_BITMAP_VSYNC_POLARITY_LOW_OFST)
  70. #define M00233_CONTROL_BITMAP_ENABLE_MEASURE_OFST (2)
  71. #define M00233_CONTROL_BITMAP_ENABLE_MEASURE_MSK (0x1 << M00233_CONTROL_BITMAP_ENABLE_MEASURE_OFST)
  72. #define M00233_CONTROL_BITMAP_ENABLE_INTERRUPT_OFST (3)
  73. #define M00233_CONTROL_BITMAP_ENABLE_INTERRUPT_MSK (0x1 << M00233_CONTROL_BITMAP_ENABLE_INTERRUPT_OFST)
  74. #define M00233_CONTROL_BITMAP_UPDATE_ON_HSYNC_OFST (4)
  75. #define M00233_CONTROL_BITMAP_UPDATE_ON_HSYNC_MSK (0x1 << M00233_CONTROL_BITMAP_UPDATE_ON_HSYNC_OFST)
  76. /* irq_triggers [7:0] */
  77. #define M00233_IRQ_TRIGGERS_BITMAP_VSYNC_TIME_OFST (0)
  78. #define M00233_IRQ_TRIGGERS_BITMAP_VSYNC_TIME_MSK (0x1 << M00233_IRQ_TRIGGERS_BITMAP_VSYNC_TIME_OFST)
  79. #define M00233_IRQ_TRIGGERS_BITMAP_VBACK_PORCH_OFST (1)
  80. #define M00233_IRQ_TRIGGERS_BITMAP_VBACK_PORCH_MSK (0x1 << M00233_IRQ_TRIGGERS_BITMAP_VBACK_PORCH_OFST)
  81. #define M00233_IRQ_TRIGGERS_BITMAP_VACTIVE_AREA_OFST (2)
  82. #define M00233_IRQ_TRIGGERS_BITMAP_VACTIVE_AREA_MSK (0x1 << M00233_IRQ_TRIGGERS_BITMAP_VACTIVE_AREA_OFST)
  83. #define M00233_IRQ_TRIGGERS_BITMAP_VFRONT_PORCH_OFST (3)
  84. #define M00233_IRQ_TRIGGERS_BITMAP_VFRONT_PORCH_MSK (0x1 << M00233_IRQ_TRIGGERS_BITMAP_VFRONT_PORCH_OFST)
  85. #define M00233_IRQ_TRIGGERS_BITMAP_HSYNC_TIME_OFST (4)
  86. #define M00233_IRQ_TRIGGERS_BITMAP_HSYNC_TIME_MSK (0x1 << M00233_IRQ_TRIGGERS_BITMAP_HSYNC_TIME_OFST)
  87. #define M00233_IRQ_TRIGGERS_BITMAP_HBACK_PORCH_OFST (5)
  88. #define M00233_IRQ_TRIGGERS_BITMAP_HBACK_PORCH_MSK (0x1 << M00233_IRQ_TRIGGERS_BITMAP_HBACK_PORCH_OFST)
  89. #define M00233_IRQ_TRIGGERS_BITMAP_HACTIVE_AREA_OFST (6)
  90. #define M00233_IRQ_TRIGGERS_BITMAP_HACTIVE_AREA_MSK (0x1 << M00233_IRQ_TRIGGERS_BITMAP_HACTIVE_AREA_OFST)
  91. #define M00233_IRQ_TRIGGERS_BITMAP_HFRONT_PORCH_OFST (7)
  92. #define M00233_IRQ_TRIGGERS_BITMAP_HFRONT_PORCH_MSK (0x1 << M00233_IRQ_TRIGGERS_BITMAP_HFRONT_PORCH_OFST)
  93. /* status [1:0] */
  94. #define M00233_STATUS_BITMAP_HSYNC_TIMEOUT_OFST (0)
  95. #define M00233_STATUS_BITMAP_HSYNC_TIMEOUT_MSK (0x1 << M00233_STATUS_BITMAP_HSYNC_TIMEOUT_OFST)
  96. #define M00233_STATUS_BITMAP_INIT_DONE_OFST (1)
  97. #define M00233_STATUS_BITMAP_INIT_DONE_MSK (0x1 << M00233_STATUS_BITMAP_INIT_DONE_OFST)
  98. #endif /*M00233_VIDEO_MEASURE_MEMMAP_PACKAGE_H*/