ov5645.c 31 KB

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  1. /*
  2. * Driver for the OV5645 camera sensor.
  3. *
  4. * Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
  5. * Copyright (C) 2015 By Tech Design S.L. All Rights Reserved.
  6. * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
  7. *
  8. * Based on:
  9. * - the OV5645 driver from QC msm-3.10 kernel on codeaurora.org:
  10. * https://us.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/
  11. * media/platform/msm/camera_v2/sensor/ov5645.c?h=LA.BR.1.2.4_rb1.41
  12. * - the OV5640 driver posted on linux-media:
  13. * https://www.mail-archive.com/linux-media%40vger.kernel.org/msg92671.html
  14. */
  15. /*
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. */
  25. #include <linux/bitops.h>
  26. #include <linux/clk.h>
  27. #include <linux/delay.h>
  28. #include <linux/device.h>
  29. #include <linux/gpio/consumer.h>
  30. #include <linux/i2c.h>
  31. #include <linux/init.h>
  32. #include <linux/module.h>
  33. #include <linux/of.h>
  34. #include <linux/of_graph.h>
  35. #include <linux/regulator/consumer.h>
  36. #include <linux/slab.h>
  37. #include <linux/types.h>
  38. #include <media/v4l2-ctrls.h>
  39. #include <media/v4l2-fwnode.h>
  40. #include <media/v4l2-subdev.h>
  41. #define OV5645_VOLTAGE_ANALOG 2800000
  42. #define OV5645_VOLTAGE_DIGITAL_CORE 1500000
  43. #define OV5645_VOLTAGE_DIGITAL_IO 1800000
  44. #define OV5645_SYSTEM_CTRL0 0x3008
  45. #define OV5645_SYSTEM_CTRL0_START 0x02
  46. #define OV5645_SYSTEM_CTRL0_STOP 0x42
  47. #define OV5645_CHIP_ID_HIGH 0x300a
  48. #define OV5645_CHIP_ID_HIGH_BYTE 0x56
  49. #define OV5645_CHIP_ID_LOW 0x300b
  50. #define OV5645_CHIP_ID_LOW_BYTE 0x45
  51. #define OV5645_AWB_MANUAL_CONTROL 0x3406
  52. #define OV5645_AWB_MANUAL_ENABLE BIT(0)
  53. #define OV5645_AEC_PK_MANUAL 0x3503
  54. #define OV5645_AEC_MANUAL_ENABLE BIT(0)
  55. #define OV5645_AGC_MANUAL_ENABLE BIT(1)
  56. #define OV5645_TIMING_TC_REG20 0x3820
  57. #define OV5645_SENSOR_VFLIP BIT(1)
  58. #define OV5645_ISP_VFLIP BIT(2)
  59. #define OV5645_TIMING_TC_REG21 0x3821
  60. #define OV5645_SENSOR_MIRROR BIT(1)
  61. #define OV5645_PRE_ISP_TEST_SETTING_1 0x503d
  62. #define OV5645_TEST_PATTERN_MASK 0x3
  63. #define OV5645_SET_TEST_PATTERN(x) ((x) & OV5645_TEST_PATTERN_MASK)
  64. #define OV5645_TEST_PATTERN_ENABLE BIT(7)
  65. #define OV5645_SDE_SAT_U 0x5583
  66. #define OV5645_SDE_SAT_V 0x5584
  67. struct reg_value {
  68. u16 reg;
  69. u8 val;
  70. };
  71. struct ov5645_mode_info {
  72. u32 width;
  73. u32 height;
  74. const struct reg_value *data;
  75. u32 data_size;
  76. u32 pixel_clock;
  77. u32 link_freq;
  78. };
  79. struct ov5645 {
  80. struct i2c_client *i2c_client;
  81. struct device *dev;
  82. struct v4l2_subdev sd;
  83. struct media_pad pad;
  84. struct v4l2_fwnode_endpoint ep;
  85. struct v4l2_mbus_framefmt fmt;
  86. struct v4l2_rect crop;
  87. struct clk *xclk;
  88. struct regulator *io_regulator;
  89. struct regulator *core_regulator;
  90. struct regulator *analog_regulator;
  91. const struct ov5645_mode_info *current_mode;
  92. struct v4l2_ctrl_handler ctrls;
  93. struct v4l2_ctrl *pixel_clock;
  94. struct v4l2_ctrl *link_freq;
  95. /* Cached register values */
  96. u8 aec_pk_manual;
  97. u8 timing_tc_reg20;
  98. u8 timing_tc_reg21;
  99. struct mutex power_lock; /* lock to protect power state */
  100. int power_count;
  101. struct gpio_desc *enable_gpio;
  102. struct gpio_desc *rst_gpio;
  103. };
  104. static inline struct ov5645 *to_ov5645(struct v4l2_subdev *sd)
  105. {
  106. return container_of(sd, struct ov5645, sd);
  107. }
  108. static const struct reg_value ov5645_global_init_setting[] = {
  109. { 0x3103, 0x11 },
  110. { 0x3008, 0x82 },
  111. { 0x3008, 0x42 },
  112. { 0x3103, 0x03 },
  113. { 0x3503, 0x07 },
  114. { 0x3002, 0x1c },
  115. { 0x3006, 0xc3 },
  116. { 0x300e, 0x45 },
  117. { 0x3017, 0x00 },
  118. { 0x3018, 0x00 },
  119. { 0x302e, 0x0b },
  120. { 0x3037, 0x13 },
  121. { 0x3108, 0x01 },
  122. { 0x3611, 0x06 },
  123. { 0x3500, 0x00 },
  124. { 0x3501, 0x01 },
  125. { 0x3502, 0x00 },
  126. { 0x350a, 0x00 },
  127. { 0x350b, 0x3f },
  128. { 0x3620, 0x33 },
  129. { 0x3621, 0xe0 },
  130. { 0x3622, 0x01 },
  131. { 0x3630, 0x2e },
  132. { 0x3631, 0x00 },
  133. { 0x3632, 0x32 },
  134. { 0x3633, 0x52 },
  135. { 0x3634, 0x70 },
  136. { 0x3635, 0x13 },
  137. { 0x3636, 0x03 },
  138. { 0x3703, 0x5a },
  139. { 0x3704, 0xa0 },
  140. { 0x3705, 0x1a },
  141. { 0x3709, 0x12 },
  142. { 0x370b, 0x61 },
  143. { 0x370f, 0x10 },
  144. { 0x3715, 0x78 },
  145. { 0x3717, 0x01 },
  146. { 0x371b, 0x20 },
  147. { 0x3731, 0x12 },
  148. { 0x3901, 0x0a },
  149. { 0x3905, 0x02 },
  150. { 0x3906, 0x10 },
  151. { 0x3719, 0x86 },
  152. { 0x3810, 0x00 },
  153. { 0x3811, 0x10 },
  154. { 0x3812, 0x00 },
  155. { 0x3821, 0x01 },
  156. { 0x3824, 0x01 },
  157. { 0x3826, 0x03 },
  158. { 0x3828, 0x08 },
  159. { 0x3a19, 0xf8 },
  160. { 0x3c01, 0x34 },
  161. { 0x3c04, 0x28 },
  162. { 0x3c05, 0x98 },
  163. { 0x3c07, 0x07 },
  164. { 0x3c09, 0xc2 },
  165. { 0x3c0a, 0x9c },
  166. { 0x3c0b, 0x40 },
  167. { 0x3c01, 0x34 },
  168. { 0x4001, 0x02 },
  169. { 0x4514, 0x00 },
  170. { 0x4520, 0xb0 },
  171. { 0x460b, 0x37 },
  172. { 0x460c, 0x20 },
  173. { 0x4818, 0x01 },
  174. { 0x481d, 0xf0 },
  175. { 0x481f, 0x50 },
  176. { 0x4823, 0x70 },
  177. { 0x4831, 0x14 },
  178. { 0x5000, 0xa7 },
  179. { 0x5001, 0x83 },
  180. { 0x501d, 0x00 },
  181. { 0x501f, 0x00 },
  182. { 0x503d, 0x00 },
  183. { 0x505c, 0x30 },
  184. { 0x5181, 0x59 },
  185. { 0x5183, 0x00 },
  186. { 0x5191, 0xf0 },
  187. { 0x5192, 0x03 },
  188. { 0x5684, 0x10 },
  189. { 0x5685, 0xa0 },
  190. { 0x5686, 0x0c },
  191. { 0x5687, 0x78 },
  192. { 0x5a00, 0x08 },
  193. { 0x5a21, 0x00 },
  194. { 0x5a24, 0x00 },
  195. { 0x3008, 0x02 },
  196. { 0x3503, 0x00 },
  197. { 0x5180, 0xff },
  198. { 0x5181, 0xf2 },
  199. { 0x5182, 0x00 },
  200. { 0x5183, 0x14 },
  201. { 0x5184, 0x25 },
  202. { 0x5185, 0x24 },
  203. { 0x5186, 0x09 },
  204. { 0x5187, 0x09 },
  205. { 0x5188, 0x0a },
  206. { 0x5189, 0x75 },
  207. { 0x518a, 0x52 },
  208. { 0x518b, 0xea },
  209. { 0x518c, 0xa8 },
  210. { 0x518d, 0x42 },
  211. { 0x518e, 0x38 },
  212. { 0x518f, 0x56 },
  213. { 0x5190, 0x42 },
  214. { 0x5191, 0xf8 },
  215. { 0x5192, 0x04 },
  216. { 0x5193, 0x70 },
  217. { 0x5194, 0xf0 },
  218. { 0x5195, 0xf0 },
  219. { 0x5196, 0x03 },
  220. { 0x5197, 0x01 },
  221. { 0x5198, 0x04 },
  222. { 0x5199, 0x12 },
  223. { 0x519a, 0x04 },
  224. { 0x519b, 0x00 },
  225. { 0x519c, 0x06 },
  226. { 0x519d, 0x82 },
  227. { 0x519e, 0x38 },
  228. { 0x5381, 0x1e },
  229. { 0x5382, 0x5b },
  230. { 0x5383, 0x08 },
  231. { 0x5384, 0x0a },
  232. { 0x5385, 0x7e },
  233. { 0x5386, 0x88 },
  234. { 0x5387, 0x7c },
  235. { 0x5388, 0x6c },
  236. { 0x5389, 0x10 },
  237. { 0x538a, 0x01 },
  238. { 0x538b, 0x98 },
  239. { 0x5300, 0x08 },
  240. { 0x5301, 0x30 },
  241. { 0x5302, 0x10 },
  242. { 0x5303, 0x00 },
  243. { 0x5304, 0x08 },
  244. { 0x5305, 0x30 },
  245. { 0x5306, 0x08 },
  246. { 0x5307, 0x16 },
  247. { 0x5309, 0x08 },
  248. { 0x530a, 0x30 },
  249. { 0x530b, 0x04 },
  250. { 0x530c, 0x06 },
  251. { 0x5480, 0x01 },
  252. { 0x5481, 0x08 },
  253. { 0x5482, 0x14 },
  254. { 0x5483, 0x28 },
  255. { 0x5484, 0x51 },
  256. { 0x5485, 0x65 },
  257. { 0x5486, 0x71 },
  258. { 0x5487, 0x7d },
  259. { 0x5488, 0x87 },
  260. { 0x5489, 0x91 },
  261. { 0x548a, 0x9a },
  262. { 0x548b, 0xaa },
  263. { 0x548c, 0xb8 },
  264. { 0x548d, 0xcd },
  265. { 0x548e, 0xdd },
  266. { 0x548f, 0xea },
  267. { 0x5490, 0x1d },
  268. { 0x5580, 0x02 },
  269. { 0x5583, 0x40 },
  270. { 0x5584, 0x10 },
  271. { 0x5589, 0x10 },
  272. { 0x558a, 0x00 },
  273. { 0x558b, 0xf8 },
  274. { 0x5800, 0x3f },
  275. { 0x5801, 0x16 },
  276. { 0x5802, 0x0e },
  277. { 0x5803, 0x0d },
  278. { 0x5804, 0x17 },
  279. { 0x5805, 0x3f },
  280. { 0x5806, 0x0b },
  281. { 0x5807, 0x06 },
  282. { 0x5808, 0x04 },
  283. { 0x5809, 0x04 },
  284. { 0x580a, 0x06 },
  285. { 0x580b, 0x0b },
  286. { 0x580c, 0x09 },
  287. { 0x580d, 0x03 },
  288. { 0x580e, 0x00 },
  289. { 0x580f, 0x00 },
  290. { 0x5810, 0x03 },
  291. { 0x5811, 0x08 },
  292. { 0x5812, 0x0a },
  293. { 0x5813, 0x03 },
  294. { 0x5814, 0x00 },
  295. { 0x5815, 0x00 },
  296. { 0x5816, 0x04 },
  297. { 0x5817, 0x09 },
  298. { 0x5818, 0x0f },
  299. { 0x5819, 0x08 },
  300. { 0x581a, 0x06 },
  301. { 0x581b, 0x06 },
  302. { 0x581c, 0x08 },
  303. { 0x581d, 0x0c },
  304. { 0x581e, 0x3f },
  305. { 0x581f, 0x1e },
  306. { 0x5820, 0x12 },
  307. { 0x5821, 0x13 },
  308. { 0x5822, 0x21 },
  309. { 0x5823, 0x3f },
  310. { 0x5824, 0x68 },
  311. { 0x5825, 0x28 },
  312. { 0x5826, 0x2c },
  313. { 0x5827, 0x28 },
  314. { 0x5828, 0x08 },
  315. { 0x5829, 0x48 },
  316. { 0x582a, 0x64 },
  317. { 0x582b, 0x62 },
  318. { 0x582c, 0x64 },
  319. { 0x582d, 0x28 },
  320. { 0x582e, 0x46 },
  321. { 0x582f, 0x62 },
  322. { 0x5830, 0x60 },
  323. { 0x5831, 0x62 },
  324. { 0x5832, 0x26 },
  325. { 0x5833, 0x48 },
  326. { 0x5834, 0x66 },
  327. { 0x5835, 0x44 },
  328. { 0x5836, 0x64 },
  329. { 0x5837, 0x28 },
  330. { 0x5838, 0x66 },
  331. { 0x5839, 0x48 },
  332. { 0x583a, 0x2c },
  333. { 0x583b, 0x28 },
  334. { 0x583c, 0x26 },
  335. { 0x583d, 0xae },
  336. { 0x5025, 0x00 },
  337. { 0x3a0f, 0x30 },
  338. { 0x3a10, 0x28 },
  339. { 0x3a1b, 0x30 },
  340. { 0x3a1e, 0x26 },
  341. { 0x3a11, 0x60 },
  342. { 0x3a1f, 0x14 },
  343. { 0x0601, 0x02 },
  344. { 0x3008, 0x42 },
  345. { 0x3008, 0x02 }
  346. };
  347. static const struct reg_value ov5645_setting_sxga[] = {
  348. { 0x3612, 0xa9 },
  349. { 0x3614, 0x50 },
  350. { 0x3618, 0x00 },
  351. { 0x3034, 0x18 },
  352. { 0x3035, 0x21 },
  353. { 0x3036, 0x70 },
  354. { 0x3600, 0x09 },
  355. { 0x3601, 0x43 },
  356. { 0x3708, 0x66 },
  357. { 0x370c, 0xc3 },
  358. { 0x3800, 0x00 },
  359. { 0x3801, 0x00 },
  360. { 0x3802, 0x00 },
  361. { 0x3803, 0x06 },
  362. { 0x3804, 0x0a },
  363. { 0x3805, 0x3f },
  364. { 0x3806, 0x07 },
  365. { 0x3807, 0x9d },
  366. { 0x3808, 0x05 },
  367. { 0x3809, 0x00 },
  368. { 0x380a, 0x03 },
  369. { 0x380b, 0xc0 },
  370. { 0x380c, 0x07 },
  371. { 0x380d, 0x68 },
  372. { 0x380e, 0x03 },
  373. { 0x380f, 0xd8 },
  374. { 0x3813, 0x06 },
  375. { 0x3814, 0x31 },
  376. { 0x3815, 0x31 },
  377. { 0x3820, 0x47 },
  378. { 0x3a02, 0x03 },
  379. { 0x3a03, 0xd8 },
  380. { 0x3a08, 0x01 },
  381. { 0x3a09, 0xf8 },
  382. { 0x3a0a, 0x01 },
  383. { 0x3a0b, 0xa4 },
  384. { 0x3a0e, 0x02 },
  385. { 0x3a0d, 0x02 },
  386. { 0x3a14, 0x03 },
  387. { 0x3a15, 0xd8 },
  388. { 0x3a18, 0x00 },
  389. { 0x4004, 0x02 },
  390. { 0x4005, 0x18 },
  391. { 0x4300, 0x32 },
  392. { 0x4202, 0x00 }
  393. };
  394. static const struct reg_value ov5645_setting_1080p[] = {
  395. { 0x3612, 0xab },
  396. { 0x3614, 0x50 },
  397. { 0x3618, 0x04 },
  398. { 0x3034, 0x18 },
  399. { 0x3035, 0x11 },
  400. { 0x3036, 0x54 },
  401. { 0x3600, 0x08 },
  402. { 0x3601, 0x33 },
  403. { 0x3708, 0x63 },
  404. { 0x370c, 0xc0 },
  405. { 0x3800, 0x01 },
  406. { 0x3801, 0x50 },
  407. { 0x3802, 0x01 },
  408. { 0x3803, 0xb2 },
  409. { 0x3804, 0x08 },
  410. { 0x3805, 0xef },
  411. { 0x3806, 0x05 },
  412. { 0x3807, 0xf1 },
  413. { 0x3808, 0x07 },
  414. { 0x3809, 0x80 },
  415. { 0x380a, 0x04 },
  416. { 0x380b, 0x38 },
  417. { 0x380c, 0x09 },
  418. { 0x380d, 0xc4 },
  419. { 0x380e, 0x04 },
  420. { 0x380f, 0x60 },
  421. { 0x3813, 0x04 },
  422. { 0x3814, 0x11 },
  423. { 0x3815, 0x11 },
  424. { 0x3820, 0x47 },
  425. { 0x4514, 0x88 },
  426. { 0x3a02, 0x04 },
  427. { 0x3a03, 0x60 },
  428. { 0x3a08, 0x01 },
  429. { 0x3a09, 0x50 },
  430. { 0x3a0a, 0x01 },
  431. { 0x3a0b, 0x18 },
  432. { 0x3a0e, 0x03 },
  433. { 0x3a0d, 0x04 },
  434. { 0x3a14, 0x04 },
  435. { 0x3a15, 0x60 },
  436. { 0x3a18, 0x00 },
  437. { 0x4004, 0x06 },
  438. { 0x4005, 0x18 },
  439. { 0x4300, 0x32 },
  440. { 0x4202, 0x00 },
  441. { 0x4837, 0x0b }
  442. };
  443. static const struct reg_value ov5645_setting_full[] = {
  444. { 0x3612, 0xab },
  445. { 0x3614, 0x50 },
  446. { 0x3618, 0x04 },
  447. { 0x3034, 0x18 },
  448. { 0x3035, 0x11 },
  449. { 0x3036, 0x54 },
  450. { 0x3600, 0x08 },
  451. { 0x3601, 0x33 },
  452. { 0x3708, 0x63 },
  453. { 0x370c, 0xc0 },
  454. { 0x3800, 0x00 },
  455. { 0x3801, 0x00 },
  456. { 0x3802, 0x00 },
  457. { 0x3803, 0x00 },
  458. { 0x3804, 0x0a },
  459. { 0x3805, 0x3f },
  460. { 0x3806, 0x07 },
  461. { 0x3807, 0x9f },
  462. { 0x3808, 0x0a },
  463. { 0x3809, 0x20 },
  464. { 0x380a, 0x07 },
  465. { 0x380b, 0x98 },
  466. { 0x380c, 0x0b },
  467. { 0x380d, 0x1c },
  468. { 0x380e, 0x07 },
  469. { 0x380f, 0xb0 },
  470. { 0x3813, 0x06 },
  471. { 0x3814, 0x11 },
  472. { 0x3815, 0x11 },
  473. { 0x3820, 0x47 },
  474. { 0x4514, 0x88 },
  475. { 0x3a02, 0x07 },
  476. { 0x3a03, 0xb0 },
  477. { 0x3a08, 0x01 },
  478. { 0x3a09, 0x27 },
  479. { 0x3a0a, 0x00 },
  480. { 0x3a0b, 0xf6 },
  481. { 0x3a0e, 0x06 },
  482. { 0x3a0d, 0x08 },
  483. { 0x3a14, 0x07 },
  484. { 0x3a15, 0xb0 },
  485. { 0x3a18, 0x01 },
  486. { 0x4004, 0x06 },
  487. { 0x4005, 0x18 },
  488. { 0x4300, 0x32 },
  489. { 0x4837, 0x0b },
  490. { 0x4202, 0x00 }
  491. };
  492. static const s64 link_freq[] = {
  493. 224000000,
  494. 336000000
  495. };
  496. static const struct ov5645_mode_info ov5645_mode_info_data[] = {
  497. {
  498. .width = 1280,
  499. .height = 960,
  500. .data = ov5645_setting_sxga,
  501. .data_size = ARRAY_SIZE(ov5645_setting_sxga),
  502. .pixel_clock = 112000000,
  503. .link_freq = 0 /* an index in link_freq[] */
  504. },
  505. {
  506. .width = 1920,
  507. .height = 1080,
  508. .data = ov5645_setting_1080p,
  509. .data_size = ARRAY_SIZE(ov5645_setting_1080p),
  510. .pixel_clock = 168000000,
  511. .link_freq = 1 /* an index in link_freq[] */
  512. },
  513. {
  514. .width = 2592,
  515. .height = 1944,
  516. .data = ov5645_setting_full,
  517. .data_size = ARRAY_SIZE(ov5645_setting_full),
  518. .pixel_clock = 168000000,
  519. .link_freq = 1 /* an index in link_freq[] */
  520. },
  521. };
  522. static int ov5645_regulators_enable(struct ov5645 *ov5645)
  523. {
  524. int ret;
  525. ret = regulator_enable(ov5645->io_regulator);
  526. if (ret < 0) {
  527. dev_err(ov5645->dev, "set io voltage failed\n");
  528. return ret;
  529. }
  530. ret = regulator_enable(ov5645->analog_regulator);
  531. if (ret) {
  532. dev_err(ov5645->dev, "set analog voltage failed\n");
  533. goto err_disable_io;
  534. }
  535. ret = regulator_enable(ov5645->core_regulator);
  536. if (ret) {
  537. dev_err(ov5645->dev, "set core voltage failed\n");
  538. goto err_disable_analog;
  539. }
  540. return 0;
  541. err_disable_analog:
  542. regulator_disable(ov5645->analog_regulator);
  543. err_disable_io:
  544. regulator_disable(ov5645->io_regulator);
  545. return ret;
  546. }
  547. static void ov5645_regulators_disable(struct ov5645 *ov5645)
  548. {
  549. int ret;
  550. ret = regulator_disable(ov5645->core_regulator);
  551. if (ret < 0)
  552. dev_err(ov5645->dev, "core regulator disable failed\n");
  553. ret = regulator_disable(ov5645->analog_regulator);
  554. if (ret < 0)
  555. dev_err(ov5645->dev, "analog regulator disable failed\n");
  556. ret = regulator_disable(ov5645->io_regulator);
  557. if (ret < 0)
  558. dev_err(ov5645->dev, "io regulator disable failed\n");
  559. }
  560. static int ov5645_write_reg(struct ov5645 *ov5645, u16 reg, u8 val)
  561. {
  562. u8 regbuf[3];
  563. int ret;
  564. regbuf[0] = reg >> 8;
  565. regbuf[1] = reg & 0xff;
  566. regbuf[2] = val;
  567. ret = i2c_master_send(ov5645->i2c_client, regbuf, 3);
  568. if (ret < 0) {
  569. dev_err(ov5645->dev, "%s: write reg error %d: reg=%x, val=%x\n",
  570. __func__, ret, reg, val);
  571. return ret;
  572. }
  573. return 0;
  574. }
  575. static int ov5645_read_reg(struct ov5645 *ov5645, u16 reg, u8 *val)
  576. {
  577. u8 regbuf[2];
  578. int ret;
  579. regbuf[0] = reg >> 8;
  580. regbuf[1] = reg & 0xff;
  581. ret = i2c_master_send(ov5645->i2c_client, regbuf, 2);
  582. if (ret < 0) {
  583. dev_err(ov5645->dev, "%s: write reg error %d: reg=%x\n",
  584. __func__, ret, reg);
  585. return ret;
  586. }
  587. ret = i2c_master_recv(ov5645->i2c_client, val, 1);
  588. if (ret < 0) {
  589. dev_err(ov5645->dev, "%s: read reg error %d: reg=%x\n",
  590. __func__, ret, reg);
  591. return ret;
  592. }
  593. return 0;
  594. }
  595. static int ov5645_set_aec_mode(struct ov5645 *ov5645, u32 mode)
  596. {
  597. u8 val = ov5645->aec_pk_manual;
  598. int ret;
  599. if (mode == V4L2_EXPOSURE_AUTO)
  600. val &= ~OV5645_AEC_MANUAL_ENABLE;
  601. else /* V4L2_EXPOSURE_MANUAL */
  602. val |= OV5645_AEC_MANUAL_ENABLE;
  603. ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
  604. if (!ret)
  605. ov5645->aec_pk_manual = val;
  606. return ret;
  607. }
  608. static int ov5645_set_agc_mode(struct ov5645 *ov5645, u32 enable)
  609. {
  610. u8 val = ov5645->aec_pk_manual;
  611. int ret;
  612. if (enable)
  613. val &= ~OV5645_AGC_MANUAL_ENABLE;
  614. else
  615. val |= OV5645_AGC_MANUAL_ENABLE;
  616. ret = ov5645_write_reg(ov5645, OV5645_AEC_PK_MANUAL, val);
  617. if (!ret)
  618. ov5645->aec_pk_manual = val;
  619. return ret;
  620. }
  621. static int ov5645_set_register_array(struct ov5645 *ov5645,
  622. const struct reg_value *settings,
  623. unsigned int num_settings)
  624. {
  625. unsigned int i;
  626. int ret;
  627. for (i = 0; i < num_settings; ++i, ++settings) {
  628. ret = ov5645_write_reg(ov5645, settings->reg, settings->val);
  629. if (ret < 0)
  630. return ret;
  631. }
  632. return 0;
  633. }
  634. static int ov5645_set_power_on(struct ov5645 *ov5645)
  635. {
  636. int ret;
  637. ret = ov5645_regulators_enable(ov5645);
  638. if (ret < 0) {
  639. return ret;
  640. }
  641. ret = clk_prepare_enable(ov5645->xclk);
  642. if (ret < 0) {
  643. dev_err(ov5645->dev, "clk prepare enable failed\n");
  644. ov5645_regulators_disable(ov5645);
  645. return ret;
  646. }
  647. usleep_range(5000, 15000);
  648. gpiod_set_value_cansleep(ov5645->enable_gpio, 1);
  649. usleep_range(1000, 2000);
  650. gpiod_set_value_cansleep(ov5645->rst_gpio, 0);
  651. msleep(20);
  652. return 0;
  653. }
  654. static void ov5645_set_power_off(struct ov5645 *ov5645)
  655. {
  656. gpiod_set_value_cansleep(ov5645->rst_gpio, 1);
  657. gpiod_set_value_cansleep(ov5645->enable_gpio, 0);
  658. clk_disable_unprepare(ov5645->xclk);
  659. ov5645_regulators_disable(ov5645);
  660. }
  661. static int ov5645_s_power(struct v4l2_subdev *sd, int on)
  662. {
  663. struct ov5645 *ov5645 = to_ov5645(sd);
  664. int ret = 0;
  665. mutex_lock(&ov5645->power_lock);
  666. /* If the power count is modified from 0 to != 0 or from != 0 to 0,
  667. * update the power state.
  668. */
  669. if (ov5645->power_count == !on) {
  670. if (on) {
  671. ret = ov5645_set_power_on(ov5645);
  672. if (ret < 0)
  673. goto exit;
  674. ret = ov5645_set_register_array(ov5645,
  675. ov5645_global_init_setting,
  676. ARRAY_SIZE(ov5645_global_init_setting));
  677. if (ret < 0) {
  678. dev_err(ov5645->dev,
  679. "could not set init registers\n");
  680. ov5645_set_power_off(ov5645);
  681. goto exit;
  682. }
  683. ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
  684. OV5645_SYSTEM_CTRL0_STOP);
  685. if (ret < 0) {
  686. ov5645_set_power_off(ov5645);
  687. goto exit;
  688. }
  689. } else {
  690. ov5645_set_power_off(ov5645);
  691. }
  692. }
  693. /* Update the power count. */
  694. ov5645->power_count += on ? 1 : -1;
  695. WARN_ON(ov5645->power_count < 0);
  696. exit:
  697. mutex_unlock(&ov5645->power_lock);
  698. return ret;
  699. }
  700. static int ov5645_set_saturation(struct ov5645 *ov5645, s32 value)
  701. {
  702. u32 reg_value = (value * 0x10) + 0x40;
  703. int ret;
  704. ret = ov5645_write_reg(ov5645, OV5645_SDE_SAT_U, reg_value);
  705. if (ret < 0)
  706. return ret;
  707. return ov5645_write_reg(ov5645, OV5645_SDE_SAT_V, reg_value);
  708. }
  709. static int ov5645_set_hflip(struct ov5645 *ov5645, s32 value)
  710. {
  711. u8 val = ov5645->timing_tc_reg21;
  712. int ret;
  713. if (value == 0)
  714. val &= ~(OV5645_SENSOR_MIRROR);
  715. else
  716. val |= (OV5645_SENSOR_MIRROR);
  717. ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG21, val);
  718. if (!ret)
  719. ov5645->timing_tc_reg21 = val;
  720. return ret;
  721. }
  722. static int ov5645_set_vflip(struct ov5645 *ov5645, s32 value)
  723. {
  724. u8 val = ov5645->timing_tc_reg20;
  725. int ret;
  726. if (value == 0)
  727. val |= (OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
  728. else
  729. val &= ~(OV5645_SENSOR_VFLIP | OV5645_ISP_VFLIP);
  730. ret = ov5645_write_reg(ov5645, OV5645_TIMING_TC_REG20, val);
  731. if (!ret)
  732. ov5645->timing_tc_reg20 = val;
  733. return ret;
  734. }
  735. static int ov5645_set_test_pattern(struct ov5645 *ov5645, s32 value)
  736. {
  737. u8 val = 0;
  738. if (value) {
  739. val = OV5645_SET_TEST_PATTERN(value - 1);
  740. val |= OV5645_TEST_PATTERN_ENABLE;
  741. }
  742. return ov5645_write_reg(ov5645, OV5645_PRE_ISP_TEST_SETTING_1, val);
  743. }
  744. static const char * const ov5645_test_pattern_menu[] = {
  745. "Disabled",
  746. "Vertical Color Bars",
  747. "Pseudo-Random Data",
  748. "Color Square",
  749. "Black Image",
  750. };
  751. static int ov5645_set_awb(struct ov5645 *ov5645, s32 enable_auto)
  752. {
  753. u8 val = 0;
  754. if (!enable_auto)
  755. val = OV5645_AWB_MANUAL_ENABLE;
  756. return ov5645_write_reg(ov5645, OV5645_AWB_MANUAL_CONTROL, val);
  757. }
  758. static int ov5645_s_ctrl(struct v4l2_ctrl *ctrl)
  759. {
  760. struct ov5645 *ov5645 = container_of(ctrl->handler,
  761. struct ov5645, ctrls);
  762. int ret;
  763. mutex_lock(&ov5645->power_lock);
  764. if (!ov5645->power_count) {
  765. mutex_unlock(&ov5645->power_lock);
  766. return 0;
  767. }
  768. switch (ctrl->id) {
  769. case V4L2_CID_SATURATION:
  770. ret = ov5645_set_saturation(ov5645, ctrl->val);
  771. break;
  772. case V4L2_CID_AUTO_WHITE_BALANCE:
  773. ret = ov5645_set_awb(ov5645, ctrl->val);
  774. break;
  775. case V4L2_CID_AUTOGAIN:
  776. ret = ov5645_set_agc_mode(ov5645, ctrl->val);
  777. break;
  778. case V4L2_CID_EXPOSURE_AUTO:
  779. ret = ov5645_set_aec_mode(ov5645, ctrl->val);
  780. break;
  781. case V4L2_CID_TEST_PATTERN:
  782. ret = ov5645_set_test_pattern(ov5645, ctrl->val);
  783. break;
  784. case V4L2_CID_HFLIP:
  785. ret = ov5645_set_hflip(ov5645, ctrl->val);
  786. break;
  787. case V4L2_CID_VFLIP:
  788. ret = ov5645_set_vflip(ov5645, ctrl->val);
  789. break;
  790. default:
  791. ret = -EINVAL;
  792. break;
  793. }
  794. mutex_unlock(&ov5645->power_lock);
  795. return ret;
  796. }
  797. static struct v4l2_ctrl_ops ov5645_ctrl_ops = {
  798. .s_ctrl = ov5645_s_ctrl,
  799. };
  800. static int ov5645_enum_mbus_code(struct v4l2_subdev *sd,
  801. struct v4l2_subdev_pad_config *cfg,
  802. struct v4l2_subdev_mbus_code_enum *code)
  803. {
  804. if (code->index > 0)
  805. return -EINVAL;
  806. code->code = MEDIA_BUS_FMT_UYVY8_2X8;
  807. return 0;
  808. }
  809. static int ov5645_enum_frame_size(struct v4l2_subdev *subdev,
  810. struct v4l2_subdev_pad_config *cfg,
  811. struct v4l2_subdev_frame_size_enum *fse)
  812. {
  813. if (fse->code != MEDIA_BUS_FMT_UYVY8_2X8)
  814. return -EINVAL;
  815. if (fse->index >= ARRAY_SIZE(ov5645_mode_info_data))
  816. return -EINVAL;
  817. fse->min_width = ov5645_mode_info_data[fse->index].width;
  818. fse->max_width = ov5645_mode_info_data[fse->index].width;
  819. fse->min_height = ov5645_mode_info_data[fse->index].height;
  820. fse->max_height = ov5645_mode_info_data[fse->index].height;
  821. return 0;
  822. }
  823. static struct v4l2_mbus_framefmt *
  824. __ov5645_get_pad_format(struct ov5645 *ov5645,
  825. struct v4l2_subdev_pad_config *cfg,
  826. unsigned int pad,
  827. enum v4l2_subdev_format_whence which)
  828. {
  829. switch (which) {
  830. case V4L2_SUBDEV_FORMAT_TRY:
  831. return v4l2_subdev_get_try_format(&ov5645->sd, cfg, pad);
  832. case V4L2_SUBDEV_FORMAT_ACTIVE:
  833. return &ov5645->fmt;
  834. default:
  835. return NULL;
  836. }
  837. }
  838. static int ov5645_get_format(struct v4l2_subdev *sd,
  839. struct v4l2_subdev_pad_config *cfg,
  840. struct v4l2_subdev_format *format)
  841. {
  842. struct ov5645 *ov5645 = to_ov5645(sd);
  843. format->format = *__ov5645_get_pad_format(ov5645, cfg, format->pad,
  844. format->which);
  845. return 0;
  846. }
  847. static struct v4l2_rect *
  848. __ov5645_get_pad_crop(struct ov5645 *ov5645, struct v4l2_subdev_pad_config *cfg,
  849. unsigned int pad, enum v4l2_subdev_format_whence which)
  850. {
  851. switch (which) {
  852. case V4L2_SUBDEV_FORMAT_TRY:
  853. return v4l2_subdev_get_try_crop(&ov5645->sd, cfg, pad);
  854. case V4L2_SUBDEV_FORMAT_ACTIVE:
  855. return &ov5645->crop;
  856. default:
  857. return NULL;
  858. }
  859. }
  860. static int ov5645_set_format(struct v4l2_subdev *sd,
  861. struct v4l2_subdev_pad_config *cfg,
  862. struct v4l2_subdev_format *format)
  863. {
  864. struct ov5645 *ov5645 = to_ov5645(sd);
  865. struct v4l2_mbus_framefmt *__format;
  866. struct v4l2_rect *__crop;
  867. const struct ov5645_mode_info *new_mode;
  868. int ret;
  869. __crop = __ov5645_get_pad_crop(ov5645, cfg, format->pad,
  870. format->which);
  871. new_mode = v4l2_find_nearest_size(ov5645_mode_info_data,
  872. ARRAY_SIZE(ov5645_mode_info_data),
  873. width, height,
  874. format->format.width, format->format.height);
  875. __crop->width = new_mode->width;
  876. __crop->height = new_mode->height;
  877. if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
  878. ret = v4l2_ctrl_s_ctrl_int64(ov5645->pixel_clock,
  879. new_mode->pixel_clock);
  880. if (ret < 0)
  881. return ret;
  882. ret = v4l2_ctrl_s_ctrl(ov5645->link_freq,
  883. new_mode->link_freq);
  884. if (ret < 0)
  885. return ret;
  886. ov5645->current_mode = new_mode;
  887. }
  888. __format = __ov5645_get_pad_format(ov5645, cfg, format->pad,
  889. format->which);
  890. __format->width = __crop->width;
  891. __format->height = __crop->height;
  892. __format->code = MEDIA_BUS_FMT_UYVY8_2X8;
  893. __format->field = V4L2_FIELD_NONE;
  894. __format->colorspace = V4L2_COLORSPACE_SRGB;
  895. format->format = *__format;
  896. return 0;
  897. }
  898. static int ov5645_entity_init_cfg(struct v4l2_subdev *subdev,
  899. struct v4l2_subdev_pad_config *cfg)
  900. {
  901. struct v4l2_subdev_format fmt = { 0 };
  902. fmt.which = cfg ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
  903. fmt.format.width = 1920;
  904. fmt.format.height = 1080;
  905. ov5645_set_format(subdev, cfg, &fmt);
  906. return 0;
  907. }
  908. static int ov5645_get_selection(struct v4l2_subdev *sd,
  909. struct v4l2_subdev_pad_config *cfg,
  910. struct v4l2_subdev_selection *sel)
  911. {
  912. struct ov5645 *ov5645 = to_ov5645(sd);
  913. if (sel->target != V4L2_SEL_TGT_CROP)
  914. return -EINVAL;
  915. sel->r = *__ov5645_get_pad_crop(ov5645, cfg, sel->pad,
  916. sel->which);
  917. return 0;
  918. }
  919. static int ov5645_s_stream(struct v4l2_subdev *subdev, int enable)
  920. {
  921. struct ov5645 *ov5645 = to_ov5645(subdev);
  922. int ret;
  923. if (enable) {
  924. ret = ov5645_set_register_array(ov5645,
  925. ov5645->current_mode->data,
  926. ov5645->current_mode->data_size);
  927. if (ret < 0) {
  928. dev_err(ov5645->dev, "could not set mode %dx%d\n",
  929. ov5645->current_mode->width,
  930. ov5645->current_mode->height);
  931. return ret;
  932. }
  933. ret = v4l2_ctrl_handler_setup(&ov5645->ctrls);
  934. if (ret < 0) {
  935. dev_err(ov5645->dev, "could not sync v4l2 controls\n");
  936. return ret;
  937. }
  938. ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
  939. OV5645_SYSTEM_CTRL0_START);
  940. if (ret < 0)
  941. return ret;
  942. } else {
  943. ret = ov5645_write_reg(ov5645, OV5645_SYSTEM_CTRL0,
  944. OV5645_SYSTEM_CTRL0_STOP);
  945. if (ret < 0)
  946. return ret;
  947. }
  948. return 0;
  949. }
  950. static const struct v4l2_subdev_core_ops ov5645_core_ops = {
  951. .s_power = ov5645_s_power,
  952. };
  953. static const struct v4l2_subdev_video_ops ov5645_video_ops = {
  954. .s_stream = ov5645_s_stream,
  955. };
  956. static const struct v4l2_subdev_pad_ops ov5645_subdev_pad_ops = {
  957. .init_cfg = ov5645_entity_init_cfg,
  958. .enum_mbus_code = ov5645_enum_mbus_code,
  959. .enum_frame_size = ov5645_enum_frame_size,
  960. .get_fmt = ov5645_get_format,
  961. .set_fmt = ov5645_set_format,
  962. .get_selection = ov5645_get_selection,
  963. };
  964. static const struct v4l2_subdev_ops ov5645_subdev_ops = {
  965. .core = &ov5645_core_ops,
  966. .video = &ov5645_video_ops,
  967. .pad = &ov5645_subdev_pad_ops,
  968. };
  969. static int ov5645_probe(struct i2c_client *client,
  970. const struct i2c_device_id *id)
  971. {
  972. struct device *dev = &client->dev;
  973. struct device_node *endpoint;
  974. struct ov5645 *ov5645;
  975. u8 chip_id_high, chip_id_low;
  976. u32 xclk_freq;
  977. int ret;
  978. ov5645 = devm_kzalloc(dev, sizeof(struct ov5645), GFP_KERNEL);
  979. if (!ov5645)
  980. return -ENOMEM;
  981. ov5645->i2c_client = client;
  982. ov5645->dev = dev;
  983. endpoint = of_graph_get_next_endpoint(dev->of_node, NULL);
  984. if (!endpoint) {
  985. dev_err(dev, "endpoint node not found\n");
  986. return -EINVAL;
  987. }
  988. ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint),
  989. &ov5645->ep);
  990. of_node_put(endpoint);
  991. if (ret < 0) {
  992. dev_err(dev, "parsing endpoint node failed\n");
  993. return ret;
  994. }
  995. if (ov5645->ep.bus_type != V4L2_MBUS_CSI2) {
  996. dev_err(dev, "invalid bus type, must be CSI2\n");
  997. return -EINVAL;
  998. }
  999. /* get system clock (xclk) */
  1000. ov5645->xclk = devm_clk_get(dev, "xclk");
  1001. if (IS_ERR(ov5645->xclk)) {
  1002. dev_err(dev, "could not get xclk");
  1003. return PTR_ERR(ov5645->xclk);
  1004. }
  1005. ret = of_property_read_u32(dev->of_node, "clock-frequency", &xclk_freq);
  1006. if (ret) {
  1007. dev_err(dev, "could not get xclk frequency\n");
  1008. return ret;
  1009. }
  1010. /* external clock must be 24MHz, allow 1% tolerance */
  1011. if (xclk_freq < 23760000 || xclk_freq > 24240000) {
  1012. dev_err(dev, "external clock frequency %u is not supported\n",
  1013. xclk_freq);
  1014. return -EINVAL;
  1015. }
  1016. ret = clk_set_rate(ov5645->xclk, xclk_freq);
  1017. if (ret) {
  1018. dev_err(dev, "could not set xclk frequency\n");
  1019. return ret;
  1020. }
  1021. ov5645->io_regulator = devm_regulator_get(dev, "vdddo");
  1022. if (IS_ERR(ov5645->io_regulator)) {
  1023. dev_err(dev, "cannot get io regulator\n");
  1024. return PTR_ERR(ov5645->io_regulator);
  1025. }
  1026. ret = regulator_set_voltage(ov5645->io_regulator,
  1027. OV5645_VOLTAGE_DIGITAL_IO,
  1028. OV5645_VOLTAGE_DIGITAL_IO);
  1029. if (ret < 0) {
  1030. dev_err(dev, "cannot set io voltage\n");
  1031. return ret;
  1032. }
  1033. ov5645->core_regulator = devm_regulator_get(dev, "vddd");
  1034. if (IS_ERR(ov5645->core_regulator)) {
  1035. dev_err(dev, "cannot get core regulator\n");
  1036. return PTR_ERR(ov5645->core_regulator);
  1037. }
  1038. ret = regulator_set_voltage(ov5645->core_regulator,
  1039. OV5645_VOLTAGE_DIGITAL_CORE,
  1040. OV5645_VOLTAGE_DIGITAL_CORE);
  1041. if (ret < 0) {
  1042. dev_err(dev, "cannot set core voltage\n");
  1043. return ret;
  1044. }
  1045. ov5645->analog_regulator = devm_regulator_get(dev, "vdda");
  1046. if (IS_ERR(ov5645->analog_regulator)) {
  1047. dev_err(dev, "cannot get analog regulator\n");
  1048. return PTR_ERR(ov5645->analog_regulator);
  1049. }
  1050. ret = regulator_set_voltage(ov5645->analog_regulator,
  1051. OV5645_VOLTAGE_ANALOG,
  1052. OV5645_VOLTAGE_ANALOG);
  1053. if (ret < 0) {
  1054. dev_err(dev, "cannot set analog voltage\n");
  1055. return ret;
  1056. }
  1057. ov5645->enable_gpio = devm_gpiod_get(dev, "enable", GPIOD_OUT_HIGH);
  1058. if (IS_ERR(ov5645->enable_gpio)) {
  1059. dev_err(dev, "cannot get enable gpio\n");
  1060. return PTR_ERR(ov5645->enable_gpio);
  1061. }
  1062. ov5645->rst_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
  1063. if (IS_ERR(ov5645->rst_gpio)) {
  1064. dev_err(dev, "cannot get reset gpio\n");
  1065. return PTR_ERR(ov5645->rst_gpio);
  1066. }
  1067. mutex_init(&ov5645->power_lock);
  1068. v4l2_ctrl_handler_init(&ov5645->ctrls, 9);
  1069. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1070. V4L2_CID_SATURATION, -4, 4, 1, 0);
  1071. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1072. V4L2_CID_HFLIP, 0, 1, 1, 0);
  1073. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1074. V4L2_CID_VFLIP, 0, 1, 1, 0);
  1075. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1076. V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
  1077. v4l2_ctrl_new_std(&ov5645->ctrls, &ov5645_ctrl_ops,
  1078. V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
  1079. v4l2_ctrl_new_std_menu(&ov5645->ctrls, &ov5645_ctrl_ops,
  1080. V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL,
  1081. 0, V4L2_EXPOSURE_AUTO);
  1082. v4l2_ctrl_new_std_menu_items(&ov5645->ctrls, &ov5645_ctrl_ops,
  1083. V4L2_CID_TEST_PATTERN,
  1084. ARRAY_SIZE(ov5645_test_pattern_menu) - 1,
  1085. 0, 0, ov5645_test_pattern_menu);
  1086. ov5645->pixel_clock = v4l2_ctrl_new_std(&ov5645->ctrls,
  1087. &ov5645_ctrl_ops,
  1088. V4L2_CID_PIXEL_RATE,
  1089. 1, INT_MAX, 1, 1);
  1090. ov5645->link_freq = v4l2_ctrl_new_int_menu(&ov5645->ctrls,
  1091. &ov5645_ctrl_ops,
  1092. V4L2_CID_LINK_FREQ,
  1093. ARRAY_SIZE(link_freq) - 1,
  1094. 0, link_freq);
  1095. if (ov5645->link_freq)
  1096. ov5645->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  1097. ov5645->sd.ctrl_handler = &ov5645->ctrls;
  1098. if (ov5645->ctrls.error) {
  1099. dev_err(dev, "%s: control initialization error %d\n",
  1100. __func__, ov5645->ctrls.error);
  1101. ret = ov5645->ctrls.error;
  1102. goto free_ctrl;
  1103. }
  1104. v4l2_i2c_subdev_init(&ov5645->sd, client, &ov5645_subdev_ops);
  1105. ov5645->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1106. ov5645->pad.flags = MEDIA_PAD_FL_SOURCE;
  1107. ov5645->sd.dev = &client->dev;
  1108. ov5645->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
  1109. ret = media_entity_pads_init(&ov5645->sd.entity, 1, &ov5645->pad);
  1110. if (ret < 0) {
  1111. dev_err(dev, "could not register media entity\n");
  1112. goto free_ctrl;
  1113. }
  1114. ret = ov5645_s_power(&ov5645->sd, true);
  1115. if (ret < 0) {
  1116. dev_err(dev, "could not power up OV5645\n");
  1117. goto free_entity;
  1118. }
  1119. ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_HIGH, &chip_id_high);
  1120. if (ret < 0 || chip_id_high != OV5645_CHIP_ID_HIGH_BYTE) {
  1121. dev_err(dev, "could not read ID high\n");
  1122. ret = -ENODEV;
  1123. goto power_down;
  1124. }
  1125. ret = ov5645_read_reg(ov5645, OV5645_CHIP_ID_LOW, &chip_id_low);
  1126. if (ret < 0 || chip_id_low != OV5645_CHIP_ID_LOW_BYTE) {
  1127. dev_err(dev, "could not read ID low\n");
  1128. ret = -ENODEV;
  1129. goto power_down;
  1130. }
  1131. dev_info(dev, "OV5645 detected at address 0x%02x\n", client->addr);
  1132. ret = ov5645_read_reg(ov5645, OV5645_AEC_PK_MANUAL,
  1133. &ov5645->aec_pk_manual);
  1134. if (ret < 0) {
  1135. dev_err(dev, "could not read AEC/AGC mode\n");
  1136. ret = -ENODEV;
  1137. goto power_down;
  1138. }
  1139. ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG20,
  1140. &ov5645->timing_tc_reg20);
  1141. if (ret < 0) {
  1142. dev_err(dev, "could not read vflip value\n");
  1143. ret = -ENODEV;
  1144. goto power_down;
  1145. }
  1146. ret = ov5645_read_reg(ov5645, OV5645_TIMING_TC_REG21,
  1147. &ov5645->timing_tc_reg21);
  1148. if (ret < 0) {
  1149. dev_err(dev, "could not read hflip value\n");
  1150. ret = -ENODEV;
  1151. goto power_down;
  1152. }
  1153. ov5645_s_power(&ov5645->sd, false);
  1154. ret = v4l2_async_register_subdev(&ov5645->sd);
  1155. if (ret < 0) {
  1156. dev_err(dev, "could not register v4l2 device\n");
  1157. goto free_entity;
  1158. }
  1159. ov5645_entity_init_cfg(&ov5645->sd, NULL);
  1160. return 0;
  1161. power_down:
  1162. ov5645_s_power(&ov5645->sd, false);
  1163. free_entity:
  1164. media_entity_cleanup(&ov5645->sd.entity);
  1165. free_ctrl:
  1166. v4l2_ctrl_handler_free(&ov5645->ctrls);
  1167. mutex_destroy(&ov5645->power_lock);
  1168. return ret;
  1169. }
  1170. static int ov5645_remove(struct i2c_client *client)
  1171. {
  1172. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  1173. struct ov5645 *ov5645 = to_ov5645(sd);
  1174. v4l2_async_unregister_subdev(&ov5645->sd);
  1175. media_entity_cleanup(&ov5645->sd.entity);
  1176. v4l2_ctrl_handler_free(&ov5645->ctrls);
  1177. mutex_destroy(&ov5645->power_lock);
  1178. return 0;
  1179. }
  1180. static const struct i2c_device_id ov5645_id[] = {
  1181. { "ov5645", 0 },
  1182. {}
  1183. };
  1184. MODULE_DEVICE_TABLE(i2c, ov5645_id);
  1185. static const struct of_device_id ov5645_of_match[] = {
  1186. { .compatible = "ovti,ov5645" },
  1187. { /* sentinel */ }
  1188. };
  1189. MODULE_DEVICE_TABLE(of, ov5645_of_match);
  1190. static struct i2c_driver ov5645_i2c_driver = {
  1191. .driver = {
  1192. .of_match_table = of_match_ptr(ov5645_of_match),
  1193. .name = "ov5645",
  1194. },
  1195. .probe = ov5645_probe,
  1196. .remove = ov5645_remove,
  1197. .id_table = ov5645_id,
  1198. };
  1199. module_i2c_driver(ov5645_i2c_driver);
  1200. MODULE_DESCRIPTION("Omnivision OV5645 Camera Driver");
  1201. MODULE_AUTHOR("Todor Tomov <todor.tomov@linaro.org>");
  1202. MODULE_LICENSE("GPL v2");