i40iw_main.c 57 KB

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  1. /*******************************************************************************
  2. *
  3. * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenFabrics.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. *******************************************************************************/
  34. #include <linux/module.h>
  35. #include <linux/moduleparam.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/etherdevice.h>
  38. #include <linux/ip.h>
  39. #include <linux/tcp.h>
  40. #include <linux/if_vlan.h>
  41. #include <net/addrconf.h>
  42. #include "i40iw.h"
  43. #include "i40iw_register.h"
  44. #include <net/netevent.h>
  45. #define CLIENT_IW_INTERFACE_VERSION_MAJOR 0
  46. #define CLIENT_IW_INTERFACE_VERSION_MINOR 01
  47. #define CLIENT_IW_INTERFACE_VERSION_BUILD 00
  48. #define DRV_VERSION_MAJOR 0
  49. #define DRV_VERSION_MINOR 5
  50. #define DRV_VERSION_BUILD 123
  51. #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
  52. __stringify(DRV_VERSION_MINOR) "." __stringify(DRV_VERSION_BUILD)
  53. static int push_mode;
  54. module_param(push_mode, int, 0644);
  55. MODULE_PARM_DESC(push_mode, "Low latency mode: 0=disabled (default), 1=enabled)");
  56. static int debug;
  57. module_param(debug, int, 0644);
  58. MODULE_PARM_DESC(debug, "debug flags: 0=disabled (default), 0x7fffffff=all");
  59. static int resource_profile;
  60. module_param(resource_profile, int, 0644);
  61. MODULE_PARM_DESC(resource_profile,
  62. "Resource Profile: 0=no VF RDMA support (default), 1=Weighted VF, 2=Even Distribution");
  63. static int max_rdma_vfs = 32;
  64. module_param(max_rdma_vfs, int, 0644);
  65. MODULE_PARM_DESC(max_rdma_vfs, "Maximum VF count: 0-32 32=default");
  66. static int mpa_version = 2;
  67. module_param(mpa_version, int, 0644);
  68. MODULE_PARM_DESC(mpa_version, "MPA version to be used in MPA Req/Resp 1 or 2");
  69. MODULE_AUTHOR("Intel Corporation, <e1000-rdma@lists.sourceforge.net>");
  70. MODULE_DESCRIPTION("Intel(R) Ethernet Connection X722 iWARP RDMA Driver");
  71. MODULE_LICENSE("Dual BSD/GPL");
  72. static struct i40e_client i40iw_client;
  73. static char i40iw_client_name[I40E_CLIENT_STR_LENGTH] = "i40iw";
  74. static LIST_HEAD(i40iw_handlers);
  75. static spinlock_t i40iw_handler_lock;
  76. static enum i40iw_status_code i40iw_virtchnl_send(struct i40iw_sc_dev *dev,
  77. u32 vf_id, u8 *msg, u16 len);
  78. static struct notifier_block i40iw_inetaddr_notifier = {
  79. .notifier_call = i40iw_inetaddr_event
  80. };
  81. static struct notifier_block i40iw_inetaddr6_notifier = {
  82. .notifier_call = i40iw_inet6addr_event
  83. };
  84. static struct notifier_block i40iw_net_notifier = {
  85. .notifier_call = i40iw_net_event
  86. };
  87. static struct notifier_block i40iw_netdevice_notifier = {
  88. .notifier_call = i40iw_netdevice_event
  89. };
  90. /**
  91. * i40iw_find_i40e_handler - find a handler given a client info
  92. * @ldev: pointer to a client info
  93. */
  94. static struct i40iw_handler *i40iw_find_i40e_handler(struct i40e_info *ldev)
  95. {
  96. struct i40iw_handler *hdl;
  97. unsigned long flags;
  98. spin_lock_irqsave(&i40iw_handler_lock, flags);
  99. list_for_each_entry(hdl, &i40iw_handlers, list) {
  100. if (hdl->ldev.netdev == ldev->netdev) {
  101. spin_unlock_irqrestore(&i40iw_handler_lock, flags);
  102. return hdl;
  103. }
  104. }
  105. spin_unlock_irqrestore(&i40iw_handler_lock, flags);
  106. return NULL;
  107. }
  108. /**
  109. * i40iw_find_netdev - find a handler given a netdev
  110. * @netdev: pointer to net_device
  111. */
  112. struct i40iw_handler *i40iw_find_netdev(struct net_device *netdev)
  113. {
  114. struct i40iw_handler *hdl;
  115. unsigned long flags;
  116. spin_lock_irqsave(&i40iw_handler_lock, flags);
  117. list_for_each_entry(hdl, &i40iw_handlers, list) {
  118. if (hdl->ldev.netdev == netdev) {
  119. spin_unlock_irqrestore(&i40iw_handler_lock, flags);
  120. return hdl;
  121. }
  122. }
  123. spin_unlock_irqrestore(&i40iw_handler_lock, flags);
  124. return NULL;
  125. }
  126. /**
  127. * i40iw_add_handler - add a handler to the list
  128. * @hdl: handler to be added to the handler list
  129. */
  130. static void i40iw_add_handler(struct i40iw_handler *hdl)
  131. {
  132. unsigned long flags;
  133. spin_lock_irqsave(&i40iw_handler_lock, flags);
  134. list_add(&hdl->list, &i40iw_handlers);
  135. spin_unlock_irqrestore(&i40iw_handler_lock, flags);
  136. }
  137. /**
  138. * i40iw_del_handler - delete a handler from the list
  139. * @hdl: handler to be deleted from the handler list
  140. */
  141. static int i40iw_del_handler(struct i40iw_handler *hdl)
  142. {
  143. unsigned long flags;
  144. spin_lock_irqsave(&i40iw_handler_lock, flags);
  145. list_del(&hdl->list);
  146. spin_unlock_irqrestore(&i40iw_handler_lock, flags);
  147. return 0;
  148. }
  149. /**
  150. * i40iw_enable_intr - set up device interrupts
  151. * @dev: hardware control device structure
  152. * @msix_id: id of the interrupt to be enabled
  153. */
  154. static void i40iw_enable_intr(struct i40iw_sc_dev *dev, u32 msix_id)
  155. {
  156. u32 val;
  157. val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
  158. I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
  159. (3 << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
  160. if (dev->is_pf)
  161. i40iw_wr32(dev->hw, I40E_PFINT_DYN_CTLN(msix_id - 1), val);
  162. else
  163. i40iw_wr32(dev->hw, I40E_VFINT_DYN_CTLN1(msix_id - 1), val);
  164. }
  165. /**
  166. * i40iw_dpc - tasklet for aeq and ceq 0
  167. * @data: iwarp device
  168. */
  169. static void i40iw_dpc(unsigned long data)
  170. {
  171. struct i40iw_device *iwdev = (struct i40iw_device *)data;
  172. if (iwdev->msix_shared)
  173. i40iw_process_ceq(iwdev, iwdev->ceqlist);
  174. i40iw_process_aeq(iwdev);
  175. i40iw_enable_intr(&iwdev->sc_dev, iwdev->iw_msixtbl[0].idx);
  176. }
  177. /**
  178. * i40iw_ceq_dpc - dpc handler for CEQ
  179. * @data: data points to CEQ
  180. */
  181. static void i40iw_ceq_dpc(unsigned long data)
  182. {
  183. struct i40iw_ceq *iwceq = (struct i40iw_ceq *)data;
  184. struct i40iw_device *iwdev = iwceq->iwdev;
  185. i40iw_process_ceq(iwdev, iwceq);
  186. i40iw_enable_intr(&iwdev->sc_dev, iwceq->msix_idx);
  187. }
  188. /**
  189. * i40iw_irq_handler - interrupt handler for aeq and ceq0
  190. * @irq: Interrupt request number
  191. * @data: iwarp device
  192. */
  193. static irqreturn_t i40iw_irq_handler(int irq, void *data)
  194. {
  195. struct i40iw_device *iwdev = (struct i40iw_device *)data;
  196. tasklet_schedule(&iwdev->dpc_tasklet);
  197. return IRQ_HANDLED;
  198. }
  199. /**
  200. * i40iw_destroy_cqp - destroy control qp
  201. * @iwdev: iwarp device
  202. * @create_done: 1 if cqp create poll was success
  203. *
  204. * Issue destroy cqp request and
  205. * free the resources associated with the cqp
  206. */
  207. static void i40iw_destroy_cqp(struct i40iw_device *iwdev, bool free_hwcqp)
  208. {
  209. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  210. struct i40iw_cqp *cqp = &iwdev->cqp;
  211. if (free_hwcqp)
  212. dev->cqp_ops->cqp_destroy(dev->cqp);
  213. i40iw_cleanup_pending_cqp_op(iwdev);
  214. i40iw_free_dma_mem(dev->hw, &cqp->sq);
  215. kfree(cqp->scratch_array);
  216. iwdev->cqp.scratch_array = NULL;
  217. kfree(cqp->cqp_requests);
  218. cqp->cqp_requests = NULL;
  219. }
  220. /**
  221. * i40iw_disable_irqs - disable device interrupts
  222. * @dev: hardware control device structure
  223. * @msic_vec: msix vector to disable irq
  224. * @dev_id: parameter to pass to free_irq (used during irq setup)
  225. *
  226. * The function is called when destroying aeq/ceq
  227. */
  228. static void i40iw_disable_irq(struct i40iw_sc_dev *dev,
  229. struct i40iw_msix_vector *msix_vec,
  230. void *dev_id)
  231. {
  232. if (dev->is_pf)
  233. i40iw_wr32(dev->hw, I40E_PFINT_DYN_CTLN(msix_vec->idx - 1), 0);
  234. else
  235. i40iw_wr32(dev->hw, I40E_VFINT_DYN_CTLN1(msix_vec->idx - 1), 0);
  236. irq_set_affinity_hint(msix_vec->irq, NULL);
  237. free_irq(msix_vec->irq, dev_id);
  238. }
  239. /**
  240. * i40iw_destroy_aeq - destroy aeq
  241. * @iwdev: iwarp device
  242. *
  243. * Issue a destroy aeq request and
  244. * free the resources associated with the aeq
  245. * The function is called during driver unload
  246. */
  247. static void i40iw_destroy_aeq(struct i40iw_device *iwdev)
  248. {
  249. enum i40iw_status_code status = I40IW_ERR_NOT_READY;
  250. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  251. struct i40iw_aeq *aeq = &iwdev->aeq;
  252. if (!iwdev->msix_shared)
  253. i40iw_disable_irq(dev, iwdev->iw_msixtbl, (void *)iwdev);
  254. if (iwdev->reset)
  255. goto exit;
  256. if (!dev->aeq_ops->aeq_destroy(&aeq->sc_aeq, 0, 1))
  257. status = dev->aeq_ops->aeq_destroy_done(&aeq->sc_aeq);
  258. if (status)
  259. i40iw_pr_err("destroy aeq failed %d\n", status);
  260. exit:
  261. i40iw_free_dma_mem(dev->hw, &aeq->mem);
  262. }
  263. /**
  264. * i40iw_destroy_ceq - destroy ceq
  265. * @iwdev: iwarp device
  266. * @iwceq: ceq to be destroyed
  267. *
  268. * Issue a destroy ceq request and
  269. * free the resources associated with the ceq
  270. */
  271. static void i40iw_destroy_ceq(struct i40iw_device *iwdev,
  272. struct i40iw_ceq *iwceq)
  273. {
  274. enum i40iw_status_code status;
  275. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  276. if (iwdev->reset)
  277. goto exit;
  278. status = dev->ceq_ops->ceq_destroy(&iwceq->sc_ceq, 0, 1);
  279. if (status) {
  280. i40iw_pr_err("ceq destroy command failed %d\n", status);
  281. goto exit;
  282. }
  283. status = dev->ceq_ops->cceq_destroy_done(&iwceq->sc_ceq);
  284. if (status)
  285. i40iw_pr_err("ceq destroy completion failed %d\n", status);
  286. exit:
  287. i40iw_free_dma_mem(dev->hw, &iwceq->mem);
  288. }
  289. /**
  290. * i40iw_dele_ceqs - destroy all ceq's
  291. * @iwdev: iwarp device
  292. *
  293. * Go through all of the device ceq's and for each ceq
  294. * disable the ceq interrupt and destroy the ceq
  295. */
  296. static void i40iw_dele_ceqs(struct i40iw_device *iwdev)
  297. {
  298. u32 i = 0;
  299. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  300. struct i40iw_ceq *iwceq = iwdev->ceqlist;
  301. struct i40iw_msix_vector *msix_vec = iwdev->iw_msixtbl;
  302. if (iwdev->msix_shared) {
  303. i40iw_disable_irq(dev, msix_vec, (void *)iwdev);
  304. i40iw_destroy_ceq(iwdev, iwceq);
  305. iwceq++;
  306. i++;
  307. }
  308. for (msix_vec++; i < iwdev->ceqs_count; i++, msix_vec++, iwceq++) {
  309. i40iw_disable_irq(dev, msix_vec, (void *)iwceq);
  310. i40iw_destroy_ceq(iwdev, iwceq);
  311. }
  312. iwdev->sc_dev.ceq_valid = false;
  313. }
  314. /**
  315. * i40iw_destroy_ccq - destroy control cq
  316. * @iwdev: iwarp device
  317. *
  318. * Issue destroy ccq request and
  319. * free the resources associated with the ccq
  320. */
  321. static void i40iw_destroy_ccq(struct i40iw_device *iwdev)
  322. {
  323. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  324. struct i40iw_ccq *ccq = &iwdev->ccq;
  325. enum i40iw_status_code status = 0;
  326. if (!iwdev->reset)
  327. status = dev->ccq_ops->ccq_destroy(dev->ccq, 0, true);
  328. if (status)
  329. i40iw_pr_err("ccq destroy failed %d\n", status);
  330. i40iw_free_dma_mem(dev->hw, &ccq->mem_cq);
  331. }
  332. /* types of hmc objects */
  333. static enum i40iw_hmc_rsrc_type iw_hmc_obj_types[] = {
  334. I40IW_HMC_IW_QP,
  335. I40IW_HMC_IW_CQ,
  336. I40IW_HMC_IW_HTE,
  337. I40IW_HMC_IW_ARP,
  338. I40IW_HMC_IW_APBVT_ENTRY,
  339. I40IW_HMC_IW_MR,
  340. I40IW_HMC_IW_XF,
  341. I40IW_HMC_IW_XFFL,
  342. I40IW_HMC_IW_Q1,
  343. I40IW_HMC_IW_Q1FL,
  344. I40IW_HMC_IW_TIMER,
  345. };
  346. /**
  347. * i40iw_close_hmc_objects_type - delete hmc objects of a given type
  348. * @iwdev: iwarp device
  349. * @obj_type: the hmc object type to be deleted
  350. * @is_pf: true if the function is PF otherwise false
  351. * @reset: true if called before reset
  352. */
  353. static void i40iw_close_hmc_objects_type(struct i40iw_sc_dev *dev,
  354. enum i40iw_hmc_rsrc_type obj_type,
  355. struct i40iw_hmc_info *hmc_info,
  356. bool is_pf,
  357. bool reset)
  358. {
  359. struct i40iw_hmc_del_obj_info info;
  360. memset(&info, 0, sizeof(info));
  361. info.hmc_info = hmc_info;
  362. info.rsrc_type = obj_type;
  363. info.count = hmc_info->hmc_obj[obj_type].cnt;
  364. info.is_pf = is_pf;
  365. if (dev->hmc_ops->del_hmc_object(dev, &info, reset))
  366. i40iw_pr_err("del obj of type %d failed\n", obj_type);
  367. }
  368. /**
  369. * i40iw_del_hmc_objects - remove all device hmc objects
  370. * @dev: iwarp device
  371. * @hmc_info: hmc_info to free
  372. * @is_pf: true if hmc_info belongs to PF, not vf nor allocated
  373. * by PF on behalf of VF
  374. * @reset: true if called before reset
  375. */
  376. static void i40iw_del_hmc_objects(struct i40iw_sc_dev *dev,
  377. struct i40iw_hmc_info *hmc_info,
  378. bool is_pf,
  379. bool reset)
  380. {
  381. unsigned int i;
  382. for (i = 0; i < IW_HMC_OBJ_TYPE_NUM; i++)
  383. i40iw_close_hmc_objects_type(dev, iw_hmc_obj_types[i], hmc_info, is_pf, reset);
  384. }
  385. /**
  386. * i40iw_ceq_handler - interrupt handler for ceq
  387. * @data: ceq pointer
  388. */
  389. static irqreturn_t i40iw_ceq_handler(int irq, void *data)
  390. {
  391. struct i40iw_ceq *iwceq = (struct i40iw_ceq *)data;
  392. if (iwceq->irq != irq)
  393. i40iw_pr_err("expected irq = %d received irq = %d\n", iwceq->irq, irq);
  394. tasklet_schedule(&iwceq->dpc_tasklet);
  395. return IRQ_HANDLED;
  396. }
  397. /**
  398. * i40iw_create_hmc_obj_type - create hmc object of a given type
  399. * @dev: hardware control device structure
  400. * @info: information for the hmc object to create
  401. */
  402. static enum i40iw_status_code i40iw_create_hmc_obj_type(struct i40iw_sc_dev *dev,
  403. struct i40iw_hmc_create_obj_info *info)
  404. {
  405. return dev->hmc_ops->create_hmc_object(dev, info);
  406. }
  407. /**
  408. * i40iw_create_hmc_objs - create all hmc objects for the device
  409. * @iwdev: iwarp device
  410. * @is_pf: true if the function is PF otherwise false
  411. *
  412. * Create the device hmc objects and allocate hmc pages
  413. * Return 0 if successful, otherwise clean up and return error
  414. */
  415. static enum i40iw_status_code i40iw_create_hmc_objs(struct i40iw_device *iwdev,
  416. bool is_pf)
  417. {
  418. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  419. struct i40iw_hmc_create_obj_info info;
  420. enum i40iw_status_code status;
  421. int i;
  422. memset(&info, 0, sizeof(info));
  423. info.hmc_info = dev->hmc_info;
  424. info.is_pf = is_pf;
  425. info.entry_type = iwdev->sd_type;
  426. for (i = 0; i < IW_HMC_OBJ_TYPE_NUM; i++) {
  427. info.rsrc_type = iw_hmc_obj_types[i];
  428. info.count = dev->hmc_info->hmc_obj[info.rsrc_type].cnt;
  429. info.add_sd_cnt = 0;
  430. status = i40iw_create_hmc_obj_type(dev, &info);
  431. if (status) {
  432. i40iw_pr_err("create obj type %d status = %d\n",
  433. iw_hmc_obj_types[i], status);
  434. break;
  435. }
  436. }
  437. if (!status)
  438. return (dev->cqp_misc_ops->static_hmc_pages_allocated(dev->cqp, 0,
  439. dev->hmc_fn_id,
  440. true, true));
  441. while (i) {
  442. i--;
  443. /* destroy the hmc objects of a given type */
  444. i40iw_close_hmc_objects_type(dev,
  445. iw_hmc_obj_types[i],
  446. dev->hmc_info,
  447. is_pf,
  448. false);
  449. }
  450. return status;
  451. }
  452. /**
  453. * i40iw_obj_aligned_mem - get aligned memory from device allocated memory
  454. * @iwdev: iwarp device
  455. * @memptr: points to the memory addresses
  456. * @size: size of memory needed
  457. * @mask: mask for the aligned memory
  458. *
  459. * Get aligned memory of the requested size and
  460. * update the memptr to point to the new aligned memory
  461. * Return 0 if successful, otherwise return no memory error
  462. */
  463. enum i40iw_status_code i40iw_obj_aligned_mem(struct i40iw_device *iwdev,
  464. struct i40iw_dma_mem *memptr,
  465. u32 size,
  466. u32 mask)
  467. {
  468. unsigned long va, newva;
  469. unsigned long extra;
  470. va = (unsigned long)iwdev->obj_next.va;
  471. newva = va;
  472. if (mask)
  473. newva = ALIGN(va, (mask + 1));
  474. extra = newva - va;
  475. memptr->va = (u8 *)va + extra;
  476. memptr->pa = iwdev->obj_next.pa + extra;
  477. memptr->size = size;
  478. if ((memptr->va + size) > (iwdev->obj_mem.va + iwdev->obj_mem.size))
  479. return I40IW_ERR_NO_MEMORY;
  480. iwdev->obj_next.va = memptr->va + size;
  481. iwdev->obj_next.pa = memptr->pa + size;
  482. return 0;
  483. }
  484. /**
  485. * i40iw_create_cqp - create control qp
  486. * @iwdev: iwarp device
  487. *
  488. * Return 0, if the cqp and all the resources associated with it
  489. * are successfully created, otherwise return error
  490. */
  491. static enum i40iw_status_code i40iw_create_cqp(struct i40iw_device *iwdev)
  492. {
  493. enum i40iw_status_code status;
  494. u32 sqsize = I40IW_CQP_SW_SQSIZE_2048;
  495. struct i40iw_dma_mem mem;
  496. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  497. struct i40iw_cqp_init_info cqp_init_info;
  498. struct i40iw_cqp *cqp = &iwdev->cqp;
  499. u16 maj_err, min_err;
  500. int i;
  501. cqp->cqp_requests = kcalloc(sqsize, sizeof(*cqp->cqp_requests), GFP_KERNEL);
  502. if (!cqp->cqp_requests)
  503. return I40IW_ERR_NO_MEMORY;
  504. cqp->scratch_array = kcalloc(sqsize, sizeof(*cqp->scratch_array), GFP_KERNEL);
  505. if (!cqp->scratch_array) {
  506. kfree(cqp->cqp_requests);
  507. return I40IW_ERR_NO_MEMORY;
  508. }
  509. dev->cqp = &cqp->sc_cqp;
  510. dev->cqp->dev = dev;
  511. memset(&cqp_init_info, 0, sizeof(cqp_init_info));
  512. status = i40iw_allocate_dma_mem(dev->hw, &cqp->sq,
  513. (sizeof(struct i40iw_cqp_sq_wqe) * sqsize),
  514. I40IW_CQP_ALIGNMENT);
  515. if (status)
  516. goto exit;
  517. status = i40iw_obj_aligned_mem(iwdev, &mem, sizeof(struct i40iw_cqp_ctx),
  518. I40IW_HOST_CTX_ALIGNMENT_MASK);
  519. if (status)
  520. goto exit;
  521. dev->cqp->host_ctx_pa = mem.pa;
  522. dev->cqp->host_ctx = mem.va;
  523. /* populate the cqp init info */
  524. cqp_init_info.dev = dev;
  525. cqp_init_info.sq_size = sqsize;
  526. cqp_init_info.sq = cqp->sq.va;
  527. cqp_init_info.sq_pa = cqp->sq.pa;
  528. cqp_init_info.host_ctx_pa = mem.pa;
  529. cqp_init_info.host_ctx = mem.va;
  530. cqp_init_info.hmc_profile = iwdev->resource_profile;
  531. cqp_init_info.enabled_vf_count = iwdev->max_rdma_vfs;
  532. cqp_init_info.scratch_array = cqp->scratch_array;
  533. status = dev->cqp_ops->cqp_init(dev->cqp, &cqp_init_info);
  534. if (status) {
  535. i40iw_pr_err("cqp init status %d\n", status);
  536. goto exit;
  537. }
  538. status = dev->cqp_ops->cqp_create(dev->cqp, &maj_err, &min_err);
  539. if (status) {
  540. i40iw_pr_err("cqp create status %d maj_err %d min_err %d\n",
  541. status, maj_err, min_err);
  542. goto exit;
  543. }
  544. spin_lock_init(&cqp->req_lock);
  545. INIT_LIST_HEAD(&cqp->cqp_avail_reqs);
  546. INIT_LIST_HEAD(&cqp->cqp_pending_reqs);
  547. /* init the waitq of the cqp_requests and add them to the list */
  548. for (i = 0; i < sqsize; i++) {
  549. init_waitqueue_head(&cqp->cqp_requests[i].waitq);
  550. list_add_tail(&cqp->cqp_requests[i].list, &cqp->cqp_avail_reqs);
  551. }
  552. return 0;
  553. exit:
  554. /* clean up the created resources */
  555. i40iw_destroy_cqp(iwdev, false);
  556. return status;
  557. }
  558. /**
  559. * i40iw_create_ccq - create control cq
  560. * @iwdev: iwarp device
  561. *
  562. * Return 0, if the ccq and the resources associated with it
  563. * are successfully created, otherwise return error
  564. */
  565. static enum i40iw_status_code i40iw_create_ccq(struct i40iw_device *iwdev)
  566. {
  567. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  568. struct i40iw_dma_mem mem;
  569. enum i40iw_status_code status;
  570. struct i40iw_ccq_init_info info;
  571. struct i40iw_ccq *ccq = &iwdev->ccq;
  572. memset(&info, 0, sizeof(info));
  573. dev->ccq = &ccq->sc_cq;
  574. dev->ccq->dev = dev;
  575. info.dev = dev;
  576. ccq->shadow_area.size = sizeof(struct i40iw_cq_shadow_area);
  577. ccq->mem_cq.size = sizeof(struct i40iw_cqe) * IW_CCQ_SIZE;
  578. status = i40iw_allocate_dma_mem(dev->hw, &ccq->mem_cq,
  579. ccq->mem_cq.size, I40IW_CQ0_ALIGNMENT);
  580. if (status)
  581. goto exit;
  582. status = i40iw_obj_aligned_mem(iwdev, &mem, ccq->shadow_area.size,
  583. I40IW_SHADOWAREA_MASK);
  584. if (status)
  585. goto exit;
  586. ccq->sc_cq.back_cq = (void *)ccq;
  587. /* populate the ccq init info */
  588. info.cq_base = ccq->mem_cq.va;
  589. info.cq_pa = ccq->mem_cq.pa;
  590. info.num_elem = IW_CCQ_SIZE;
  591. info.shadow_area = mem.va;
  592. info.shadow_area_pa = mem.pa;
  593. info.ceqe_mask = false;
  594. info.ceq_id_valid = true;
  595. info.shadow_read_threshold = 16;
  596. status = dev->ccq_ops->ccq_init(dev->ccq, &info);
  597. if (!status)
  598. status = dev->ccq_ops->ccq_create(dev->ccq, 0, true, true);
  599. exit:
  600. if (status)
  601. i40iw_free_dma_mem(dev->hw, &ccq->mem_cq);
  602. return status;
  603. }
  604. /**
  605. * i40iw_configure_ceq_vector - set up the msix interrupt vector for ceq
  606. * @iwdev: iwarp device
  607. * @msix_vec: interrupt vector information
  608. * @iwceq: ceq associated with the vector
  609. * @ceq_id: the id number of the iwceq
  610. *
  611. * Allocate interrupt resources and enable irq handling
  612. * Return 0 if successful, otherwise return error
  613. */
  614. static enum i40iw_status_code i40iw_configure_ceq_vector(struct i40iw_device *iwdev,
  615. struct i40iw_ceq *iwceq,
  616. u32 ceq_id,
  617. struct i40iw_msix_vector *msix_vec)
  618. {
  619. enum i40iw_status_code status;
  620. if (iwdev->msix_shared && !ceq_id) {
  621. tasklet_init(&iwdev->dpc_tasklet, i40iw_dpc, (unsigned long)iwdev);
  622. status = request_irq(msix_vec->irq, i40iw_irq_handler, 0, "AEQCEQ", iwdev);
  623. } else {
  624. tasklet_init(&iwceq->dpc_tasklet, i40iw_ceq_dpc, (unsigned long)iwceq);
  625. status = request_irq(msix_vec->irq, i40iw_ceq_handler, 0, "CEQ", iwceq);
  626. }
  627. cpumask_clear(&msix_vec->mask);
  628. cpumask_set_cpu(msix_vec->cpu_affinity, &msix_vec->mask);
  629. irq_set_affinity_hint(msix_vec->irq, &msix_vec->mask);
  630. if (status) {
  631. i40iw_pr_err("ceq irq config fail\n");
  632. return I40IW_ERR_CONFIG;
  633. }
  634. msix_vec->ceq_id = ceq_id;
  635. return 0;
  636. }
  637. /**
  638. * i40iw_create_ceq - create completion event queue
  639. * @iwdev: iwarp device
  640. * @iwceq: pointer to the ceq resources to be created
  641. * @ceq_id: the id number of the iwceq
  642. *
  643. * Return 0, if the ceq and the resources associated with it
  644. * are successfully created, otherwise return error
  645. */
  646. static enum i40iw_status_code i40iw_create_ceq(struct i40iw_device *iwdev,
  647. struct i40iw_ceq *iwceq,
  648. u32 ceq_id)
  649. {
  650. enum i40iw_status_code status;
  651. struct i40iw_ceq_init_info info;
  652. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  653. u64 scratch;
  654. memset(&info, 0, sizeof(info));
  655. info.ceq_id = ceq_id;
  656. iwceq->iwdev = iwdev;
  657. iwceq->mem.size = sizeof(struct i40iw_ceqe) *
  658. iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_CQ].cnt;
  659. status = i40iw_allocate_dma_mem(dev->hw, &iwceq->mem, iwceq->mem.size,
  660. I40IW_CEQ_ALIGNMENT);
  661. if (status)
  662. goto exit;
  663. info.ceq_id = ceq_id;
  664. info.ceqe_base = iwceq->mem.va;
  665. info.ceqe_pa = iwceq->mem.pa;
  666. info.elem_cnt = iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_CQ].cnt;
  667. iwceq->sc_ceq.ceq_id = ceq_id;
  668. info.dev = dev;
  669. scratch = (uintptr_t)&iwdev->cqp.sc_cqp;
  670. status = dev->ceq_ops->ceq_init(&iwceq->sc_ceq, &info);
  671. if (!status)
  672. status = dev->ceq_ops->cceq_create(&iwceq->sc_ceq, scratch);
  673. exit:
  674. if (status)
  675. i40iw_free_dma_mem(dev->hw, &iwceq->mem);
  676. return status;
  677. }
  678. void i40iw_request_reset(struct i40iw_device *iwdev)
  679. {
  680. struct i40e_info *ldev = iwdev->ldev;
  681. ldev->ops->request_reset(ldev, iwdev->client, 1);
  682. }
  683. /**
  684. * i40iw_setup_ceqs - manage the device ceq's and their interrupt resources
  685. * @iwdev: iwarp device
  686. * @ldev: i40e lan device
  687. *
  688. * Allocate a list for all device completion event queues
  689. * Create the ceq's and configure their msix interrupt vectors
  690. * Return 0, if at least one ceq is successfully set up, otherwise return error
  691. */
  692. static enum i40iw_status_code i40iw_setup_ceqs(struct i40iw_device *iwdev,
  693. struct i40e_info *ldev)
  694. {
  695. u32 i;
  696. u32 ceq_id;
  697. struct i40iw_ceq *iwceq;
  698. struct i40iw_msix_vector *msix_vec;
  699. enum i40iw_status_code status = 0;
  700. u32 num_ceqs;
  701. if (ldev && ldev->ops && ldev->ops->setup_qvlist) {
  702. status = ldev->ops->setup_qvlist(ldev, &i40iw_client,
  703. iwdev->iw_qvlist);
  704. if (status)
  705. goto exit;
  706. } else {
  707. status = I40IW_ERR_BAD_PTR;
  708. goto exit;
  709. }
  710. num_ceqs = min(iwdev->msix_count, iwdev->sc_dev.hmc_fpm_misc.max_ceqs);
  711. iwdev->ceqlist = kcalloc(num_ceqs, sizeof(*iwdev->ceqlist), GFP_KERNEL);
  712. if (!iwdev->ceqlist) {
  713. status = I40IW_ERR_NO_MEMORY;
  714. goto exit;
  715. }
  716. i = (iwdev->msix_shared) ? 0 : 1;
  717. for (ceq_id = 0; i < num_ceqs; i++, ceq_id++) {
  718. iwceq = &iwdev->ceqlist[ceq_id];
  719. status = i40iw_create_ceq(iwdev, iwceq, ceq_id);
  720. if (status) {
  721. i40iw_pr_err("create ceq status = %d\n", status);
  722. break;
  723. }
  724. msix_vec = &iwdev->iw_msixtbl[i];
  725. iwceq->irq = msix_vec->irq;
  726. iwceq->msix_idx = msix_vec->idx;
  727. status = i40iw_configure_ceq_vector(iwdev, iwceq, ceq_id, msix_vec);
  728. if (status) {
  729. i40iw_destroy_ceq(iwdev, iwceq);
  730. break;
  731. }
  732. i40iw_enable_intr(&iwdev->sc_dev, msix_vec->idx);
  733. iwdev->ceqs_count++;
  734. }
  735. exit:
  736. if (status && !iwdev->ceqs_count) {
  737. kfree(iwdev->ceqlist);
  738. iwdev->ceqlist = NULL;
  739. return status;
  740. } else {
  741. iwdev->sc_dev.ceq_valid = true;
  742. return 0;
  743. }
  744. }
  745. /**
  746. * i40iw_configure_aeq_vector - set up the msix vector for aeq
  747. * @iwdev: iwarp device
  748. *
  749. * Allocate interrupt resources and enable irq handling
  750. * Return 0 if successful, otherwise return error
  751. */
  752. static enum i40iw_status_code i40iw_configure_aeq_vector(struct i40iw_device *iwdev)
  753. {
  754. struct i40iw_msix_vector *msix_vec = iwdev->iw_msixtbl;
  755. u32 ret = 0;
  756. if (!iwdev->msix_shared) {
  757. tasklet_init(&iwdev->dpc_tasklet, i40iw_dpc, (unsigned long)iwdev);
  758. ret = request_irq(msix_vec->irq, i40iw_irq_handler, 0, "i40iw", iwdev);
  759. }
  760. if (ret) {
  761. i40iw_pr_err("aeq irq config fail\n");
  762. return I40IW_ERR_CONFIG;
  763. }
  764. return 0;
  765. }
  766. /**
  767. * i40iw_create_aeq - create async event queue
  768. * @iwdev: iwarp device
  769. *
  770. * Return 0, if the aeq and the resources associated with it
  771. * are successfully created, otherwise return error
  772. */
  773. static enum i40iw_status_code i40iw_create_aeq(struct i40iw_device *iwdev)
  774. {
  775. enum i40iw_status_code status;
  776. struct i40iw_aeq_init_info info;
  777. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  778. struct i40iw_aeq *aeq = &iwdev->aeq;
  779. u64 scratch = 0;
  780. u32 aeq_size;
  781. aeq_size = 2 * iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_QP].cnt +
  782. iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_CQ].cnt;
  783. memset(&info, 0, sizeof(info));
  784. aeq->mem.size = sizeof(struct i40iw_sc_aeqe) * aeq_size;
  785. status = i40iw_allocate_dma_mem(dev->hw, &aeq->mem, aeq->mem.size,
  786. I40IW_AEQ_ALIGNMENT);
  787. if (status)
  788. goto exit;
  789. info.aeqe_base = aeq->mem.va;
  790. info.aeq_elem_pa = aeq->mem.pa;
  791. info.elem_cnt = aeq_size;
  792. info.dev = dev;
  793. status = dev->aeq_ops->aeq_init(&aeq->sc_aeq, &info);
  794. if (status)
  795. goto exit;
  796. status = dev->aeq_ops->aeq_create(&aeq->sc_aeq, scratch, 1);
  797. if (!status)
  798. status = dev->aeq_ops->aeq_create_done(&aeq->sc_aeq);
  799. exit:
  800. if (status)
  801. i40iw_free_dma_mem(dev->hw, &aeq->mem);
  802. return status;
  803. }
  804. /**
  805. * i40iw_setup_aeq - set up the device aeq
  806. * @iwdev: iwarp device
  807. *
  808. * Create the aeq and configure its msix interrupt vector
  809. * Return 0 if successful, otherwise return error
  810. */
  811. static enum i40iw_status_code i40iw_setup_aeq(struct i40iw_device *iwdev)
  812. {
  813. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  814. enum i40iw_status_code status;
  815. status = i40iw_create_aeq(iwdev);
  816. if (status)
  817. return status;
  818. status = i40iw_configure_aeq_vector(iwdev);
  819. if (status) {
  820. i40iw_destroy_aeq(iwdev);
  821. return status;
  822. }
  823. if (!iwdev->msix_shared)
  824. i40iw_enable_intr(dev, iwdev->iw_msixtbl[0].idx);
  825. return 0;
  826. }
  827. /**
  828. * i40iw_initialize_ilq - create iwarp local queue for cm
  829. * @iwdev: iwarp device
  830. *
  831. * Return 0 if successful, otherwise return error
  832. */
  833. static enum i40iw_status_code i40iw_initialize_ilq(struct i40iw_device *iwdev)
  834. {
  835. struct i40iw_puda_rsrc_info info;
  836. enum i40iw_status_code status;
  837. memset(&info, 0, sizeof(info));
  838. info.type = I40IW_PUDA_RSRC_TYPE_ILQ;
  839. info.cq_id = 1;
  840. info.qp_id = 0;
  841. info.count = 1;
  842. info.pd_id = 1;
  843. info.sq_size = 8192;
  844. info.rq_size = 8192;
  845. info.buf_size = 1024;
  846. info.tx_buf_cnt = 16384;
  847. info.receive = i40iw_receive_ilq;
  848. info.xmit_complete = i40iw_free_sqbuf;
  849. status = i40iw_puda_create_rsrc(&iwdev->vsi, &info);
  850. if (status)
  851. i40iw_pr_err("ilq create fail\n");
  852. return status;
  853. }
  854. /**
  855. * i40iw_initialize_ieq - create iwarp exception queue
  856. * @iwdev: iwarp device
  857. *
  858. * Return 0 if successful, otherwise return error
  859. */
  860. static enum i40iw_status_code i40iw_initialize_ieq(struct i40iw_device *iwdev)
  861. {
  862. struct i40iw_puda_rsrc_info info;
  863. enum i40iw_status_code status;
  864. memset(&info, 0, sizeof(info));
  865. info.type = I40IW_PUDA_RSRC_TYPE_IEQ;
  866. info.cq_id = 2;
  867. info.qp_id = iwdev->vsi.exception_lan_queue;
  868. info.count = 1;
  869. info.pd_id = 2;
  870. info.sq_size = 8192;
  871. info.rq_size = 8192;
  872. info.buf_size = iwdev->vsi.mtu + VLAN_ETH_HLEN;
  873. info.tx_buf_cnt = 4096;
  874. status = i40iw_puda_create_rsrc(&iwdev->vsi, &info);
  875. if (status)
  876. i40iw_pr_err("ieq create fail\n");
  877. return status;
  878. }
  879. /**
  880. * i40iw_reinitialize_ieq - destroy and re-create ieq
  881. * @dev: iwarp device
  882. */
  883. void i40iw_reinitialize_ieq(struct i40iw_sc_dev *dev)
  884. {
  885. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  886. i40iw_puda_dele_resources(&iwdev->vsi, I40IW_PUDA_RSRC_TYPE_IEQ, false);
  887. if (i40iw_initialize_ieq(iwdev)) {
  888. iwdev->reset = true;
  889. i40iw_request_reset(iwdev);
  890. }
  891. }
  892. /**
  893. * i40iw_hmc_setup - create hmc objects for the device
  894. * @iwdev: iwarp device
  895. *
  896. * Set up the device private memory space for the number and size of
  897. * the hmc objects and create the objects
  898. * Return 0 if successful, otherwise return error
  899. */
  900. static enum i40iw_status_code i40iw_hmc_setup(struct i40iw_device *iwdev)
  901. {
  902. enum i40iw_status_code status;
  903. iwdev->sd_type = I40IW_SD_TYPE_DIRECT;
  904. status = i40iw_config_fpm_values(&iwdev->sc_dev, IW_CFG_FPM_QP_COUNT);
  905. if (status)
  906. goto exit;
  907. status = i40iw_create_hmc_objs(iwdev, true);
  908. if (status)
  909. goto exit;
  910. iwdev->init_state = HMC_OBJS_CREATED;
  911. exit:
  912. return status;
  913. }
  914. /**
  915. * i40iw_del_init_mem - deallocate memory resources
  916. * @iwdev: iwarp device
  917. */
  918. static void i40iw_del_init_mem(struct i40iw_device *iwdev)
  919. {
  920. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  921. i40iw_free_dma_mem(&iwdev->hw, &iwdev->obj_mem);
  922. kfree(dev->hmc_info->sd_table.sd_entry);
  923. dev->hmc_info->sd_table.sd_entry = NULL;
  924. kfree(iwdev->mem_resources);
  925. iwdev->mem_resources = NULL;
  926. kfree(iwdev->ceqlist);
  927. iwdev->ceqlist = NULL;
  928. kfree(iwdev->iw_msixtbl);
  929. iwdev->iw_msixtbl = NULL;
  930. kfree(iwdev->hmc_info_mem);
  931. iwdev->hmc_info_mem = NULL;
  932. }
  933. /**
  934. * i40iw_del_macip_entry - remove a mac ip address entry from the hw table
  935. * @iwdev: iwarp device
  936. * @idx: the index of the mac ip address to delete
  937. */
  938. static void i40iw_del_macip_entry(struct i40iw_device *iwdev, u8 idx)
  939. {
  940. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  941. struct i40iw_cqp_request *cqp_request;
  942. struct cqp_commands_info *cqp_info;
  943. enum i40iw_status_code status = 0;
  944. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  945. if (!cqp_request) {
  946. i40iw_pr_err("cqp_request memory failed\n");
  947. return;
  948. }
  949. cqp_info = &cqp_request->info;
  950. cqp_info->cqp_cmd = OP_DELETE_LOCAL_MAC_IPADDR_ENTRY;
  951. cqp_info->post_sq = 1;
  952. cqp_info->in.u.del_local_mac_ipaddr_entry.cqp = &iwcqp->sc_cqp;
  953. cqp_info->in.u.del_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
  954. cqp_info->in.u.del_local_mac_ipaddr_entry.entry_idx = idx;
  955. cqp_info->in.u.del_local_mac_ipaddr_entry.ignore_ref_count = 0;
  956. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  957. if (status)
  958. i40iw_pr_err("CQP-OP Del MAC Ip entry fail");
  959. }
  960. /**
  961. * i40iw_add_mac_ipaddr_entry - add a mac ip address entry to the hw table
  962. * @iwdev: iwarp device
  963. * @mac_addr: pointer to mac address
  964. * @idx: the index of the mac ip address to add
  965. */
  966. static enum i40iw_status_code i40iw_add_mac_ipaddr_entry(struct i40iw_device *iwdev,
  967. u8 *mac_addr,
  968. u8 idx)
  969. {
  970. struct i40iw_local_mac_ipaddr_entry_info *info;
  971. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  972. struct i40iw_cqp_request *cqp_request;
  973. struct cqp_commands_info *cqp_info;
  974. enum i40iw_status_code status = 0;
  975. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  976. if (!cqp_request) {
  977. i40iw_pr_err("cqp_request memory failed\n");
  978. return I40IW_ERR_NO_MEMORY;
  979. }
  980. cqp_info = &cqp_request->info;
  981. cqp_info->post_sq = 1;
  982. info = &cqp_info->in.u.add_local_mac_ipaddr_entry.info;
  983. ether_addr_copy(info->mac_addr, mac_addr);
  984. info->entry_idx = idx;
  985. cqp_info->in.u.add_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
  986. cqp_info->cqp_cmd = OP_ADD_LOCAL_MAC_IPADDR_ENTRY;
  987. cqp_info->in.u.add_local_mac_ipaddr_entry.cqp = &iwcqp->sc_cqp;
  988. cqp_info->in.u.add_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
  989. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  990. if (status)
  991. i40iw_pr_err("CQP-OP Add MAC Ip entry fail");
  992. return status;
  993. }
  994. /**
  995. * i40iw_alloc_local_mac_ipaddr_entry - allocate a mac ip address entry
  996. * @iwdev: iwarp device
  997. * @mac_ip_tbl_idx: the index of the new mac ip address
  998. *
  999. * Allocate a mac ip address entry and update the mac_ip_tbl_idx
  1000. * to hold the index of the newly created mac ip address
  1001. * Return 0 if successful, otherwise return error
  1002. */
  1003. static enum i40iw_status_code i40iw_alloc_local_mac_ipaddr_entry(struct i40iw_device *iwdev,
  1004. u16 *mac_ip_tbl_idx)
  1005. {
  1006. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  1007. struct i40iw_cqp_request *cqp_request;
  1008. struct cqp_commands_info *cqp_info;
  1009. enum i40iw_status_code status = 0;
  1010. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1011. if (!cqp_request) {
  1012. i40iw_pr_err("cqp_request memory failed\n");
  1013. return I40IW_ERR_NO_MEMORY;
  1014. }
  1015. /* increment refcount, because we need the cqp request ret value */
  1016. atomic_inc(&cqp_request->refcount);
  1017. cqp_info = &cqp_request->info;
  1018. cqp_info->cqp_cmd = OP_ALLOC_LOCAL_MAC_IPADDR_ENTRY;
  1019. cqp_info->post_sq = 1;
  1020. cqp_info->in.u.alloc_local_mac_ipaddr_entry.cqp = &iwcqp->sc_cqp;
  1021. cqp_info->in.u.alloc_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
  1022. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1023. if (!status)
  1024. *mac_ip_tbl_idx = cqp_request->compl_info.op_ret_val;
  1025. else
  1026. i40iw_pr_err("CQP-OP Alloc MAC Ip entry fail");
  1027. /* decrement refcount and free the cqp request, if no longer used */
  1028. i40iw_put_cqp_request(iwcqp, cqp_request);
  1029. return status;
  1030. }
  1031. /**
  1032. * i40iw_alloc_set_mac_ipaddr - set up a mac ip address table entry
  1033. * @iwdev: iwarp device
  1034. * @macaddr: pointer to mac address
  1035. *
  1036. * Allocate a mac ip address entry and add it to the hw table
  1037. * Return 0 if successful, otherwise return error
  1038. */
  1039. static enum i40iw_status_code i40iw_alloc_set_mac_ipaddr(struct i40iw_device *iwdev,
  1040. u8 *macaddr)
  1041. {
  1042. enum i40iw_status_code status;
  1043. status = i40iw_alloc_local_mac_ipaddr_entry(iwdev, &iwdev->mac_ip_table_idx);
  1044. if (!status) {
  1045. status = i40iw_add_mac_ipaddr_entry(iwdev, macaddr,
  1046. (u8)iwdev->mac_ip_table_idx);
  1047. if (status)
  1048. i40iw_del_macip_entry(iwdev, (u8)iwdev->mac_ip_table_idx);
  1049. }
  1050. return status;
  1051. }
  1052. /**
  1053. * i40iw_add_ipv6_addr - add ipv6 address to the hw arp table
  1054. * @iwdev: iwarp device
  1055. */
  1056. static void i40iw_add_ipv6_addr(struct i40iw_device *iwdev)
  1057. {
  1058. struct net_device *ip_dev;
  1059. struct inet6_dev *idev;
  1060. struct inet6_ifaddr *ifp, *tmp;
  1061. u32 local_ipaddr6[4];
  1062. rcu_read_lock();
  1063. for_each_netdev_rcu(&init_net, ip_dev) {
  1064. if ((((rdma_vlan_dev_vlan_id(ip_dev) < 0xFFFF) &&
  1065. (rdma_vlan_dev_real_dev(ip_dev) == iwdev->netdev)) ||
  1066. (ip_dev == iwdev->netdev)) && (ip_dev->flags & IFF_UP)) {
  1067. idev = __in6_dev_get(ip_dev);
  1068. if (!idev) {
  1069. i40iw_pr_err("ipv6 inet device not found\n");
  1070. break;
  1071. }
  1072. list_for_each_entry_safe(ifp, tmp, &idev->addr_list, if_list) {
  1073. i40iw_pr_info("IP=%pI6, vlan_id=%d, MAC=%pM\n", &ifp->addr,
  1074. rdma_vlan_dev_vlan_id(ip_dev), ip_dev->dev_addr);
  1075. i40iw_copy_ip_ntohl(local_ipaddr6,
  1076. ifp->addr.in6_u.u6_addr32);
  1077. i40iw_manage_arp_cache(iwdev,
  1078. ip_dev->dev_addr,
  1079. local_ipaddr6,
  1080. false,
  1081. I40IW_ARP_ADD);
  1082. }
  1083. }
  1084. }
  1085. rcu_read_unlock();
  1086. }
  1087. /**
  1088. * i40iw_add_ipv4_addr - add ipv4 address to the hw arp table
  1089. * @iwdev: iwarp device
  1090. */
  1091. static void i40iw_add_ipv4_addr(struct i40iw_device *iwdev)
  1092. {
  1093. struct net_device *dev;
  1094. struct in_device *idev;
  1095. bool got_lock = true;
  1096. u32 ip_addr;
  1097. if (!rtnl_trylock())
  1098. got_lock = false;
  1099. for_each_netdev(&init_net, dev) {
  1100. if ((((rdma_vlan_dev_vlan_id(dev) < 0xFFFF) &&
  1101. (rdma_vlan_dev_real_dev(dev) == iwdev->netdev)) ||
  1102. (dev == iwdev->netdev)) && (dev->flags & IFF_UP)) {
  1103. idev = in_dev_get(dev);
  1104. for_ifa(idev) {
  1105. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_CM,
  1106. "IP=%pI4, vlan_id=%d, MAC=%pM\n", &ifa->ifa_address,
  1107. rdma_vlan_dev_vlan_id(dev), dev->dev_addr);
  1108. ip_addr = ntohl(ifa->ifa_address);
  1109. i40iw_manage_arp_cache(iwdev,
  1110. dev->dev_addr,
  1111. &ip_addr,
  1112. true,
  1113. I40IW_ARP_ADD);
  1114. }
  1115. endfor_ifa(idev);
  1116. in_dev_put(idev);
  1117. }
  1118. }
  1119. if (got_lock)
  1120. rtnl_unlock();
  1121. }
  1122. /**
  1123. * i40iw_add_mac_ip - add mac and ip addresses
  1124. * @iwdev: iwarp device
  1125. *
  1126. * Create and add a mac ip address entry to the hw table and
  1127. * ipv4/ipv6 addresses to the arp cache
  1128. * Return 0 if successful, otherwise return error
  1129. */
  1130. static enum i40iw_status_code i40iw_add_mac_ip(struct i40iw_device *iwdev)
  1131. {
  1132. struct net_device *netdev = iwdev->netdev;
  1133. enum i40iw_status_code status;
  1134. status = i40iw_alloc_set_mac_ipaddr(iwdev, (u8 *)netdev->dev_addr);
  1135. if (status)
  1136. return status;
  1137. i40iw_add_ipv4_addr(iwdev);
  1138. i40iw_add_ipv6_addr(iwdev);
  1139. return 0;
  1140. }
  1141. /**
  1142. * i40iw_wait_pe_ready - Check if firmware is ready
  1143. * @hw: provides access to registers
  1144. */
  1145. static void i40iw_wait_pe_ready(struct i40iw_hw *hw)
  1146. {
  1147. u32 statusfw;
  1148. u32 statuscpu0;
  1149. u32 statuscpu1;
  1150. u32 statuscpu2;
  1151. u32 retrycount = 0;
  1152. do {
  1153. statusfw = i40iw_rd32(hw, I40E_GLPE_FWLDSTATUS);
  1154. i40iw_pr_info("[%04d] fm load status[x%04X]\n", __LINE__, statusfw);
  1155. statuscpu0 = i40iw_rd32(hw, I40E_GLPE_CPUSTATUS0);
  1156. i40iw_pr_info("[%04d] CSR_CQP status[x%04X]\n", __LINE__, statuscpu0);
  1157. statuscpu1 = i40iw_rd32(hw, I40E_GLPE_CPUSTATUS1);
  1158. i40iw_pr_info("[%04d] I40E_GLPE_CPUSTATUS1 status[x%04X]\n",
  1159. __LINE__, statuscpu1);
  1160. statuscpu2 = i40iw_rd32(hw, I40E_GLPE_CPUSTATUS2);
  1161. i40iw_pr_info("[%04d] I40E_GLPE_CPUSTATUS2 status[x%04X]\n",
  1162. __LINE__, statuscpu2);
  1163. if ((statuscpu0 == 0x80) && (statuscpu1 == 0x80) && (statuscpu2 == 0x80))
  1164. break; /* SUCCESS */
  1165. msleep(1000);
  1166. retrycount++;
  1167. } while (retrycount < 14);
  1168. i40iw_wr32(hw, 0xb4040, 0x4C104C5);
  1169. }
  1170. /**
  1171. * i40iw_initialize_dev - initialize device
  1172. * @iwdev: iwarp device
  1173. * @ldev: lan device information
  1174. *
  1175. * Allocate memory for the hmc objects and initialize iwdev
  1176. * Return 0 if successful, otherwise clean up the resources
  1177. * and return error
  1178. */
  1179. static enum i40iw_status_code i40iw_initialize_dev(struct i40iw_device *iwdev,
  1180. struct i40e_info *ldev)
  1181. {
  1182. enum i40iw_status_code status;
  1183. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  1184. struct i40iw_device_init_info info;
  1185. struct i40iw_vsi_init_info vsi_info;
  1186. struct i40iw_dma_mem mem;
  1187. struct i40iw_l2params l2params;
  1188. u32 size;
  1189. struct i40iw_vsi_stats_info stats_info;
  1190. u16 last_qset = I40IW_NO_QSET;
  1191. u16 qset;
  1192. u32 i;
  1193. memset(&l2params, 0, sizeof(l2params));
  1194. memset(&info, 0, sizeof(info));
  1195. size = sizeof(struct i40iw_hmc_pble_rsrc) + sizeof(struct i40iw_hmc_info) +
  1196. (sizeof(struct i40iw_hmc_obj_info) * I40IW_HMC_IW_MAX);
  1197. iwdev->hmc_info_mem = kzalloc(size, GFP_KERNEL);
  1198. if (!iwdev->hmc_info_mem)
  1199. return I40IW_ERR_NO_MEMORY;
  1200. iwdev->pble_rsrc = (struct i40iw_hmc_pble_rsrc *)iwdev->hmc_info_mem;
  1201. dev->hmc_info = &iwdev->hw.hmc;
  1202. dev->hmc_info->hmc_obj = (struct i40iw_hmc_obj_info *)(iwdev->pble_rsrc + 1);
  1203. status = i40iw_obj_aligned_mem(iwdev, &mem, I40IW_QUERY_FPM_BUF_SIZE,
  1204. I40IW_FPM_QUERY_BUF_ALIGNMENT_MASK);
  1205. if (status)
  1206. goto error;
  1207. info.fpm_query_buf_pa = mem.pa;
  1208. info.fpm_query_buf = mem.va;
  1209. status = i40iw_obj_aligned_mem(iwdev, &mem, I40IW_COMMIT_FPM_BUF_SIZE,
  1210. I40IW_FPM_COMMIT_BUF_ALIGNMENT_MASK);
  1211. if (status)
  1212. goto error;
  1213. info.fpm_commit_buf_pa = mem.pa;
  1214. info.fpm_commit_buf = mem.va;
  1215. info.hmc_fn_id = ldev->fid;
  1216. info.is_pf = (ldev->ftype) ? false : true;
  1217. info.bar0 = ldev->hw_addr;
  1218. info.hw = &iwdev->hw;
  1219. info.debug_mask = debug;
  1220. l2params.mtu =
  1221. (ldev->params.mtu) ? ldev->params.mtu : I40IW_DEFAULT_MTU;
  1222. for (i = 0; i < I40E_CLIENT_MAX_USER_PRIORITY; i++) {
  1223. qset = ldev->params.qos.prio_qos[i].qs_handle;
  1224. l2params.qs_handle_list[i] = qset;
  1225. if (last_qset == I40IW_NO_QSET)
  1226. last_qset = qset;
  1227. else if ((qset != last_qset) && (qset != I40IW_NO_QSET))
  1228. iwdev->dcb = true;
  1229. }
  1230. i40iw_pr_info("DCB is set/clear = %d\n", iwdev->dcb);
  1231. info.vchnl_send = i40iw_virtchnl_send;
  1232. status = i40iw_device_init(&iwdev->sc_dev, &info);
  1233. if (status)
  1234. goto error;
  1235. memset(&vsi_info, 0, sizeof(vsi_info));
  1236. vsi_info.dev = &iwdev->sc_dev;
  1237. vsi_info.back_vsi = (void *)iwdev;
  1238. vsi_info.params = &l2params;
  1239. vsi_info.exception_lan_queue = 1;
  1240. i40iw_sc_vsi_init(&iwdev->vsi, &vsi_info);
  1241. if (dev->is_pf) {
  1242. memset(&stats_info, 0, sizeof(stats_info));
  1243. stats_info.fcn_id = ldev->fid;
  1244. stats_info.pestat = kzalloc(sizeof(*stats_info.pestat), GFP_KERNEL);
  1245. if (!stats_info.pestat) {
  1246. status = I40IW_ERR_NO_MEMORY;
  1247. goto error;
  1248. }
  1249. stats_info.stats_initialize = true;
  1250. if (stats_info.pestat)
  1251. i40iw_vsi_stats_init(&iwdev->vsi, &stats_info);
  1252. }
  1253. return status;
  1254. error:
  1255. kfree(iwdev->hmc_info_mem);
  1256. iwdev->hmc_info_mem = NULL;
  1257. return status;
  1258. }
  1259. /**
  1260. * i40iw_register_notifiers - register tcp ip notifiers
  1261. */
  1262. static void i40iw_register_notifiers(void)
  1263. {
  1264. register_inetaddr_notifier(&i40iw_inetaddr_notifier);
  1265. register_inet6addr_notifier(&i40iw_inetaddr6_notifier);
  1266. register_netevent_notifier(&i40iw_net_notifier);
  1267. register_netdevice_notifier(&i40iw_netdevice_notifier);
  1268. }
  1269. /**
  1270. * i40iw_unregister_notifiers - unregister tcp ip notifiers
  1271. */
  1272. static void i40iw_unregister_notifiers(void)
  1273. {
  1274. unregister_netevent_notifier(&i40iw_net_notifier);
  1275. unregister_inetaddr_notifier(&i40iw_inetaddr_notifier);
  1276. unregister_inet6addr_notifier(&i40iw_inetaddr6_notifier);
  1277. unregister_netdevice_notifier(&i40iw_netdevice_notifier);
  1278. }
  1279. /**
  1280. * i40iw_save_msix_info - copy msix vector information to iwarp device
  1281. * @iwdev: iwarp device
  1282. * @ldev: lan device information
  1283. *
  1284. * Allocate iwdev msix table and copy the ldev msix info to the table
  1285. * Return 0 if successful, otherwise return error
  1286. */
  1287. static enum i40iw_status_code i40iw_save_msix_info(struct i40iw_device *iwdev,
  1288. struct i40e_info *ldev)
  1289. {
  1290. struct i40e_qvlist_info *iw_qvlist;
  1291. struct i40e_qv_info *iw_qvinfo;
  1292. u32 ceq_idx;
  1293. u32 i;
  1294. u32 size;
  1295. if (!ldev->msix_count) {
  1296. i40iw_pr_err("No MSI-X vectors\n");
  1297. return I40IW_ERR_CONFIG;
  1298. }
  1299. iwdev->msix_count = ldev->msix_count;
  1300. size = sizeof(struct i40iw_msix_vector) * iwdev->msix_count;
  1301. size += sizeof(struct i40e_qvlist_info);
  1302. size += sizeof(struct i40e_qv_info) * iwdev->msix_count - 1;
  1303. iwdev->iw_msixtbl = kzalloc(size, GFP_KERNEL);
  1304. if (!iwdev->iw_msixtbl)
  1305. return I40IW_ERR_NO_MEMORY;
  1306. iwdev->iw_qvlist = (struct i40e_qvlist_info *)(&iwdev->iw_msixtbl[iwdev->msix_count]);
  1307. iw_qvlist = iwdev->iw_qvlist;
  1308. iw_qvinfo = iw_qvlist->qv_info;
  1309. iw_qvlist->num_vectors = iwdev->msix_count;
  1310. if (iwdev->msix_count <= num_online_cpus())
  1311. iwdev->msix_shared = true;
  1312. for (i = 0, ceq_idx = 0; i < iwdev->msix_count; i++, iw_qvinfo++) {
  1313. iwdev->iw_msixtbl[i].idx = ldev->msix_entries[i].entry;
  1314. iwdev->iw_msixtbl[i].irq = ldev->msix_entries[i].vector;
  1315. iwdev->iw_msixtbl[i].cpu_affinity = ceq_idx;
  1316. if (i == 0) {
  1317. iw_qvinfo->aeq_idx = 0;
  1318. if (iwdev->msix_shared)
  1319. iw_qvinfo->ceq_idx = ceq_idx++;
  1320. else
  1321. iw_qvinfo->ceq_idx = I40E_QUEUE_INVALID_IDX;
  1322. } else {
  1323. iw_qvinfo->aeq_idx = I40E_QUEUE_INVALID_IDX;
  1324. iw_qvinfo->ceq_idx = ceq_idx++;
  1325. }
  1326. iw_qvinfo->itr_idx = 3;
  1327. iw_qvinfo->v_idx = iwdev->iw_msixtbl[i].idx;
  1328. }
  1329. return 0;
  1330. }
  1331. /**
  1332. * i40iw_deinit_device - clean up the device resources
  1333. * @iwdev: iwarp device
  1334. *
  1335. * Destroy the ib device interface, remove the mac ip entry and ipv4/ipv6 addresses,
  1336. * destroy the device queues and free the pble and the hmc objects
  1337. */
  1338. static void i40iw_deinit_device(struct i40iw_device *iwdev)
  1339. {
  1340. struct i40e_info *ldev = iwdev->ldev;
  1341. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  1342. i40iw_pr_info("state = %d\n", iwdev->init_state);
  1343. if (iwdev->param_wq)
  1344. destroy_workqueue(iwdev->param_wq);
  1345. switch (iwdev->init_state) {
  1346. case RDMA_DEV_REGISTERED:
  1347. iwdev->iw_status = 0;
  1348. i40iw_port_ibevent(iwdev);
  1349. i40iw_destroy_rdma_device(iwdev->iwibdev);
  1350. /* fallthrough */
  1351. case IP_ADDR_REGISTERED:
  1352. if (!iwdev->reset)
  1353. i40iw_del_macip_entry(iwdev, (u8)iwdev->mac_ip_table_idx);
  1354. /* fallthrough */
  1355. /* fallthrough */
  1356. case PBLE_CHUNK_MEM:
  1357. i40iw_destroy_pble_pool(dev, iwdev->pble_rsrc);
  1358. /* fallthrough */
  1359. case CEQ_CREATED:
  1360. i40iw_dele_ceqs(iwdev);
  1361. /* fallthrough */
  1362. case AEQ_CREATED:
  1363. i40iw_destroy_aeq(iwdev);
  1364. /* fallthrough */
  1365. case IEQ_CREATED:
  1366. i40iw_puda_dele_resources(&iwdev->vsi, I40IW_PUDA_RSRC_TYPE_IEQ, iwdev->reset);
  1367. /* fallthrough */
  1368. case ILQ_CREATED:
  1369. i40iw_puda_dele_resources(&iwdev->vsi, I40IW_PUDA_RSRC_TYPE_ILQ, iwdev->reset);
  1370. /* fallthrough */
  1371. case CCQ_CREATED:
  1372. i40iw_destroy_ccq(iwdev);
  1373. /* fallthrough */
  1374. case HMC_OBJS_CREATED:
  1375. i40iw_del_hmc_objects(dev, dev->hmc_info, true, iwdev->reset);
  1376. /* fallthrough */
  1377. case CQP_CREATED:
  1378. i40iw_destroy_cqp(iwdev, true);
  1379. /* fallthrough */
  1380. case INITIAL_STATE:
  1381. i40iw_cleanup_cm_core(&iwdev->cm_core);
  1382. if (iwdev->vsi.pestat) {
  1383. i40iw_vsi_stats_free(&iwdev->vsi);
  1384. kfree(iwdev->vsi.pestat);
  1385. }
  1386. i40iw_del_init_mem(iwdev);
  1387. break;
  1388. case INVALID_STATE:
  1389. /* fallthrough */
  1390. default:
  1391. i40iw_pr_err("bad init_state = %d\n", iwdev->init_state);
  1392. break;
  1393. }
  1394. i40iw_del_handler(i40iw_find_i40e_handler(ldev));
  1395. kfree(iwdev->hdl);
  1396. }
  1397. /**
  1398. * i40iw_setup_init_state - set up the initial device struct
  1399. * @hdl: handler for iwarp device - one per instance
  1400. * @ldev: lan device information
  1401. * @client: iwarp client information, provided during registration
  1402. *
  1403. * Initialize the iwarp device and its hdl information
  1404. * using the ldev and client information
  1405. * Return 0 if successful, otherwise return error
  1406. */
  1407. static enum i40iw_status_code i40iw_setup_init_state(struct i40iw_handler *hdl,
  1408. struct i40e_info *ldev,
  1409. struct i40e_client *client)
  1410. {
  1411. struct i40iw_device *iwdev = &hdl->device;
  1412. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  1413. enum i40iw_status_code status;
  1414. memcpy(&hdl->ldev, ldev, sizeof(*ldev));
  1415. iwdev->mpa_version = mpa_version;
  1416. iwdev->resource_profile = (resource_profile < I40IW_HMC_PROFILE_EQUAL) ?
  1417. (u8)resource_profile + I40IW_HMC_PROFILE_DEFAULT :
  1418. I40IW_HMC_PROFILE_DEFAULT;
  1419. iwdev->max_rdma_vfs =
  1420. (iwdev->resource_profile != I40IW_HMC_PROFILE_DEFAULT) ? max_rdma_vfs : 0;
  1421. iwdev->max_enabled_vfs = iwdev->max_rdma_vfs;
  1422. iwdev->netdev = ldev->netdev;
  1423. hdl->client = client;
  1424. if (!ldev->ftype)
  1425. iwdev->db_start = pci_resource_start(ldev->pcidev, 0) + I40IW_DB_ADDR_OFFSET;
  1426. else
  1427. iwdev->db_start = pci_resource_start(ldev->pcidev, 0) + I40IW_VF_DB_ADDR_OFFSET;
  1428. status = i40iw_save_msix_info(iwdev, ldev);
  1429. if (status)
  1430. return status;
  1431. iwdev->hw.dev_context = (void *)ldev->pcidev;
  1432. iwdev->hw.hw_addr = ldev->hw_addr;
  1433. status = i40iw_allocate_dma_mem(&iwdev->hw,
  1434. &iwdev->obj_mem, 8192, 4096);
  1435. if (status)
  1436. goto exit;
  1437. iwdev->obj_next = iwdev->obj_mem;
  1438. iwdev->push_mode = push_mode;
  1439. init_waitqueue_head(&iwdev->vchnl_waitq);
  1440. init_waitqueue_head(&dev->vf_reqs);
  1441. init_waitqueue_head(&iwdev->close_wq);
  1442. status = i40iw_initialize_dev(iwdev, ldev);
  1443. exit:
  1444. if (status) {
  1445. kfree(iwdev->iw_msixtbl);
  1446. i40iw_free_dma_mem(dev->hw, &iwdev->obj_mem);
  1447. iwdev->iw_msixtbl = NULL;
  1448. }
  1449. return status;
  1450. }
  1451. /**
  1452. * i40iw_get_used_rsrc - determine resources used internally
  1453. * @iwdev: iwarp device
  1454. *
  1455. * Called after internal allocations
  1456. */
  1457. static void i40iw_get_used_rsrc(struct i40iw_device *iwdev)
  1458. {
  1459. iwdev->used_pds = find_next_zero_bit(iwdev->allocated_pds, iwdev->max_pd, 0);
  1460. iwdev->used_qps = find_next_zero_bit(iwdev->allocated_qps, iwdev->max_qp, 0);
  1461. iwdev->used_cqs = find_next_zero_bit(iwdev->allocated_cqs, iwdev->max_cq, 0);
  1462. iwdev->used_mrs = find_next_zero_bit(iwdev->allocated_mrs, iwdev->max_mr, 0);
  1463. }
  1464. /**
  1465. * i40iw_open - client interface operation open for iwarp/uda device
  1466. * @ldev: lan device information
  1467. * @client: iwarp client information, provided during registration
  1468. *
  1469. * Called by the lan driver during the processing of client register
  1470. * Create device resources, set up queues, pble and hmc objects and
  1471. * register the device with the ib verbs interface
  1472. * Return 0 if successful, otherwise return error
  1473. */
  1474. static int i40iw_open(struct i40e_info *ldev, struct i40e_client *client)
  1475. {
  1476. struct i40iw_device *iwdev;
  1477. struct i40iw_sc_dev *dev;
  1478. enum i40iw_status_code status;
  1479. struct i40iw_handler *hdl;
  1480. hdl = i40iw_find_netdev(ldev->netdev);
  1481. if (hdl)
  1482. return 0;
  1483. hdl = kzalloc(sizeof(*hdl), GFP_KERNEL);
  1484. if (!hdl)
  1485. return -ENOMEM;
  1486. iwdev = &hdl->device;
  1487. iwdev->hdl = hdl;
  1488. dev = &iwdev->sc_dev;
  1489. i40iw_setup_cm_core(iwdev);
  1490. dev->back_dev = (void *)iwdev;
  1491. iwdev->ldev = &hdl->ldev;
  1492. iwdev->client = client;
  1493. mutex_init(&iwdev->pbl_mutex);
  1494. i40iw_add_handler(hdl);
  1495. do {
  1496. status = i40iw_setup_init_state(hdl, ldev, client);
  1497. if (status)
  1498. break;
  1499. iwdev->init_state = INITIAL_STATE;
  1500. if (dev->is_pf)
  1501. i40iw_wait_pe_ready(dev->hw);
  1502. status = i40iw_create_cqp(iwdev);
  1503. if (status)
  1504. break;
  1505. iwdev->init_state = CQP_CREATED;
  1506. status = i40iw_hmc_setup(iwdev);
  1507. if (status)
  1508. break;
  1509. status = i40iw_create_ccq(iwdev);
  1510. if (status)
  1511. break;
  1512. iwdev->init_state = CCQ_CREATED;
  1513. status = i40iw_initialize_ilq(iwdev);
  1514. if (status)
  1515. break;
  1516. iwdev->init_state = ILQ_CREATED;
  1517. status = i40iw_initialize_ieq(iwdev);
  1518. if (status)
  1519. break;
  1520. iwdev->init_state = IEQ_CREATED;
  1521. status = i40iw_setup_aeq(iwdev);
  1522. if (status)
  1523. break;
  1524. iwdev->init_state = AEQ_CREATED;
  1525. status = i40iw_setup_ceqs(iwdev, ldev);
  1526. if (status)
  1527. break;
  1528. iwdev->init_state = CEQ_CREATED;
  1529. status = i40iw_initialize_hw_resources(iwdev);
  1530. if (status)
  1531. break;
  1532. i40iw_get_used_rsrc(iwdev);
  1533. dev->ccq_ops->ccq_arm(dev->ccq);
  1534. status = i40iw_hmc_init_pble(&iwdev->sc_dev, iwdev->pble_rsrc);
  1535. if (status)
  1536. break;
  1537. iwdev->init_state = PBLE_CHUNK_MEM;
  1538. iwdev->virtchnl_wq = alloc_ordered_workqueue("iwvch", WQ_MEM_RECLAIM);
  1539. status = i40iw_add_mac_ip(iwdev);
  1540. if (status)
  1541. break;
  1542. iwdev->init_state = IP_ADDR_REGISTERED;
  1543. if (i40iw_register_rdma_device(iwdev)) {
  1544. i40iw_pr_err("register rdma device fail\n");
  1545. break;
  1546. };
  1547. iwdev->init_state = RDMA_DEV_REGISTERED;
  1548. iwdev->iw_status = 1;
  1549. i40iw_port_ibevent(iwdev);
  1550. iwdev->param_wq = alloc_ordered_workqueue("l2params", WQ_MEM_RECLAIM);
  1551. if(iwdev->param_wq == NULL)
  1552. break;
  1553. i40iw_pr_info("i40iw_open completed\n");
  1554. return 0;
  1555. } while (0);
  1556. i40iw_pr_err("status = %d last completion = %d\n", status, iwdev->init_state);
  1557. i40iw_deinit_device(iwdev);
  1558. return -ERESTART;
  1559. }
  1560. /**
  1561. * i40iw_l2params_worker - worker for l2 params change
  1562. * @work: work pointer for l2 params
  1563. */
  1564. static void i40iw_l2params_worker(struct work_struct *work)
  1565. {
  1566. struct l2params_work *dwork =
  1567. container_of(work, struct l2params_work, work);
  1568. struct i40iw_device *iwdev = dwork->iwdev;
  1569. i40iw_change_l2params(&iwdev->vsi, &dwork->l2params);
  1570. atomic_dec(&iwdev->params_busy);
  1571. kfree(work);
  1572. }
  1573. /**
  1574. * i40iw_l2param_change - handle qs handles for qos and mss change
  1575. * @ldev: lan device information
  1576. * @client: client for paramater change
  1577. * @params: new parameters from L2
  1578. */
  1579. static void i40iw_l2param_change(struct i40e_info *ldev, struct i40e_client *client,
  1580. struct i40e_params *params)
  1581. {
  1582. struct i40iw_handler *hdl;
  1583. struct i40iw_l2params *l2params;
  1584. struct l2params_work *work;
  1585. struct i40iw_device *iwdev;
  1586. int i;
  1587. hdl = i40iw_find_i40e_handler(ldev);
  1588. if (!hdl)
  1589. return;
  1590. iwdev = &hdl->device;
  1591. if (atomic_read(&iwdev->params_busy))
  1592. return;
  1593. work = kzalloc(sizeof(*work), GFP_KERNEL);
  1594. if (!work)
  1595. return;
  1596. atomic_inc(&iwdev->params_busy);
  1597. work->iwdev = iwdev;
  1598. l2params = &work->l2params;
  1599. for (i = 0; i < I40E_CLIENT_MAX_USER_PRIORITY; i++)
  1600. l2params->qs_handle_list[i] = params->qos.prio_qos[i].qs_handle;
  1601. l2params->mtu = (params->mtu) ? params->mtu : iwdev->vsi.mtu;
  1602. INIT_WORK(&work->work, i40iw_l2params_worker);
  1603. queue_work(iwdev->param_wq, &work->work);
  1604. }
  1605. /**
  1606. * i40iw_close - client interface operation close for iwarp/uda device
  1607. * @ldev: lan device information
  1608. * @client: client to close
  1609. *
  1610. * Called by the lan driver during the processing of client unregister
  1611. * Destroy and clean up the driver resources
  1612. */
  1613. static void i40iw_close(struct i40e_info *ldev, struct i40e_client *client, bool reset)
  1614. {
  1615. struct i40iw_device *iwdev;
  1616. struct i40iw_handler *hdl;
  1617. hdl = i40iw_find_i40e_handler(ldev);
  1618. if (!hdl)
  1619. return;
  1620. iwdev = &hdl->device;
  1621. iwdev->closing = true;
  1622. if (reset)
  1623. iwdev->reset = true;
  1624. i40iw_cm_teardown_connections(iwdev, NULL, NULL, true);
  1625. destroy_workqueue(iwdev->virtchnl_wq);
  1626. i40iw_deinit_device(iwdev);
  1627. }
  1628. /**
  1629. * i40iw_vf_reset - process VF reset
  1630. * @ldev: lan device information
  1631. * @client: client interface instance
  1632. * @vf_id: virtual function id
  1633. *
  1634. * Called when a VF is reset by the PF
  1635. * Destroy and clean up the VF resources
  1636. */
  1637. static void i40iw_vf_reset(struct i40e_info *ldev, struct i40e_client *client, u32 vf_id)
  1638. {
  1639. struct i40iw_handler *hdl;
  1640. struct i40iw_sc_dev *dev;
  1641. struct i40iw_hmc_fcn_info hmc_fcn_info;
  1642. struct i40iw_virt_mem vf_dev_mem;
  1643. struct i40iw_vfdev *tmp_vfdev;
  1644. unsigned int i;
  1645. unsigned long flags;
  1646. struct i40iw_device *iwdev;
  1647. hdl = i40iw_find_i40e_handler(ldev);
  1648. if (!hdl)
  1649. return;
  1650. dev = &hdl->device.sc_dev;
  1651. iwdev = (struct i40iw_device *)dev->back_dev;
  1652. for (i = 0; i < I40IW_MAX_PE_ENABLED_VF_COUNT; i++) {
  1653. if (!dev->vf_dev[i] || (dev->vf_dev[i]->vf_id != vf_id))
  1654. continue;
  1655. /* free all resources allocated on behalf of vf */
  1656. tmp_vfdev = dev->vf_dev[i];
  1657. spin_lock_irqsave(&iwdev->vsi.pestat->lock, flags);
  1658. dev->vf_dev[i] = NULL;
  1659. spin_unlock_irqrestore(&iwdev->vsi.pestat->lock, flags);
  1660. i40iw_del_hmc_objects(dev, &tmp_vfdev->hmc_info, false, false);
  1661. /* remove vf hmc function */
  1662. memset(&hmc_fcn_info, 0, sizeof(hmc_fcn_info));
  1663. hmc_fcn_info.vf_id = vf_id;
  1664. hmc_fcn_info.iw_vf_idx = tmp_vfdev->iw_vf_idx;
  1665. hmc_fcn_info.free_fcn = true;
  1666. i40iw_cqp_manage_hmc_fcn_cmd(dev, &hmc_fcn_info);
  1667. /* free vf_dev */
  1668. vf_dev_mem.va = tmp_vfdev;
  1669. vf_dev_mem.size = sizeof(struct i40iw_vfdev) +
  1670. sizeof(struct i40iw_hmc_obj_info) * I40IW_HMC_IW_MAX;
  1671. i40iw_free_virt_mem(dev->hw, &vf_dev_mem);
  1672. break;
  1673. }
  1674. }
  1675. /**
  1676. * i40iw_vf_enable - enable a number of VFs
  1677. * @ldev: lan device information
  1678. * @client: client interface instance
  1679. * @num_vfs: number of VFs for the PF
  1680. *
  1681. * Called when the number of VFs changes
  1682. */
  1683. static void i40iw_vf_enable(struct i40e_info *ldev,
  1684. struct i40e_client *client,
  1685. u32 num_vfs)
  1686. {
  1687. struct i40iw_handler *hdl;
  1688. hdl = i40iw_find_i40e_handler(ldev);
  1689. if (!hdl)
  1690. return;
  1691. if (num_vfs > I40IW_MAX_PE_ENABLED_VF_COUNT)
  1692. hdl->device.max_enabled_vfs = I40IW_MAX_PE_ENABLED_VF_COUNT;
  1693. else
  1694. hdl->device.max_enabled_vfs = num_vfs;
  1695. }
  1696. /**
  1697. * i40iw_vf_capable - check if VF capable
  1698. * @ldev: lan device information
  1699. * @client: client interface instance
  1700. * @vf_id: virtual function id
  1701. *
  1702. * Return 1 if a VF slot is available or if VF is already RDMA enabled
  1703. * Return 0 otherwise
  1704. */
  1705. static int i40iw_vf_capable(struct i40e_info *ldev,
  1706. struct i40e_client *client,
  1707. u32 vf_id)
  1708. {
  1709. struct i40iw_handler *hdl;
  1710. struct i40iw_sc_dev *dev;
  1711. unsigned int i;
  1712. hdl = i40iw_find_i40e_handler(ldev);
  1713. if (!hdl)
  1714. return 0;
  1715. dev = &hdl->device.sc_dev;
  1716. for (i = 0; i < hdl->device.max_enabled_vfs; i++) {
  1717. if (!dev->vf_dev[i] || (dev->vf_dev[i]->vf_id == vf_id))
  1718. return 1;
  1719. }
  1720. return 0;
  1721. }
  1722. /**
  1723. * i40iw_virtchnl_receive - receive a message through the virtual channel
  1724. * @ldev: lan device information
  1725. * @client: client interface instance
  1726. * @vf_id: virtual function id associated with the message
  1727. * @msg: message buffer pointer
  1728. * @len: length of the message
  1729. *
  1730. * Invoke virtual channel receive operation for the given msg
  1731. * Return 0 if successful, otherwise return error
  1732. */
  1733. static int i40iw_virtchnl_receive(struct i40e_info *ldev,
  1734. struct i40e_client *client,
  1735. u32 vf_id,
  1736. u8 *msg,
  1737. u16 len)
  1738. {
  1739. struct i40iw_handler *hdl;
  1740. struct i40iw_sc_dev *dev;
  1741. struct i40iw_device *iwdev;
  1742. int ret_code = I40IW_NOT_SUPPORTED;
  1743. if (!len || !msg)
  1744. return I40IW_ERR_PARAM;
  1745. hdl = i40iw_find_i40e_handler(ldev);
  1746. if (!hdl)
  1747. return I40IW_ERR_PARAM;
  1748. dev = &hdl->device.sc_dev;
  1749. iwdev = dev->back_dev;
  1750. if (dev->vchnl_if.vchnl_recv) {
  1751. ret_code = dev->vchnl_if.vchnl_recv(dev, vf_id, msg, len);
  1752. if (!dev->is_pf) {
  1753. atomic_dec(&iwdev->vchnl_msgs);
  1754. wake_up(&iwdev->vchnl_waitq);
  1755. }
  1756. }
  1757. return ret_code;
  1758. }
  1759. /**
  1760. * i40iw_vf_clear_to_send - wait to send virtual channel message
  1761. * @dev: iwarp device *
  1762. * Wait for until virtual channel is clear
  1763. * before sending the next message
  1764. *
  1765. * Returns false if error
  1766. * Returns true if clear to send
  1767. */
  1768. bool i40iw_vf_clear_to_send(struct i40iw_sc_dev *dev)
  1769. {
  1770. struct i40iw_device *iwdev;
  1771. wait_queue_entry_t wait;
  1772. iwdev = dev->back_dev;
  1773. if (!wq_has_sleeper(&dev->vf_reqs) &&
  1774. (atomic_read(&iwdev->vchnl_msgs) == 0))
  1775. return true; /* virtual channel is clear */
  1776. init_wait(&wait);
  1777. add_wait_queue_exclusive(&dev->vf_reqs, &wait);
  1778. if (!wait_event_timeout(dev->vf_reqs,
  1779. (atomic_read(&iwdev->vchnl_msgs) == 0),
  1780. I40IW_VCHNL_EVENT_TIMEOUT))
  1781. dev->vchnl_up = false;
  1782. remove_wait_queue(&dev->vf_reqs, &wait);
  1783. return dev->vchnl_up;
  1784. }
  1785. /**
  1786. * i40iw_virtchnl_send - send a message through the virtual channel
  1787. * @dev: iwarp device
  1788. * @vf_id: virtual function id associated with the message
  1789. * @msg: virtual channel message buffer pointer
  1790. * @len: length of the message
  1791. *
  1792. * Invoke virtual channel send operation for the given msg
  1793. * Return 0 if successful, otherwise return error
  1794. */
  1795. static enum i40iw_status_code i40iw_virtchnl_send(struct i40iw_sc_dev *dev,
  1796. u32 vf_id,
  1797. u8 *msg,
  1798. u16 len)
  1799. {
  1800. struct i40iw_device *iwdev;
  1801. struct i40e_info *ldev;
  1802. if (!dev || !dev->back_dev)
  1803. return I40IW_ERR_BAD_PTR;
  1804. iwdev = dev->back_dev;
  1805. ldev = iwdev->ldev;
  1806. if (ldev && ldev->ops && ldev->ops->virtchnl_send)
  1807. return ldev->ops->virtchnl_send(ldev, &i40iw_client, vf_id, msg, len);
  1808. return I40IW_ERR_BAD_PTR;
  1809. }
  1810. /* client interface functions */
  1811. static const struct i40e_client_ops i40e_ops = {
  1812. .open = i40iw_open,
  1813. .close = i40iw_close,
  1814. .l2_param_change = i40iw_l2param_change,
  1815. .virtchnl_receive = i40iw_virtchnl_receive,
  1816. .vf_reset = i40iw_vf_reset,
  1817. .vf_enable = i40iw_vf_enable,
  1818. .vf_capable = i40iw_vf_capable
  1819. };
  1820. /**
  1821. * i40iw_init_module - driver initialization function
  1822. *
  1823. * First function to call when the driver is loaded
  1824. * Register the driver as i40e client and port mapper client
  1825. */
  1826. static int __init i40iw_init_module(void)
  1827. {
  1828. int ret;
  1829. memset(&i40iw_client, 0, sizeof(i40iw_client));
  1830. i40iw_client.version.major = CLIENT_IW_INTERFACE_VERSION_MAJOR;
  1831. i40iw_client.version.minor = CLIENT_IW_INTERFACE_VERSION_MINOR;
  1832. i40iw_client.version.build = CLIENT_IW_INTERFACE_VERSION_BUILD;
  1833. i40iw_client.ops = &i40e_ops;
  1834. memcpy(i40iw_client.name, i40iw_client_name, I40E_CLIENT_STR_LENGTH);
  1835. i40iw_client.type = I40E_CLIENT_IWARP;
  1836. spin_lock_init(&i40iw_handler_lock);
  1837. ret = i40e_register_client(&i40iw_client);
  1838. i40iw_register_notifiers();
  1839. return ret;
  1840. }
  1841. /**
  1842. * i40iw_exit_module - driver exit clean up function
  1843. *
  1844. * The function is called just before the driver is unloaded
  1845. * Unregister the driver as i40e client and port mapper client
  1846. */
  1847. static void __exit i40iw_exit_module(void)
  1848. {
  1849. i40iw_unregister_notifiers();
  1850. i40e_unregister_client(&i40iw_client);
  1851. }
  1852. module_init(i40iw_init_module);
  1853. module_exit(i40iw_exit_module);