rc.c 67 KB

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  1. /*
  2. * Copyright(c) 2015 - 2018 Intel Corporation.
  3. *
  4. * This file is provided under a dual BSD/GPLv2 license. When using or
  5. * redistributing this file, you may do so under either license.
  6. *
  7. * GPL LICENSE SUMMARY
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * BSD LICENSE
  19. *
  20. * Redistribution and use in source and binary forms, with or without
  21. * modification, are permitted provided that the following conditions
  22. * are met:
  23. *
  24. * - Redistributions of source code must retain the above copyright
  25. * notice, this list of conditions and the following disclaimer.
  26. * - Redistributions in binary form must reproduce the above copyright
  27. * notice, this list of conditions and the following disclaimer in
  28. * the documentation and/or other materials provided with the
  29. * distribution.
  30. * - Neither the name of Intel Corporation nor the names of its
  31. * contributors may be used to endorse or promote products derived
  32. * from this software without specific prior written permission.
  33. *
  34. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45. *
  46. */
  47. #include <linux/io.h>
  48. #include <rdma/rdma_vt.h>
  49. #include <rdma/rdmavt_qp.h>
  50. #include "hfi.h"
  51. #include "qp.h"
  52. #include "verbs_txreq.h"
  53. #include "trace.h"
  54. /* cut down ridiculously long IB macro names */
  55. #define OP(x) RC_OP(x)
  56. static u32 restart_sge(struct rvt_sge_state *ss, struct rvt_swqe *wqe,
  57. u32 psn, u32 pmtu)
  58. {
  59. u32 len;
  60. len = delta_psn(psn, wqe->psn) * pmtu;
  61. ss->sge = wqe->sg_list[0];
  62. ss->sg_list = wqe->sg_list + 1;
  63. ss->num_sge = wqe->wr.num_sge;
  64. ss->total_len = wqe->length;
  65. rvt_skip_sge(ss, len, false);
  66. return wqe->length - len;
  67. }
  68. /**
  69. * make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  70. * @dev: the device for this QP
  71. * @qp: a pointer to the QP
  72. * @ohdr: a pointer to the IB header being constructed
  73. * @ps: the xmit packet state
  74. *
  75. * Return 1 if constructed; otherwise, return 0.
  76. * Note that we are in the responder's side of the QP context.
  77. * Note the QP s_lock must be held.
  78. */
  79. static int make_rc_ack(struct hfi1_ibdev *dev, struct rvt_qp *qp,
  80. struct ib_other_headers *ohdr,
  81. struct hfi1_pkt_state *ps)
  82. {
  83. struct rvt_ack_entry *e;
  84. u32 hwords;
  85. u32 len;
  86. u32 bth0;
  87. u32 bth2;
  88. int middle = 0;
  89. u32 pmtu = qp->pmtu;
  90. struct hfi1_qp_priv *priv = qp->priv;
  91. lockdep_assert_held(&qp->s_lock);
  92. /* Don't send an ACK if we aren't supposed to. */
  93. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  94. goto bail;
  95. if (priv->hdr_type == HFI1_PKT_TYPE_9B)
  96. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  97. hwords = 5;
  98. else
  99. /* header size in 32-bit words 16B LRH+BTH = (16+12)/4. */
  100. hwords = 7;
  101. switch (qp->s_ack_state) {
  102. case OP(RDMA_READ_RESPONSE_LAST):
  103. case OP(RDMA_READ_RESPONSE_ONLY):
  104. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  105. if (e->rdma_sge.mr) {
  106. rvt_put_mr(e->rdma_sge.mr);
  107. e->rdma_sge.mr = NULL;
  108. }
  109. /* FALLTHROUGH */
  110. case OP(ATOMIC_ACKNOWLEDGE):
  111. /*
  112. * We can increment the tail pointer now that the last
  113. * response has been sent instead of only being
  114. * constructed.
  115. */
  116. if (++qp->s_tail_ack_queue > HFI1_MAX_RDMA_ATOMIC)
  117. qp->s_tail_ack_queue = 0;
  118. /* FALLTHROUGH */
  119. case OP(SEND_ONLY):
  120. case OP(ACKNOWLEDGE):
  121. /* Check for no next entry in the queue. */
  122. if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
  123. if (qp->s_flags & RVT_S_ACK_PENDING)
  124. goto normal;
  125. goto bail;
  126. }
  127. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  128. if (e->opcode == OP(RDMA_READ_REQUEST)) {
  129. /*
  130. * If a RDMA read response is being resent and
  131. * we haven't seen the duplicate request yet,
  132. * then stop sending the remaining responses the
  133. * responder has seen until the requester re-sends it.
  134. */
  135. len = e->rdma_sge.sge_length;
  136. if (len && !e->rdma_sge.mr) {
  137. qp->s_tail_ack_queue = qp->r_head_ack_queue;
  138. goto bail;
  139. }
  140. /* Copy SGE state in case we need to resend */
  141. ps->s_txreq->mr = e->rdma_sge.mr;
  142. if (ps->s_txreq->mr)
  143. rvt_get_mr(ps->s_txreq->mr);
  144. qp->s_ack_rdma_sge.sge = e->rdma_sge;
  145. qp->s_ack_rdma_sge.num_sge = 1;
  146. ps->s_txreq->ss = &qp->s_ack_rdma_sge;
  147. if (len > pmtu) {
  148. len = pmtu;
  149. qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
  150. } else {
  151. qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
  152. e->sent = 1;
  153. }
  154. ohdr->u.aeth = rvt_compute_aeth(qp);
  155. hwords++;
  156. qp->s_ack_rdma_psn = e->psn;
  157. bth2 = mask_psn(qp->s_ack_rdma_psn++);
  158. } else {
  159. /* COMPARE_SWAP or FETCH_ADD */
  160. ps->s_txreq->ss = NULL;
  161. len = 0;
  162. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  163. ohdr->u.at.aeth = rvt_compute_aeth(qp);
  164. ib_u64_put(e->atomic_data, &ohdr->u.at.atomic_ack_eth);
  165. hwords += sizeof(ohdr->u.at) / sizeof(u32);
  166. bth2 = mask_psn(e->psn);
  167. e->sent = 1;
  168. }
  169. bth0 = qp->s_ack_state << 24;
  170. break;
  171. case OP(RDMA_READ_RESPONSE_FIRST):
  172. qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  173. /* FALLTHROUGH */
  174. case OP(RDMA_READ_RESPONSE_MIDDLE):
  175. ps->s_txreq->ss = &qp->s_ack_rdma_sge;
  176. ps->s_txreq->mr = qp->s_ack_rdma_sge.sge.mr;
  177. if (ps->s_txreq->mr)
  178. rvt_get_mr(ps->s_txreq->mr);
  179. len = qp->s_ack_rdma_sge.sge.sge_length;
  180. if (len > pmtu) {
  181. len = pmtu;
  182. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  183. } else {
  184. ohdr->u.aeth = rvt_compute_aeth(qp);
  185. hwords++;
  186. qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
  187. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  188. e->sent = 1;
  189. }
  190. bth0 = qp->s_ack_state << 24;
  191. bth2 = mask_psn(qp->s_ack_rdma_psn++);
  192. break;
  193. default:
  194. normal:
  195. /*
  196. * Send a regular ACK.
  197. * Set the s_ack_state so we wait until after sending
  198. * the ACK before setting s_ack_state to ACKNOWLEDGE
  199. * (see above).
  200. */
  201. qp->s_ack_state = OP(SEND_ONLY);
  202. qp->s_flags &= ~RVT_S_ACK_PENDING;
  203. ps->s_txreq->ss = NULL;
  204. if (qp->s_nak_state)
  205. ohdr->u.aeth =
  206. cpu_to_be32((qp->r_msn & IB_MSN_MASK) |
  207. (qp->s_nak_state <<
  208. IB_AETH_CREDIT_SHIFT));
  209. else
  210. ohdr->u.aeth = rvt_compute_aeth(qp);
  211. hwords++;
  212. len = 0;
  213. bth0 = OP(ACKNOWLEDGE) << 24;
  214. bth2 = mask_psn(qp->s_ack_psn);
  215. }
  216. qp->s_rdma_ack_cnt++;
  217. ps->s_txreq->sde = priv->s_sde;
  218. ps->s_txreq->s_cur_size = len;
  219. ps->s_txreq->hdr_dwords = hwords;
  220. hfi1_make_ruc_header(qp, ohdr, bth0, bth2, middle, ps);
  221. return 1;
  222. bail:
  223. qp->s_ack_state = OP(ACKNOWLEDGE);
  224. /*
  225. * Ensure s_rdma_ack_cnt changes are committed prior to resetting
  226. * RVT_S_RESP_PENDING
  227. */
  228. smp_wmb();
  229. qp->s_flags &= ~(RVT_S_RESP_PENDING
  230. | RVT_S_ACK_PENDING
  231. | HFI1_S_AHG_VALID);
  232. return 0;
  233. }
  234. /**
  235. * hfi1_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
  236. * @qp: a pointer to the QP
  237. *
  238. * Assumes s_lock is held.
  239. *
  240. * Return 1 if constructed; otherwise, return 0.
  241. */
  242. int hfi1_make_rc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
  243. {
  244. struct hfi1_qp_priv *priv = qp->priv;
  245. struct hfi1_ibdev *dev = to_idev(qp->ibqp.device);
  246. struct ib_other_headers *ohdr;
  247. struct rvt_sge_state *ss;
  248. struct rvt_swqe *wqe;
  249. u32 hwords;
  250. u32 len;
  251. u32 bth0 = 0;
  252. u32 bth2;
  253. u32 pmtu = qp->pmtu;
  254. char newreq;
  255. int middle = 0;
  256. int delta;
  257. lockdep_assert_held(&qp->s_lock);
  258. ps->s_txreq = get_txreq(ps->dev, qp);
  259. if (!ps->s_txreq)
  260. goto bail_no_tx;
  261. if (priv->hdr_type == HFI1_PKT_TYPE_9B) {
  262. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  263. hwords = 5;
  264. if (rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH)
  265. ohdr = &ps->s_txreq->phdr.hdr.ibh.u.l.oth;
  266. else
  267. ohdr = &ps->s_txreq->phdr.hdr.ibh.u.oth;
  268. } else {
  269. /* header size in 32-bit words 16B LRH+BTH = (16+12)/4. */
  270. hwords = 7;
  271. if ((rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH) &&
  272. (hfi1_check_mcast(rdma_ah_get_dlid(&qp->remote_ah_attr))))
  273. ohdr = &ps->s_txreq->phdr.hdr.opah.u.l.oth;
  274. else
  275. ohdr = &ps->s_txreq->phdr.hdr.opah.u.oth;
  276. }
  277. /* Sending responses has higher priority over sending requests. */
  278. if ((qp->s_flags & RVT_S_RESP_PENDING) &&
  279. make_rc_ack(dev, qp, ohdr, ps))
  280. return 1;
  281. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) {
  282. if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND))
  283. goto bail;
  284. /* We are in the error state, flush the work request. */
  285. if (qp->s_last == READ_ONCE(qp->s_head))
  286. goto bail;
  287. /* If DMAs are in progress, we can't flush immediately. */
  288. if (iowait_sdma_pending(&priv->s_iowait)) {
  289. qp->s_flags |= RVT_S_WAIT_DMA;
  290. goto bail;
  291. }
  292. clear_ahg(qp);
  293. wqe = rvt_get_swqe_ptr(qp, qp->s_last);
  294. hfi1_send_complete(qp, wqe, qp->s_last != qp->s_acked ?
  295. IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR);
  296. /* will get called again */
  297. goto done_free_tx;
  298. }
  299. if (qp->s_flags & (RVT_S_WAIT_RNR | RVT_S_WAIT_ACK))
  300. goto bail;
  301. if (cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) {
  302. if (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) {
  303. qp->s_flags |= RVT_S_WAIT_PSN;
  304. goto bail;
  305. }
  306. qp->s_sending_psn = qp->s_psn;
  307. qp->s_sending_hpsn = qp->s_psn - 1;
  308. }
  309. /* Send a request. */
  310. wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
  311. switch (qp->s_state) {
  312. default:
  313. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_NEXT_SEND_OK))
  314. goto bail;
  315. /*
  316. * Resend an old request or start a new one.
  317. *
  318. * We keep track of the current SWQE so that
  319. * we don't reset the "furthest progress" state
  320. * if we need to back up.
  321. */
  322. newreq = 0;
  323. if (qp->s_cur == qp->s_tail) {
  324. /* Check if send work queue is empty. */
  325. if (qp->s_tail == READ_ONCE(qp->s_head)) {
  326. clear_ahg(qp);
  327. goto bail;
  328. }
  329. /*
  330. * If a fence is requested, wait for previous
  331. * RDMA read and atomic operations to finish.
  332. */
  333. if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
  334. qp->s_num_rd_atomic) {
  335. qp->s_flags |= RVT_S_WAIT_FENCE;
  336. goto bail;
  337. }
  338. /*
  339. * Local operations are processed immediately
  340. * after all prior requests have completed
  341. */
  342. if (wqe->wr.opcode == IB_WR_REG_MR ||
  343. wqe->wr.opcode == IB_WR_LOCAL_INV) {
  344. int local_ops = 0;
  345. int err = 0;
  346. if (qp->s_last != qp->s_cur)
  347. goto bail;
  348. if (++qp->s_cur == qp->s_size)
  349. qp->s_cur = 0;
  350. if (++qp->s_tail == qp->s_size)
  351. qp->s_tail = 0;
  352. if (!(wqe->wr.send_flags &
  353. RVT_SEND_COMPLETION_ONLY)) {
  354. err = rvt_invalidate_rkey(
  355. qp,
  356. wqe->wr.ex.invalidate_rkey);
  357. local_ops = 1;
  358. }
  359. hfi1_send_complete(qp, wqe,
  360. err ? IB_WC_LOC_PROT_ERR
  361. : IB_WC_SUCCESS);
  362. if (local_ops)
  363. atomic_dec(&qp->local_ops_pending);
  364. goto done_free_tx;
  365. }
  366. newreq = 1;
  367. qp->s_psn = wqe->psn;
  368. }
  369. /*
  370. * Note that we have to be careful not to modify the
  371. * original work request since we may need to resend
  372. * it.
  373. */
  374. len = wqe->length;
  375. ss = &qp->s_sge;
  376. bth2 = mask_psn(qp->s_psn);
  377. switch (wqe->wr.opcode) {
  378. case IB_WR_SEND:
  379. case IB_WR_SEND_WITH_IMM:
  380. case IB_WR_SEND_WITH_INV:
  381. /* If no credit, return. */
  382. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
  383. rvt_cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
  384. qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
  385. goto bail;
  386. }
  387. if (len > pmtu) {
  388. qp->s_state = OP(SEND_FIRST);
  389. len = pmtu;
  390. break;
  391. }
  392. if (wqe->wr.opcode == IB_WR_SEND) {
  393. qp->s_state = OP(SEND_ONLY);
  394. } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
  395. qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
  396. /* Immediate data comes after the BTH */
  397. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  398. hwords += 1;
  399. } else {
  400. qp->s_state = OP(SEND_ONLY_WITH_INVALIDATE);
  401. /* Invalidate rkey comes after the BTH */
  402. ohdr->u.ieth = cpu_to_be32(
  403. wqe->wr.ex.invalidate_rkey);
  404. hwords += 1;
  405. }
  406. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  407. bth0 |= IB_BTH_SOLICITED;
  408. bth2 |= IB_BTH_REQ_ACK;
  409. if (++qp->s_cur == qp->s_size)
  410. qp->s_cur = 0;
  411. break;
  412. case IB_WR_RDMA_WRITE:
  413. if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  414. qp->s_lsn++;
  415. goto no_flow_control;
  416. case IB_WR_RDMA_WRITE_WITH_IMM:
  417. /* If no credit, return. */
  418. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
  419. rvt_cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
  420. qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
  421. goto bail;
  422. }
  423. no_flow_control:
  424. put_ib_reth_vaddr(
  425. wqe->rdma_wr.remote_addr,
  426. &ohdr->u.rc.reth);
  427. ohdr->u.rc.reth.rkey =
  428. cpu_to_be32(wqe->rdma_wr.rkey);
  429. ohdr->u.rc.reth.length = cpu_to_be32(len);
  430. hwords += sizeof(struct ib_reth) / sizeof(u32);
  431. if (len > pmtu) {
  432. qp->s_state = OP(RDMA_WRITE_FIRST);
  433. len = pmtu;
  434. break;
  435. }
  436. if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
  437. qp->s_state = OP(RDMA_WRITE_ONLY);
  438. } else {
  439. qp->s_state =
  440. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  441. /* Immediate data comes after RETH */
  442. ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
  443. hwords += 1;
  444. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  445. bth0 |= IB_BTH_SOLICITED;
  446. }
  447. bth2 |= IB_BTH_REQ_ACK;
  448. if (++qp->s_cur == qp->s_size)
  449. qp->s_cur = 0;
  450. break;
  451. case IB_WR_RDMA_READ:
  452. /*
  453. * Don't allow more operations to be started
  454. * than the QP limits allow.
  455. */
  456. if (newreq) {
  457. if (qp->s_num_rd_atomic >=
  458. qp->s_max_rd_atomic) {
  459. qp->s_flags |= RVT_S_WAIT_RDMAR;
  460. goto bail;
  461. }
  462. qp->s_num_rd_atomic++;
  463. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  464. qp->s_lsn++;
  465. }
  466. put_ib_reth_vaddr(
  467. wqe->rdma_wr.remote_addr,
  468. &ohdr->u.rc.reth);
  469. ohdr->u.rc.reth.rkey =
  470. cpu_to_be32(wqe->rdma_wr.rkey);
  471. ohdr->u.rc.reth.length = cpu_to_be32(len);
  472. qp->s_state = OP(RDMA_READ_REQUEST);
  473. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  474. ss = NULL;
  475. len = 0;
  476. bth2 |= IB_BTH_REQ_ACK;
  477. if (++qp->s_cur == qp->s_size)
  478. qp->s_cur = 0;
  479. break;
  480. case IB_WR_ATOMIC_CMP_AND_SWP:
  481. case IB_WR_ATOMIC_FETCH_AND_ADD:
  482. /*
  483. * Don't allow more operations to be started
  484. * than the QP limits allow.
  485. */
  486. if (newreq) {
  487. if (qp->s_num_rd_atomic >=
  488. qp->s_max_rd_atomic) {
  489. qp->s_flags |= RVT_S_WAIT_RDMAR;
  490. goto bail;
  491. }
  492. qp->s_num_rd_atomic++;
  493. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  494. qp->s_lsn++;
  495. }
  496. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
  497. qp->s_state = OP(COMPARE_SWAP);
  498. put_ib_ateth_swap(wqe->atomic_wr.swap,
  499. &ohdr->u.atomic_eth);
  500. put_ib_ateth_compare(wqe->atomic_wr.compare_add,
  501. &ohdr->u.atomic_eth);
  502. } else {
  503. qp->s_state = OP(FETCH_ADD);
  504. put_ib_ateth_swap(wqe->atomic_wr.compare_add,
  505. &ohdr->u.atomic_eth);
  506. put_ib_ateth_compare(0, &ohdr->u.atomic_eth);
  507. }
  508. put_ib_ateth_vaddr(wqe->atomic_wr.remote_addr,
  509. &ohdr->u.atomic_eth);
  510. ohdr->u.atomic_eth.rkey = cpu_to_be32(
  511. wqe->atomic_wr.rkey);
  512. hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
  513. ss = NULL;
  514. len = 0;
  515. bth2 |= IB_BTH_REQ_ACK;
  516. if (++qp->s_cur == qp->s_size)
  517. qp->s_cur = 0;
  518. break;
  519. default:
  520. goto bail;
  521. }
  522. qp->s_sge.sge = wqe->sg_list[0];
  523. qp->s_sge.sg_list = wqe->sg_list + 1;
  524. qp->s_sge.num_sge = wqe->wr.num_sge;
  525. qp->s_sge.total_len = wqe->length;
  526. qp->s_len = wqe->length;
  527. if (newreq) {
  528. qp->s_tail++;
  529. if (qp->s_tail >= qp->s_size)
  530. qp->s_tail = 0;
  531. }
  532. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  533. qp->s_psn = wqe->lpsn + 1;
  534. else
  535. qp->s_psn++;
  536. break;
  537. case OP(RDMA_READ_RESPONSE_FIRST):
  538. /*
  539. * qp->s_state is normally set to the opcode of the
  540. * last packet constructed for new requests and therefore
  541. * is never set to RDMA read response.
  542. * RDMA_READ_RESPONSE_FIRST is used by the ACK processing
  543. * thread to indicate a SEND needs to be restarted from an
  544. * earlier PSN without interfering with the sending thread.
  545. * See restart_rc().
  546. */
  547. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
  548. /* FALLTHROUGH */
  549. case OP(SEND_FIRST):
  550. qp->s_state = OP(SEND_MIDDLE);
  551. /* FALLTHROUGH */
  552. case OP(SEND_MIDDLE):
  553. bth2 = mask_psn(qp->s_psn++);
  554. ss = &qp->s_sge;
  555. len = qp->s_len;
  556. if (len > pmtu) {
  557. len = pmtu;
  558. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  559. break;
  560. }
  561. if (wqe->wr.opcode == IB_WR_SEND) {
  562. qp->s_state = OP(SEND_LAST);
  563. } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
  564. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  565. /* Immediate data comes after the BTH */
  566. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  567. hwords += 1;
  568. } else {
  569. qp->s_state = OP(SEND_LAST_WITH_INVALIDATE);
  570. /* invalidate data comes after the BTH */
  571. ohdr->u.ieth = cpu_to_be32(wqe->wr.ex.invalidate_rkey);
  572. hwords += 1;
  573. }
  574. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  575. bth0 |= IB_BTH_SOLICITED;
  576. bth2 |= IB_BTH_REQ_ACK;
  577. qp->s_cur++;
  578. if (qp->s_cur >= qp->s_size)
  579. qp->s_cur = 0;
  580. break;
  581. case OP(RDMA_READ_RESPONSE_LAST):
  582. /*
  583. * qp->s_state is normally set to the opcode of the
  584. * last packet constructed for new requests and therefore
  585. * is never set to RDMA read response.
  586. * RDMA_READ_RESPONSE_LAST is used by the ACK processing
  587. * thread to indicate a RDMA write needs to be restarted from
  588. * an earlier PSN without interfering with the sending thread.
  589. * See restart_rc().
  590. */
  591. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
  592. /* FALLTHROUGH */
  593. case OP(RDMA_WRITE_FIRST):
  594. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  595. /* FALLTHROUGH */
  596. case OP(RDMA_WRITE_MIDDLE):
  597. bth2 = mask_psn(qp->s_psn++);
  598. ss = &qp->s_sge;
  599. len = qp->s_len;
  600. if (len > pmtu) {
  601. len = pmtu;
  602. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  603. break;
  604. }
  605. if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
  606. qp->s_state = OP(RDMA_WRITE_LAST);
  607. } else {
  608. qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  609. /* Immediate data comes after the BTH */
  610. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  611. hwords += 1;
  612. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  613. bth0 |= IB_BTH_SOLICITED;
  614. }
  615. bth2 |= IB_BTH_REQ_ACK;
  616. qp->s_cur++;
  617. if (qp->s_cur >= qp->s_size)
  618. qp->s_cur = 0;
  619. break;
  620. case OP(RDMA_READ_RESPONSE_MIDDLE):
  621. /*
  622. * qp->s_state is normally set to the opcode of the
  623. * last packet constructed for new requests and therefore
  624. * is never set to RDMA read response.
  625. * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing
  626. * thread to indicate a RDMA read needs to be restarted from
  627. * an earlier PSN without interfering with the sending thread.
  628. * See restart_rc().
  629. */
  630. len = (delta_psn(qp->s_psn, wqe->psn)) * pmtu;
  631. put_ib_reth_vaddr(
  632. wqe->rdma_wr.remote_addr + len,
  633. &ohdr->u.rc.reth);
  634. ohdr->u.rc.reth.rkey =
  635. cpu_to_be32(wqe->rdma_wr.rkey);
  636. ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len);
  637. qp->s_state = OP(RDMA_READ_REQUEST);
  638. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  639. bth2 = mask_psn(qp->s_psn) | IB_BTH_REQ_ACK;
  640. qp->s_psn = wqe->lpsn + 1;
  641. ss = NULL;
  642. len = 0;
  643. qp->s_cur++;
  644. if (qp->s_cur == qp->s_size)
  645. qp->s_cur = 0;
  646. break;
  647. }
  648. qp->s_sending_hpsn = bth2;
  649. delta = delta_psn(bth2, wqe->psn);
  650. if (delta && delta % HFI1_PSN_CREDIT == 0)
  651. bth2 |= IB_BTH_REQ_ACK;
  652. if (qp->s_flags & RVT_S_SEND_ONE) {
  653. qp->s_flags &= ~RVT_S_SEND_ONE;
  654. qp->s_flags |= RVT_S_WAIT_ACK;
  655. bth2 |= IB_BTH_REQ_ACK;
  656. }
  657. qp->s_len -= len;
  658. ps->s_txreq->hdr_dwords = hwords;
  659. ps->s_txreq->sde = priv->s_sde;
  660. ps->s_txreq->ss = ss;
  661. ps->s_txreq->s_cur_size = len;
  662. hfi1_make_ruc_header(
  663. qp,
  664. ohdr,
  665. bth0 | (qp->s_state << 24),
  666. bth2,
  667. middle,
  668. ps);
  669. return 1;
  670. done_free_tx:
  671. hfi1_put_txreq(ps->s_txreq);
  672. ps->s_txreq = NULL;
  673. return 1;
  674. bail:
  675. hfi1_put_txreq(ps->s_txreq);
  676. bail_no_tx:
  677. ps->s_txreq = NULL;
  678. qp->s_flags &= ~RVT_S_BUSY;
  679. return 0;
  680. }
  681. static inline void hfi1_make_bth_aeth(struct rvt_qp *qp,
  682. struct ib_other_headers *ohdr,
  683. u32 bth0, u32 bth1)
  684. {
  685. if (qp->r_nak_state)
  686. ohdr->u.aeth = cpu_to_be32((qp->r_msn & IB_MSN_MASK) |
  687. (qp->r_nak_state <<
  688. IB_AETH_CREDIT_SHIFT));
  689. else
  690. ohdr->u.aeth = rvt_compute_aeth(qp);
  691. ohdr->bth[0] = cpu_to_be32(bth0);
  692. ohdr->bth[1] = cpu_to_be32(bth1 | qp->remote_qpn);
  693. ohdr->bth[2] = cpu_to_be32(mask_psn(qp->r_ack_psn));
  694. }
  695. static inline void hfi1_queue_rc_ack(struct hfi1_packet *packet, bool is_fecn)
  696. {
  697. struct rvt_qp *qp = packet->qp;
  698. struct hfi1_ibport *ibp;
  699. unsigned long flags;
  700. spin_lock_irqsave(&qp->s_lock, flags);
  701. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  702. goto unlock;
  703. ibp = rcd_to_iport(packet->rcd);
  704. this_cpu_inc(*ibp->rvp.rc_qacks);
  705. qp->s_flags |= RVT_S_ACK_PENDING | RVT_S_RESP_PENDING;
  706. qp->s_nak_state = qp->r_nak_state;
  707. qp->s_ack_psn = qp->r_ack_psn;
  708. if (is_fecn)
  709. qp->s_flags |= RVT_S_ECN;
  710. /* Schedule the send tasklet. */
  711. hfi1_schedule_send(qp);
  712. unlock:
  713. spin_unlock_irqrestore(&qp->s_lock, flags);
  714. }
  715. static inline void hfi1_make_rc_ack_9B(struct hfi1_packet *packet,
  716. struct hfi1_opa_header *opa_hdr,
  717. u8 sc5, bool is_fecn,
  718. u64 *pbc_flags, u32 *hwords,
  719. u32 *nwords)
  720. {
  721. struct rvt_qp *qp = packet->qp;
  722. struct hfi1_ibport *ibp = rcd_to_iport(packet->rcd);
  723. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  724. struct ib_header *hdr = &opa_hdr->ibh;
  725. struct ib_other_headers *ohdr;
  726. u16 lrh0 = HFI1_LRH_BTH;
  727. u16 pkey;
  728. u32 bth0, bth1;
  729. opa_hdr->hdr_type = HFI1_PKT_TYPE_9B;
  730. ohdr = &hdr->u.oth;
  731. /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4 */
  732. *hwords = 6;
  733. if (unlikely(rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH)) {
  734. *hwords += hfi1_make_grh(ibp, &hdr->u.l.grh,
  735. rdma_ah_read_grh(&qp->remote_ah_attr),
  736. *hwords - 2, SIZE_OF_CRC);
  737. ohdr = &hdr->u.l.oth;
  738. lrh0 = HFI1_LRH_GRH;
  739. }
  740. /* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
  741. *pbc_flags |= ((!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT);
  742. /* read pkey_index w/o lock (its atomic) */
  743. pkey = hfi1_get_pkey(ibp, qp->s_pkey_index);
  744. lrh0 |= (sc5 & IB_SC_MASK) << IB_SC_SHIFT |
  745. (rdma_ah_get_sl(&qp->remote_ah_attr) & IB_SL_MASK) <<
  746. IB_SL_SHIFT;
  747. hfi1_make_ib_hdr(hdr, lrh0, *hwords + SIZE_OF_CRC,
  748. opa_get_lid(rdma_ah_get_dlid(&qp->remote_ah_attr), 9B),
  749. ppd->lid | rdma_ah_get_path_bits(&qp->remote_ah_attr));
  750. bth0 = pkey | (OP(ACKNOWLEDGE) << 24);
  751. if (qp->s_mig_state == IB_MIG_MIGRATED)
  752. bth0 |= IB_BTH_MIG_REQ;
  753. bth1 = (!!is_fecn) << IB_BECN_SHIFT;
  754. hfi1_make_bth_aeth(qp, ohdr, bth0, bth1);
  755. }
  756. static inline void hfi1_make_rc_ack_16B(struct hfi1_packet *packet,
  757. struct hfi1_opa_header *opa_hdr,
  758. u8 sc5, bool is_fecn,
  759. u64 *pbc_flags, u32 *hwords,
  760. u32 *nwords)
  761. {
  762. struct rvt_qp *qp = packet->qp;
  763. struct hfi1_ibport *ibp = rcd_to_iport(packet->rcd);
  764. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  765. struct hfi1_16b_header *hdr = &opa_hdr->opah;
  766. struct ib_other_headers *ohdr;
  767. u32 bth0, bth1 = 0;
  768. u16 len, pkey;
  769. bool becn = is_fecn;
  770. u8 l4 = OPA_16B_L4_IB_LOCAL;
  771. u8 extra_bytes;
  772. opa_hdr->hdr_type = HFI1_PKT_TYPE_16B;
  773. ohdr = &hdr->u.oth;
  774. /* header size in 32-bit words 16B LRH+BTH+AETH = (16+12+4)/4 */
  775. *hwords = 8;
  776. extra_bytes = hfi1_get_16b_padding(*hwords << 2, 0);
  777. *nwords = SIZE_OF_CRC + ((extra_bytes + SIZE_OF_LT) >> 2);
  778. if (unlikely(rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH) &&
  779. hfi1_check_mcast(rdma_ah_get_dlid(&qp->remote_ah_attr))) {
  780. *hwords += hfi1_make_grh(ibp, &hdr->u.l.grh,
  781. rdma_ah_read_grh(&qp->remote_ah_attr),
  782. *hwords - 4, *nwords);
  783. ohdr = &hdr->u.l.oth;
  784. l4 = OPA_16B_L4_IB_GLOBAL;
  785. }
  786. *pbc_flags |= PBC_PACKET_BYPASS | PBC_INSERT_BYPASS_ICRC;
  787. /* read pkey_index w/o lock (its atomic) */
  788. pkey = hfi1_get_pkey(ibp, qp->s_pkey_index);
  789. /* Convert dwords to flits */
  790. len = (*hwords + *nwords) >> 1;
  791. hfi1_make_16b_hdr(hdr, ppd->lid |
  792. (rdma_ah_get_path_bits(&qp->remote_ah_attr) &
  793. ((1 << ppd->lmc) - 1)),
  794. opa_get_lid(rdma_ah_get_dlid(&qp->remote_ah_attr),
  795. 16B), len, pkey, becn, 0, l4, sc5);
  796. bth0 = pkey | (OP(ACKNOWLEDGE) << 24);
  797. bth0 |= extra_bytes << 20;
  798. if (qp->s_mig_state == IB_MIG_MIGRATED)
  799. bth1 = OPA_BTH_MIG_REQ;
  800. hfi1_make_bth_aeth(qp, ohdr, bth0, bth1);
  801. }
  802. typedef void (*hfi1_make_rc_ack)(struct hfi1_packet *packet,
  803. struct hfi1_opa_header *opa_hdr,
  804. u8 sc5, bool is_fecn,
  805. u64 *pbc_flags, u32 *hwords,
  806. u32 *nwords);
  807. /* We support only two types - 9B and 16B for now */
  808. static const hfi1_make_rc_ack hfi1_make_rc_ack_tbl[2] = {
  809. [HFI1_PKT_TYPE_9B] = &hfi1_make_rc_ack_9B,
  810. [HFI1_PKT_TYPE_16B] = &hfi1_make_rc_ack_16B
  811. };
  812. /**
  813. * hfi1_send_rc_ack - Construct an ACK packet and send it
  814. * @qp: a pointer to the QP
  815. *
  816. * This is called from hfi1_rc_rcv() and handle_receive_interrupt().
  817. * Note that RDMA reads and atomics are handled in the
  818. * send side QP state and send engine.
  819. */
  820. void hfi1_send_rc_ack(struct hfi1_packet *packet, bool is_fecn)
  821. {
  822. struct hfi1_ctxtdata *rcd = packet->rcd;
  823. struct rvt_qp *qp = packet->qp;
  824. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  825. struct hfi1_qp_priv *priv = qp->priv;
  826. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  827. u8 sc5 = ibp->sl_to_sc[rdma_ah_get_sl(&qp->remote_ah_attr)];
  828. u64 pbc, pbc_flags = 0;
  829. u32 hwords = 0;
  830. u32 nwords = 0;
  831. u32 plen;
  832. struct pio_buf *pbuf;
  833. struct hfi1_opa_header opa_hdr;
  834. /* clear the defer count */
  835. qp->r_adefered = 0;
  836. /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
  837. if (qp->s_flags & RVT_S_RESP_PENDING) {
  838. hfi1_queue_rc_ack(packet, is_fecn);
  839. return;
  840. }
  841. /* Ensure s_rdma_ack_cnt changes are committed */
  842. if (qp->s_rdma_ack_cnt) {
  843. hfi1_queue_rc_ack(packet, is_fecn);
  844. return;
  845. }
  846. /* Don't try to send ACKs if the link isn't ACTIVE */
  847. if (driver_lstate(ppd) != IB_PORT_ACTIVE)
  848. return;
  849. /* Make the appropriate header */
  850. hfi1_make_rc_ack_tbl[priv->hdr_type](packet, &opa_hdr, sc5, is_fecn,
  851. &pbc_flags, &hwords, &nwords);
  852. plen = 2 /* PBC */ + hwords + nwords;
  853. pbc = create_pbc(ppd, pbc_flags, qp->srate_mbps,
  854. sc_to_vlt(ppd->dd, sc5), plen);
  855. pbuf = sc_buffer_alloc(rcd->sc, plen, NULL, NULL);
  856. if (!pbuf) {
  857. /*
  858. * We have no room to send at the moment. Pass
  859. * responsibility for sending the ACK to the send engine
  860. * so that when enough buffer space becomes available,
  861. * the ACK is sent ahead of other outgoing packets.
  862. */
  863. hfi1_queue_rc_ack(packet, is_fecn);
  864. return;
  865. }
  866. trace_ack_output_ibhdr(dd_from_ibdev(qp->ibqp.device),
  867. &opa_hdr, ib_is_sc5(sc5));
  868. /* write the pbc and data */
  869. ppd->dd->pio_inline_send(ppd->dd, pbuf, pbc,
  870. (priv->hdr_type == HFI1_PKT_TYPE_9B ?
  871. (void *)&opa_hdr.ibh :
  872. (void *)&opa_hdr.opah), hwords);
  873. return;
  874. }
  875. /**
  876. * reset_psn - reset the QP state to send starting from PSN
  877. * @qp: the QP
  878. * @psn: the packet sequence number to restart at
  879. *
  880. * This is called from hfi1_rc_rcv() to process an incoming RC ACK
  881. * for the given QP.
  882. * Called at interrupt level with the QP s_lock held.
  883. */
  884. static void reset_psn(struct rvt_qp *qp, u32 psn)
  885. {
  886. u32 n = qp->s_acked;
  887. struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, n);
  888. u32 opcode;
  889. lockdep_assert_held(&qp->s_lock);
  890. qp->s_cur = n;
  891. /*
  892. * If we are starting the request from the beginning,
  893. * let the normal send code handle initialization.
  894. */
  895. if (cmp_psn(psn, wqe->psn) <= 0) {
  896. qp->s_state = OP(SEND_LAST);
  897. goto done;
  898. }
  899. /* Find the work request opcode corresponding to the given PSN. */
  900. opcode = wqe->wr.opcode;
  901. for (;;) {
  902. int diff;
  903. if (++n == qp->s_size)
  904. n = 0;
  905. if (n == qp->s_tail)
  906. break;
  907. wqe = rvt_get_swqe_ptr(qp, n);
  908. diff = cmp_psn(psn, wqe->psn);
  909. if (diff < 0)
  910. break;
  911. qp->s_cur = n;
  912. /*
  913. * If we are starting the request from the beginning,
  914. * let the normal send code handle initialization.
  915. */
  916. if (diff == 0) {
  917. qp->s_state = OP(SEND_LAST);
  918. goto done;
  919. }
  920. opcode = wqe->wr.opcode;
  921. }
  922. /*
  923. * Set the state to restart in the middle of a request.
  924. * Don't change the s_sge, s_cur_sge, or s_cur_size.
  925. * See hfi1_make_rc_req().
  926. */
  927. switch (opcode) {
  928. case IB_WR_SEND:
  929. case IB_WR_SEND_WITH_IMM:
  930. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  931. break;
  932. case IB_WR_RDMA_WRITE:
  933. case IB_WR_RDMA_WRITE_WITH_IMM:
  934. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  935. break;
  936. case IB_WR_RDMA_READ:
  937. qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  938. break;
  939. default:
  940. /*
  941. * This case shouldn't happen since its only
  942. * one PSN per req.
  943. */
  944. qp->s_state = OP(SEND_LAST);
  945. }
  946. done:
  947. qp->s_psn = psn;
  948. /*
  949. * Set RVT_S_WAIT_PSN as rc_complete() may start the timer
  950. * asynchronously before the send engine can get scheduled.
  951. * Doing it in hfi1_make_rc_req() is too late.
  952. */
  953. if ((cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
  954. (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
  955. qp->s_flags |= RVT_S_WAIT_PSN;
  956. qp->s_flags &= ~HFI1_S_AHG_VALID;
  957. }
  958. /*
  959. * Back up requester to resend the last un-ACKed request.
  960. * The QP r_lock and s_lock should be held and interrupts disabled.
  961. */
  962. void hfi1_restart_rc(struct rvt_qp *qp, u32 psn, int wait)
  963. {
  964. struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  965. struct hfi1_ibport *ibp;
  966. lockdep_assert_held(&qp->r_lock);
  967. lockdep_assert_held(&qp->s_lock);
  968. if (qp->s_retry == 0) {
  969. if (qp->s_mig_state == IB_MIG_ARMED) {
  970. hfi1_migrate_qp(qp);
  971. qp->s_retry = qp->s_retry_cnt;
  972. } else if (qp->s_last == qp->s_acked) {
  973. hfi1_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
  974. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  975. return;
  976. } else { /* need to handle delayed completion */
  977. return;
  978. }
  979. } else {
  980. qp->s_retry--;
  981. }
  982. ibp = to_iport(qp->ibqp.device, qp->port_num);
  983. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  984. ibp->rvp.n_rc_resends++;
  985. else
  986. ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
  987. qp->s_flags &= ~(RVT_S_WAIT_FENCE | RVT_S_WAIT_RDMAR |
  988. RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_PSN |
  989. RVT_S_WAIT_ACK);
  990. if (wait)
  991. qp->s_flags |= RVT_S_SEND_ONE;
  992. reset_psn(qp, psn);
  993. }
  994. /*
  995. * Set qp->s_sending_psn to the next PSN after the given one.
  996. * This would be psn+1 except when RDMA reads are present.
  997. */
  998. static void reset_sending_psn(struct rvt_qp *qp, u32 psn)
  999. {
  1000. struct rvt_swqe *wqe;
  1001. u32 n = qp->s_last;
  1002. lockdep_assert_held(&qp->s_lock);
  1003. /* Find the work request corresponding to the given PSN. */
  1004. for (;;) {
  1005. wqe = rvt_get_swqe_ptr(qp, n);
  1006. if (cmp_psn(psn, wqe->lpsn) <= 0) {
  1007. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  1008. qp->s_sending_psn = wqe->lpsn + 1;
  1009. else
  1010. qp->s_sending_psn = psn + 1;
  1011. break;
  1012. }
  1013. if (++n == qp->s_size)
  1014. n = 0;
  1015. if (n == qp->s_tail)
  1016. break;
  1017. }
  1018. }
  1019. /*
  1020. * This should be called with the QP s_lock held and interrupts disabled.
  1021. */
  1022. void hfi1_rc_send_complete(struct rvt_qp *qp, struct hfi1_opa_header *opah)
  1023. {
  1024. struct ib_other_headers *ohdr;
  1025. struct hfi1_qp_priv *priv = qp->priv;
  1026. struct rvt_swqe *wqe;
  1027. struct ib_header *hdr = NULL;
  1028. struct hfi1_16b_header *hdr_16b = NULL;
  1029. u32 opcode;
  1030. u32 psn;
  1031. lockdep_assert_held(&qp->s_lock);
  1032. if (!(ib_rvt_state_ops[qp->state] & RVT_SEND_OR_FLUSH_OR_RECV_OK))
  1033. return;
  1034. /* Find out where the BTH is */
  1035. if (priv->hdr_type == HFI1_PKT_TYPE_9B) {
  1036. hdr = &opah->ibh;
  1037. if (ib_get_lnh(hdr) == HFI1_LRH_BTH)
  1038. ohdr = &hdr->u.oth;
  1039. else
  1040. ohdr = &hdr->u.l.oth;
  1041. } else {
  1042. u8 l4;
  1043. hdr_16b = &opah->opah;
  1044. l4 = hfi1_16B_get_l4(hdr_16b);
  1045. if (l4 == OPA_16B_L4_IB_LOCAL)
  1046. ohdr = &hdr_16b->u.oth;
  1047. else
  1048. ohdr = &hdr_16b->u.l.oth;
  1049. }
  1050. opcode = ib_bth_get_opcode(ohdr);
  1051. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1052. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1053. WARN_ON(!qp->s_rdma_ack_cnt);
  1054. qp->s_rdma_ack_cnt--;
  1055. return;
  1056. }
  1057. psn = ib_bth_get_psn(ohdr);
  1058. reset_sending_psn(qp, psn);
  1059. /*
  1060. * Start timer after a packet requesting an ACK has been sent and
  1061. * there are still requests that haven't been acked.
  1062. */
  1063. if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail &&
  1064. !(qp->s_flags &
  1065. (RVT_S_TIMER | RVT_S_WAIT_RNR | RVT_S_WAIT_PSN)) &&
  1066. (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  1067. rvt_add_retry_timer(qp);
  1068. while (qp->s_last != qp->s_acked) {
  1069. u32 s_last;
  1070. wqe = rvt_get_swqe_ptr(qp, qp->s_last);
  1071. if (cmp_psn(wqe->lpsn, qp->s_sending_psn) >= 0 &&
  1072. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
  1073. break;
  1074. s_last = qp->s_last;
  1075. trace_hfi1_qp_send_completion(qp, wqe, s_last);
  1076. if (++s_last >= qp->s_size)
  1077. s_last = 0;
  1078. qp->s_last = s_last;
  1079. /* see post_send() */
  1080. barrier();
  1081. rvt_put_swqe(wqe);
  1082. rvt_qp_swqe_complete(qp,
  1083. wqe,
  1084. ib_hfi1_wc_opcode[wqe->wr.opcode],
  1085. IB_WC_SUCCESS);
  1086. }
  1087. /*
  1088. * If we were waiting for sends to complete before re-sending,
  1089. * and they are now complete, restart sending.
  1090. */
  1091. trace_hfi1_sendcomplete(qp, psn);
  1092. if (qp->s_flags & RVT_S_WAIT_PSN &&
  1093. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
  1094. qp->s_flags &= ~RVT_S_WAIT_PSN;
  1095. qp->s_sending_psn = qp->s_psn;
  1096. qp->s_sending_hpsn = qp->s_psn - 1;
  1097. hfi1_schedule_send(qp);
  1098. }
  1099. }
  1100. static inline void update_last_psn(struct rvt_qp *qp, u32 psn)
  1101. {
  1102. qp->s_last_psn = psn;
  1103. }
  1104. /*
  1105. * Generate a SWQE completion.
  1106. * This is similar to hfi1_send_complete but has to check to be sure
  1107. * that the SGEs are not being referenced if the SWQE is being resent.
  1108. */
  1109. static struct rvt_swqe *do_rc_completion(struct rvt_qp *qp,
  1110. struct rvt_swqe *wqe,
  1111. struct hfi1_ibport *ibp)
  1112. {
  1113. lockdep_assert_held(&qp->s_lock);
  1114. /*
  1115. * Don't decrement refcount and don't generate a
  1116. * completion if the SWQE is being resent until the send
  1117. * is finished.
  1118. */
  1119. if (cmp_psn(wqe->lpsn, qp->s_sending_psn) < 0 ||
  1120. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
  1121. u32 s_last;
  1122. rvt_put_swqe(wqe);
  1123. s_last = qp->s_last;
  1124. trace_hfi1_qp_send_completion(qp, wqe, s_last);
  1125. if (++s_last >= qp->s_size)
  1126. s_last = 0;
  1127. qp->s_last = s_last;
  1128. /* see post_send() */
  1129. barrier();
  1130. rvt_qp_swqe_complete(qp,
  1131. wqe,
  1132. ib_hfi1_wc_opcode[wqe->wr.opcode],
  1133. IB_WC_SUCCESS);
  1134. } else {
  1135. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  1136. this_cpu_inc(*ibp->rvp.rc_delayed_comp);
  1137. /*
  1138. * If send progress not running attempt to progress
  1139. * SDMA queue.
  1140. */
  1141. if (ppd->dd->flags & HFI1_HAS_SEND_DMA) {
  1142. struct sdma_engine *engine;
  1143. u8 sl = rdma_ah_get_sl(&qp->remote_ah_attr);
  1144. u8 sc5;
  1145. /* For now use sc to find engine */
  1146. sc5 = ibp->sl_to_sc[sl];
  1147. engine = qp_to_sdma_engine(qp, sc5);
  1148. sdma_engine_progress_schedule(engine);
  1149. }
  1150. }
  1151. qp->s_retry = qp->s_retry_cnt;
  1152. update_last_psn(qp, wqe->lpsn);
  1153. /*
  1154. * If we are completing a request which is in the process of
  1155. * being resent, we can stop re-sending it since we know the
  1156. * responder has already seen it.
  1157. */
  1158. if (qp->s_acked == qp->s_cur) {
  1159. if (++qp->s_cur >= qp->s_size)
  1160. qp->s_cur = 0;
  1161. qp->s_acked = qp->s_cur;
  1162. wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
  1163. if (qp->s_acked != qp->s_tail) {
  1164. qp->s_state = OP(SEND_LAST);
  1165. qp->s_psn = wqe->psn;
  1166. }
  1167. } else {
  1168. if (++qp->s_acked >= qp->s_size)
  1169. qp->s_acked = 0;
  1170. if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur)
  1171. qp->s_draining = 0;
  1172. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1173. }
  1174. return wqe;
  1175. }
  1176. /**
  1177. * do_rc_ack - process an incoming RC ACK
  1178. * @qp: the QP the ACK came in on
  1179. * @psn: the packet sequence number of the ACK
  1180. * @opcode: the opcode of the request that resulted in the ACK
  1181. *
  1182. * This is called from rc_rcv_resp() to process an incoming RC ACK
  1183. * for the given QP.
  1184. * May be called at interrupt level, with the QP s_lock held.
  1185. * Returns 1 if OK, 0 if current operation should be aborted (NAK).
  1186. */
  1187. static int do_rc_ack(struct rvt_qp *qp, u32 aeth, u32 psn, int opcode,
  1188. u64 val, struct hfi1_ctxtdata *rcd)
  1189. {
  1190. struct hfi1_ibport *ibp;
  1191. enum ib_wc_status status;
  1192. struct rvt_swqe *wqe;
  1193. int ret = 0;
  1194. u32 ack_psn;
  1195. int diff;
  1196. lockdep_assert_held(&qp->s_lock);
  1197. /*
  1198. * Note that NAKs implicitly ACK outstanding SEND and RDMA write
  1199. * requests and implicitly NAK RDMA read and atomic requests issued
  1200. * before the NAK'ed request. The MSN won't include the NAK'ed
  1201. * request but will include an ACK'ed request(s).
  1202. */
  1203. ack_psn = psn;
  1204. if (aeth >> IB_AETH_NAK_SHIFT)
  1205. ack_psn--;
  1206. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1207. ibp = rcd_to_iport(rcd);
  1208. /*
  1209. * The MSN might be for a later WQE than the PSN indicates so
  1210. * only complete WQEs that the PSN finishes.
  1211. */
  1212. while ((diff = delta_psn(ack_psn, wqe->lpsn)) >= 0) {
  1213. /*
  1214. * RDMA_READ_RESPONSE_ONLY is a special case since
  1215. * we want to generate completion events for everything
  1216. * before the RDMA read, copy the data, then generate
  1217. * the completion for the read.
  1218. */
  1219. if (wqe->wr.opcode == IB_WR_RDMA_READ &&
  1220. opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
  1221. diff == 0) {
  1222. ret = 1;
  1223. goto bail_stop;
  1224. }
  1225. /*
  1226. * If this request is a RDMA read or atomic, and the ACK is
  1227. * for a later operation, this ACK NAKs the RDMA read or
  1228. * atomic. In other words, only a RDMA_READ_LAST or ONLY
  1229. * can ACK a RDMA read and likewise for atomic ops. Note
  1230. * that the NAK case can only happen if relaxed ordering is
  1231. * used and requests are sent after an RDMA read or atomic
  1232. * is sent but before the response is received.
  1233. */
  1234. if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
  1235. (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
  1236. ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1237. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
  1238. (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
  1239. /* Retry this request. */
  1240. if (!(qp->r_flags & RVT_R_RDMAR_SEQ)) {
  1241. qp->r_flags |= RVT_R_RDMAR_SEQ;
  1242. hfi1_restart_rc(qp, qp->s_last_psn + 1, 0);
  1243. if (list_empty(&qp->rspwait)) {
  1244. qp->r_flags |= RVT_R_RSP_SEND;
  1245. rvt_get_qp(qp);
  1246. list_add_tail(&qp->rspwait,
  1247. &rcd->qp_wait_list);
  1248. }
  1249. }
  1250. /*
  1251. * No need to process the ACK/NAK since we are
  1252. * restarting an earlier request.
  1253. */
  1254. goto bail_stop;
  1255. }
  1256. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1257. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
  1258. u64 *vaddr = wqe->sg_list[0].vaddr;
  1259. *vaddr = val;
  1260. }
  1261. if (qp->s_num_rd_atomic &&
  1262. (wqe->wr.opcode == IB_WR_RDMA_READ ||
  1263. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1264. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
  1265. qp->s_num_rd_atomic--;
  1266. /* Restart sending task if fence is complete */
  1267. if ((qp->s_flags & RVT_S_WAIT_FENCE) &&
  1268. !qp->s_num_rd_atomic) {
  1269. qp->s_flags &= ~(RVT_S_WAIT_FENCE |
  1270. RVT_S_WAIT_ACK);
  1271. hfi1_schedule_send(qp);
  1272. } else if (qp->s_flags & RVT_S_WAIT_RDMAR) {
  1273. qp->s_flags &= ~(RVT_S_WAIT_RDMAR |
  1274. RVT_S_WAIT_ACK);
  1275. hfi1_schedule_send(qp);
  1276. }
  1277. }
  1278. wqe = do_rc_completion(qp, wqe, ibp);
  1279. if (qp->s_acked == qp->s_tail)
  1280. break;
  1281. }
  1282. switch (aeth >> IB_AETH_NAK_SHIFT) {
  1283. case 0: /* ACK */
  1284. this_cpu_inc(*ibp->rvp.rc_acks);
  1285. if (qp->s_acked != qp->s_tail) {
  1286. /*
  1287. * We are expecting more ACKs so
  1288. * mod the retry timer.
  1289. */
  1290. rvt_mod_retry_timer(qp);
  1291. /*
  1292. * We can stop re-sending the earlier packets and
  1293. * continue with the next packet the receiver wants.
  1294. */
  1295. if (cmp_psn(qp->s_psn, psn) <= 0)
  1296. reset_psn(qp, psn + 1);
  1297. } else {
  1298. /* No more acks - kill all timers */
  1299. rvt_stop_rc_timers(qp);
  1300. if (cmp_psn(qp->s_psn, psn) <= 0) {
  1301. qp->s_state = OP(SEND_LAST);
  1302. qp->s_psn = psn + 1;
  1303. }
  1304. }
  1305. if (qp->s_flags & RVT_S_WAIT_ACK) {
  1306. qp->s_flags &= ~RVT_S_WAIT_ACK;
  1307. hfi1_schedule_send(qp);
  1308. }
  1309. rvt_get_credit(qp, aeth);
  1310. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1311. qp->s_retry = qp->s_retry_cnt;
  1312. update_last_psn(qp, psn);
  1313. return 1;
  1314. case 1: /* RNR NAK */
  1315. ibp->rvp.n_rnr_naks++;
  1316. if (qp->s_acked == qp->s_tail)
  1317. goto bail_stop;
  1318. if (qp->s_flags & RVT_S_WAIT_RNR)
  1319. goto bail_stop;
  1320. if (qp->s_rnr_retry == 0) {
  1321. status = IB_WC_RNR_RETRY_EXC_ERR;
  1322. goto class_b;
  1323. }
  1324. if (qp->s_rnr_retry_cnt < 7)
  1325. qp->s_rnr_retry--;
  1326. /* The last valid PSN is the previous PSN. */
  1327. update_last_psn(qp, psn - 1);
  1328. ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
  1329. reset_psn(qp, psn);
  1330. qp->s_flags &= ~(RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_ACK);
  1331. rvt_stop_rc_timers(qp);
  1332. rvt_add_rnr_timer(qp, aeth);
  1333. return 0;
  1334. case 3: /* NAK */
  1335. if (qp->s_acked == qp->s_tail)
  1336. goto bail_stop;
  1337. /* The last valid PSN is the previous PSN. */
  1338. update_last_psn(qp, psn - 1);
  1339. switch ((aeth >> IB_AETH_CREDIT_SHIFT) &
  1340. IB_AETH_CREDIT_MASK) {
  1341. case 0: /* PSN sequence error */
  1342. ibp->rvp.n_seq_naks++;
  1343. /*
  1344. * Back up to the responder's expected PSN.
  1345. * Note that we might get a NAK in the middle of an
  1346. * RDMA READ response which terminates the RDMA
  1347. * READ.
  1348. */
  1349. hfi1_restart_rc(qp, psn, 0);
  1350. hfi1_schedule_send(qp);
  1351. break;
  1352. case 1: /* Invalid Request */
  1353. status = IB_WC_REM_INV_REQ_ERR;
  1354. ibp->rvp.n_other_naks++;
  1355. goto class_b;
  1356. case 2: /* Remote Access Error */
  1357. status = IB_WC_REM_ACCESS_ERR;
  1358. ibp->rvp.n_other_naks++;
  1359. goto class_b;
  1360. case 3: /* Remote Operation Error */
  1361. status = IB_WC_REM_OP_ERR;
  1362. ibp->rvp.n_other_naks++;
  1363. class_b:
  1364. if (qp->s_last == qp->s_acked) {
  1365. hfi1_send_complete(qp, wqe, status);
  1366. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1367. }
  1368. break;
  1369. default:
  1370. /* Ignore other reserved NAK error codes */
  1371. goto reserved;
  1372. }
  1373. qp->s_retry = qp->s_retry_cnt;
  1374. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1375. goto bail_stop;
  1376. default: /* 2: reserved */
  1377. reserved:
  1378. /* Ignore reserved NAK codes. */
  1379. goto bail_stop;
  1380. }
  1381. /* cannot be reached */
  1382. bail_stop:
  1383. rvt_stop_rc_timers(qp);
  1384. return ret;
  1385. }
  1386. /*
  1387. * We have seen an out of sequence RDMA read middle or last packet.
  1388. * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE.
  1389. */
  1390. static void rdma_seq_err(struct rvt_qp *qp, struct hfi1_ibport *ibp, u32 psn,
  1391. struct hfi1_ctxtdata *rcd)
  1392. {
  1393. struct rvt_swqe *wqe;
  1394. lockdep_assert_held(&qp->s_lock);
  1395. /* Remove QP from retry timer */
  1396. rvt_stop_rc_timers(qp);
  1397. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1398. while (cmp_psn(psn, wqe->lpsn) > 0) {
  1399. if (wqe->wr.opcode == IB_WR_RDMA_READ ||
  1400. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1401. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
  1402. break;
  1403. wqe = do_rc_completion(qp, wqe, ibp);
  1404. }
  1405. ibp->rvp.n_rdma_seq++;
  1406. qp->r_flags |= RVT_R_RDMAR_SEQ;
  1407. hfi1_restart_rc(qp, qp->s_last_psn + 1, 0);
  1408. if (list_empty(&qp->rspwait)) {
  1409. qp->r_flags |= RVT_R_RSP_SEND;
  1410. rvt_get_qp(qp);
  1411. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  1412. }
  1413. }
  1414. /**
  1415. * rc_rcv_resp - process an incoming RC response packet
  1416. * @packet: data packet information
  1417. *
  1418. * This is called from hfi1_rc_rcv() to process an incoming RC response
  1419. * packet for the given QP.
  1420. * Called at interrupt level.
  1421. */
  1422. static void rc_rcv_resp(struct hfi1_packet *packet)
  1423. {
  1424. struct hfi1_ctxtdata *rcd = packet->rcd;
  1425. void *data = packet->payload;
  1426. u32 tlen = packet->tlen;
  1427. struct rvt_qp *qp = packet->qp;
  1428. struct hfi1_ibport *ibp;
  1429. struct ib_other_headers *ohdr = packet->ohdr;
  1430. struct rvt_swqe *wqe;
  1431. enum ib_wc_status status;
  1432. unsigned long flags;
  1433. int diff;
  1434. u64 val;
  1435. u32 aeth;
  1436. u32 psn = ib_bth_get_psn(packet->ohdr);
  1437. u32 pmtu = qp->pmtu;
  1438. u16 hdrsize = packet->hlen;
  1439. u8 opcode = packet->opcode;
  1440. u8 pad = packet->pad;
  1441. u8 extra_bytes = pad + packet->extra_byte + (SIZE_OF_CRC << 2);
  1442. spin_lock_irqsave(&qp->s_lock, flags);
  1443. trace_hfi1_ack(qp, psn);
  1444. /* Ignore invalid responses. */
  1445. if (cmp_psn(psn, READ_ONCE(qp->s_next_psn)) >= 0)
  1446. goto ack_done;
  1447. /* Ignore duplicate responses. */
  1448. diff = cmp_psn(psn, qp->s_last_psn);
  1449. if (unlikely(diff <= 0)) {
  1450. /* Update credits for "ghost" ACKs */
  1451. if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
  1452. aeth = be32_to_cpu(ohdr->u.aeth);
  1453. if ((aeth >> IB_AETH_NAK_SHIFT) == 0)
  1454. rvt_get_credit(qp, aeth);
  1455. }
  1456. goto ack_done;
  1457. }
  1458. /*
  1459. * Skip everything other than the PSN we expect, if we are waiting
  1460. * for a reply to a restarted RDMA read or atomic op.
  1461. */
  1462. if (qp->r_flags & RVT_R_RDMAR_SEQ) {
  1463. if (cmp_psn(psn, qp->s_last_psn + 1) != 0)
  1464. goto ack_done;
  1465. qp->r_flags &= ~RVT_R_RDMAR_SEQ;
  1466. }
  1467. if (unlikely(qp->s_acked == qp->s_tail))
  1468. goto ack_done;
  1469. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1470. status = IB_WC_SUCCESS;
  1471. switch (opcode) {
  1472. case OP(ACKNOWLEDGE):
  1473. case OP(ATOMIC_ACKNOWLEDGE):
  1474. case OP(RDMA_READ_RESPONSE_FIRST):
  1475. aeth = be32_to_cpu(ohdr->u.aeth);
  1476. if (opcode == OP(ATOMIC_ACKNOWLEDGE))
  1477. val = ib_u64_get(&ohdr->u.at.atomic_ack_eth);
  1478. else
  1479. val = 0;
  1480. if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) ||
  1481. opcode != OP(RDMA_READ_RESPONSE_FIRST))
  1482. goto ack_done;
  1483. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1484. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1485. goto ack_op_err;
  1486. /*
  1487. * If this is a response to a resent RDMA read, we
  1488. * have to be careful to copy the data to the right
  1489. * location.
  1490. */
  1491. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1492. wqe, psn, pmtu);
  1493. goto read_middle;
  1494. case OP(RDMA_READ_RESPONSE_MIDDLE):
  1495. /* no AETH, no ACK */
  1496. if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
  1497. goto ack_seq_err;
  1498. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1499. goto ack_op_err;
  1500. read_middle:
  1501. if (unlikely(tlen != (hdrsize + pmtu + extra_bytes)))
  1502. goto ack_len_err;
  1503. if (unlikely(pmtu >= qp->s_rdma_read_len))
  1504. goto ack_len_err;
  1505. /*
  1506. * We got a response so update the timeout.
  1507. * 4.096 usec. * (1 << qp->timeout)
  1508. */
  1509. rvt_mod_retry_timer(qp);
  1510. if (qp->s_flags & RVT_S_WAIT_ACK) {
  1511. qp->s_flags &= ~RVT_S_WAIT_ACK;
  1512. hfi1_schedule_send(qp);
  1513. }
  1514. if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
  1515. qp->s_retry = qp->s_retry_cnt;
  1516. /*
  1517. * Update the RDMA receive state but do the copy w/o
  1518. * holding the locks and blocking interrupts.
  1519. */
  1520. qp->s_rdma_read_len -= pmtu;
  1521. update_last_psn(qp, psn);
  1522. spin_unlock_irqrestore(&qp->s_lock, flags);
  1523. hfi1_copy_sge(&qp->s_rdma_read_sge, data, pmtu, false, false);
  1524. goto bail;
  1525. case OP(RDMA_READ_RESPONSE_ONLY):
  1526. aeth = be32_to_cpu(ohdr->u.aeth);
  1527. if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd))
  1528. goto ack_done;
  1529. /*
  1530. * Check that the data size is >= 0 && <= pmtu.
  1531. * Remember to account for ICRC (4).
  1532. */
  1533. if (unlikely(tlen < (hdrsize + extra_bytes)))
  1534. goto ack_len_err;
  1535. /*
  1536. * If this is a response to a resent RDMA read, we
  1537. * have to be careful to copy the data to the right
  1538. * location.
  1539. */
  1540. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1541. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1542. wqe, psn, pmtu);
  1543. goto read_last;
  1544. case OP(RDMA_READ_RESPONSE_LAST):
  1545. /* ACKs READ req. */
  1546. if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
  1547. goto ack_seq_err;
  1548. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1549. goto ack_op_err;
  1550. /*
  1551. * Check that the data size is >= 1 && <= pmtu.
  1552. * Remember to account for ICRC (4).
  1553. */
  1554. if (unlikely(tlen <= (hdrsize + extra_bytes)))
  1555. goto ack_len_err;
  1556. read_last:
  1557. tlen -= hdrsize + extra_bytes;
  1558. if (unlikely(tlen != qp->s_rdma_read_len))
  1559. goto ack_len_err;
  1560. aeth = be32_to_cpu(ohdr->u.aeth);
  1561. hfi1_copy_sge(&qp->s_rdma_read_sge, data, tlen, false, false);
  1562. WARN_ON(qp->s_rdma_read_sge.num_sge);
  1563. (void)do_rc_ack(qp, aeth, psn,
  1564. OP(RDMA_READ_RESPONSE_LAST), 0, rcd);
  1565. goto ack_done;
  1566. }
  1567. ack_op_err:
  1568. status = IB_WC_LOC_QP_OP_ERR;
  1569. goto ack_err;
  1570. ack_seq_err:
  1571. ibp = rcd_to_iport(rcd);
  1572. rdma_seq_err(qp, ibp, psn, rcd);
  1573. goto ack_done;
  1574. ack_len_err:
  1575. status = IB_WC_LOC_LEN_ERR;
  1576. ack_err:
  1577. if (qp->s_last == qp->s_acked) {
  1578. hfi1_send_complete(qp, wqe, status);
  1579. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1580. }
  1581. ack_done:
  1582. spin_unlock_irqrestore(&qp->s_lock, flags);
  1583. bail:
  1584. return;
  1585. }
  1586. static inline void rc_defered_ack(struct hfi1_ctxtdata *rcd,
  1587. struct rvt_qp *qp)
  1588. {
  1589. if (list_empty(&qp->rspwait)) {
  1590. qp->r_flags |= RVT_R_RSP_NAK;
  1591. rvt_get_qp(qp);
  1592. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  1593. }
  1594. }
  1595. static inline void rc_cancel_ack(struct rvt_qp *qp)
  1596. {
  1597. qp->r_adefered = 0;
  1598. if (list_empty(&qp->rspwait))
  1599. return;
  1600. list_del_init(&qp->rspwait);
  1601. qp->r_flags &= ~RVT_R_RSP_NAK;
  1602. rvt_put_qp(qp);
  1603. }
  1604. /**
  1605. * rc_rcv_error - process an incoming duplicate or error RC packet
  1606. * @ohdr: the other headers for this packet
  1607. * @data: the packet data
  1608. * @qp: the QP for this packet
  1609. * @opcode: the opcode for this packet
  1610. * @psn: the packet sequence number for this packet
  1611. * @diff: the difference between the PSN and the expected PSN
  1612. *
  1613. * This is called from hfi1_rc_rcv() to process an unexpected
  1614. * incoming RC packet for the given QP.
  1615. * Called at interrupt level.
  1616. * Return 1 if no more processing is needed; otherwise return 0 to
  1617. * schedule a response to be sent.
  1618. */
  1619. static noinline int rc_rcv_error(struct ib_other_headers *ohdr, void *data,
  1620. struct rvt_qp *qp, u32 opcode, u32 psn,
  1621. int diff, struct hfi1_ctxtdata *rcd)
  1622. {
  1623. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  1624. struct rvt_ack_entry *e;
  1625. unsigned long flags;
  1626. u8 i, prev;
  1627. int old_req;
  1628. trace_hfi1_rcv_error(qp, psn);
  1629. if (diff > 0) {
  1630. /*
  1631. * Packet sequence error.
  1632. * A NAK will ACK earlier sends and RDMA writes.
  1633. * Don't queue the NAK if we already sent one.
  1634. */
  1635. if (!qp->r_nak_state) {
  1636. ibp->rvp.n_rc_seqnak++;
  1637. qp->r_nak_state = IB_NAK_PSN_ERROR;
  1638. /* Use the expected PSN. */
  1639. qp->r_ack_psn = qp->r_psn;
  1640. /*
  1641. * Wait to send the sequence NAK until all packets
  1642. * in the receive queue have been processed.
  1643. * Otherwise, we end up propagating congestion.
  1644. */
  1645. rc_defered_ack(rcd, qp);
  1646. }
  1647. goto done;
  1648. }
  1649. /*
  1650. * Handle a duplicate request. Don't re-execute SEND, RDMA
  1651. * write or atomic op. Don't NAK errors, just silently drop
  1652. * the duplicate request. Note that r_sge, r_len, and
  1653. * r_rcv_len may be in use so don't modify them.
  1654. *
  1655. * We are supposed to ACK the earliest duplicate PSN but we
  1656. * can coalesce an outstanding duplicate ACK. We have to
  1657. * send the earliest so that RDMA reads can be restarted at
  1658. * the requester's expected PSN.
  1659. *
  1660. * First, find where this duplicate PSN falls within the
  1661. * ACKs previously sent.
  1662. * old_req is true if there is an older response that is scheduled
  1663. * to be sent before sending this one.
  1664. */
  1665. e = NULL;
  1666. old_req = 1;
  1667. ibp->rvp.n_rc_dupreq++;
  1668. spin_lock_irqsave(&qp->s_lock, flags);
  1669. for (i = qp->r_head_ack_queue; ; i = prev) {
  1670. if (i == qp->s_tail_ack_queue)
  1671. old_req = 0;
  1672. if (i)
  1673. prev = i - 1;
  1674. else
  1675. prev = HFI1_MAX_RDMA_ATOMIC;
  1676. if (prev == qp->r_head_ack_queue) {
  1677. e = NULL;
  1678. break;
  1679. }
  1680. e = &qp->s_ack_queue[prev];
  1681. if (!e->opcode) {
  1682. e = NULL;
  1683. break;
  1684. }
  1685. if (cmp_psn(psn, e->psn) >= 0) {
  1686. if (prev == qp->s_tail_ack_queue &&
  1687. cmp_psn(psn, e->lpsn) <= 0)
  1688. old_req = 0;
  1689. break;
  1690. }
  1691. }
  1692. switch (opcode) {
  1693. case OP(RDMA_READ_REQUEST): {
  1694. struct ib_reth *reth;
  1695. u32 offset;
  1696. u32 len;
  1697. /*
  1698. * If we didn't find the RDMA read request in the ack queue,
  1699. * we can ignore this request.
  1700. */
  1701. if (!e || e->opcode != OP(RDMA_READ_REQUEST))
  1702. goto unlock_done;
  1703. /* RETH comes after BTH */
  1704. reth = &ohdr->u.rc.reth;
  1705. /*
  1706. * Address range must be a subset of the original
  1707. * request and start on pmtu boundaries.
  1708. * We reuse the old ack_queue slot since the requester
  1709. * should not back up and request an earlier PSN for the
  1710. * same request.
  1711. */
  1712. offset = delta_psn(psn, e->psn) * qp->pmtu;
  1713. len = be32_to_cpu(reth->length);
  1714. if (unlikely(offset + len != e->rdma_sge.sge_length))
  1715. goto unlock_done;
  1716. if (e->rdma_sge.mr) {
  1717. rvt_put_mr(e->rdma_sge.mr);
  1718. e->rdma_sge.mr = NULL;
  1719. }
  1720. if (len != 0) {
  1721. u32 rkey = be32_to_cpu(reth->rkey);
  1722. u64 vaddr = get_ib_reth_vaddr(reth);
  1723. int ok;
  1724. ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey,
  1725. IB_ACCESS_REMOTE_READ);
  1726. if (unlikely(!ok))
  1727. goto unlock_done;
  1728. } else {
  1729. e->rdma_sge.vaddr = NULL;
  1730. e->rdma_sge.length = 0;
  1731. e->rdma_sge.sge_length = 0;
  1732. }
  1733. e->psn = psn;
  1734. if (old_req)
  1735. goto unlock_done;
  1736. qp->s_tail_ack_queue = prev;
  1737. break;
  1738. }
  1739. case OP(COMPARE_SWAP):
  1740. case OP(FETCH_ADD): {
  1741. /*
  1742. * If we didn't find the atomic request in the ack queue
  1743. * or the send engine is already backed up to send an
  1744. * earlier entry, we can ignore this request.
  1745. */
  1746. if (!e || e->opcode != (u8)opcode || old_req)
  1747. goto unlock_done;
  1748. qp->s_tail_ack_queue = prev;
  1749. break;
  1750. }
  1751. default:
  1752. /*
  1753. * Ignore this operation if it doesn't request an ACK
  1754. * or an earlier RDMA read or atomic is going to be resent.
  1755. */
  1756. if (!(psn & IB_BTH_REQ_ACK) || old_req)
  1757. goto unlock_done;
  1758. /*
  1759. * Resend the most recent ACK if this request is
  1760. * after all the previous RDMA reads and atomics.
  1761. */
  1762. if (i == qp->r_head_ack_queue) {
  1763. spin_unlock_irqrestore(&qp->s_lock, flags);
  1764. qp->r_nak_state = 0;
  1765. qp->r_ack_psn = qp->r_psn - 1;
  1766. goto send_ack;
  1767. }
  1768. /*
  1769. * Resend the RDMA read or atomic op which
  1770. * ACKs this duplicate request.
  1771. */
  1772. qp->s_tail_ack_queue = i;
  1773. break;
  1774. }
  1775. qp->s_ack_state = OP(ACKNOWLEDGE);
  1776. qp->s_flags |= RVT_S_RESP_PENDING;
  1777. qp->r_nak_state = 0;
  1778. hfi1_schedule_send(qp);
  1779. unlock_done:
  1780. spin_unlock_irqrestore(&qp->s_lock, flags);
  1781. done:
  1782. return 1;
  1783. send_ack:
  1784. return 0;
  1785. }
  1786. static inline void update_ack_queue(struct rvt_qp *qp, unsigned n)
  1787. {
  1788. unsigned next;
  1789. next = n + 1;
  1790. if (next > HFI1_MAX_RDMA_ATOMIC)
  1791. next = 0;
  1792. qp->s_tail_ack_queue = next;
  1793. qp->s_ack_state = OP(ACKNOWLEDGE);
  1794. }
  1795. static void log_cca_event(struct hfi1_pportdata *ppd, u8 sl, u32 rlid,
  1796. u32 lqpn, u32 rqpn, u8 svc_type)
  1797. {
  1798. struct opa_hfi1_cong_log_event_internal *cc_event;
  1799. unsigned long flags;
  1800. if (sl >= OPA_MAX_SLS)
  1801. return;
  1802. spin_lock_irqsave(&ppd->cc_log_lock, flags);
  1803. ppd->threshold_cong_event_map[sl / 8] |= 1 << (sl % 8);
  1804. ppd->threshold_event_counter++;
  1805. cc_event = &ppd->cc_events[ppd->cc_log_idx++];
  1806. if (ppd->cc_log_idx == OPA_CONG_LOG_ELEMS)
  1807. ppd->cc_log_idx = 0;
  1808. cc_event->lqpn = lqpn & RVT_QPN_MASK;
  1809. cc_event->rqpn = rqpn & RVT_QPN_MASK;
  1810. cc_event->sl = sl;
  1811. cc_event->svc_type = svc_type;
  1812. cc_event->rlid = rlid;
  1813. /* keep timestamp in units of 1.024 usec */
  1814. cc_event->timestamp = ktime_get_ns() / 1024;
  1815. spin_unlock_irqrestore(&ppd->cc_log_lock, flags);
  1816. }
  1817. void process_becn(struct hfi1_pportdata *ppd, u8 sl, u32 rlid, u32 lqpn,
  1818. u32 rqpn, u8 svc_type)
  1819. {
  1820. struct cca_timer *cca_timer;
  1821. u16 ccti, ccti_incr, ccti_timer, ccti_limit;
  1822. u8 trigger_threshold;
  1823. struct cc_state *cc_state;
  1824. unsigned long flags;
  1825. if (sl >= OPA_MAX_SLS)
  1826. return;
  1827. cc_state = get_cc_state(ppd);
  1828. if (!cc_state)
  1829. return;
  1830. /*
  1831. * 1) increase CCTI (for this SL)
  1832. * 2) select IPG (i.e., call set_link_ipg())
  1833. * 3) start timer
  1834. */
  1835. ccti_limit = cc_state->cct.ccti_limit;
  1836. ccti_incr = cc_state->cong_setting.entries[sl].ccti_increase;
  1837. ccti_timer = cc_state->cong_setting.entries[sl].ccti_timer;
  1838. trigger_threshold =
  1839. cc_state->cong_setting.entries[sl].trigger_threshold;
  1840. spin_lock_irqsave(&ppd->cca_timer_lock, flags);
  1841. cca_timer = &ppd->cca_timer[sl];
  1842. if (cca_timer->ccti < ccti_limit) {
  1843. if (cca_timer->ccti + ccti_incr <= ccti_limit)
  1844. cca_timer->ccti += ccti_incr;
  1845. else
  1846. cca_timer->ccti = ccti_limit;
  1847. set_link_ipg(ppd);
  1848. }
  1849. ccti = cca_timer->ccti;
  1850. if (!hrtimer_active(&cca_timer->hrtimer)) {
  1851. /* ccti_timer is in units of 1.024 usec */
  1852. unsigned long nsec = 1024 * ccti_timer;
  1853. hrtimer_start(&cca_timer->hrtimer, ns_to_ktime(nsec),
  1854. HRTIMER_MODE_REL_PINNED);
  1855. }
  1856. spin_unlock_irqrestore(&ppd->cca_timer_lock, flags);
  1857. if ((trigger_threshold != 0) && (ccti >= trigger_threshold))
  1858. log_cca_event(ppd, sl, rlid, lqpn, rqpn, svc_type);
  1859. }
  1860. /**
  1861. * hfi1_rc_rcv - process an incoming RC packet
  1862. * @packet: data packet information
  1863. *
  1864. * This is called from qp_rcv() to process an incoming RC packet
  1865. * for the given QP.
  1866. * May be called at interrupt level.
  1867. */
  1868. void hfi1_rc_rcv(struct hfi1_packet *packet)
  1869. {
  1870. struct hfi1_ctxtdata *rcd = packet->rcd;
  1871. void *data = packet->payload;
  1872. u32 tlen = packet->tlen;
  1873. struct rvt_qp *qp = packet->qp;
  1874. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  1875. struct ib_other_headers *ohdr = packet->ohdr;
  1876. u32 opcode = packet->opcode;
  1877. u32 hdrsize = packet->hlen;
  1878. u32 psn = ib_bth_get_psn(packet->ohdr);
  1879. u32 pad = packet->pad;
  1880. struct ib_wc wc;
  1881. u32 pmtu = qp->pmtu;
  1882. int diff;
  1883. struct ib_reth *reth;
  1884. unsigned long flags;
  1885. int ret;
  1886. bool is_fecn = false;
  1887. bool copy_last = false;
  1888. u32 rkey;
  1889. u8 extra_bytes = pad + packet->extra_byte + (SIZE_OF_CRC << 2);
  1890. lockdep_assert_held(&qp->r_lock);
  1891. if (hfi1_ruc_check_hdr(ibp, packet))
  1892. return;
  1893. is_fecn = process_ecn(qp, packet, false);
  1894. /*
  1895. * Process responses (ACKs) before anything else. Note that the
  1896. * packet sequence number will be for something in the send work
  1897. * queue rather than the expected receive packet sequence number.
  1898. * In other words, this QP is the requester.
  1899. */
  1900. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1901. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1902. rc_rcv_resp(packet);
  1903. if (is_fecn)
  1904. goto send_ack;
  1905. return;
  1906. }
  1907. /* Compute 24 bits worth of difference. */
  1908. diff = delta_psn(psn, qp->r_psn);
  1909. if (unlikely(diff)) {
  1910. if (rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd))
  1911. return;
  1912. goto send_ack;
  1913. }
  1914. /* Check for opcode sequence errors. */
  1915. switch (qp->r_state) {
  1916. case OP(SEND_FIRST):
  1917. case OP(SEND_MIDDLE):
  1918. if (opcode == OP(SEND_MIDDLE) ||
  1919. opcode == OP(SEND_LAST) ||
  1920. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1921. opcode == OP(SEND_LAST_WITH_INVALIDATE))
  1922. break;
  1923. goto nack_inv;
  1924. case OP(RDMA_WRITE_FIRST):
  1925. case OP(RDMA_WRITE_MIDDLE):
  1926. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  1927. opcode == OP(RDMA_WRITE_LAST) ||
  1928. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1929. break;
  1930. goto nack_inv;
  1931. default:
  1932. if (opcode == OP(SEND_MIDDLE) ||
  1933. opcode == OP(SEND_LAST) ||
  1934. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1935. opcode == OP(SEND_LAST_WITH_INVALIDATE) ||
  1936. opcode == OP(RDMA_WRITE_MIDDLE) ||
  1937. opcode == OP(RDMA_WRITE_LAST) ||
  1938. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1939. goto nack_inv;
  1940. /*
  1941. * Note that it is up to the requester to not send a new
  1942. * RDMA read or atomic operation before receiving an ACK
  1943. * for the previous operation.
  1944. */
  1945. break;
  1946. }
  1947. if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST))
  1948. rvt_comm_est(qp);
  1949. /* OK, process the packet. */
  1950. switch (opcode) {
  1951. case OP(SEND_FIRST):
  1952. ret = rvt_get_rwqe(qp, false);
  1953. if (ret < 0)
  1954. goto nack_op_err;
  1955. if (!ret)
  1956. goto rnr_nak;
  1957. qp->r_rcv_len = 0;
  1958. /* FALLTHROUGH */
  1959. case OP(SEND_MIDDLE):
  1960. case OP(RDMA_WRITE_MIDDLE):
  1961. send_middle:
  1962. /* Check for invalid length PMTU or posted rwqe len. */
  1963. /*
  1964. * There will be no padding for 9B packet but 16B packets
  1965. * will come in with some padding since we always add
  1966. * CRC and LT bytes which will need to be flit aligned
  1967. */
  1968. if (unlikely(tlen != (hdrsize + pmtu + extra_bytes)))
  1969. goto nack_inv;
  1970. qp->r_rcv_len += pmtu;
  1971. if (unlikely(qp->r_rcv_len > qp->r_len))
  1972. goto nack_inv;
  1973. hfi1_copy_sge(&qp->r_sge, data, pmtu, true, false);
  1974. break;
  1975. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  1976. /* consume RWQE */
  1977. ret = rvt_get_rwqe(qp, true);
  1978. if (ret < 0)
  1979. goto nack_op_err;
  1980. if (!ret)
  1981. goto rnr_nak;
  1982. goto send_last_imm;
  1983. case OP(SEND_ONLY):
  1984. case OP(SEND_ONLY_WITH_IMMEDIATE):
  1985. case OP(SEND_ONLY_WITH_INVALIDATE):
  1986. ret = rvt_get_rwqe(qp, false);
  1987. if (ret < 0)
  1988. goto nack_op_err;
  1989. if (!ret)
  1990. goto rnr_nak;
  1991. qp->r_rcv_len = 0;
  1992. if (opcode == OP(SEND_ONLY))
  1993. goto no_immediate_data;
  1994. if (opcode == OP(SEND_ONLY_WITH_INVALIDATE))
  1995. goto send_last_inv;
  1996. /* FALLTHROUGH -- for SEND_ONLY_WITH_IMMEDIATE */
  1997. case OP(SEND_LAST_WITH_IMMEDIATE):
  1998. send_last_imm:
  1999. wc.ex.imm_data = ohdr->u.imm_data;
  2000. wc.wc_flags = IB_WC_WITH_IMM;
  2001. goto send_last;
  2002. case OP(SEND_LAST_WITH_INVALIDATE):
  2003. send_last_inv:
  2004. rkey = be32_to_cpu(ohdr->u.ieth);
  2005. if (rvt_invalidate_rkey(qp, rkey))
  2006. goto no_immediate_data;
  2007. wc.ex.invalidate_rkey = rkey;
  2008. wc.wc_flags = IB_WC_WITH_INVALIDATE;
  2009. goto send_last;
  2010. case OP(RDMA_WRITE_LAST):
  2011. copy_last = rvt_is_user_qp(qp);
  2012. /* fall through */
  2013. case OP(SEND_LAST):
  2014. no_immediate_data:
  2015. wc.wc_flags = 0;
  2016. wc.ex.imm_data = 0;
  2017. send_last:
  2018. /* Check for invalid length. */
  2019. /* LAST len should be >= 1 */
  2020. if (unlikely(tlen < (hdrsize + extra_bytes)))
  2021. goto nack_inv;
  2022. /* Don't count the CRC(and padding and LT byte for 16B). */
  2023. tlen -= (hdrsize + extra_bytes);
  2024. wc.byte_len = tlen + qp->r_rcv_len;
  2025. if (unlikely(wc.byte_len > qp->r_len))
  2026. goto nack_inv;
  2027. hfi1_copy_sge(&qp->r_sge, data, tlen, true, copy_last);
  2028. rvt_put_ss(&qp->r_sge);
  2029. qp->r_msn++;
  2030. if (!__test_and_clear_bit(RVT_R_WRID_VALID, &qp->r_aflags))
  2031. break;
  2032. wc.wr_id = qp->r_wr_id;
  2033. wc.status = IB_WC_SUCCESS;
  2034. if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
  2035. opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
  2036. wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
  2037. else
  2038. wc.opcode = IB_WC_RECV;
  2039. wc.qp = &qp->ibqp;
  2040. wc.src_qp = qp->remote_qpn;
  2041. wc.slid = rdma_ah_get_dlid(&qp->remote_ah_attr) & U16_MAX;
  2042. /*
  2043. * It seems that IB mandates the presence of an SL in a
  2044. * work completion only for the UD transport (see section
  2045. * 11.4.2 of IBTA Vol. 1).
  2046. *
  2047. * However, the way the SL is chosen below is consistent
  2048. * with the way that IB/qib works and is trying avoid
  2049. * introducing incompatibilities.
  2050. *
  2051. * See also OPA Vol. 1, section 9.7.6, and table 9-17.
  2052. */
  2053. wc.sl = rdma_ah_get_sl(&qp->remote_ah_attr);
  2054. /* zero fields that are N/A */
  2055. wc.vendor_err = 0;
  2056. wc.pkey_index = 0;
  2057. wc.dlid_path_bits = 0;
  2058. wc.port_num = 0;
  2059. /* Signal completion event if the solicited bit is set. */
  2060. rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc,
  2061. ib_bth_is_solicited(ohdr));
  2062. break;
  2063. case OP(RDMA_WRITE_ONLY):
  2064. copy_last = rvt_is_user_qp(qp);
  2065. /* fall through */
  2066. case OP(RDMA_WRITE_FIRST):
  2067. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  2068. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE)))
  2069. goto nack_inv;
  2070. /* consume RWQE */
  2071. reth = &ohdr->u.rc.reth;
  2072. qp->r_len = be32_to_cpu(reth->length);
  2073. qp->r_rcv_len = 0;
  2074. qp->r_sge.sg_list = NULL;
  2075. if (qp->r_len != 0) {
  2076. u32 rkey = be32_to_cpu(reth->rkey);
  2077. u64 vaddr = get_ib_reth_vaddr(reth);
  2078. int ok;
  2079. /* Check rkey & NAK */
  2080. ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr,
  2081. rkey, IB_ACCESS_REMOTE_WRITE);
  2082. if (unlikely(!ok))
  2083. goto nack_acc;
  2084. qp->r_sge.num_sge = 1;
  2085. } else {
  2086. qp->r_sge.num_sge = 0;
  2087. qp->r_sge.sge.mr = NULL;
  2088. qp->r_sge.sge.vaddr = NULL;
  2089. qp->r_sge.sge.length = 0;
  2090. qp->r_sge.sge.sge_length = 0;
  2091. }
  2092. if (opcode == OP(RDMA_WRITE_FIRST))
  2093. goto send_middle;
  2094. else if (opcode == OP(RDMA_WRITE_ONLY))
  2095. goto no_immediate_data;
  2096. ret = rvt_get_rwqe(qp, true);
  2097. if (ret < 0)
  2098. goto nack_op_err;
  2099. if (!ret) {
  2100. /* peer will send again */
  2101. rvt_put_ss(&qp->r_sge);
  2102. goto rnr_nak;
  2103. }
  2104. wc.ex.imm_data = ohdr->u.rc.imm_data;
  2105. wc.wc_flags = IB_WC_WITH_IMM;
  2106. goto send_last;
  2107. case OP(RDMA_READ_REQUEST): {
  2108. struct rvt_ack_entry *e;
  2109. u32 len;
  2110. u8 next;
  2111. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
  2112. goto nack_inv;
  2113. next = qp->r_head_ack_queue + 1;
  2114. /* s_ack_queue is size HFI1_MAX_RDMA_ATOMIC+1 so use > not >= */
  2115. if (next > HFI1_MAX_RDMA_ATOMIC)
  2116. next = 0;
  2117. spin_lock_irqsave(&qp->s_lock, flags);
  2118. if (unlikely(next == qp->s_tail_ack_queue)) {
  2119. if (!qp->s_ack_queue[next].sent)
  2120. goto nack_inv_unlck;
  2121. update_ack_queue(qp, next);
  2122. }
  2123. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  2124. if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
  2125. rvt_put_mr(e->rdma_sge.mr);
  2126. e->rdma_sge.mr = NULL;
  2127. }
  2128. reth = &ohdr->u.rc.reth;
  2129. len = be32_to_cpu(reth->length);
  2130. if (len) {
  2131. u32 rkey = be32_to_cpu(reth->rkey);
  2132. u64 vaddr = get_ib_reth_vaddr(reth);
  2133. int ok;
  2134. /* Check rkey & NAK */
  2135. ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr,
  2136. rkey, IB_ACCESS_REMOTE_READ);
  2137. if (unlikely(!ok))
  2138. goto nack_acc_unlck;
  2139. /*
  2140. * Update the next expected PSN. We add 1 later
  2141. * below, so only add the remainder here.
  2142. */
  2143. qp->r_psn += rvt_div_mtu(qp, len - 1);
  2144. } else {
  2145. e->rdma_sge.mr = NULL;
  2146. e->rdma_sge.vaddr = NULL;
  2147. e->rdma_sge.length = 0;
  2148. e->rdma_sge.sge_length = 0;
  2149. }
  2150. e->opcode = opcode;
  2151. e->sent = 0;
  2152. e->psn = psn;
  2153. e->lpsn = qp->r_psn;
  2154. /*
  2155. * We need to increment the MSN here instead of when we
  2156. * finish sending the result since a duplicate request would
  2157. * increment it more than once.
  2158. */
  2159. qp->r_msn++;
  2160. qp->r_psn++;
  2161. qp->r_state = opcode;
  2162. qp->r_nak_state = 0;
  2163. qp->r_head_ack_queue = next;
  2164. /* Schedule the send engine. */
  2165. qp->s_flags |= RVT_S_RESP_PENDING;
  2166. hfi1_schedule_send(qp);
  2167. spin_unlock_irqrestore(&qp->s_lock, flags);
  2168. if (is_fecn)
  2169. goto send_ack;
  2170. return;
  2171. }
  2172. case OP(COMPARE_SWAP):
  2173. case OP(FETCH_ADD): {
  2174. struct ib_atomic_eth *ateth;
  2175. struct rvt_ack_entry *e;
  2176. u64 vaddr;
  2177. atomic64_t *maddr;
  2178. u64 sdata;
  2179. u32 rkey;
  2180. u8 next;
  2181. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)))
  2182. goto nack_inv;
  2183. next = qp->r_head_ack_queue + 1;
  2184. if (next > HFI1_MAX_RDMA_ATOMIC)
  2185. next = 0;
  2186. spin_lock_irqsave(&qp->s_lock, flags);
  2187. if (unlikely(next == qp->s_tail_ack_queue)) {
  2188. if (!qp->s_ack_queue[next].sent)
  2189. goto nack_inv_unlck;
  2190. update_ack_queue(qp, next);
  2191. }
  2192. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  2193. if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
  2194. rvt_put_mr(e->rdma_sge.mr);
  2195. e->rdma_sge.mr = NULL;
  2196. }
  2197. ateth = &ohdr->u.atomic_eth;
  2198. vaddr = get_ib_ateth_vaddr(ateth);
  2199. if (unlikely(vaddr & (sizeof(u64) - 1)))
  2200. goto nack_inv_unlck;
  2201. rkey = be32_to_cpu(ateth->rkey);
  2202. /* Check rkey & NAK */
  2203. if (unlikely(!rvt_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
  2204. vaddr, rkey,
  2205. IB_ACCESS_REMOTE_ATOMIC)))
  2206. goto nack_acc_unlck;
  2207. /* Perform atomic OP and save result. */
  2208. maddr = (atomic64_t *)qp->r_sge.sge.vaddr;
  2209. sdata = get_ib_ateth_swap(ateth);
  2210. e->atomic_data = (opcode == OP(FETCH_ADD)) ?
  2211. (u64)atomic64_add_return(sdata, maddr) - sdata :
  2212. (u64)cmpxchg((u64 *)qp->r_sge.sge.vaddr,
  2213. get_ib_ateth_compare(ateth),
  2214. sdata);
  2215. rvt_put_mr(qp->r_sge.sge.mr);
  2216. qp->r_sge.num_sge = 0;
  2217. e->opcode = opcode;
  2218. e->sent = 0;
  2219. e->psn = psn;
  2220. e->lpsn = psn;
  2221. qp->r_msn++;
  2222. qp->r_psn++;
  2223. qp->r_state = opcode;
  2224. qp->r_nak_state = 0;
  2225. qp->r_head_ack_queue = next;
  2226. /* Schedule the send engine. */
  2227. qp->s_flags |= RVT_S_RESP_PENDING;
  2228. hfi1_schedule_send(qp);
  2229. spin_unlock_irqrestore(&qp->s_lock, flags);
  2230. if (is_fecn)
  2231. goto send_ack;
  2232. return;
  2233. }
  2234. default:
  2235. /* NAK unknown opcodes. */
  2236. goto nack_inv;
  2237. }
  2238. qp->r_psn++;
  2239. qp->r_state = opcode;
  2240. qp->r_ack_psn = psn;
  2241. qp->r_nak_state = 0;
  2242. /* Send an ACK if requested or required. */
  2243. if (psn & IB_BTH_REQ_ACK) {
  2244. if (packet->numpkt == 0) {
  2245. rc_cancel_ack(qp);
  2246. goto send_ack;
  2247. }
  2248. if (qp->r_adefered >= HFI1_PSN_CREDIT) {
  2249. rc_cancel_ack(qp);
  2250. goto send_ack;
  2251. }
  2252. if (unlikely(is_fecn)) {
  2253. rc_cancel_ack(qp);
  2254. goto send_ack;
  2255. }
  2256. qp->r_adefered++;
  2257. rc_defered_ack(rcd, qp);
  2258. }
  2259. return;
  2260. rnr_nak:
  2261. qp->r_nak_state = qp->r_min_rnr_timer | IB_RNR_NAK;
  2262. qp->r_ack_psn = qp->r_psn;
  2263. /* Queue RNR NAK for later */
  2264. rc_defered_ack(rcd, qp);
  2265. return;
  2266. nack_op_err:
  2267. rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  2268. qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR;
  2269. qp->r_ack_psn = qp->r_psn;
  2270. /* Queue NAK for later */
  2271. rc_defered_ack(rcd, qp);
  2272. return;
  2273. nack_inv_unlck:
  2274. spin_unlock_irqrestore(&qp->s_lock, flags);
  2275. nack_inv:
  2276. rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  2277. qp->r_nak_state = IB_NAK_INVALID_REQUEST;
  2278. qp->r_ack_psn = qp->r_psn;
  2279. /* Queue NAK for later */
  2280. rc_defered_ack(rcd, qp);
  2281. return;
  2282. nack_acc_unlck:
  2283. spin_unlock_irqrestore(&qp->s_lock, flags);
  2284. nack_acc:
  2285. rvt_rc_error(qp, IB_WC_LOC_PROT_ERR);
  2286. qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
  2287. qp->r_ack_psn = qp->r_psn;
  2288. send_ack:
  2289. hfi1_send_rc_ack(packet, is_fecn);
  2290. }
  2291. void hfi1_rc_hdrerr(
  2292. struct hfi1_ctxtdata *rcd,
  2293. struct hfi1_packet *packet,
  2294. struct rvt_qp *qp)
  2295. {
  2296. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  2297. int diff;
  2298. u32 opcode;
  2299. u32 psn;
  2300. if (hfi1_ruc_check_hdr(ibp, packet))
  2301. return;
  2302. psn = ib_bth_get_psn(packet->ohdr);
  2303. opcode = ib_bth_get_opcode(packet->ohdr);
  2304. /* Only deal with RDMA Writes for now */
  2305. if (opcode < IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
  2306. diff = delta_psn(psn, qp->r_psn);
  2307. if (!qp->r_nak_state && diff >= 0) {
  2308. ibp->rvp.n_rc_seqnak++;
  2309. qp->r_nak_state = IB_NAK_PSN_ERROR;
  2310. /* Use the expected PSN. */
  2311. qp->r_ack_psn = qp->r_psn;
  2312. /*
  2313. * Wait to send the sequence
  2314. * NAK until all packets
  2315. * in the receive queue have
  2316. * been processed.
  2317. * Otherwise, we end up
  2318. * propagating congestion.
  2319. */
  2320. rc_defered_ack(rcd, qp);
  2321. } /* Out of sequence NAK */
  2322. } /* QP Request NAKs */
  2323. }