disp.h 4.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. #ifndef __NV04_DISPLAY_H__
  3. #define __NV04_DISPLAY_H__
  4. #include <subdev/bios.h>
  5. #include <subdev/bios/pll.h>
  6. #include "nouveau_display.h"
  7. enum nv04_fp_display_regs {
  8. FP_DISPLAY_END,
  9. FP_TOTAL,
  10. FP_CRTC,
  11. FP_SYNC_START,
  12. FP_SYNC_END,
  13. FP_VALID_START,
  14. FP_VALID_END
  15. };
  16. struct nv04_crtc_reg {
  17. unsigned char MiscOutReg;
  18. uint8_t CRTC[0xa0];
  19. uint8_t CR58[0x10];
  20. uint8_t Sequencer[5];
  21. uint8_t Graphics[9];
  22. uint8_t Attribute[21];
  23. unsigned char DAC[768];
  24. /* PCRTC regs */
  25. uint32_t fb_start;
  26. uint32_t crtc_cfg;
  27. uint32_t cursor_cfg;
  28. uint32_t gpio_ext;
  29. uint32_t crtc_830;
  30. uint32_t crtc_834;
  31. uint32_t crtc_850;
  32. uint32_t crtc_eng_ctrl;
  33. /* PRAMDAC regs */
  34. uint32_t nv10_cursync;
  35. struct nvkm_pll_vals pllvals;
  36. uint32_t ramdac_gen_ctrl;
  37. uint32_t ramdac_630;
  38. uint32_t ramdac_634;
  39. uint32_t tv_setup;
  40. uint32_t tv_vtotal;
  41. uint32_t tv_vskew;
  42. uint32_t tv_vsync_delay;
  43. uint32_t tv_htotal;
  44. uint32_t tv_hskew;
  45. uint32_t tv_hsync_delay;
  46. uint32_t tv_hsync_delay2;
  47. uint32_t fp_horiz_regs[7];
  48. uint32_t fp_vert_regs[7];
  49. uint32_t dither;
  50. uint32_t fp_control;
  51. uint32_t dither_regs[6];
  52. uint32_t fp_debug_0;
  53. uint32_t fp_debug_1;
  54. uint32_t fp_debug_2;
  55. uint32_t fp_margin_color;
  56. uint32_t ramdac_8c0;
  57. uint32_t ramdac_a20;
  58. uint32_t ramdac_a24;
  59. uint32_t ramdac_a34;
  60. uint32_t ctv_regs[38];
  61. };
  62. struct nv04_output_reg {
  63. uint32_t output;
  64. int head;
  65. };
  66. struct nv04_mode_state {
  67. struct nv04_crtc_reg crtc_reg[2];
  68. uint32_t pllsel;
  69. uint32_t sel_clk;
  70. };
  71. struct nv04_display {
  72. struct nv04_mode_state mode_reg;
  73. struct nv04_mode_state saved_reg;
  74. uint32_t saved_vga_font[4][16384];
  75. uint32_t dac_users[4];
  76. struct nouveau_bo *image[2];
  77. };
  78. static inline struct nv04_display *
  79. nv04_display(struct drm_device *dev)
  80. {
  81. return nouveau_display(dev)->priv;
  82. }
  83. /* nv04_display.c */
  84. int nv04_display_create(struct drm_device *);
  85. void nv04_display_destroy(struct drm_device *);
  86. int nv04_display_init(struct drm_device *);
  87. void nv04_display_fini(struct drm_device *);
  88. /* nv04_crtc.c */
  89. int nv04_crtc_create(struct drm_device *, int index);
  90. /* nv04_dac.c */
  91. int nv04_dac_create(struct drm_connector *, struct dcb_output *);
  92. uint32_t nv17_dac_sample_load(struct drm_encoder *encoder);
  93. int nv04_dac_output_offset(struct drm_encoder *encoder);
  94. void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable);
  95. bool nv04_dac_in_use(struct drm_encoder *encoder);
  96. /* nv04_dfp.c */
  97. int nv04_dfp_create(struct drm_connector *, struct dcb_output *);
  98. int nv04_dfp_get_bound_head(struct drm_device *dev, struct dcb_output *dcbent);
  99. void nv04_dfp_bind_head(struct drm_device *dev, struct dcb_output *dcbent,
  100. int head, bool dl);
  101. void nv04_dfp_disable(struct drm_device *dev, int head);
  102. void nv04_dfp_update_fp_control(struct drm_encoder *encoder, int mode);
  103. /* nv04_tv.c */
  104. int nv04_tv_identify(struct drm_device *dev, int i2c_index);
  105. int nv04_tv_create(struct drm_connector *, struct dcb_output *);
  106. /* nv17_tv.c */
  107. int nv17_tv_create(struct drm_connector *, struct dcb_output *);
  108. /* overlay.c */
  109. void nouveau_overlay_init(struct drm_device *dev);
  110. static inline bool
  111. nv_two_heads(struct drm_device *dev)
  112. {
  113. struct nouveau_drm *drm = nouveau_drm(dev);
  114. const int impl = dev->pdev->device & 0x0ff0;
  115. if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_CELSIUS && impl != 0x0100 &&
  116. impl != 0x0150 && impl != 0x01a0 && impl != 0x0200)
  117. return true;
  118. return false;
  119. }
  120. static inline bool
  121. nv_gf4_disp_arch(struct drm_device *dev)
  122. {
  123. return nv_two_heads(dev) && (dev->pdev->device & 0x0ff0) != 0x0110;
  124. }
  125. static inline bool
  126. nv_two_reg_pll(struct drm_device *dev)
  127. {
  128. struct nouveau_drm *drm = nouveau_drm(dev);
  129. const int impl = dev->pdev->device & 0x0ff0;
  130. if (impl == 0x0310 || impl == 0x0340 || drm->client.device.info.family >= NV_DEVICE_INFO_V0_CURIE)
  131. return true;
  132. return false;
  133. }
  134. static inline bool
  135. nv_match_device(struct drm_device *dev, unsigned device,
  136. unsigned sub_vendor, unsigned sub_device)
  137. {
  138. return dev->pdev->device == device &&
  139. dev->pdev->subsystem_vendor == sub_vendor &&
  140. dev->pdev->subsystem_device == sub_device;
  141. }
  142. #include <subdev/bios.h>
  143. #include <subdev/bios/init.h>
  144. static inline void
  145. nouveau_bios_run_init_table(struct drm_device *dev, u16 table,
  146. struct dcb_output *outp, int crtc)
  147. {
  148. nvbios_init(&nvxx_bios(&nouveau_drm(dev)->client.device)->subdev, table,
  149. init.outp = outp;
  150. init.head = crtc;
  151. );
  152. }
  153. #endif