cursor.c 2.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. #include <drm/drmP.h>
  3. #include <drm/drm_mode.h>
  4. #include "nouveau_drv.h"
  5. #include "nouveau_reg.h"
  6. #include "nouveau_crtc.h"
  7. #include "hw.h"
  8. static void
  9. nv04_cursor_show(struct nouveau_crtc *nv_crtc, bool update)
  10. {
  11. nv_show_cursor(nv_crtc->base.dev, nv_crtc->index, true);
  12. }
  13. static void
  14. nv04_cursor_hide(struct nouveau_crtc *nv_crtc, bool update)
  15. {
  16. nv_show_cursor(nv_crtc->base.dev, nv_crtc->index, false);
  17. }
  18. static void
  19. nv04_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y)
  20. {
  21. nv_crtc->cursor_saved_x = x; nv_crtc->cursor_saved_y = y;
  22. NVWriteRAMDAC(nv_crtc->base.dev, nv_crtc->index,
  23. NV_PRAMDAC_CU_START_POS,
  24. XLATE(y, 0, NV_PRAMDAC_CU_START_POS_Y) |
  25. XLATE(x, 0, NV_PRAMDAC_CU_START_POS_X));
  26. }
  27. static void
  28. crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index)
  29. {
  30. NVWriteVgaCrtc(crtc->dev, nouveau_crtc(crtc)->index, index,
  31. crtcstate->CRTC[index]);
  32. }
  33. static void
  34. nv04_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset)
  35. {
  36. struct drm_device *dev = nv_crtc->base.dev;
  37. struct nouveau_drm *drm = nouveau_drm(dev);
  38. struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];
  39. struct drm_crtc *crtc = &nv_crtc->base;
  40. regp->CRTC[NV_CIO_CRE_HCUR_ADDR0_INDEX] =
  41. MASK(NV_CIO_CRE_HCUR_ASI) |
  42. XLATE(offset, 17, NV_CIO_CRE_HCUR_ADDR0_ADR);
  43. regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] =
  44. XLATE(offset, 11, NV_CIO_CRE_HCUR_ADDR1_ADR);
  45. if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)
  46. regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] |=
  47. MASK(NV_CIO_CRE_HCUR_ADDR1_CUR_DBL);
  48. regp->CRTC[NV_CIO_CRE_HCUR_ADDR2_INDEX] = offset >> 24;
  49. crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR0_INDEX);
  50. crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX);
  51. crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR2_INDEX);
  52. if (drm->client.device.info.family == NV_DEVICE_INFO_V0_CURIE)
  53. nv_fix_nv40_hw_cursor(dev, nv_crtc->index);
  54. }
  55. int
  56. nv04_cursor_init(struct nouveau_crtc *crtc)
  57. {
  58. crtc->cursor.set_offset = nv04_cursor_set_offset;
  59. crtc->cursor.set_pos = nv04_cursor_set_pos;
  60. crtc->cursor.hide = nv04_cursor_hide;
  61. crtc->cursor.show = nv04_cursor_show;
  62. return 0;
  63. }