intel_pmic_xpower.c 5.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281
  1. /*
  2. * intel_pmic_xpower.c - XPower AXP288 PMIC operation region driver
  3. *
  4. * Copyright (C) 2014 Intel Corporation. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License version
  8. * 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/acpi.h>
  17. #include <linux/mfd/axp20x.h>
  18. #include <linux/regmap.h>
  19. #include <linux/platform_device.h>
  20. #include "intel_pmic.h"
  21. #define XPOWER_GPADC_LOW 0x5b
  22. #define XPOWER_GPI1_CTRL 0x92
  23. #define GPI1_LDO_MASK GENMASK(2, 0)
  24. #define GPI1_LDO_ON (3 << 0)
  25. #define GPI1_LDO_OFF (4 << 0)
  26. #define AXP288_ADC_TS_PIN_GPADC 0xf2
  27. #define AXP288_ADC_TS_PIN_ON 0xf3
  28. static struct pmic_table power_table[] = {
  29. {
  30. .address = 0x00,
  31. .reg = 0x13,
  32. .bit = 0x05,
  33. }, /* ALD1 */
  34. {
  35. .address = 0x04,
  36. .reg = 0x13,
  37. .bit = 0x06,
  38. }, /* ALD2 */
  39. {
  40. .address = 0x08,
  41. .reg = 0x13,
  42. .bit = 0x07,
  43. }, /* ALD3 */
  44. {
  45. .address = 0x0c,
  46. .reg = 0x12,
  47. .bit = 0x03,
  48. }, /* DLD1 */
  49. {
  50. .address = 0x10,
  51. .reg = 0x12,
  52. .bit = 0x04,
  53. }, /* DLD2 */
  54. {
  55. .address = 0x14,
  56. .reg = 0x12,
  57. .bit = 0x05,
  58. }, /* DLD3 */
  59. {
  60. .address = 0x18,
  61. .reg = 0x12,
  62. .bit = 0x06,
  63. }, /* DLD4 */
  64. {
  65. .address = 0x1c,
  66. .reg = 0x12,
  67. .bit = 0x00,
  68. }, /* ELD1 */
  69. {
  70. .address = 0x20,
  71. .reg = 0x12,
  72. .bit = 0x01,
  73. }, /* ELD2 */
  74. {
  75. .address = 0x24,
  76. .reg = 0x12,
  77. .bit = 0x02,
  78. }, /* ELD3 */
  79. {
  80. .address = 0x28,
  81. .reg = 0x13,
  82. .bit = 0x02,
  83. }, /* FLD1 */
  84. {
  85. .address = 0x2c,
  86. .reg = 0x13,
  87. .bit = 0x03,
  88. }, /* FLD2 */
  89. {
  90. .address = 0x30,
  91. .reg = 0x13,
  92. .bit = 0x04,
  93. }, /* FLD3 */
  94. {
  95. .address = 0x34,
  96. .reg = 0x10,
  97. .bit = 0x03,
  98. }, /* BUC1 */
  99. {
  100. .address = 0x38,
  101. .reg = 0x10,
  102. .bit = 0x06,
  103. }, /* BUC2 */
  104. {
  105. .address = 0x3c,
  106. .reg = 0x10,
  107. .bit = 0x05,
  108. }, /* BUC3 */
  109. {
  110. .address = 0x40,
  111. .reg = 0x10,
  112. .bit = 0x04,
  113. }, /* BUC4 */
  114. {
  115. .address = 0x44,
  116. .reg = 0x10,
  117. .bit = 0x01,
  118. }, /* BUC5 */
  119. {
  120. .address = 0x48,
  121. .reg = 0x10,
  122. .bit = 0x00
  123. }, /* BUC6 */
  124. {
  125. .address = 0x4c,
  126. .reg = 0x92,
  127. }, /* GPI1 */
  128. };
  129. /* TMP0 - TMP5 are the same, all from GPADC */
  130. static struct pmic_table thermal_table[] = {
  131. {
  132. .address = 0x00,
  133. .reg = XPOWER_GPADC_LOW
  134. },
  135. {
  136. .address = 0x0c,
  137. .reg = XPOWER_GPADC_LOW
  138. },
  139. {
  140. .address = 0x18,
  141. .reg = XPOWER_GPADC_LOW
  142. },
  143. {
  144. .address = 0x24,
  145. .reg = XPOWER_GPADC_LOW
  146. },
  147. {
  148. .address = 0x30,
  149. .reg = XPOWER_GPADC_LOW
  150. },
  151. {
  152. .address = 0x3c,
  153. .reg = XPOWER_GPADC_LOW
  154. },
  155. };
  156. static int intel_xpower_pmic_get_power(struct regmap *regmap, int reg,
  157. int bit, u64 *value)
  158. {
  159. int data;
  160. if (regmap_read(regmap, reg, &data))
  161. return -EIO;
  162. /* GPIO1 LDO regulator needs special handling */
  163. if (reg == XPOWER_GPI1_CTRL)
  164. *value = ((data & GPI1_LDO_MASK) == GPI1_LDO_ON);
  165. else
  166. *value = (data & BIT(bit)) ? 1 : 0;
  167. return 0;
  168. }
  169. static int intel_xpower_pmic_update_power(struct regmap *regmap, int reg,
  170. int bit, bool on)
  171. {
  172. int data;
  173. /* GPIO1 LDO regulator needs special handling */
  174. if (reg == XPOWER_GPI1_CTRL)
  175. return regmap_update_bits(regmap, reg, GPI1_LDO_MASK,
  176. on ? GPI1_LDO_ON : GPI1_LDO_OFF);
  177. if (regmap_read(regmap, reg, &data))
  178. return -EIO;
  179. if (on)
  180. data |= BIT(bit);
  181. else
  182. data &= ~BIT(bit);
  183. if (regmap_write(regmap, reg, data))
  184. return -EIO;
  185. return 0;
  186. }
  187. /**
  188. * intel_xpower_pmic_get_raw_temp(): Get raw temperature reading from the PMIC
  189. *
  190. * @regmap: regmap of the PMIC device
  191. * @reg: register to get the reading
  192. *
  193. * Return a positive value on success, errno on failure.
  194. */
  195. static int intel_xpower_pmic_get_raw_temp(struct regmap *regmap, int reg)
  196. {
  197. u8 buf[2];
  198. int ret;
  199. ret = regmap_write(regmap, AXP288_ADC_TS_PIN_CTRL,
  200. AXP288_ADC_TS_PIN_GPADC);
  201. if (ret)
  202. return ret;
  203. /* After switching to the GPADC pin give things some time to settle */
  204. usleep_range(6000, 10000);
  205. ret = regmap_bulk_read(regmap, AXP288_GP_ADC_H, buf, 2);
  206. if (ret == 0)
  207. ret = (buf[0] << 4) + ((buf[1] >> 4) & 0x0f);
  208. regmap_write(regmap, AXP288_ADC_TS_PIN_CTRL, AXP288_ADC_TS_PIN_ON);
  209. return ret;
  210. }
  211. static struct intel_pmic_opregion_data intel_xpower_pmic_opregion_data = {
  212. .get_power = intel_xpower_pmic_get_power,
  213. .update_power = intel_xpower_pmic_update_power,
  214. .get_raw_temp = intel_xpower_pmic_get_raw_temp,
  215. .power_table = power_table,
  216. .power_table_count = ARRAY_SIZE(power_table),
  217. .thermal_table = thermal_table,
  218. .thermal_table_count = ARRAY_SIZE(thermal_table),
  219. };
  220. static acpi_status intel_xpower_pmic_gpio_handler(u32 function,
  221. acpi_physical_address address, u32 bit_width, u64 *value,
  222. void *handler_context, void *region_context)
  223. {
  224. return AE_OK;
  225. }
  226. static int intel_xpower_pmic_opregion_probe(struct platform_device *pdev)
  227. {
  228. struct device *parent = pdev->dev.parent;
  229. struct axp20x_dev *axp20x = dev_get_drvdata(parent);
  230. acpi_status status;
  231. int result;
  232. status = acpi_install_address_space_handler(ACPI_HANDLE(parent),
  233. ACPI_ADR_SPACE_GPIO, intel_xpower_pmic_gpio_handler,
  234. NULL, NULL);
  235. if (ACPI_FAILURE(status))
  236. return -ENODEV;
  237. result = intel_pmic_install_opregion_handler(&pdev->dev,
  238. ACPI_HANDLE(parent), axp20x->regmap,
  239. &intel_xpower_pmic_opregion_data);
  240. if (result)
  241. acpi_remove_address_space_handler(ACPI_HANDLE(parent),
  242. ACPI_ADR_SPACE_GPIO,
  243. intel_xpower_pmic_gpio_handler);
  244. return result;
  245. }
  246. static struct platform_driver intel_xpower_pmic_opregion_driver = {
  247. .probe = intel_xpower_pmic_opregion_probe,
  248. .driver = {
  249. .name = "axp288_pmic_acpi",
  250. },
  251. };
  252. builtin_platform_driver(intel_xpower_pmic_opregion_driver);