fpga-mgr.h 5.6 KB

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  1. /*
  2. * FPGA Framework
  3. *
  4. * Copyright (C) 2013-2015 Altera Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #include <linux/mutex.h>
  19. #include <linux/platform_device.h>
  20. #ifndef _LINUX_FPGA_MGR_H
  21. #define _LINUX_FPGA_MGR_H
  22. struct fpga_manager;
  23. struct sg_table;
  24. /**
  25. * enum fpga_mgr_states - fpga framework states
  26. * @FPGA_MGR_STATE_UNKNOWN: can't determine state
  27. * @FPGA_MGR_STATE_POWER_OFF: FPGA power is off
  28. * @FPGA_MGR_STATE_POWER_UP: FPGA reports power is up
  29. * @FPGA_MGR_STATE_RESET: FPGA in reset state
  30. * @FPGA_MGR_STATE_FIRMWARE_REQ: firmware request in progress
  31. * @FPGA_MGR_STATE_FIRMWARE_REQ_ERR: firmware request failed
  32. * @FPGA_MGR_STATE_WRITE_INIT: preparing FPGA for programming
  33. * @FPGA_MGR_STATE_WRITE_INIT_ERR: Error during WRITE_INIT stage
  34. * @FPGA_MGR_STATE_WRITE: writing image to FPGA
  35. * @FPGA_MGR_STATE_WRITE_ERR: Error while writing FPGA
  36. * @FPGA_MGR_STATE_WRITE_COMPLETE: Doing post programming steps
  37. * @FPGA_MGR_STATE_WRITE_COMPLETE_ERR: Error during WRITE_COMPLETE
  38. * @FPGA_MGR_STATE_OPERATING: FPGA is programmed and operating
  39. */
  40. enum fpga_mgr_states {
  41. /* default FPGA states */
  42. FPGA_MGR_STATE_UNKNOWN,
  43. FPGA_MGR_STATE_POWER_OFF,
  44. FPGA_MGR_STATE_POWER_UP,
  45. FPGA_MGR_STATE_RESET,
  46. /* getting an image for loading */
  47. FPGA_MGR_STATE_FIRMWARE_REQ,
  48. FPGA_MGR_STATE_FIRMWARE_REQ_ERR,
  49. /* write sequence: init, write, complete */
  50. FPGA_MGR_STATE_WRITE_INIT,
  51. FPGA_MGR_STATE_WRITE_INIT_ERR,
  52. FPGA_MGR_STATE_WRITE,
  53. FPGA_MGR_STATE_WRITE_ERR,
  54. FPGA_MGR_STATE_WRITE_COMPLETE,
  55. FPGA_MGR_STATE_WRITE_COMPLETE_ERR,
  56. /* fpga is programmed and operating */
  57. FPGA_MGR_STATE_OPERATING,
  58. };
  59. /*
  60. * FPGA Manager flags
  61. * FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported
  62. * FPGA_MGR_EXTERNAL_CONFIG: FPGA has been configured prior to Linux booting
  63. * FPGA_MGR_BITSTREAM_LSB_FIRST: SPI bitstream bit order is LSB first
  64. * FPGA_MGR_COMPRESSED_BITSTREAM: FPGA bitstream is compressed
  65. */
  66. #define FPGA_MGR_PARTIAL_RECONFIG BIT(0)
  67. #define FPGA_MGR_EXTERNAL_CONFIG BIT(1)
  68. #define FPGA_MGR_ENCRYPTED_BITSTREAM BIT(2)
  69. #define FPGA_MGR_BITSTREAM_LSB_FIRST BIT(3)
  70. #define FPGA_MGR_COMPRESSED_BITSTREAM BIT(4)
  71. /**
  72. * struct fpga_image_info - information specific to a FPGA image
  73. * @flags: boolean flags as defined above
  74. * @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
  75. * @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
  76. * @config_complete_timeout_us: maximum time for FPGA to switch to operating
  77. * status in the write_complete op.
  78. */
  79. struct fpga_image_info {
  80. u32 flags;
  81. u32 enable_timeout_us;
  82. u32 disable_timeout_us;
  83. u32 config_complete_timeout_us;
  84. };
  85. /**
  86. * struct fpga_manager_ops - ops for low level fpga manager drivers
  87. * @initial_header_size: Maximum number of bytes that should be passed into write_init
  88. * @state: returns an enum value of the FPGA's state
  89. * @write_init: prepare the FPGA to receive confuration data
  90. * @write: write count bytes of configuration data to the FPGA
  91. * @write_sg: write the scatter list of configuration data to the FPGA
  92. * @write_complete: set FPGA to operating state after writing is done
  93. * @fpga_remove: optional: Set FPGA into a specific state during driver remove
  94. *
  95. * fpga_manager_ops are the low level functions implemented by a specific
  96. * fpga manager driver. The optional ones are tested for NULL before being
  97. * called, so leaving them out is fine.
  98. */
  99. struct fpga_manager_ops {
  100. size_t initial_header_size;
  101. enum fpga_mgr_states (*state)(struct fpga_manager *mgr);
  102. int (*write_init)(struct fpga_manager *mgr,
  103. struct fpga_image_info *info,
  104. const char *buf, size_t count);
  105. int (*write)(struct fpga_manager *mgr, const char *buf, size_t count);
  106. int (*write_sg)(struct fpga_manager *mgr, struct sg_table *sgt);
  107. int (*write_complete)(struct fpga_manager *mgr,
  108. struct fpga_image_info *info);
  109. void (*fpga_remove)(struct fpga_manager *mgr);
  110. };
  111. /**
  112. * struct fpga_manager - fpga manager structure
  113. * @name: name of low level fpga manager
  114. * @dev: fpga manager device
  115. * @ref_mutex: only allows one reference to fpga manager
  116. * @state: state of fpga manager
  117. * @mops: pointer to struct of fpga manager ops
  118. * @priv: low level driver private date
  119. */
  120. struct fpga_manager {
  121. const char *name;
  122. struct device dev;
  123. struct mutex ref_mutex;
  124. enum fpga_mgr_states state;
  125. const struct fpga_manager_ops *mops;
  126. void *priv;
  127. };
  128. #define to_fpga_manager(d) container_of(d, struct fpga_manager, dev)
  129. int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
  130. const char *buf, size_t count);
  131. int fpga_mgr_buf_load_sg(struct fpga_manager *mgr, struct fpga_image_info *info,
  132. struct sg_table *sgt);
  133. int fpga_mgr_firmware_load(struct fpga_manager *mgr,
  134. struct fpga_image_info *info,
  135. const char *image_name);
  136. struct fpga_manager *of_fpga_mgr_get(struct device_node *node);
  137. struct fpga_manager *fpga_mgr_get(struct device *dev);
  138. void fpga_mgr_put(struct fpga_manager *mgr);
  139. int fpga_mgr_register(struct device *dev, const char *name,
  140. const struct fpga_manager_ops *mops, void *priv);
  141. void fpga_mgr_unregister(struct device *dev);
  142. #endif /*_LINUX_FPGA_MGR_H */