htt_rx.c 43 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include "core.h"
  18. #include "htc.h"
  19. #include "htt.h"
  20. #include "txrx.h"
  21. #include "debug.h"
  22. #include "trace.h"
  23. #include <linux/log2.h>
  24. /* slightly larger than one large A-MPDU */
  25. #define HTT_RX_RING_SIZE_MIN 128
  26. /* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
  27. #define HTT_RX_RING_SIZE_MAX 2048
  28. #define HTT_RX_AVG_FRM_BYTES 1000
  29. /* ms, very conservative */
  30. #define HTT_RX_HOST_LATENCY_MAX_MS 20
  31. /* ms, conservative */
  32. #define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
  33. /* when under memory pressure rx ring refill may fail and needs a retry */
  34. #define HTT_RX_RING_REFILL_RETRY_MS 50
  35. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
  36. static void ath10k_htt_txrx_compl_task(unsigned long ptr);
  37. static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
  38. {
  39. int size;
  40. /*
  41. * It is expected that the host CPU will typically be able to
  42. * service the rx indication from one A-MPDU before the rx
  43. * indication from the subsequent A-MPDU happens, roughly 1-2 ms
  44. * later. However, the rx ring should be sized very conservatively,
  45. * to accomodate the worst reasonable delay before the host CPU
  46. * services a rx indication interrupt.
  47. *
  48. * The rx ring need not be kept full of empty buffers. In theory,
  49. * the htt host SW can dynamically track the low-water mark in the
  50. * rx ring, and dynamically adjust the level to which the rx ring
  51. * is filled with empty buffers, to dynamically meet the desired
  52. * low-water mark.
  53. *
  54. * In contrast, it's difficult to resize the rx ring itself, once
  55. * it's in use. Thus, the ring itself should be sized very
  56. * conservatively, while the degree to which the ring is filled
  57. * with empty buffers should be sized moderately conservatively.
  58. */
  59. /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
  60. size =
  61. htt->max_throughput_mbps +
  62. 1000 /
  63. (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
  64. if (size < HTT_RX_RING_SIZE_MIN)
  65. size = HTT_RX_RING_SIZE_MIN;
  66. if (size > HTT_RX_RING_SIZE_MAX)
  67. size = HTT_RX_RING_SIZE_MAX;
  68. size = roundup_pow_of_two(size);
  69. return size;
  70. }
  71. static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
  72. {
  73. int size;
  74. /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
  75. size =
  76. htt->max_throughput_mbps *
  77. 1000 /
  78. (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
  79. /*
  80. * Make sure the fill level is at least 1 less than the ring size.
  81. * Leaving 1 element empty allows the SW to easily distinguish
  82. * between a full ring vs. an empty ring.
  83. */
  84. if (size >= htt->rx_ring.size)
  85. size = htt->rx_ring.size - 1;
  86. return size;
  87. }
  88. static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
  89. {
  90. struct sk_buff *skb;
  91. struct ath10k_skb_cb *cb;
  92. int i;
  93. for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
  94. skb = htt->rx_ring.netbufs_ring[i];
  95. cb = ATH10K_SKB_CB(skb);
  96. dma_unmap_single(htt->ar->dev, cb->paddr,
  97. skb->len + skb_tailroom(skb),
  98. DMA_FROM_DEVICE);
  99. dev_kfree_skb_any(skb);
  100. }
  101. htt->rx_ring.fill_cnt = 0;
  102. }
  103. static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  104. {
  105. struct htt_rx_desc *rx_desc;
  106. struct sk_buff *skb;
  107. dma_addr_t paddr;
  108. int ret = 0, idx;
  109. idx = __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr));
  110. while (num > 0) {
  111. skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
  112. if (!skb) {
  113. ret = -ENOMEM;
  114. goto fail;
  115. }
  116. if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
  117. skb_pull(skb,
  118. PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
  119. skb->data);
  120. /* Clear rx_desc attention word before posting to Rx ring */
  121. rx_desc = (struct htt_rx_desc *)skb->data;
  122. rx_desc->attention.flags = __cpu_to_le32(0);
  123. paddr = dma_map_single(htt->ar->dev, skb->data,
  124. skb->len + skb_tailroom(skb),
  125. DMA_FROM_DEVICE);
  126. if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
  127. dev_kfree_skb_any(skb);
  128. ret = -ENOMEM;
  129. goto fail;
  130. }
  131. ATH10K_SKB_CB(skb)->paddr = paddr;
  132. htt->rx_ring.netbufs_ring[idx] = skb;
  133. htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
  134. htt->rx_ring.fill_cnt++;
  135. num--;
  136. idx++;
  137. idx &= htt->rx_ring.size_mask;
  138. }
  139. fail:
  140. *(htt->rx_ring.alloc_idx.vaddr) = __cpu_to_le32(idx);
  141. return ret;
  142. }
  143. static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  144. {
  145. lockdep_assert_held(&htt->rx_ring.lock);
  146. return __ath10k_htt_rx_ring_fill_n(htt, num);
  147. }
  148. static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
  149. {
  150. int ret, num_deficit, num_to_fill;
  151. /* Refilling the whole RX ring buffer proves to be a bad idea. The
  152. * reason is RX may take up significant amount of CPU cycles and starve
  153. * other tasks, e.g. TX on an ethernet device while acting as a bridge
  154. * with ath10k wlan interface. This ended up with very poor performance
  155. * once CPU the host system was overwhelmed with RX on ath10k.
  156. *
  157. * By limiting the number of refills the replenishing occurs
  158. * progressively. This in turns makes use of the fact tasklets are
  159. * processed in FIFO order. This means actual RX processing can starve
  160. * out refilling. If there's not enough buffers on RX ring FW will not
  161. * report RX until it is refilled with enough buffers. This
  162. * automatically balances load wrt to CPU power.
  163. *
  164. * This probably comes at a cost of lower maximum throughput but
  165. * improves the avarage and stability. */
  166. spin_lock_bh(&htt->rx_ring.lock);
  167. num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
  168. num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
  169. num_deficit -= num_to_fill;
  170. ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
  171. if (ret == -ENOMEM) {
  172. /*
  173. * Failed to fill it to the desired level -
  174. * we'll start a timer and try again next time.
  175. * As long as enough buffers are left in the ring for
  176. * another A-MPDU rx, no special recovery is needed.
  177. */
  178. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  179. msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
  180. } else if (num_deficit > 0) {
  181. tasklet_schedule(&htt->rx_replenish_task);
  182. }
  183. spin_unlock_bh(&htt->rx_ring.lock);
  184. }
  185. static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
  186. {
  187. struct ath10k_htt *htt = (struct ath10k_htt *)arg;
  188. ath10k_htt_rx_msdu_buff_replenish(htt);
  189. }
  190. static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt)
  191. {
  192. struct sk_buff *skb;
  193. int i;
  194. for (i = 0; i < htt->rx_ring.size; i++) {
  195. skb = htt->rx_ring.netbufs_ring[i];
  196. if (!skb)
  197. continue;
  198. dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr,
  199. skb->len + skb_tailroom(skb),
  200. DMA_FROM_DEVICE);
  201. dev_kfree_skb_any(skb);
  202. htt->rx_ring.netbufs_ring[i] = NULL;
  203. }
  204. }
  205. void ath10k_htt_rx_free(struct ath10k_htt *htt)
  206. {
  207. del_timer_sync(&htt->rx_ring.refill_retry_timer);
  208. tasklet_kill(&htt->rx_replenish_task);
  209. tasklet_kill(&htt->txrx_compl_task);
  210. skb_queue_purge(&htt->tx_compl_q);
  211. skb_queue_purge(&htt->rx_compl_q);
  212. ath10k_htt_rx_ring_clean_up(htt);
  213. dma_free_coherent(htt->ar->dev,
  214. (htt->rx_ring.size *
  215. sizeof(htt->rx_ring.paddrs_ring)),
  216. htt->rx_ring.paddrs_ring,
  217. htt->rx_ring.base_paddr);
  218. dma_free_coherent(htt->ar->dev,
  219. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  220. htt->rx_ring.alloc_idx.vaddr,
  221. htt->rx_ring.alloc_idx.paddr);
  222. kfree(htt->rx_ring.netbufs_ring);
  223. }
  224. static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
  225. {
  226. int idx;
  227. struct sk_buff *msdu;
  228. lockdep_assert_held(&htt->rx_ring.lock);
  229. if (htt->rx_ring.fill_cnt == 0) {
  230. ath10k_warn("tried to pop sk_buff from an empty rx ring\n");
  231. return NULL;
  232. }
  233. idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  234. msdu = htt->rx_ring.netbufs_ring[idx];
  235. htt->rx_ring.netbufs_ring[idx] = NULL;
  236. idx++;
  237. idx &= htt->rx_ring.size_mask;
  238. htt->rx_ring.sw_rd_idx.msdu_payld = idx;
  239. htt->rx_ring.fill_cnt--;
  240. return msdu;
  241. }
  242. static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
  243. {
  244. struct sk_buff *next;
  245. while (skb) {
  246. next = skb->next;
  247. dev_kfree_skb_any(skb);
  248. skb = next;
  249. }
  250. }
  251. /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
  252. static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
  253. u8 **fw_desc, int *fw_desc_len,
  254. struct sk_buff **head_msdu,
  255. struct sk_buff **tail_msdu)
  256. {
  257. int msdu_len, msdu_chaining = 0;
  258. struct sk_buff *msdu;
  259. struct htt_rx_desc *rx_desc;
  260. bool corrupted = false;
  261. lockdep_assert_held(&htt->rx_ring.lock);
  262. if (htt->rx_confused) {
  263. ath10k_warn("htt is confused. refusing rx\n");
  264. return -1;
  265. }
  266. msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
  267. while (msdu) {
  268. int last_msdu, msdu_len_invalid, msdu_chained;
  269. dma_unmap_single(htt->ar->dev,
  270. ATH10K_SKB_CB(msdu)->paddr,
  271. msdu->len + skb_tailroom(msdu),
  272. DMA_FROM_DEVICE);
  273. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ",
  274. msdu->data, msdu->len + skb_tailroom(msdu));
  275. rx_desc = (struct htt_rx_desc *)msdu->data;
  276. /* FIXME: we must report msdu payload since this is what caller
  277. * expects now */
  278. skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  279. skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  280. /*
  281. * Sanity check - confirm the HW is finished filling in the
  282. * rx data.
  283. * If the HW and SW are working correctly, then it's guaranteed
  284. * that the HW's MAC DMA is done before this point in the SW.
  285. * To prevent the case that we handle a stale Rx descriptor,
  286. * just assert for now until we have a way to recover.
  287. */
  288. if (!(__le32_to_cpu(rx_desc->attention.flags)
  289. & RX_ATTENTION_FLAGS_MSDU_DONE)) {
  290. ath10k_htt_rx_free_msdu_chain(*head_msdu);
  291. *head_msdu = NULL;
  292. msdu = NULL;
  293. ath10k_err("htt rx stopped. cannot recover\n");
  294. htt->rx_confused = true;
  295. break;
  296. }
  297. /*
  298. * Copy the FW rx descriptor for this MSDU from the rx
  299. * indication message into the MSDU's netbuf. HL uses the
  300. * same rx indication message definition as LL, and simply
  301. * appends new info (fields from the HW rx desc, and the
  302. * MSDU payload itself). So, the offset into the rx
  303. * indication message only has to account for the standard
  304. * offset of the per-MSDU FW rx desc info within the
  305. * message, and how many bytes of the per-MSDU FW rx desc
  306. * info have already been consumed. (And the endianness of
  307. * the host, since for a big-endian host, the rx ind
  308. * message contents, including the per-MSDU rx desc bytes,
  309. * were byteswapped during upload.)
  310. */
  311. if (*fw_desc_len > 0) {
  312. rx_desc->fw_desc.info0 = **fw_desc;
  313. /*
  314. * The target is expected to only provide the basic
  315. * per-MSDU rx descriptors. Just to be sure, verify
  316. * that the target has not attached extension data
  317. * (e.g. LRO flow ID).
  318. */
  319. /* or more, if there's extension data */
  320. (*fw_desc)++;
  321. (*fw_desc_len)--;
  322. } else {
  323. /*
  324. * When an oversized AMSDU happened, FW will lost
  325. * some of MSDU status - in this case, the FW
  326. * descriptors provided will be less than the
  327. * actual MSDUs inside this MPDU. Mark the FW
  328. * descriptors so that it will still deliver to
  329. * upper stack, if no CRC error for this MPDU.
  330. *
  331. * FIX THIS - the FW descriptors are actually for
  332. * MSDUs in the end of this A-MSDU instead of the
  333. * beginning.
  334. */
  335. rx_desc->fw_desc.info0 = 0;
  336. }
  337. msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
  338. & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
  339. RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
  340. msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
  341. RX_MSDU_START_INFO0_MSDU_LENGTH);
  342. msdu_chained = rx_desc->frag_info.ring2_more_count;
  343. if (msdu_len_invalid)
  344. msdu_len = 0;
  345. skb_trim(msdu, 0);
  346. skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
  347. msdu_len -= msdu->len;
  348. /* FIXME: Do chained buffers include htt_rx_desc or not? */
  349. while (msdu_chained--) {
  350. struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
  351. dma_unmap_single(htt->ar->dev,
  352. ATH10K_SKB_CB(next)->paddr,
  353. next->len + skb_tailroom(next),
  354. DMA_FROM_DEVICE);
  355. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL,
  356. "htt rx chained: ", next->data,
  357. next->len + skb_tailroom(next));
  358. skb_trim(next, 0);
  359. skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
  360. msdu_len -= next->len;
  361. msdu->next = next;
  362. msdu = next;
  363. msdu_chaining = 1;
  364. }
  365. last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
  366. RX_MSDU_END_INFO0_LAST_MSDU;
  367. if (msdu_chaining && !last_msdu)
  368. corrupted = true;
  369. if (last_msdu) {
  370. msdu->next = NULL;
  371. break;
  372. } else {
  373. struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
  374. msdu->next = next;
  375. msdu = next;
  376. }
  377. }
  378. *tail_msdu = msdu;
  379. if (*head_msdu == NULL)
  380. msdu_chaining = -1;
  381. /*
  382. * Apparently FW sometimes reports weird chained MSDU sequences with
  383. * more than one rx descriptor. This seems like a bug but needs more
  384. * analyzing. For the time being fix it by dropping such sequences to
  385. * avoid blowing up the host system.
  386. */
  387. if (corrupted) {
  388. ath10k_warn("failed to pop chained msdus, dropping\n");
  389. ath10k_htt_rx_free_msdu_chain(*head_msdu);
  390. *head_msdu = NULL;
  391. *tail_msdu = NULL;
  392. msdu_chaining = -EINVAL;
  393. }
  394. /*
  395. * Don't refill the ring yet.
  396. *
  397. * First, the elements popped here are still in use - it is not
  398. * safe to overwrite them until the matching call to
  399. * mpdu_desc_list_next. Second, for efficiency it is preferable to
  400. * refill the rx ring with 1 PPDU's worth of rx buffers (something
  401. * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
  402. * (something like 3 buffers). Consequently, we'll rely on the txrx
  403. * SW to tell us when it is done pulling all the PPDU's rx buffers
  404. * out of the rx ring, and then refill it just once.
  405. */
  406. return msdu_chaining;
  407. }
  408. static void ath10k_htt_rx_replenish_task(unsigned long ptr)
  409. {
  410. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  411. ath10k_htt_rx_msdu_buff_replenish(htt);
  412. }
  413. int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
  414. {
  415. dma_addr_t paddr;
  416. void *vaddr;
  417. struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
  418. htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
  419. if (!is_power_of_2(htt->rx_ring.size)) {
  420. ath10k_warn("htt rx ring size is not power of 2\n");
  421. return -EINVAL;
  422. }
  423. htt->rx_ring.size_mask = htt->rx_ring.size - 1;
  424. /*
  425. * Set the initial value for the level to which the rx ring
  426. * should be filled, based on the max throughput and the
  427. * worst likely latency for the host to fill the rx ring
  428. * with new buffers. In theory, this fill level can be
  429. * dynamically adjusted from the initial value set here, to
  430. * reflect the actual host latency rather than a
  431. * conservative assumption about the host latency.
  432. */
  433. htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
  434. htt->rx_ring.netbufs_ring =
  435. kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
  436. GFP_KERNEL);
  437. if (!htt->rx_ring.netbufs_ring)
  438. goto err_netbuf;
  439. vaddr = dma_alloc_coherent(htt->ar->dev,
  440. (htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring)),
  441. &paddr, GFP_DMA);
  442. if (!vaddr)
  443. goto err_dma_ring;
  444. htt->rx_ring.paddrs_ring = vaddr;
  445. htt->rx_ring.base_paddr = paddr;
  446. vaddr = dma_alloc_coherent(htt->ar->dev,
  447. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  448. &paddr, GFP_DMA);
  449. if (!vaddr)
  450. goto err_dma_idx;
  451. htt->rx_ring.alloc_idx.vaddr = vaddr;
  452. htt->rx_ring.alloc_idx.paddr = paddr;
  453. htt->rx_ring.sw_rd_idx.msdu_payld = 0;
  454. *htt->rx_ring.alloc_idx.vaddr = 0;
  455. /* Initialize the Rx refill retry timer */
  456. setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
  457. spin_lock_init(&htt->rx_ring.lock);
  458. htt->rx_ring.fill_cnt = 0;
  459. if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
  460. goto err_fill_ring;
  461. tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
  462. (unsigned long)htt);
  463. skb_queue_head_init(&htt->tx_compl_q);
  464. skb_queue_head_init(&htt->rx_compl_q);
  465. tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
  466. (unsigned long)htt);
  467. ath10k_dbg(ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
  468. htt->rx_ring.size, htt->rx_ring.fill_level);
  469. return 0;
  470. err_fill_ring:
  471. ath10k_htt_rx_ring_free(htt);
  472. dma_free_coherent(htt->ar->dev,
  473. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  474. htt->rx_ring.alloc_idx.vaddr,
  475. htt->rx_ring.alloc_idx.paddr);
  476. err_dma_idx:
  477. dma_free_coherent(htt->ar->dev,
  478. (htt->rx_ring.size *
  479. sizeof(htt->rx_ring.paddrs_ring)),
  480. htt->rx_ring.paddrs_ring,
  481. htt->rx_ring.base_paddr);
  482. err_dma_ring:
  483. kfree(htt->rx_ring.netbufs_ring);
  484. err_netbuf:
  485. return -ENOMEM;
  486. }
  487. static int ath10k_htt_rx_crypto_param_len(enum htt_rx_mpdu_encrypt_type type)
  488. {
  489. switch (type) {
  490. case HTT_RX_MPDU_ENCRYPT_WEP40:
  491. case HTT_RX_MPDU_ENCRYPT_WEP104:
  492. return 4;
  493. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  494. case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */
  495. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  496. case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */
  497. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  498. return 8;
  499. case HTT_RX_MPDU_ENCRYPT_NONE:
  500. return 0;
  501. }
  502. ath10k_warn("unknown encryption type %d\n", type);
  503. return 0;
  504. }
  505. static int ath10k_htt_rx_crypto_tail_len(enum htt_rx_mpdu_encrypt_type type)
  506. {
  507. switch (type) {
  508. case HTT_RX_MPDU_ENCRYPT_NONE:
  509. case HTT_RX_MPDU_ENCRYPT_WEP40:
  510. case HTT_RX_MPDU_ENCRYPT_WEP104:
  511. case HTT_RX_MPDU_ENCRYPT_WEP128:
  512. case HTT_RX_MPDU_ENCRYPT_WAPI:
  513. return 0;
  514. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  515. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  516. return 4;
  517. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  518. return 8;
  519. }
  520. ath10k_warn("unknown encryption type %d\n", type);
  521. return 0;
  522. }
  523. /* Applies for first msdu in chain, before altering it. */
  524. static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
  525. {
  526. struct htt_rx_desc *rxd;
  527. enum rx_msdu_decap_format fmt;
  528. rxd = (void *)skb->data - sizeof(*rxd);
  529. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  530. RX_MSDU_START_INFO1_DECAP_FORMAT);
  531. if (fmt == RX_MSDU_DECAP_RAW)
  532. return (void *)skb->data;
  533. else
  534. return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
  535. }
  536. /* This function only applies for first msdu in an msdu chain */
  537. static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
  538. {
  539. if (ieee80211_is_data_qos(hdr->frame_control)) {
  540. u8 *qc = ieee80211_get_qos_ctl(hdr);
  541. if (qc[0] & 0x80)
  542. return true;
  543. }
  544. return false;
  545. }
  546. struct rfc1042_hdr {
  547. u8 llc_dsap;
  548. u8 llc_ssap;
  549. u8 llc_ctrl;
  550. u8 snap_oui[3];
  551. __be16 snap_type;
  552. } __packed;
  553. struct amsdu_subframe_hdr {
  554. u8 dst[ETH_ALEN];
  555. u8 src[ETH_ALEN];
  556. __be16 len;
  557. } __packed;
  558. static const u8 rx_legacy_rate_idx[] = {
  559. 3, /* 0x00 - 11Mbps */
  560. 2, /* 0x01 - 5.5Mbps */
  561. 1, /* 0x02 - 2Mbps */
  562. 0, /* 0x03 - 1Mbps */
  563. 3, /* 0x04 - 11Mbps */
  564. 2, /* 0x05 - 5.5Mbps */
  565. 1, /* 0x06 - 2Mbps */
  566. 0, /* 0x07 - 1Mbps */
  567. 10, /* 0x08 - 48Mbps */
  568. 8, /* 0x09 - 24Mbps */
  569. 6, /* 0x0A - 12Mbps */
  570. 4, /* 0x0B - 6Mbps */
  571. 11, /* 0x0C - 54Mbps */
  572. 9, /* 0x0D - 36Mbps */
  573. 7, /* 0x0E - 18Mbps */
  574. 5, /* 0x0F - 9Mbps */
  575. };
  576. static void ath10k_htt_rx_h_rates(struct ath10k *ar,
  577. enum ieee80211_band band,
  578. u8 info0, u32 info1, u32 info2,
  579. struct ieee80211_rx_status *status)
  580. {
  581. u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
  582. u8 preamble = 0;
  583. /* Check if valid fields */
  584. if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
  585. return;
  586. preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
  587. switch (preamble) {
  588. case HTT_RX_LEGACY:
  589. cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
  590. rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
  591. rate_idx = 0;
  592. if (rate < 0x08 || rate > 0x0F)
  593. break;
  594. switch (band) {
  595. case IEEE80211_BAND_2GHZ:
  596. if (cck)
  597. rate &= ~BIT(3);
  598. rate_idx = rx_legacy_rate_idx[rate];
  599. break;
  600. case IEEE80211_BAND_5GHZ:
  601. rate_idx = rx_legacy_rate_idx[rate];
  602. /* We are using same rate table registering
  603. HW - ath10k_rates[]. In case of 5GHz skip
  604. CCK rates, so -4 here */
  605. rate_idx -= 4;
  606. break;
  607. default:
  608. break;
  609. }
  610. status->rate_idx = rate_idx;
  611. break;
  612. case HTT_RX_HT:
  613. case HTT_RX_HT_WITH_TXBF:
  614. /* HT-SIG - Table 20-11 in info1 and info2 */
  615. mcs = info1 & 0x1F;
  616. nss = mcs >> 3;
  617. bw = (info1 >> 7) & 1;
  618. sgi = (info2 >> 7) & 1;
  619. status->rate_idx = mcs;
  620. status->flag |= RX_FLAG_HT;
  621. if (sgi)
  622. status->flag |= RX_FLAG_SHORT_GI;
  623. if (bw)
  624. status->flag |= RX_FLAG_40MHZ;
  625. break;
  626. case HTT_RX_VHT:
  627. case HTT_RX_VHT_WITH_TXBF:
  628. /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
  629. TODO check this */
  630. mcs = (info2 >> 4) & 0x0F;
  631. nss = ((info1 >> 10) & 0x07) + 1;
  632. bw = info1 & 3;
  633. sgi = info2 & 1;
  634. status->rate_idx = mcs;
  635. status->vht_nss = nss;
  636. if (sgi)
  637. status->flag |= RX_FLAG_SHORT_GI;
  638. switch (bw) {
  639. /* 20MHZ */
  640. case 0:
  641. break;
  642. /* 40MHZ */
  643. case 1:
  644. status->flag |= RX_FLAG_40MHZ;
  645. break;
  646. /* 80MHZ */
  647. case 2:
  648. status->vht_flag |= RX_VHT_FLAG_80MHZ;
  649. }
  650. status->flag |= RX_FLAG_VHT;
  651. break;
  652. default:
  653. break;
  654. }
  655. }
  656. static void ath10k_htt_rx_h_protected(struct ath10k_htt *htt,
  657. struct ieee80211_rx_status *rx_status,
  658. struct sk_buff *skb,
  659. enum htt_rx_mpdu_encrypt_type enctype,
  660. enum rx_msdu_decap_format fmt,
  661. bool dot11frag)
  662. {
  663. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  664. rx_status->flag &= ~(RX_FLAG_DECRYPTED |
  665. RX_FLAG_IV_STRIPPED |
  666. RX_FLAG_MMIC_STRIPPED);
  667. if (enctype == HTT_RX_MPDU_ENCRYPT_NONE)
  668. return;
  669. /*
  670. * There's no explicit rx descriptor flag to indicate whether a given
  671. * frame has been decrypted or not. We're forced to use the decap
  672. * format as an implicit indication. However fragmentation rx is always
  673. * raw and it probably never reports undecrypted raws.
  674. *
  675. * This makes sure sniffed frames are reported as-is without stripping
  676. * the protected flag.
  677. */
  678. if (fmt == RX_MSDU_DECAP_RAW && !dot11frag)
  679. return;
  680. rx_status->flag |= RX_FLAG_DECRYPTED |
  681. RX_FLAG_IV_STRIPPED |
  682. RX_FLAG_MMIC_STRIPPED;
  683. hdr->frame_control = __cpu_to_le16(__le16_to_cpu(hdr->frame_control) &
  684. ~IEEE80211_FCTL_PROTECTED);
  685. }
  686. static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
  687. struct ieee80211_rx_status *status)
  688. {
  689. struct ieee80211_channel *ch;
  690. spin_lock_bh(&ar->data_lock);
  691. ch = ar->scan_channel;
  692. if (!ch)
  693. ch = ar->rx_channel;
  694. spin_unlock_bh(&ar->data_lock);
  695. if (!ch)
  696. return false;
  697. status->band = ch->band;
  698. status->freq = ch->center_freq;
  699. return true;
  700. }
  701. static void ath10k_process_rx(struct ath10k *ar,
  702. struct ieee80211_rx_status *rx_status,
  703. struct sk_buff *skb)
  704. {
  705. struct ieee80211_rx_status *status;
  706. status = IEEE80211_SKB_RXCB(skb);
  707. *status = *rx_status;
  708. ath10k_dbg(ATH10K_DBG_DATA,
  709. "rx skb %p len %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %imic-err %i\n",
  710. skb,
  711. skb->len,
  712. status->flag == 0 ? "legacy" : "",
  713. status->flag & RX_FLAG_HT ? "ht" : "",
  714. status->flag & RX_FLAG_VHT ? "vht" : "",
  715. status->flag & RX_FLAG_40MHZ ? "40" : "",
  716. status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
  717. status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
  718. status->rate_idx,
  719. status->vht_nss,
  720. status->freq,
  721. status->band, status->flag,
  722. !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
  723. !!(status->flag & RX_FLAG_MMIC_ERROR));
  724. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
  725. skb->data, skb->len);
  726. ieee80211_rx(ar->hw, skb);
  727. }
  728. static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
  729. {
  730. /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
  731. return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
  732. }
  733. static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
  734. struct ieee80211_rx_status *rx_status,
  735. struct sk_buff *skb_in)
  736. {
  737. struct htt_rx_desc *rxd;
  738. struct sk_buff *skb = skb_in;
  739. struct sk_buff *first;
  740. enum rx_msdu_decap_format fmt;
  741. enum htt_rx_mpdu_encrypt_type enctype;
  742. struct ieee80211_hdr *hdr;
  743. u8 hdr_buf[64], addr[ETH_ALEN], *qos;
  744. unsigned int hdr_len;
  745. rxd = (void *)skb->data - sizeof(*rxd);
  746. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  747. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  748. hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
  749. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  750. memcpy(hdr_buf, hdr, hdr_len);
  751. hdr = (struct ieee80211_hdr *)hdr_buf;
  752. first = skb;
  753. while (skb) {
  754. void *decap_hdr;
  755. int len;
  756. rxd = (void *)skb->data - sizeof(*rxd);
  757. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  758. RX_MSDU_START_INFO1_DECAP_FORMAT);
  759. decap_hdr = (void *)rxd->rx_hdr_status;
  760. skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
  761. /* First frame in an A-MSDU chain has more decapped data. */
  762. if (skb == first) {
  763. len = round_up(ieee80211_hdrlen(hdr->frame_control), 4);
  764. len += round_up(ath10k_htt_rx_crypto_param_len(enctype),
  765. 4);
  766. decap_hdr += len;
  767. }
  768. switch (fmt) {
  769. case RX_MSDU_DECAP_RAW:
  770. /* remove trailing FCS */
  771. skb_trim(skb, skb->len - FCS_LEN);
  772. break;
  773. case RX_MSDU_DECAP_NATIVE_WIFI:
  774. /* pull decapped header and copy DA */
  775. hdr = (struct ieee80211_hdr *)skb->data;
  776. hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
  777. memcpy(addr, ieee80211_get_DA(hdr), ETH_ALEN);
  778. skb_pull(skb, hdr_len);
  779. /* push original 802.11 header */
  780. hdr = (struct ieee80211_hdr *)hdr_buf;
  781. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  782. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  783. /* original A-MSDU header has the bit set but we're
  784. * not including A-MSDU subframe header */
  785. hdr = (struct ieee80211_hdr *)skb->data;
  786. qos = ieee80211_get_qos_ctl(hdr);
  787. qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
  788. /* original 802.11 header has a different DA */
  789. memcpy(ieee80211_get_DA(hdr), addr, ETH_ALEN);
  790. break;
  791. case RX_MSDU_DECAP_ETHERNET2_DIX:
  792. /* strip ethernet header and insert decapped 802.11
  793. * header, amsdu subframe header and rfc1042 header */
  794. len = 0;
  795. len += sizeof(struct rfc1042_hdr);
  796. len += sizeof(struct amsdu_subframe_hdr);
  797. skb_pull(skb, sizeof(struct ethhdr));
  798. memcpy(skb_push(skb, len), decap_hdr, len);
  799. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  800. break;
  801. case RX_MSDU_DECAP_8023_SNAP_LLC:
  802. /* insert decapped 802.11 header making a singly
  803. * A-MSDU */
  804. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  805. break;
  806. }
  807. skb_in = skb;
  808. ath10k_htt_rx_h_protected(htt, rx_status, skb_in, enctype, fmt,
  809. false);
  810. skb = skb->next;
  811. skb_in->next = NULL;
  812. if (skb)
  813. rx_status->flag |= RX_FLAG_AMSDU_MORE;
  814. else
  815. rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
  816. ath10k_process_rx(htt->ar, rx_status, skb_in);
  817. }
  818. /* FIXME: It might be nice to re-assemble the A-MSDU when there's a
  819. * monitor interface active for sniffing purposes. */
  820. }
  821. static void ath10k_htt_rx_msdu(struct ath10k_htt *htt,
  822. struct ieee80211_rx_status *rx_status,
  823. struct sk_buff *skb)
  824. {
  825. struct htt_rx_desc *rxd;
  826. struct ieee80211_hdr *hdr;
  827. enum rx_msdu_decap_format fmt;
  828. enum htt_rx_mpdu_encrypt_type enctype;
  829. int hdr_len;
  830. void *rfc1042;
  831. /* This shouldn't happen. If it does than it may be a FW bug. */
  832. if (skb->next) {
  833. ath10k_warn("htt rx received chained non A-MSDU frame\n");
  834. ath10k_htt_rx_free_msdu_chain(skb->next);
  835. skb->next = NULL;
  836. }
  837. rxd = (void *)skb->data - sizeof(*rxd);
  838. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  839. RX_MSDU_START_INFO1_DECAP_FORMAT);
  840. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  841. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  842. hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
  843. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  844. skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
  845. switch (fmt) {
  846. case RX_MSDU_DECAP_RAW:
  847. /* remove trailing FCS */
  848. skb_trim(skb, skb->len - FCS_LEN);
  849. break;
  850. case RX_MSDU_DECAP_NATIVE_WIFI:
  851. /* Pull decapped header */
  852. hdr = (struct ieee80211_hdr *)skb->data;
  853. hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
  854. skb_pull(skb, hdr_len);
  855. /* Push original header */
  856. hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
  857. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  858. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  859. break;
  860. case RX_MSDU_DECAP_ETHERNET2_DIX:
  861. /* strip ethernet header and insert decapped 802.11 header and
  862. * rfc1042 header */
  863. rfc1042 = hdr;
  864. rfc1042 += roundup(hdr_len, 4);
  865. rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(enctype), 4);
  866. skb_pull(skb, sizeof(struct ethhdr));
  867. memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)),
  868. rfc1042, sizeof(struct rfc1042_hdr));
  869. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  870. break;
  871. case RX_MSDU_DECAP_8023_SNAP_LLC:
  872. /* remove A-MSDU subframe header and insert
  873. * decapped 802.11 header. rfc1042 header is already there */
  874. skb_pull(skb, sizeof(struct amsdu_subframe_hdr));
  875. memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
  876. break;
  877. }
  878. ath10k_htt_rx_h_protected(htt, rx_status, skb, enctype, fmt, false);
  879. ath10k_process_rx(htt->ar, rx_status, skb);
  880. }
  881. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
  882. {
  883. struct htt_rx_desc *rxd;
  884. u32 flags, info;
  885. bool is_ip4, is_ip6;
  886. bool is_tcp, is_udp;
  887. bool ip_csum_ok, tcpudp_csum_ok;
  888. rxd = (void *)skb->data - sizeof(*rxd);
  889. flags = __le32_to_cpu(rxd->attention.flags);
  890. info = __le32_to_cpu(rxd->msdu_start.info1);
  891. is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
  892. is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
  893. is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
  894. is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
  895. ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
  896. tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
  897. if (!is_ip4 && !is_ip6)
  898. return CHECKSUM_NONE;
  899. if (!is_tcp && !is_udp)
  900. return CHECKSUM_NONE;
  901. if (!ip_csum_ok)
  902. return CHECKSUM_NONE;
  903. if (!tcpudp_csum_ok)
  904. return CHECKSUM_NONE;
  905. return CHECKSUM_UNNECESSARY;
  906. }
  907. static int ath10k_unchain_msdu(struct sk_buff *msdu_head)
  908. {
  909. struct sk_buff *next = msdu_head->next;
  910. struct sk_buff *to_free = next;
  911. int space;
  912. int total_len = 0;
  913. /* TODO: Might could optimize this by using
  914. * skb_try_coalesce or similar method to
  915. * decrease copying, or maybe get mac80211 to
  916. * provide a way to just receive a list of
  917. * skb?
  918. */
  919. msdu_head->next = NULL;
  920. /* Allocate total length all at once. */
  921. while (next) {
  922. total_len += next->len;
  923. next = next->next;
  924. }
  925. space = total_len - skb_tailroom(msdu_head);
  926. if ((space > 0) &&
  927. (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) {
  928. /* TODO: bump some rx-oom error stat */
  929. /* put it back together so we can free the
  930. * whole list at once.
  931. */
  932. msdu_head->next = to_free;
  933. return -1;
  934. }
  935. /* Walk list again, copying contents into
  936. * msdu_head
  937. */
  938. next = to_free;
  939. while (next) {
  940. skb_copy_from_linear_data(next, skb_put(msdu_head, next->len),
  941. next->len);
  942. next = next->next;
  943. }
  944. /* If here, we have consolidated skb. Free the
  945. * fragments and pass the main skb on up the
  946. * stack.
  947. */
  948. ath10k_htt_rx_free_msdu_chain(to_free);
  949. return 0;
  950. }
  951. static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
  952. struct sk_buff *head,
  953. enum htt_rx_mpdu_status status,
  954. bool channel_set,
  955. u32 attention)
  956. {
  957. if (head->len == 0) {
  958. ath10k_dbg(ATH10K_DBG_HTT,
  959. "htt rx dropping due to zero-len\n");
  960. return false;
  961. }
  962. if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) {
  963. ath10k_dbg(ATH10K_DBG_HTT,
  964. "htt rx dropping due to decrypt-err\n");
  965. return false;
  966. }
  967. if (!channel_set) {
  968. ath10k_warn("no channel configured; ignoring frame!\n");
  969. return false;
  970. }
  971. /* Skip mgmt frames while we handle this in WMI */
  972. if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL ||
  973. attention & RX_ATTENTION_FLAGS_MGMT_TYPE) {
  974. ath10k_dbg(ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
  975. return false;
  976. }
  977. if (status != HTT_RX_IND_MPDU_STATUS_OK &&
  978. status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
  979. status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER &&
  980. !htt->ar->monitor_started) {
  981. ath10k_dbg(ATH10K_DBG_HTT,
  982. "htt rx ignoring frame w/ status %d\n",
  983. status);
  984. return false;
  985. }
  986. if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
  987. ath10k_dbg(ATH10K_DBG_HTT,
  988. "htt rx CAC running\n");
  989. return false;
  990. }
  991. return true;
  992. }
  993. static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
  994. struct htt_rx_indication *rx)
  995. {
  996. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  997. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  998. struct htt_rx_desc *rxd;
  999. enum htt_rx_mpdu_status status;
  1000. struct ieee80211_hdr *hdr;
  1001. int num_mpdu_ranges;
  1002. u32 attention;
  1003. int fw_desc_len;
  1004. u8 *fw_desc;
  1005. bool channel_set;
  1006. int i, j;
  1007. int ret;
  1008. lockdep_assert_held(&htt->rx_ring.lock);
  1009. fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
  1010. fw_desc = (u8 *)&rx->fw_desc;
  1011. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  1012. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  1013. mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
  1014. /* Fill this once, while this is per-ppdu */
  1015. if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) {
  1016. memset(rx_status, 0, sizeof(*rx_status));
  1017. rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
  1018. rx->ppdu.combined_rssi;
  1019. }
  1020. if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) {
  1021. /* TSF available only in 32-bit */
  1022. rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff;
  1023. rx_status->flag |= RX_FLAG_MACTIME_END;
  1024. }
  1025. channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status);
  1026. if (channel_set) {
  1027. ath10k_htt_rx_h_rates(htt->ar, rx_status->band,
  1028. rx->ppdu.info0,
  1029. __le32_to_cpu(rx->ppdu.info1),
  1030. __le32_to_cpu(rx->ppdu.info2),
  1031. rx_status);
  1032. }
  1033. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
  1034. rx, sizeof(*rx) +
  1035. (sizeof(struct htt_rx_indication_mpdu_range) *
  1036. num_mpdu_ranges));
  1037. for (i = 0; i < num_mpdu_ranges; i++) {
  1038. status = mpdu_ranges[i].mpdu_range_status;
  1039. for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
  1040. struct sk_buff *msdu_head, *msdu_tail;
  1041. msdu_head = NULL;
  1042. msdu_tail = NULL;
  1043. ret = ath10k_htt_rx_amsdu_pop(htt,
  1044. &fw_desc,
  1045. &fw_desc_len,
  1046. &msdu_head,
  1047. &msdu_tail);
  1048. if (ret < 0) {
  1049. ath10k_warn("failed to pop amsdu from htt rx ring %d\n",
  1050. ret);
  1051. ath10k_htt_rx_free_msdu_chain(msdu_head);
  1052. continue;
  1053. }
  1054. rxd = container_of((void *)msdu_head->data,
  1055. struct htt_rx_desc,
  1056. msdu_payload);
  1057. attention = __le32_to_cpu(rxd->attention.flags);
  1058. if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head,
  1059. status,
  1060. channel_set,
  1061. attention)) {
  1062. ath10k_htt_rx_free_msdu_chain(msdu_head);
  1063. continue;
  1064. }
  1065. if (ret > 0 &&
  1066. ath10k_unchain_msdu(msdu_head) < 0) {
  1067. ath10k_htt_rx_free_msdu_chain(msdu_head);
  1068. continue;
  1069. }
  1070. if (attention & RX_ATTENTION_FLAGS_FCS_ERR)
  1071. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  1072. else
  1073. rx_status->flag &= ~RX_FLAG_FAILED_FCS_CRC;
  1074. if (attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR)
  1075. rx_status->flag |= RX_FLAG_MMIC_ERROR;
  1076. else
  1077. rx_status->flag &= ~RX_FLAG_MMIC_ERROR;
  1078. hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
  1079. if (ath10k_htt_rx_hdr_is_amsdu(hdr))
  1080. ath10k_htt_rx_amsdu(htt, rx_status, msdu_head);
  1081. else
  1082. ath10k_htt_rx_msdu(htt, rx_status, msdu_head);
  1083. }
  1084. }
  1085. tasklet_schedule(&htt->rx_replenish_task);
  1086. }
  1087. static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
  1088. struct htt_rx_fragment_indication *frag)
  1089. {
  1090. struct sk_buff *msdu_head, *msdu_tail;
  1091. enum htt_rx_mpdu_encrypt_type enctype;
  1092. struct htt_rx_desc *rxd;
  1093. enum rx_msdu_decap_format fmt;
  1094. struct ieee80211_rx_status *rx_status = &htt->rx_status;
  1095. struct ieee80211_hdr *hdr;
  1096. int ret;
  1097. bool tkip_mic_err;
  1098. bool decrypt_err;
  1099. u8 *fw_desc;
  1100. int fw_desc_len, hdrlen, paramlen;
  1101. int trim;
  1102. fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
  1103. fw_desc = (u8 *)frag->fw_msdu_rx_desc;
  1104. msdu_head = NULL;
  1105. msdu_tail = NULL;
  1106. spin_lock_bh(&htt->rx_ring.lock);
  1107. ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
  1108. &msdu_head, &msdu_tail);
  1109. spin_unlock_bh(&htt->rx_ring.lock);
  1110. ath10k_dbg(ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
  1111. if (ret) {
  1112. ath10k_warn("failed to pop amsdu from httr rx ring for fragmented rx %d\n",
  1113. ret);
  1114. ath10k_htt_rx_free_msdu_chain(msdu_head);
  1115. return;
  1116. }
  1117. /* FIXME: implement signal strength */
  1118. rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  1119. hdr = (struct ieee80211_hdr *)msdu_head->data;
  1120. rxd = (void *)msdu_head->data - sizeof(*rxd);
  1121. tkip_mic_err = !!(__le32_to_cpu(rxd->attention.flags) &
  1122. RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
  1123. decrypt_err = !!(__le32_to_cpu(rxd->attention.flags) &
  1124. RX_ATTENTION_FLAGS_DECRYPT_ERR);
  1125. fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
  1126. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1127. if (fmt != RX_MSDU_DECAP_RAW) {
  1128. ath10k_warn("we dont support non-raw fragmented rx yet\n");
  1129. dev_kfree_skb_any(msdu_head);
  1130. goto end;
  1131. }
  1132. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  1133. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  1134. ath10k_htt_rx_h_protected(htt, rx_status, msdu_head, enctype, fmt,
  1135. true);
  1136. msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head);
  1137. if (tkip_mic_err)
  1138. ath10k_warn("tkip mic error\n");
  1139. if (decrypt_err) {
  1140. ath10k_warn("decryption err in fragmented rx\n");
  1141. dev_kfree_skb_any(msdu_head);
  1142. goto end;
  1143. }
  1144. if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) {
  1145. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  1146. paramlen = ath10k_htt_rx_crypto_param_len(enctype);
  1147. /* It is more efficient to move the header than the payload */
  1148. memmove((void *)msdu_head->data + paramlen,
  1149. (void *)msdu_head->data,
  1150. hdrlen);
  1151. skb_pull(msdu_head, paramlen);
  1152. hdr = (struct ieee80211_hdr *)msdu_head->data;
  1153. }
  1154. /* remove trailing FCS */
  1155. trim = 4;
  1156. /* remove crypto trailer */
  1157. trim += ath10k_htt_rx_crypto_tail_len(enctype);
  1158. /* last fragment of TKIP frags has MIC */
  1159. if (!ieee80211_has_morefrags(hdr->frame_control) &&
  1160. enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  1161. trim += 8;
  1162. if (trim > msdu_head->len) {
  1163. ath10k_warn("htt rx fragment: trailer longer than the frame itself? drop\n");
  1164. dev_kfree_skb_any(msdu_head);
  1165. goto end;
  1166. }
  1167. skb_trim(msdu_head, msdu_head->len - trim);
  1168. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
  1169. msdu_head->data, msdu_head->len);
  1170. ath10k_process_rx(htt->ar, rx_status, msdu_head);
  1171. end:
  1172. if (fw_desc_len > 0) {
  1173. ath10k_dbg(ATH10K_DBG_HTT,
  1174. "expecting more fragmented rx in one indication %d\n",
  1175. fw_desc_len);
  1176. }
  1177. }
  1178. static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
  1179. struct sk_buff *skb)
  1180. {
  1181. struct ath10k_htt *htt = &ar->htt;
  1182. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1183. struct htt_tx_done tx_done = {};
  1184. int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
  1185. __le16 msdu_id;
  1186. int i;
  1187. lockdep_assert_held(&htt->tx_lock);
  1188. switch (status) {
  1189. case HTT_DATA_TX_STATUS_NO_ACK:
  1190. tx_done.no_ack = true;
  1191. break;
  1192. case HTT_DATA_TX_STATUS_OK:
  1193. break;
  1194. case HTT_DATA_TX_STATUS_DISCARD:
  1195. case HTT_DATA_TX_STATUS_POSTPONE:
  1196. case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
  1197. tx_done.discard = true;
  1198. break;
  1199. default:
  1200. ath10k_warn("unhandled tx completion status %d\n", status);
  1201. tx_done.discard = true;
  1202. break;
  1203. }
  1204. ath10k_dbg(ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
  1205. resp->data_tx_completion.num_msdus);
  1206. for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
  1207. msdu_id = resp->data_tx_completion.msdus[i];
  1208. tx_done.msdu_id = __le16_to_cpu(msdu_id);
  1209. ath10k_txrx_tx_unref(htt, &tx_done);
  1210. }
  1211. }
  1212. void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  1213. {
  1214. struct ath10k_htt *htt = &ar->htt;
  1215. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1216. /* confirm alignment */
  1217. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1218. ath10k_warn("unaligned htt message, expect trouble\n");
  1219. ath10k_dbg(ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
  1220. resp->hdr.msg_type);
  1221. switch (resp->hdr.msg_type) {
  1222. case HTT_T2H_MSG_TYPE_VERSION_CONF: {
  1223. htt->target_version_major = resp->ver_resp.major;
  1224. htt->target_version_minor = resp->ver_resp.minor;
  1225. complete(&htt->target_version_received);
  1226. break;
  1227. }
  1228. case HTT_T2H_MSG_TYPE_RX_IND:
  1229. spin_lock_bh(&htt->rx_ring.lock);
  1230. __skb_queue_tail(&htt->rx_compl_q, skb);
  1231. spin_unlock_bh(&htt->rx_ring.lock);
  1232. tasklet_schedule(&htt->txrx_compl_task);
  1233. return;
  1234. case HTT_T2H_MSG_TYPE_PEER_MAP: {
  1235. struct htt_peer_map_event ev = {
  1236. .vdev_id = resp->peer_map.vdev_id,
  1237. .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
  1238. };
  1239. memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
  1240. ath10k_peer_map_event(htt, &ev);
  1241. break;
  1242. }
  1243. case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
  1244. struct htt_peer_unmap_event ev = {
  1245. .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
  1246. };
  1247. ath10k_peer_unmap_event(htt, &ev);
  1248. break;
  1249. }
  1250. case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
  1251. struct htt_tx_done tx_done = {};
  1252. int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
  1253. tx_done.msdu_id =
  1254. __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
  1255. switch (status) {
  1256. case HTT_MGMT_TX_STATUS_OK:
  1257. break;
  1258. case HTT_MGMT_TX_STATUS_RETRY:
  1259. tx_done.no_ack = true;
  1260. break;
  1261. case HTT_MGMT_TX_STATUS_DROP:
  1262. tx_done.discard = true;
  1263. break;
  1264. }
  1265. spin_lock_bh(&htt->tx_lock);
  1266. ath10k_txrx_tx_unref(htt, &tx_done);
  1267. spin_unlock_bh(&htt->tx_lock);
  1268. break;
  1269. }
  1270. case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
  1271. spin_lock_bh(&htt->tx_lock);
  1272. __skb_queue_tail(&htt->tx_compl_q, skb);
  1273. spin_unlock_bh(&htt->tx_lock);
  1274. tasklet_schedule(&htt->txrx_compl_task);
  1275. return;
  1276. case HTT_T2H_MSG_TYPE_SEC_IND: {
  1277. struct ath10k *ar = htt->ar;
  1278. struct htt_security_indication *ev = &resp->security_indication;
  1279. ath10k_dbg(ATH10K_DBG_HTT,
  1280. "sec ind peer_id %d unicast %d type %d\n",
  1281. __le16_to_cpu(ev->peer_id),
  1282. !!(ev->flags & HTT_SECURITY_IS_UNICAST),
  1283. MS(ev->flags, HTT_SECURITY_TYPE));
  1284. complete(&ar->install_key_done);
  1285. break;
  1286. }
  1287. case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
  1288. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1289. skb->data, skb->len);
  1290. ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
  1291. break;
  1292. }
  1293. case HTT_T2H_MSG_TYPE_TEST:
  1294. /* FIX THIS */
  1295. break;
  1296. case HTT_T2H_MSG_TYPE_STATS_CONF:
  1297. trace_ath10k_htt_stats(skb->data, skb->len);
  1298. break;
  1299. case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
  1300. case HTT_T2H_MSG_TYPE_RX_ADDBA:
  1301. case HTT_T2H_MSG_TYPE_RX_DELBA:
  1302. case HTT_T2H_MSG_TYPE_RX_FLUSH:
  1303. default:
  1304. ath10k_dbg(ATH10K_DBG_HTT, "htt event (%d) not handled\n",
  1305. resp->hdr.msg_type);
  1306. ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1307. skb->data, skb->len);
  1308. break;
  1309. };
  1310. /* Free the indication buffer */
  1311. dev_kfree_skb_any(skb);
  1312. }
  1313. static void ath10k_htt_txrx_compl_task(unsigned long ptr)
  1314. {
  1315. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  1316. struct htt_resp *resp;
  1317. struct sk_buff *skb;
  1318. spin_lock_bh(&htt->tx_lock);
  1319. while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
  1320. ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
  1321. dev_kfree_skb_any(skb);
  1322. }
  1323. spin_unlock_bh(&htt->tx_lock);
  1324. spin_lock_bh(&htt->rx_ring.lock);
  1325. while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
  1326. resp = (struct htt_resp *)skb->data;
  1327. ath10k_htt_rx_handler(htt, &resp->rx_ind);
  1328. dev_kfree_skb_any(skb);
  1329. }
  1330. spin_unlock_bh(&htt->rx_ring.lock);
  1331. }