hw_breakpoint.c 12 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License as published by
  4. * the Free Software Foundation; either version 2 of the License, or
  5. * (at your option) any later version.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  15. *
  16. * Copyright (C) 2007 Alan Stern
  17. * Copyright (C) 2009 IBM Corporation
  18. * Copyright (C) 2009 Frederic Weisbecker <fweisbec@gmail.com>
  19. *
  20. * Authors: Alan Stern <stern@rowland.harvard.edu>
  21. * K.Prasad <prasad@linux.vnet.ibm.com>
  22. * Frederic Weisbecker <fweisbec@gmail.com>
  23. */
  24. /*
  25. * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
  26. * using the CPU's debug registers.
  27. */
  28. #include <linux/perf_event.h>
  29. #include <linux/hw_breakpoint.h>
  30. #include <linux/irqflags.h>
  31. #include <linux/notifier.h>
  32. #include <linux/kallsyms.h>
  33. #include <linux/kprobes.h>
  34. #include <linux/percpu.h>
  35. #include <linux/kdebug.h>
  36. #include <linux/kernel.h>
  37. #include <linux/module.h>
  38. #include <linux/sched.h>
  39. #include <linux/smp.h>
  40. #include <asm/hw_breakpoint.h>
  41. #include <asm/processor.h>
  42. #include <asm/debugreg.h>
  43. /* Per cpu debug control register value */
  44. DEFINE_PER_CPU(unsigned long, cpu_dr7);
  45. EXPORT_PER_CPU_SYMBOL(cpu_dr7);
  46. /* Per cpu debug address registers values */
  47. static DEFINE_PER_CPU(unsigned long, cpu_debugreg[HBP_NUM]);
  48. /*
  49. * Stores the breakpoints currently in use on each breakpoint address
  50. * register for each cpus
  51. */
  52. static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
  53. static inline unsigned long
  54. __encode_dr7(int drnum, unsigned int len, unsigned int type)
  55. {
  56. unsigned long bp_info;
  57. bp_info = (len | type) & 0xf;
  58. bp_info <<= (DR_CONTROL_SHIFT + drnum * DR_CONTROL_SIZE);
  59. bp_info |= (DR_GLOBAL_ENABLE << (drnum * DR_ENABLE_SIZE));
  60. return bp_info;
  61. }
  62. /*
  63. * Encode the length, type, Exact, and Enable bits for a particular breakpoint
  64. * as stored in debug register 7.
  65. */
  66. unsigned long encode_dr7(int drnum, unsigned int len, unsigned int type)
  67. {
  68. return __encode_dr7(drnum, len, type) | DR_GLOBAL_SLOWDOWN;
  69. }
  70. /*
  71. * Decode the length and type bits for a particular breakpoint as
  72. * stored in debug register 7. Return the "enabled" status.
  73. */
  74. int decode_dr7(unsigned long dr7, int bpnum, unsigned *len, unsigned *type)
  75. {
  76. int bp_info = dr7 >> (DR_CONTROL_SHIFT + bpnum * DR_CONTROL_SIZE);
  77. *len = (bp_info & 0xc) | 0x40;
  78. *type = (bp_info & 0x3) | 0x80;
  79. return (dr7 >> (bpnum * DR_ENABLE_SIZE)) & 0x3;
  80. }
  81. /*
  82. * Install a perf counter breakpoint.
  83. *
  84. * We seek a free debug address register and use it for this
  85. * breakpoint. Eventually we enable it in the debug control register.
  86. *
  87. * Atomic: we hold the counter->ctx->lock and we only handle variables
  88. * and registers local to this cpu.
  89. */
  90. int arch_install_hw_breakpoint(struct perf_event *bp)
  91. {
  92. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  93. unsigned long *dr7;
  94. int i;
  95. for (i = 0; i < HBP_NUM; i++) {
  96. struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
  97. if (!*slot) {
  98. *slot = bp;
  99. break;
  100. }
  101. }
  102. if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
  103. return -EBUSY;
  104. set_debugreg(info->address, i);
  105. __this_cpu_write(cpu_debugreg[i], info->address);
  106. dr7 = &__get_cpu_var(cpu_dr7);
  107. *dr7 |= encode_dr7(i, info->len, info->type);
  108. set_debugreg(*dr7, 7);
  109. return 0;
  110. }
  111. /*
  112. * Uninstall the breakpoint contained in the given counter.
  113. *
  114. * First we search the debug address register it uses and then we disable
  115. * it.
  116. *
  117. * Atomic: we hold the counter->ctx->lock and we only handle variables
  118. * and registers local to this cpu.
  119. */
  120. void arch_uninstall_hw_breakpoint(struct perf_event *bp)
  121. {
  122. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  123. unsigned long *dr7;
  124. int i;
  125. for (i = 0; i < HBP_NUM; i++) {
  126. struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
  127. if (*slot == bp) {
  128. *slot = NULL;
  129. break;
  130. }
  131. }
  132. if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
  133. return;
  134. dr7 = &__get_cpu_var(cpu_dr7);
  135. *dr7 &= ~__encode_dr7(i, info->len, info->type);
  136. set_debugreg(*dr7, 7);
  137. }
  138. static int get_hbp_len(u8 hbp_len)
  139. {
  140. unsigned int len_in_bytes = 0;
  141. switch (hbp_len) {
  142. case X86_BREAKPOINT_LEN_1:
  143. len_in_bytes = 1;
  144. break;
  145. case X86_BREAKPOINT_LEN_2:
  146. len_in_bytes = 2;
  147. break;
  148. case X86_BREAKPOINT_LEN_4:
  149. len_in_bytes = 4;
  150. break;
  151. #ifdef CONFIG_X86_64
  152. case X86_BREAKPOINT_LEN_8:
  153. len_in_bytes = 8;
  154. break;
  155. #endif
  156. }
  157. return len_in_bytes;
  158. }
  159. /*
  160. * Check for virtual address in kernel space.
  161. */
  162. int arch_check_bp_in_kernelspace(struct perf_event *bp)
  163. {
  164. unsigned int len;
  165. unsigned long va;
  166. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  167. va = info->address;
  168. len = get_hbp_len(info->len);
  169. return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
  170. }
  171. int arch_bp_generic_fields(int x86_len, int x86_type,
  172. int *gen_len, int *gen_type)
  173. {
  174. /* Type */
  175. switch (x86_type) {
  176. case X86_BREAKPOINT_EXECUTE:
  177. if (x86_len != X86_BREAKPOINT_LEN_X)
  178. return -EINVAL;
  179. *gen_type = HW_BREAKPOINT_X;
  180. *gen_len = sizeof(long);
  181. return 0;
  182. case X86_BREAKPOINT_WRITE:
  183. *gen_type = HW_BREAKPOINT_W;
  184. break;
  185. case X86_BREAKPOINT_RW:
  186. *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
  187. break;
  188. default:
  189. return -EINVAL;
  190. }
  191. /* Len */
  192. switch (x86_len) {
  193. case X86_BREAKPOINT_LEN_1:
  194. *gen_len = HW_BREAKPOINT_LEN_1;
  195. break;
  196. case X86_BREAKPOINT_LEN_2:
  197. *gen_len = HW_BREAKPOINT_LEN_2;
  198. break;
  199. case X86_BREAKPOINT_LEN_4:
  200. *gen_len = HW_BREAKPOINT_LEN_4;
  201. break;
  202. #ifdef CONFIG_X86_64
  203. case X86_BREAKPOINT_LEN_8:
  204. *gen_len = HW_BREAKPOINT_LEN_8;
  205. break;
  206. #endif
  207. default:
  208. return -EINVAL;
  209. }
  210. return 0;
  211. }
  212. static int arch_build_bp_info(struct perf_event *bp)
  213. {
  214. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  215. info->address = bp->attr.bp_addr;
  216. /* Type */
  217. switch (bp->attr.bp_type) {
  218. case HW_BREAKPOINT_W:
  219. info->type = X86_BREAKPOINT_WRITE;
  220. break;
  221. case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
  222. info->type = X86_BREAKPOINT_RW;
  223. break;
  224. case HW_BREAKPOINT_X:
  225. info->type = X86_BREAKPOINT_EXECUTE;
  226. /*
  227. * x86 inst breakpoints need to have a specific undefined len.
  228. * But we still need to check userspace is not trying to setup
  229. * an unsupported length, to get a range breakpoint for example.
  230. */
  231. if (bp->attr.bp_len == sizeof(long)) {
  232. info->len = X86_BREAKPOINT_LEN_X;
  233. return 0;
  234. }
  235. default:
  236. return -EINVAL;
  237. }
  238. /* Len */
  239. switch (bp->attr.bp_len) {
  240. case HW_BREAKPOINT_LEN_1:
  241. info->len = X86_BREAKPOINT_LEN_1;
  242. break;
  243. case HW_BREAKPOINT_LEN_2:
  244. info->len = X86_BREAKPOINT_LEN_2;
  245. break;
  246. case HW_BREAKPOINT_LEN_4:
  247. info->len = X86_BREAKPOINT_LEN_4;
  248. break;
  249. #ifdef CONFIG_X86_64
  250. case HW_BREAKPOINT_LEN_8:
  251. info->len = X86_BREAKPOINT_LEN_8;
  252. break;
  253. #endif
  254. default:
  255. return -EINVAL;
  256. }
  257. return 0;
  258. }
  259. /*
  260. * Validate the arch-specific HW Breakpoint register settings
  261. */
  262. int arch_validate_hwbkpt_settings(struct perf_event *bp)
  263. {
  264. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  265. unsigned int align;
  266. int ret;
  267. ret = arch_build_bp_info(bp);
  268. if (ret)
  269. return ret;
  270. ret = -EINVAL;
  271. switch (info->len) {
  272. case X86_BREAKPOINT_LEN_1:
  273. align = 0;
  274. break;
  275. case X86_BREAKPOINT_LEN_2:
  276. align = 1;
  277. break;
  278. case X86_BREAKPOINT_LEN_4:
  279. align = 3;
  280. break;
  281. #ifdef CONFIG_X86_64
  282. case X86_BREAKPOINT_LEN_8:
  283. align = 7;
  284. break;
  285. #endif
  286. default:
  287. return ret;
  288. }
  289. /*
  290. * Check that the low-order bits of the address are appropriate
  291. * for the alignment implied by len.
  292. */
  293. if (info->address & align)
  294. return -EINVAL;
  295. return 0;
  296. }
  297. /*
  298. * Dump the debug register contents to the user.
  299. * We can't dump our per cpu values because it
  300. * may contain cpu wide breakpoint, something that
  301. * doesn't belong to the current task.
  302. *
  303. * TODO: include non-ptrace user breakpoints (perf)
  304. */
  305. void aout_dump_debugregs(struct user *dump)
  306. {
  307. int i;
  308. int dr7 = 0;
  309. struct perf_event *bp;
  310. struct arch_hw_breakpoint *info;
  311. struct thread_struct *thread = &current->thread;
  312. for (i = 0; i < HBP_NUM; i++) {
  313. bp = thread->ptrace_bps[i];
  314. if (bp && !bp->attr.disabled) {
  315. dump->u_debugreg[i] = bp->attr.bp_addr;
  316. info = counter_arch_bp(bp);
  317. dr7 |= encode_dr7(i, info->len, info->type);
  318. } else {
  319. dump->u_debugreg[i] = 0;
  320. }
  321. }
  322. dump->u_debugreg[4] = 0;
  323. dump->u_debugreg[5] = 0;
  324. dump->u_debugreg[6] = current->thread.debugreg6;
  325. dump->u_debugreg[7] = dr7;
  326. }
  327. EXPORT_SYMBOL_GPL(aout_dump_debugregs);
  328. /*
  329. * Release the user breakpoints used by ptrace
  330. */
  331. void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
  332. {
  333. int i;
  334. struct thread_struct *t = &tsk->thread;
  335. for (i = 0; i < HBP_NUM; i++) {
  336. unregister_hw_breakpoint(t->ptrace_bps[i]);
  337. t->ptrace_bps[i] = NULL;
  338. }
  339. t->debugreg6 = 0;
  340. t->ptrace_dr7 = 0;
  341. }
  342. void hw_breakpoint_restore(void)
  343. {
  344. set_debugreg(__this_cpu_read(cpu_debugreg[0]), 0);
  345. set_debugreg(__this_cpu_read(cpu_debugreg[1]), 1);
  346. set_debugreg(__this_cpu_read(cpu_debugreg[2]), 2);
  347. set_debugreg(__this_cpu_read(cpu_debugreg[3]), 3);
  348. set_debugreg(current->thread.debugreg6, 6);
  349. set_debugreg(__this_cpu_read(cpu_dr7), 7);
  350. }
  351. EXPORT_SYMBOL_GPL(hw_breakpoint_restore);
  352. /*
  353. * Handle debug exception notifications.
  354. *
  355. * Return value is either NOTIFY_STOP or NOTIFY_DONE as explained below.
  356. *
  357. * NOTIFY_DONE returned if one of the following conditions is true.
  358. * i) When the causative address is from user-space and the exception
  359. * is a valid one, i.e. not triggered as a result of lazy debug register
  360. * switching
  361. * ii) When there are more bits than trap<n> set in DR6 register (such
  362. * as BD, BS or BT) indicating that more than one debug condition is
  363. * met and requires some more action in do_debug().
  364. *
  365. * NOTIFY_STOP returned for all other cases
  366. *
  367. */
  368. static int __kprobes hw_breakpoint_handler(struct die_args *args)
  369. {
  370. int i, cpu, rc = NOTIFY_STOP;
  371. struct perf_event *bp;
  372. unsigned long dr7, dr6;
  373. unsigned long *dr6_p;
  374. /* The DR6 value is pointed by args->err */
  375. dr6_p = (unsigned long *)ERR_PTR(args->err);
  376. dr6 = *dr6_p;
  377. /* If it's a single step, TRAP bits are random */
  378. if (dr6 & DR_STEP)
  379. return NOTIFY_DONE;
  380. /* Do an early return if no trap bits are set in DR6 */
  381. if ((dr6 & DR_TRAP_BITS) == 0)
  382. return NOTIFY_DONE;
  383. get_debugreg(dr7, 7);
  384. /* Disable breakpoints during exception handling */
  385. set_debugreg(0UL, 7);
  386. /*
  387. * Assert that local interrupts are disabled
  388. * Reset the DRn bits in the virtualized register value.
  389. * The ptrace trigger routine will add in whatever is needed.
  390. */
  391. current->thread.debugreg6 &= ~DR_TRAP_BITS;
  392. cpu = get_cpu();
  393. /* Handle all the breakpoints that were triggered */
  394. for (i = 0; i < HBP_NUM; ++i) {
  395. if (likely(!(dr6 & (DR_TRAP0 << i))))
  396. continue;
  397. /*
  398. * The counter may be concurrently released but that can only
  399. * occur from a call_rcu() path. We can then safely fetch
  400. * the breakpoint, use its callback, touch its counter
  401. * while we are in an rcu_read_lock() path.
  402. */
  403. rcu_read_lock();
  404. bp = per_cpu(bp_per_reg[i], cpu);
  405. /*
  406. * Reset the 'i'th TRAP bit in dr6 to denote completion of
  407. * exception handling
  408. */
  409. (*dr6_p) &= ~(DR_TRAP0 << i);
  410. /*
  411. * bp can be NULL due to lazy debug register switching
  412. * or due to concurrent perf counter removing.
  413. */
  414. if (!bp) {
  415. rcu_read_unlock();
  416. break;
  417. }
  418. perf_bp_event(bp, args->regs);
  419. /*
  420. * Set up resume flag to avoid breakpoint recursion when
  421. * returning back to origin.
  422. */
  423. if (bp->hw.info.type == X86_BREAKPOINT_EXECUTE)
  424. args->regs->flags |= X86_EFLAGS_RF;
  425. rcu_read_unlock();
  426. }
  427. /*
  428. * Further processing in do_debug() is needed for a) user-space
  429. * breakpoints (to generate signals) and b) when the system has
  430. * taken exception due to multiple causes
  431. */
  432. if ((current->thread.debugreg6 & DR_TRAP_BITS) ||
  433. (dr6 & (~DR_TRAP_BITS)))
  434. rc = NOTIFY_DONE;
  435. set_debugreg(dr7, 7);
  436. put_cpu();
  437. return rc;
  438. }
  439. /*
  440. * Handle debug exception notifications.
  441. */
  442. int __kprobes hw_breakpoint_exceptions_notify(
  443. struct notifier_block *unused, unsigned long val, void *data)
  444. {
  445. if (val != DIE_DEBUG)
  446. return NOTIFY_DONE;
  447. return hw_breakpoint_handler(data);
  448. }
  449. void hw_breakpoint_pmu_read(struct perf_event *bp)
  450. {
  451. /* TODO */
  452. }