aesni-intel_glue.c 43 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/crypto.h>
  24. #include <linux/module.h>
  25. #include <linux/err.h>
  26. #include <crypto/algapi.h>
  27. #include <crypto/aes.h>
  28. #include <crypto/cryptd.h>
  29. #include <crypto/ctr.h>
  30. #include <crypto/b128ops.h>
  31. #include <crypto/lrw.h>
  32. #include <crypto/xts.h>
  33. #include <asm/cpu_device_id.h>
  34. #include <asm/i387.h>
  35. #include <asm/crypto/aes.h>
  36. #include <crypto/ablk_helper.h>
  37. #include <crypto/scatterwalk.h>
  38. #include <crypto/internal/aead.h>
  39. #include <linux/workqueue.h>
  40. #include <linux/spinlock.h>
  41. #ifdef CONFIG_X86_64
  42. #include <asm/crypto/glue_helper.h>
  43. #endif
  44. #if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
  45. #define HAS_PCBC
  46. #endif
  47. /* This data is stored at the end of the crypto_tfm struct.
  48. * It's a type of per "session" data storage location.
  49. * This needs to be 16 byte aligned.
  50. */
  51. struct aesni_rfc4106_gcm_ctx {
  52. u8 hash_subkey[16];
  53. struct crypto_aes_ctx aes_key_expanded;
  54. u8 nonce[4];
  55. struct cryptd_aead *cryptd_tfm;
  56. };
  57. struct aesni_gcm_set_hash_subkey_result {
  58. int err;
  59. struct completion completion;
  60. };
  61. struct aesni_hash_subkey_req_data {
  62. u8 iv[16];
  63. struct aesni_gcm_set_hash_subkey_result result;
  64. struct scatterlist sg;
  65. };
  66. #define AESNI_ALIGN (16)
  67. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
  68. #define RFC4106_HASH_SUBKEY_SIZE 16
  69. struct aesni_lrw_ctx {
  70. struct lrw_table_ctx lrw_table;
  71. u8 raw_aes_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  72. };
  73. struct aesni_xts_ctx {
  74. u8 raw_tweak_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  75. u8 raw_crypt_ctx[sizeof(struct crypto_aes_ctx) + AESNI_ALIGN - 1];
  76. };
  77. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  78. unsigned int key_len);
  79. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  80. const u8 *in);
  81. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  82. const u8 *in);
  83. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  84. const u8 *in, unsigned int len);
  85. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  86. const u8 *in, unsigned int len);
  87. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  88. const u8 *in, unsigned int len, u8 *iv);
  89. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  90. const u8 *in, unsigned int len, u8 *iv);
  91. int crypto_fpu_init(void);
  92. void crypto_fpu_exit(void);
  93. #define AVX_GEN2_OPTSIZE 640
  94. #define AVX_GEN4_OPTSIZE 4096
  95. #ifdef CONFIG_X86_64
  96. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  97. const u8 *in, unsigned int len, u8 *iv);
  98. asmlinkage void aesni_xts_crypt8(struct crypto_aes_ctx *ctx, u8 *out,
  99. const u8 *in, bool enc, u8 *iv);
  100. /* asmlinkage void aesni_gcm_enc()
  101. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  102. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  103. * const u8 *in, Plaintext input
  104. * unsigned long plaintext_len, Length of data in bytes for encryption.
  105. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  106. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  107. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  108. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  109. * const u8 *aad, Additional Authentication Data (AAD)
  110. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this
  111. * is going to be 8 or 12 bytes
  112. * u8 *auth_tag, Authenticated Tag output.
  113. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  114. * Valid values are 16 (most likely), 12 or 8.
  115. */
  116. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  117. const u8 *in, unsigned long plaintext_len, u8 *iv,
  118. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  119. u8 *auth_tag, unsigned long auth_tag_len);
  120. /* asmlinkage void aesni_gcm_dec()
  121. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  122. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  123. * const u8 *in, Ciphertext input
  124. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  125. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  126. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  127. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  128. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  129. * const u8 *aad, Additional Authentication Data (AAD)
  130. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  131. * to be 8 or 12 bytes
  132. * u8 *auth_tag, Authenticated Tag output.
  133. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  134. * Valid values are 16 (most likely), 12 or 8.
  135. */
  136. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  137. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  138. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  139. u8 *auth_tag, unsigned long auth_tag_len);
  140. #ifdef CONFIG_AS_AVX
  141. /*
  142. * asmlinkage void aesni_gcm_precomp_avx_gen2()
  143. * gcm_data *my_ctx_data, context data
  144. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  145. */
  146. asmlinkage void aesni_gcm_precomp_avx_gen2(void *my_ctx_data, u8 *hash_subkey);
  147. asmlinkage void aesni_gcm_enc_avx_gen2(void *ctx, u8 *out,
  148. const u8 *in, unsigned long plaintext_len, u8 *iv,
  149. const u8 *aad, unsigned long aad_len,
  150. u8 *auth_tag, unsigned long auth_tag_len);
  151. asmlinkage void aesni_gcm_dec_avx_gen2(void *ctx, u8 *out,
  152. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  153. const u8 *aad, unsigned long aad_len,
  154. u8 *auth_tag, unsigned long auth_tag_len);
  155. static void aesni_gcm_enc_avx(void *ctx, u8 *out,
  156. const u8 *in, unsigned long plaintext_len, u8 *iv,
  157. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  158. u8 *auth_tag, unsigned long auth_tag_len)
  159. {
  160. if (plaintext_len < AVX_GEN2_OPTSIZE) {
  161. aesni_gcm_enc(ctx, out, in, plaintext_len, iv, hash_subkey, aad,
  162. aad_len, auth_tag, auth_tag_len);
  163. } else {
  164. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  165. aesni_gcm_enc_avx_gen2(ctx, out, in, plaintext_len, iv, aad,
  166. aad_len, auth_tag, auth_tag_len);
  167. }
  168. }
  169. static void aesni_gcm_dec_avx(void *ctx, u8 *out,
  170. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  171. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  172. u8 *auth_tag, unsigned long auth_tag_len)
  173. {
  174. if (ciphertext_len < AVX_GEN2_OPTSIZE) {
  175. aesni_gcm_dec(ctx, out, in, ciphertext_len, iv, hash_subkey, aad,
  176. aad_len, auth_tag, auth_tag_len);
  177. } else {
  178. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  179. aesni_gcm_dec_avx_gen2(ctx, out, in, ciphertext_len, iv, aad,
  180. aad_len, auth_tag, auth_tag_len);
  181. }
  182. }
  183. #endif
  184. #ifdef CONFIG_AS_AVX2
  185. /*
  186. * asmlinkage void aesni_gcm_precomp_avx_gen4()
  187. * gcm_data *my_ctx_data, context data
  188. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  189. */
  190. asmlinkage void aesni_gcm_precomp_avx_gen4(void *my_ctx_data, u8 *hash_subkey);
  191. asmlinkage void aesni_gcm_enc_avx_gen4(void *ctx, u8 *out,
  192. const u8 *in, unsigned long plaintext_len, u8 *iv,
  193. const u8 *aad, unsigned long aad_len,
  194. u8 *auth_tag, unsigned long auth_tag_len);
  195. asmlinkage void aesni_gcm_dec_avx_gen4(void *ctx, u8 *out,
  196. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  197. const u8 *aad, unsigned long aad_len,
  198. u8 *auth_tag, unsigned long auth_tag_len);
  199. static void aesni_gcm_enc_avx2(void *ctx, u8 *out,
  200. const u8 *in, unsigned long plaintext_len, u8 *iv,
  201. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  202. u8 *auth_tag, unsigned long auth_tag_len)
  203. {
  204. if (plaintext_len < AVX_GEN2_OPTSIZE) {
  205. aesni_gcm_enc(ctx, out, in, plaintext_len, iv, hash_subkey, aad,
  206. aad_len, auth_tag, auth_tag_len);
  207. } else if (plaintext_len < AVX_GEN4_OPTSIZE) {
  208. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  209. aesni_gcm_enc_avx_gen2(ctx, out, in, plaintext_len, iv, aad,
  210. aad_len, auth_tag, auth_tag_len);
  211. } else {
  212. aesni_gcm_precomp_avx_gen4(ctx, hash_subkey);
  213. aesni_gcm_enc_avx_gen4(ctx, out, in, plaintext_len, iv, aad,
  214. aad_len, auth_tag, auth_tag_len);
  215. }
  216. }
  217. static void aesni_gcm_dec_avx2(void *ctx, u8 *out,
  218. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  219. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  220. u8 *auth_tag, unsigned long auth_tag_len)
  221. {
  222. if (ciphertext_len < AVX_GEN2_OPTSIZE) {
  223. aesni_gcm_dec(ctx, out, in, ciphertext_len, iv, hash_subkey,
  224. aad, aad_len, auth_tag, auth_tag_len);
  225. } else if (ciphertext_len < AVX_GEN4_OPTSIZE) {
  226. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  227. aesni_gcm_dec_avx_gen2(ctx, out, in, ciphertext_len, iv, aad,
  228. aad_len, auth_tag, auth_tag_len);
  229. } else {
  230. aesni_gcm_precomp_avx_gen4(ctx, hash_subkey);
  231. aesni_gcm_dec_avx_gen4(ctx, out, in, ciphertext_len, iv, aad,
  232. aad_len, auth_tag, auth_tag_len);
  233. }
  234. }
  235. #endif
  236. static void (*aesni_gcm_enc_tfm)(void *ctx, u8 *out,
  237. const u8 *in, unsigned long plaintext_len, u8 *iv,
  238. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  239. u8 *auth_tag, unsigned long auth_tag_len);
  240. static void (*aesni_gcm_dec_tfm)(void *ctx, u8 *out,
  241. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  242. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  243. u8 *auth_tag, unsigned long auth_tag_len);
  244. static inline struct
  245. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  246. {
  247. return
  248. (struct aesni_rfc4106_gcm_ctx *)
  249. PTR_ALIGN((u8 *)
  250. crypto_tfm_ctx(crypto_aead_tfm(tfm)), AESNI_ALIGN);
  251. }
  252. #endif
  253. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  254. {
  255. unsigned long addr = (unsigned long)raw_ctx;
  256. unsigned long align = AESNI_ALIGN;
  257. if (align <= crypto_tfm_ctx_alignment())
  258. align = 1;
  259. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  260. }
  261. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  262. const u8 *in_key, unsigned int key_len)
  263. {
  264. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  265. u32 *flags = &tfm->crt_flags;
  266. int err;
  267. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  268. key_len != AES_KEYSIZE_256) {
  269. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  270. return -EINVAL;
  271. }
  272. if (!irq_fpu_usable())
  273. err = crypto_aes_expand_key(ctx, in_key, key_len);
  274. else {
  275. kernel_fpu_begin();
  276. err = aesni_set_key(ctx, in_key, key_len);
  277. kernel_fpu_end();
  278. }
  279. return err;
  280. }
  281. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  282. unsigned int key_len)
  283. {
  284. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  285. }
  286. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  287. {
  288. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  289. if (!irq_fpu_usable())
  290. crypto_aes_encrypt_x86(ctx, dst, src);
  291. else {
  292. kernel_fpu_begin();
  293. aesni_enc(ctx, dst, src);
  294. kernel_fpu_end();
  295. }
  296. }
  297. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  298. {
  299. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  300. if (!irq_fpu_usable())
  301. crypto_aes_decrypt_x86(ctx, dst, src);
  302. else {
  303. kernel_fpu_begin();
  304. aesni_dec(ctx, dst, src);
  305. kernel_fpu_end();
  306. }
  307. }
  308. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  309. {
  310. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  311. aesni_enc(ctx, dst, src);
  312. }
  313. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  314. {
  315. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  316. aesni_dec(ctx, dst, src);
  317. }
  318. static int ecb_encrypt(struct blkcipher_desc *desc,
  319. struct scatterlist *dst, struct scatterlist *src,
  320. unsigned int nbytes)
  321. {
  322. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  323. struct blkcipher_walk walk;
  324. int err;
  325. blkcipher_walk_init(&walk, dst, src, nbytes);
  326. err = blkcipher_walk_virt(desc, &walk);
  327. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  328. kernel_fpu_begin();
  329. while ((nbytes = walk.nbytes)) {
  330. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  331. nbytes & AES_BLOCK_MASK);
  332. nbytes &= AES_BLOCK_SIZE - 1;
  333. err = blkcipher_walk_done(desc, &walk, nbytes);
  334. }
  335. kernel_fpu_end();
  336. return err;
  337. }
  338. static int ecb_decrypt(struct blkcipher_desc *desc,
  339. struct scatterlist *dst, struct scatterlist *src,
  340. unsigned int nbytes)
  341. {
  342. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  343. struct blkcipher_walk walk;
  344. int err;
  345. blkcipher_walk_init(&walk, dst, src, nbytes);
  346. err = blkcipher_walk_virt(desc, &walk);
  347. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  348. kernel_fpu_begin();
  349. while ((nbytes = walk.nbytes)) {
  350. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  351. nbytes & AES_BLOCK_MASK);
  352. nbytes &= AES_BLOCK_SIZE - 1;
  353. err = blkcipher_walk_done(desc, &walk, nbytes);
  354. }
  355. kernel_fpu_end();
  356. return err;
  357. }
  358. static int cbc_encrypt(struct blkcipher_desc *desc,
  359. struct scatterlist *dst, struct scatterlist *src,
  360. unsigned int nbytes)
  361. {
  362. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  363. struct blkcipher_walk walk;
  364. int err;
  365. blkcipher_walk_init(&walk, dst, src, nbytes);
  366. err = blkcipher_walk_virt(desc, &walk);
  367. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  368. kernel_fpu_begin();
  369. while ((nbytes = walk.nbytes)) {
  370. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  371. nbytes & AES_BLOCK_MASK, walk.iv);
  372. nbytes &= AES_BLOCK_SIZE - 1;
  373. err = blkcipher_walk_done(desc, &walk, nbytes);
  374. }
  375. kernel_fpu_end();
  376. return err;
  377. }
  378. static int cbc_decrypt(struct blkcipher_desc *desc,
  379. struct scatterlist *dst, struct scatterlist *src,
  380. unsigned int nbytes)
  381. {
  382. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  383. struct blkcipher_walk walk;
  384. int err;
  385. blkcipher_walk_init(&walk, dst, src, nbytes);
  386. err = blkcipher_walk_virt(desc, &walk);
  387. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  388. kernel_fpu_begin();
  389. while ((nbytes = walk.nbytes)) {
  390. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  391. nbytes & AES_BLOCK_MASK, walk.iv);
  392. nbytes &= AES_BLOCK_SIZE - 1;
  393. err = blkcipher_walk_done(desc, &walk, nbytes);
  394. }
  395. kernel_fpu_end();
  396. return err;
  397. }
  398. #ifdef CONFIG_X86_64
  399. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  400. struct blkcipher_walk *walk)
  401. {
  402. u8 *ctrblk = walk->iv;
  403. u8 keystream[AES_BLOCK_SIZE];
  404. u8 *src = walk->src.virt.addr;
  405. u8 *dst = walk->dst.virt.addr;
  406. unsigned int nbytes = walk->nbytes;
  407. aesni_enc(ctx, keystream, ctrblk);
  408. crypto_xor(keystream, src, nbytes);
  409. memcpy(dst, keystream, nbytes);
  410. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  411. }
  412. static int ctr_crypt(struct blkcipher_desc *desc,
  413. struct scatterlist *dst, struct scatterlist *src,
  414. unsigned int nbytes)
  415. {
  416. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  417. struct blkcipher_walk walk;
  418. int err;
  419. blkcipher_walk_init(&walk, dst, src, nbytes);
  420. err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
  421. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  422. kernel_fpu_begin();
  423. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  424. aesni_ctr_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  425. nbytes & AES_BLOCK_MASK, walk.iv);
  426. nbytes &= AES_BLOCK_SIZE - 1;
  427. err = blkcipher_walk_done(desc, &walk, nbytes);
  428. }
  429. if (walk.nbytes) {
  430. ctr_crypt_final(ctx, &walk);
  431. err = blkcipher_walk_done(desc, &walk, 0);
  432. }
  433. kernel_fpu_end();
  434. return err;
  435. }
  436. #endif
  437. static int ablk_ecb_init(struct crypto_tfm *tfm)
  438. {
  439. return ablk_init_common(tfm, "__driver-ecb-aes-aesni");
  440. }
  441. static int ablk_cbc_init(struct crypto_tfm *tfm)
  442. {
  443. return ablk_init_common(tfm, "__driver-cbc-aes-aesni");
  444. }
  445. #ifdef CONFIG_X86_64
  446. static int ablk_ctr_init(struct crypto_tfm *tfm)
  447. {
  448. return ablk_init_common(tfm, "__driver-ctr-aes-aesni");
  449. }
  450. #endif
  451. #ifdef HAS_PCBC
  452. static int ablk_pcbc_init(struct crypto_tfm *tfm)
  453. {
  454. return ablk_init_common(tfm, "fpu(pcbc(__driver-aes-aesni))");
  455. }
  456. #endif
  457. static void lrw_xts_encrypt_callback(void *ctx, u8 *blks, unsigned int nbytes)
  458. {
  459. aesni_ecb_enc(ctx, blks, blks, nbytes);
  460. }
  461. static void lrw_xts_decrypt_callback(void *ctx, u8 *blks, unsigned int nbytes)
  462. {
  463. aesni_ecb_dec(ctx, blks, blks, nbytes);
  464. }
  465. static int lrw_aesni_setkey(struct crypto_tfm *tfm, const u8 *key,
  466. unsigned int keylen)
  467. {
  468. struct aesni_lrw_ctx *ctx = crypto_tfm_ctx(tfm);
  469. int err;
  470. err = aes_set_key_common(tfm, ctx->raw_aes_ctx, key,
  471. keylen - AES_BLOCK_SIZE);
  472. if (err)
  473. return err;
  474. return lrw_init_table(&ctx->lrw_table, key + keylen - AES_BLOCK_SIZE);
  475. }
  476. static void lrw_aesni_exit_tfm(struct crypto_tfm *tfm)
  477. {
  478. struct aesni_lrw_ctx *ctx = crypto_tfm_ctx(tfm);
  479. lrw_free_table(&ctx->lrw_table);
  480. }
  481. static int lrw_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  482. struct scatterlist *src, unsigned int nbytes)
  483. {
  484. struct aesni_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  485. be128 buf[8];
  486. struct lrw_crypt_req req = {
  487. .tbuf = buf,
  488. .tbuflen = sizeof(buf),
  489. .table_ctx = &ctx->lrw_table,
  490. .crypt_ctx = aes_ctx(ctx->raw_aes_ctx),
  491. .crypt_fn = lrw_xts_encrypt_callback,
  492. };
  493. int ret;
  494. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  495. kernel_fpu_begin();
  496. ret = lrw_crypt(desc, dst, src, nbytes, &req);
  497. kernel_fpu_end();
  498. return ret;
  499. }
  500. static int lrw_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  501. struct scatterlist *src, unsigned int nbytes)
  502. {
  503. struct aesni_lrw_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  504. be128 buf[8];
  505. struct lrw_crypt_req req = {
  506. .tbuf = buf,
  507. .tbuflen = sizeof(buf),
  508. .table_ctx = &ctx->lrw_table,
  509. .crypt_ctx = aes_ctx(ctx->raw_aes_ctx),
  510. .crypt_fn = lrw_xts_decrypt_callback,
  511. };
  512. int ret;
  513. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  514. kernel_fpu_begin();
  515. ret = lrw_crypt(desc, dst, src, nbytes, &req);
  516. kernel_fpu_end();
  517. return ret;
  518. }
  519. static int xts_aesni_setkey(struct crypto_tfm *tfm, const u8 *key,
  520. unsigned int keylen)
  521. {
  522. struct aesni_xts_ctx *ctx = crypto_tfm_ctx(tfm);
  523. u32 *flags = &tfm->crt_flags;
  524. int err;
  525. /* key consists of keys of equal size concatenated, therefore
  526. * the length must be even
  527. */
  528. if (keylen % 2) {
  529. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  530. return -EINVAL;
  531. }
  532. /* first half of xts-key is for crypt */
  533. err = aes_set_key_common(tfm, ctx->raw_crypt_ctx, key, keylen / 2);
  534. if (err)
  535. return err;
  536. /* second half of xts-key is for tweak */
  537. return aes_set_key_common(tfm, ctx->raw_tweak_ctx, key + keylen / 2,
  538. keylen / 2);
  539. }
  540. static void aesni_xts_tweak(void *ctx, u8 *out, const u8 *in)
  541. {
  542. aesni_enc(ctx, out, in);
  543. }
  544. #ifdef CONFIG_X86_64
  545. static void aesni_xts_enc(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  546. {
  547. glue_xts_crypt_128bit_one(ctx, dst, src, iv, GLUE_FUNC_CAST(aesni_enc));
  548. }
  549. static void aesni_xts_dec(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  550. {
  551. glue_xts_crypt_128bit_one(ctx, dst, src, iv, GLUE_FUNC_CAST(aesni_dec));
  552. }
  553. static void aesni_xts_enc8(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  554. {
  555. aesni_xts_crypt8(ctx, (u8 *)dst, (const u8 *)src, true, (u8 *)iv);
  556. }
  557. static void aesni_xts_dec8(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  558. {
  559. aesni_xts_crypt8(ctx, (u8 *)dst, (const u8 *)src, false, (u8 *)iv);
  560. }
  561. static const struct common_glue_ctx aesni_enc_xts = {
  562. .num_funcs = 2,
  563. .fpu_blocks_limit = 1,
  564. .funcs = { {
  565. .num_blocks = 8,
  566. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_enc8) }
  567. }, {
  568. .num_blocks = 1,
  569. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_enc) }
  570. } }
  571. };
  572. static const struct common_glue_ctx aesni_dec_xts = {
  573. .num_funcs = 2,
  574. .fpu_blocks_limit = 1,
  575. .funcs = { {
  576. .num_blocks = 8,
  577. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_dec8) }
  578. }, {
  579. .num_blocks = 1,
  580. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_dec) }
  581. } }
  582. };
  583. static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  584. struct scatterlist *src, unsigned int nbytes)
  585. {
  586. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  587. return glue_xts_crypt_128bit(&aesni_enc_xts, desc, dst, src, nbytes,
  588. XTS_TWEAK_CAST(aesni_xts_tweak),
  589. aes_ctx(ctx->raw_tweak_ctx),
  590. aes_ctx(ctx->raw_crypt_ctx));
  591. }
  592. static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  593. struct scatterlist *src, unsigned int nbytes)
  594. {
  595. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  596. return glue_xts_crypt_128bit(&aesni_dec_xts, desc, dst, src, nbytes,
  597. XTS_TWEAK_CAST(aesni_xts_tweak),
  598. aes_ctx(ctx->raw_tweak_ctx),
  599. aes_ctx(ctx->raw_crypt_ctx));
  600. }
  601. #else
  602. static int xts_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  603. struct scatterlist *src, unsigned int nbytes)
  604. {
  605. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  606. be128 buf[8];
  607. struct xts_crypt_req req = {
  608. .tbuf = buf,
  609. .tbuflen = sizeof(buf),
  610. .tweak_ctx = aes_ctx(ctx->raw_tweak_ctx),
  611. .tweak_fn = aesni_xts_tweak,
  612. .crypt_ctx = aes_ctx(ctx->raw_crypt_ctx),
  613. .crypt_fn = lrw_xts_encrypt_callback,
  614. };
  615. int ret;
  616. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  617. kernel_fpu_begin();
  618. ret = xts_crypt(desc, dst, src, nbytes, &req);
  619. kernel_fpu_end();
  620. return ret;
  621. }
  622. static int xts_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
  623. struct scatterlist *src, unsigned int nbytes)
  624. {
  625. struct aesni_xts_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
  626. be128 buf[8];
  627. struct xts_crypt_req req = {
  628. .tbuf = buf,
  629. .tbuflen = sizeof(buf),
  630. .tweak_ctx = aes_ctx(ctx->raw_tweak_ctx),
  631. .tweak_fn = aesni_xts_tweak,
  632. .crypt_ctx = aes_ctx(ctx->raw_crypt_ctx),
  633. .crypt_fn = lrw_xts_decrypt_callback,
  634. };
  635. int ret;
  636. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  637. kernel_fpu_begin();
  638. ret = xts_crypt(desc, dst, src, nbytes, &req);
  639. kernel_fpu_end();
  640. return ret;
  641. }
  642. #endif
  643. #ifdef CONFIG_X86_64
  644. static int rfc4106_init(struct crypto_tfm *tfm)
  645. {
  646. struct cryptd_aead *cryptd_tfm;
  647. struct aesni_rfc4106_gcm_ctx *ctx = (struct aesni_rfc4106_gcm_ctx *)
  648. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  649. struct crypto_aead *cryptd_child;
  650. struct aesni_rfc4106_gcm_ctx *child_ctx;
  651. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni", 0, 0);
  652. if (IS_ERR(cryptd_tfm))
  653. return PTR_ERR(cryptd_tfm);
  654. cryptd_child = cryptd_aead_child(cryptd_tfm);
  655. child_ctx = aesni_rfc4106_gcm_ctx_get(cryptd_child);
  656. memcpy(child_ctx, ctx, sizeof(*ctx));
  657. ctx->cryptd_tfm = cryptd_tfm;
  658. tfm->crt_aead.reqsize = sizeof(struct aead_request)
  659. + crypto_aead_reqsize(&cryptd_tfm->base);
  660. return 0;
  661. }
  662. static void rfc4106_exit(struct crypto_tfm *tfm)
  663. {
  664. struct aesni_rfc4106_gcm_ctx *ctx =
  665. (struct aesni_rfc4106_gcm_ctx *)
  666. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  667. if (!IS_ERR(ctx->cryptd_tfm))
  668. cryptd_free_aead(ctx->cryptd_tfm);
  669. return;
  670. }
  671. static void
  672. rfc4106_set_hash_subkey_done(struct crypto_async_request *req, int err)
  673. {
  674. struct aesni_gcm_set_hash_subkey_result *result = req->data;
  675. if (err == -EINPROGRESS)
  676. return;
  677. result->err = err;
  678. complete(&result->completion);
  679. }
  680. static int
  681. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  682. {
  683. struct crypto_ablkcipher *ctr_tfm;
  684. struct ablkcipher_request *req;
  685. int ret = -EINVAL;
  686. struct aesni_hash_subkey_req_data *req_data;
  687. ctr_tfm = crypto_alloc_ablkcipher("ctr(aes)", 0, 0);
  688. if (IS_ERR(ctr_tfm))
  689. return PTR_ERR(ctr_tfm);
  690. crypto_ablkcipher_clear_flags(ctr_tfm, ~0);
  691. ret = crypto_ablkcipher_setkey(ctr_tfm, key, key_len);
  692. if (ret)
  693. goto out_free_ablkcipher;
  694. ret = -ENOMEM;
  695. req = ablkcipher_request_alloc(ctr_tfm, GFP_KERNEL);
  696. if (!req)
  697. goto out_free_ablkcipher;
  698. req_data = kmalloc(sizeof(*req_data), GFP_KERNEL);
  699. if (!req_data)
  700. goto out_free_request;
  701. memset(req_data->iv, 0, sizeof(req_data->iv));
  702. /* Clear the data in the hash sub key container to zero.*/
  703. /* We want to cipher all zeros to create the hash sub key. */
  704. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  705. init_completion(&req_data->result.completion);
  706. sg_init_one(&req_data->sg, hash_subkey, RFC4106_HASH_SUBKEY_SIZE);
  707. ablkcipher_request_set_tfm(req, ctr_tfm);
  708. ablkcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
  709. CRYPTO_TFM_REQ_MAY_BACKLOG,
  710. rfc4106_set_hash_subkey_done,
  711. &req_data->result);
  712. ablkcipher_request_set_crypt(req, &req_data->sg,
  713. &req_data->sg, RFC4106_HASH_SUBKEY_SIZE, req_data->iv);
  714. ret = crypto_ablkcipher_encrypt(req);
  715. if (ret == -EINPROGRESS || ret == -EBUSY) {
  716. ret = wait_for_completion_interruptible
  717. (&req_data->result.completion);
  718. if (!ret)
  719. ret = req_data->result.err;
  720. }
  721. kfree(req_data);
  722. out_free_request:
  723. ablkcipher_request_free(req);
  724. out_free_ablkcipher:
  725. crypto_free_ablkcipher(ctr_tfm);
  726. return ret;
  727. }
  728. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  729. unsigned int key_len)
  730. {
  731. int ret = 0;
  732. struct crypto_tfm *tfm = crypto_aead_tfm(parent);
  733. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  734. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  735. struct aesni_rfc4106_gcm_ctx *child_ctx =
  736. aesni_rfc4106_gcm_ctx_get(cryptd_child);
  737. u8 *new_key_align, *new_key_mem = NULL;
  738. if (key_len < 4) {
  739. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  740. return -EINVAL;
  741. }
  742. /*Account for 4 byte nonce at the end.*/
  743. key_len -= 4;
  744. if (key_len != AES_KEYSIZE_128) {
  745. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  746. return -EINVAL;
  747. }
  748. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  749. /*This must be on a 16 byte boundary!*/
  750. if ((unsigned long)(&(ctx->aes_key_expanded.key_enc[0])) % AESNI_ALIGN)
  751. return -EINVAL;
  752. if ((unsigned long)key % AESNI_ALIGN) {
  753. /*key is not aligned: use an auxuliar aligned pointer*/
  754. new_key_mem = kmalloc(key_len+AESNI_ALIGN, GFP_KERNEL);
  755. if (!new_key_mem)
  756. return -ENOMEM;
  757. new_key_align = PTR_ALIGN(new_key_mem, AESNI_ALIGN);
  758. memcpy(new_key_align, key, key_len);
  759. key = new_key_align;
  760. }
  761. if (!irq_fpu_usable())
  762. ret = crypto_aes_expand_key(&(ctx->aes_key_expanded),
  763. key, key_len);
  764. else {
  765. kernel_fpu_begin();
  766. ret = aesni_set_key(&(ctx->aes_key_expanded), key, key_len);
  767. kernel_fpu_end();
  768. }
  769. /*This must be on a 16 byte boundary!*/
  770. if ((unsigned long)(&(ctx->hash_subkey[0])) % AESNI_ALIGN) {
  771. ret = -EINVAL;
  772. goto exit;
  773. }
  774. ret = rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  775. memcpy(child_ctx, ctx, sizeof(*ctx));
  776. exit:
  777. kfree(new_key_mem);
  778. return ret;
  779. }
  780. /* This is the Integrity Check Value (aka the authentication tag length and can
  781. * be 8, 12 or 16 bytes long. */
  782. static int rfc4106_set_authsize(struct crypto_aead *parent,
  783. unsigned int authsize)
  784. {
  785. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  786. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  787. switch (authsize) {
  788. case 8:
  789. case 12:
  790. case 16:
  791. break;
  792. default:
  793. return -EINVAL;
  794. }
  795. crypto_aead_crt(parent)->authsize = authsize;
  796. crypto_aead_crt(cryptd_child)->authsize = authsize;
  797. return 0;
  798. }
  799. static int rfc4106_encrypt(struct aead_request *req)
  800. {
  801. int ret;
  802. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  803. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  804. if (!irq_fpu_usable()) {
  805. struct aead_request *cryptd_req =
  806. (struct aead_request *) aead_request_ctx(req);
  807. memcpy(cryptd_req, req, sizeof(*req));
  808. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  809. return crypto_aead_encrypt(cryptd_req);
  810. } else {
  811. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  812. kernel_fpu_begin();
  813. ret = cryptd_child->base.crt_aead.encrypt(req);
  814. kernel_fpu_end();
  815. return ret;
  816. }
  817. }
  818. static int rfc4106_decrypt(struct aead_request *req)
  819. {
  820. int ret;
  821. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  822. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  823. if (!irq_fpu_usable()) {
  824. struct aead_request *cryptd_req =
  825. (struct aead_request *) aead_request_ctx(req);
  826. memcpy(cryptd_req, req, sizeof(*req));
  827. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  828. return crypto_aead_decrypt(cryptd_req);
  829. } else {
  830. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  831. kernel_fpu_begin();
  832. ret = cryptd_child->base.crt_aead.decrypt(req);
  833. kernel_fpu_end();
  834. return ret;
  835. }
  836. }
  837. static int __driver_rfc4106_encrypt(struct aead_request *req)
  838. {
  839. u8 one_entry_in_sg = 0;
  840. u8 *src, *dst, *assoc;
  841. __be32 counter = cpu_to_be32(1);
  842. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  843. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  844. void *aes_ctx = &(ctx->aes_key_expanded);
  845. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  846. u8 iv_tab[16+AESNI_ALIGN];
  847. u8* iv = (u8 *) PTR_ALIGN((u8 *)iv_tab, AESNI_ALIGN);
  848. struct scatter_walk src_sg_walk;
  849. struct scatter_walk assoc_sg_walk;
  850. struct scatter_walk dst_sg_walk;
  851. unsigned int i;
  852. /* Assuming we are supporting rfc4106 64-bit extended */
  853. /* sequence numbers We need to have the AAD length equal */
  854. /* to 8 or 12 bytes */
  855. if (unlikely(req->assoclen != 8 && req->assoclen != 12))
  856. return -EINVAL;
  857. /* IV below built */
  858. for (i = 0; i < 4; i++)
  859. *(iv+i) = ctx->nonce[i];
  860. for (i = 0; i < 8; i++)
  861. *(iv+4+i) = req->iv[i];
  862. *((__be32 *)(iv+12)) = counter;
  863. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  864. one_entry_in_sg = 1;
  865. scatterwalk_start(&src_sg_walk, req->src);
  866. scatterwalk_start(&assoc_sg_walk, req->assoc);
  867. src = scatterwalk_map(&src_sg_walk);
  868. assoc = scatterwalk_map(&assoc_sg_walk);
  869. dst = src;
  870. if (unlikely(req->src != req->dst)) {
  871. scatterwalk_start(&dst_sg_walk, req->dst);
  872. dst = scatterwalk_map(&dst_sg_walk);
  873. }
  874. } else {
  875. /* Allocate memory for src, dst, assoc */
  876. src = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  877. GFP_ATOMIC);
  878. if (unlikely(!src))
  879. return -ENOMEM;
  880. assoc = (src + req->cryptlen + auth_tag_len);
  881. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  882. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  883. req->assoclen, 0);
  884. dst = src;
  885. }
  886. aesni_gcm_enc_tfm(aes_ctx, dst, src, (unsigned long)req->cryptlen, iv,
  887. ctx->hash_subkey, assoc, (unsigned long)req->assoclen, dst
  888. + ((unsigned long)req->cryptlen), auth_tag_len);
  889. /* The authTag (aka the Integrity Check Value) needs to be written
  890. * back to the packet. */
  891. if (one_entry_in_sg) {
  892. if (unlikely(req->src != req->dst)) {
  893. scatterwalk_unmap(dst);
  894. scatterwalk_done(&dst_sg_walk, 0, 0);
  895. }
  896. scatterwalk_unmap(src);
  897. scatterwalk_unmap(assoc);
  898. scatterwalk_done(&src_sg_walk, 0, 0);
  899. scatterwalk_done(&assoc_sg_walk, 0, 0);
  900. } else {
  901. scatterwalk_map_and_copy(dst, req->dst, 0,
  902. req->cryptlen + auth_tag_len, 1);
  903. kfree(src);
  904. }
  905. return 0;
  906. }
  907. static int __driver_rfc4106_decrypt(struct aead_request *req)
  908. {
  909. u8 one_entry_in_sg = 0;
  910. u8 *src, *dst, *assoc;
  911. unsigned long tempCipherLen = 0;
  912. __be32 counter = cpu_to_be32(1);
  913. int retval = 0;
  914. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  915. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  916. void *aes_ctx = &(ctx->aes_key_expanded);
  917. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  918. u8 iv_and_authTag[32+AESNI_ALIGN];
  919. u8 *iv = (u8 *) PTR_ALIGN((u8 *)iv_and_authTag, AESNI_ALIGN);
  920. u8 *authTag = iv + 16;
  921. struct scatter_walk src_sg_walk;
  922. struct scatter_walk assoc_sg_walk;
  923. struct scatter_walk dst_sg_walk;
  924. unsigned int i;
  925. if (unlikely((req->cryptlen < auth_tag_len) ||
  926. (req->assoclen != 8 && req->assoclen != 12)))
  927. return -EINVAL;
  928. /* Assuming we are supporting rfc4106 64-bit extended */
  929. /* sequence numbers We need to have the AAD length */
  930. /* equal to 8 or 12 bytes */
  931. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  932. /* IV below built */
  933. for (i = 0; i < 4; i++)
  934. *(iv+i) = ctx->nonce[i];
  935. for (i = 0; i < 8; i++)
  936. *(iv+4+i) = req->iv[i];
  937. *((__be32 *)(iv+12)) = counter;
  938. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  939. one_entry_in_sg = 1;
  940. scatterwalk_start(&src_sg_walk, req->src);
  941. scatterwalk_start(&assoc_sg_walk, req->assoc);
  942. src = scatterwalk_map(&src_sg_walk);
  943. assoc = scatterwalk_map(&assoc_sg_walk);
  944. dst = src;
  945. if (unlikely(req->src != req->dst)) {
  946. scatterwalk_start(&dst_sg_walk, req->dst);
  947. dst = scatterwalk_map(&dst_sg_walk);
  948. }
  949. } else {
  950. /* Allocate memory for src, dst, assoc */
  951. src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  952. if (!src)
  953. return -ENOMEM;
  954. assoc = (src + req->cryptlen + auth_tag_len);
  955. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  956. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  957. req->assoclen, 0);
  958. dst = src;
  959. }
  960. aesni_gcm_dec_tfm(aes_ctx, dst, src, tempCipherLen, iv,
  961. ctx->hash_subkey, assoc, (unsigned long)req->assoclen,
  962. authTag, auth_tag_len);
  963. /* Compare generated tag with passed in tag. */
  964. retval = crypto_memneq(src + tempCipherLen, authTag, auth_tag_len) ?
  965. -EBADMSG : 0;
  966. if (one_entry_in_sg) {
  967. if (unlikely(req->src != req->dst)) {
  968. scatterwalk_unmap(dst);
  969. scatterwalk_done(&dst_sg_walk, 0, 0);
  970. }
  971. scatterwalk_unmap(src);
  972. scatterwalk_unmap(assoc);
  973. scatterwalk_done(&src_sg_walk, 0, 0);
  974. scatterwalk_done(&assoc_sg_walk, 0, 0);
  975. } else {
  976. scatterwalk_map_and_copy(dst, req->dst, 0, req->cryptlen, 1);
  977. kfree(src);
  978. }
  979. return retval;
  980. }
  981. #endif
  982. static struct crypto_alg aesni_algs[] = { {
  983. .cra_name = "aes",
  984. .cra_driver_name = "aes-aesni",
  985. .cra_priority = 300,
  986. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  987. .cra_blocksize = AES_BLOCK_SIZE,
  988. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  989. AESNI_ALIGN - 1,
  990. .cra_alignmask = 0,
  991. .cra_module = THIS_MODULE,
  992. .cra_u = {
  993. .cipher = {
  994. .cia_min_keysize = AES_MIN_KEY_SIZE,
  995. .cia_max_keysize = AES_MAX_KEY_SIZE,
  996. .cia_setkey = aes_set_key,
  997. .cia_encrypt = aes_encrypt,
  998. .cia_decrypt = aes_decrypt
  999. }
  1000. }
  1001. }, {
  1002. .cra_name = "__aes-aesni",
  1003. .cra_driver_name = "__driver-aes-aesni",
  1004. .cra_priority = 0,
  1005. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  1006. .cra_blocksize = AES_BLOCK_SIZE,
  1007. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1008. AESNI_ALIGN - 1,
  1009. .cra_alignmask = 0,
  1010. .cra_module = THIS_MODULE,
  1011. .cra_u = {
  1012. .cipher = {
  1013. .cia_min_keysize = AES_MIN_KEY_SIZE,
  1014. .cia_max_keysize = AES_MAX_KEY_SIZE,
  1015. .cia_setkey = aes_set_key,
  1016. .cia_encrypt = __aes_encrypt,
  1017. .cia_decrypt = __aes_decrypt
  1018. }
  1019. }
  1020. }, {
  1021. .cra_name = "__ecb-aes-aesni",
  1022. .cra_driver_name = "__driver-ecb-aes-aesni",
  1023. .cra_priority = 0,
  1024. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1025. .cra_blocksize = AES_BLOCK_SIZE,
  1026. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1027. AESNI_ALIGN - 1,
  1028. .cra_alignmask = 0,
  1029. .cra_type = &crypto_blkcipher_type,
  1030. .cra_module = THIS_MODULE,
  1031. .cra_u = {
  1032. .blkcipher = {
  1033. .min_keysize = AES_MIN_KEY_SIZE,
  1034. .max_keysize = AES_MAX_KEY_SIZE,
  1035. .setkey = aes_set_key,
  1036. .encrypt = ecb_encrypt,
  1037. .decrypt = ecb_decrypt,
  1038. },
  1039. },
  1040. }, {
  1041. .cra_name = "__cbc-aes-aesni",
  1042. .cra_driver_name = "__driver-cbc-aes-aesni",
  1043. .cra_priority = 0,
  1044. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1045. .cra_blocksize = AES_BLOCK_SIZE,
  1046. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1047. AESNI_ALIGN - 1,
  1048. .cra_alignmask = 0,
  1049. .cra_type = &crypto_blkcipher_type,
  1050. .cra_module = THIS_MODULE,
  1051. .cra_u = {
  1052. .blkcipher = {
  1053. .min_keysize = AES_MIN_KEY_SIZE,
  1054. .max_keysize = AES_MAX_KEY_SIZE,
  1055. .setkey = aes_set_key,
  1056. .encrypt = cbc_encrypt,
  1057. .decrypt = cbc_decrypt,
  1058. },
  1059. },
  1060. }, {
  1061. .cra_name = "ecb(aes)",
  1062. .cra_driver_name = "ecb-aes-aesni",
  1063. .cra_priority = 400,
  1064. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1065. .cra_blocksize = AES_BLOCK_SIZE,
  1066. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1067. .cra_alignmask = 0,
  1068. .cra_type = &crypto_ablkcipher_type,
  1069. .cra_module = THIS_MODULE,
  1070. .cra_init = ablk_ecb_init,
  1071. .cra_exit = ablk_exit,
  1072. .cra_u = {
  1073. .ablkcipher = {
  1074. .min_keysize = AES_MIN_KEY_SIZE,
  1075. .max_keysize = AES_MAX_KEY_SIZE,
  1076. .setkey = ablk_set_key,
  1077. .encrypt = ablk_encrypt,
  1078. .decrypt = ablk_decrypt,
  1079. },
  1080. },
  1081. }, {
  1082. .cra_name = "cbc(aes)",
  1083. .cra_driver_name = "cbc-aes-aesni",
  1084. .cra_priority = 400,
  1085. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1086. .cra_blocksize = AES_BLOCK_SIZE,
  1087. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1088. .cra_alignmask = 0,
  1089. .cra_type = &crypto_ablkcipher_type,
  1090. .cra_module = THIS_MODULE,
  1091. .cra_init = ablk_cbc_init,
  1092. .cra_exit = ablk_exit,
  1093. .cra_u = {
  1094. .ablkcipher = {
  1095. .min_keysize = AES_MIN_KEY_SIZE,
  1096. .max_keysize = AES_MAX_KEY_SIZE,
  1097. .ivsize = AES_BLOCK_SIZE,
  1098. .setkey = ablk_set_key,
  1099. .encrypt = ablk_encrypt,
  1100. .decrypt = ablk_decrypt,
  1101. },
  1102. },
  1103. #ifdef CONFIG_X86_64
  1104. }, {
  1105. .cra_name = "__ctr-aes-aesni",
  1106. .cra_driver_name = "__driver-ctr-aes-aesni",
  1107. .cra_priority = 0,
  1108. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1109. .cra_blocksize = 1,
  1110. .cra_ctxsize = sizeof(struct crypto_aes_ctx) +
  1111. AESNI_ALIGN - 1,
  1112. .cra_alignmask = 0,
  1113. .cra_type = &crypto_blkcipher_type,
  1114. .cra_module = THIS_MODULE,
  1115. .cra_u = {
  1116. .blkcipher = {
  1117. .min_keysize = AES_MIN_KEY_SIZE,
  1118. .max_keysize = AES_MAX_KEY_SIZE,
  1119. .ivsize = AES_BLOCK_SIZE,
  1120. .setkey = aes_set_key,
  1121. .encrypt = ctr_crypt,
  1122. .decrypt = ctr_crypt,
  1123. },
  1124. },
  1125. }, {
  1126. .cra_name = "ctr(aes)",
  1127. .cra_driver_name = "ctr-aes-aesni",
  1128. .cra_priority = 400,
  1129. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1130. .cra_blocksize = 1,
  1131. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1132. .cra_alignmask = 0,
  1133. .cra_type = &crypto_ablkcipher_type,
  1134. .cra_module = THIS_MODULE,
  1135. .cra_init = ablk_ctr_init,
  1136. .cra_exit = ablk_exit,
  1137. .cra_u = {
  1138. .ablkcipher = {
  1139. .min_keysize = AES_MIN_KEY_SIZE,
  1140. .max_keysize = AES_MAX_KEY_SIZE,
  1141. .ivsize = AES_BLOCK_SIZE,
  1142. .setkey = ablk_set_key,
  1143. .encrypt = ablk_encrypt,
  1144. .decrypt = ablk_encrypt,
  1145. .geniv = "chainiv",
  1146. },
  1147. },
  1148. }, {
  1149. .cra_name = "__gcm-aes-aesni",
  1150. .cra_driver_name = "__driver-gcm-aes-aesni",
  1151. .cra_priority = 0,
  1152. .cra_flags = CRYPTO_ALG_TYPE_AEAD,
  1153. .cra_blocksize = 1,
  1154. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  1155. AESNI_ALIGN,
  1156. .cra_alignmask = 0,
  1157. .cra_type = &crypto_aead_type,
  1158. .cra_module = THIS_MODULE,
  1159. .cra_u = {
  1160. .aead = {
  1161. .encrypt = __driver_rfc4106_encrypt,
  1162. .decrypt = __driver_rfc4106_decrypt,
  1163. },
  1164. },
  1165. }, {
  1166. .cra_name = "rfc4106(gcm(aes))",
  1167. .cra_driver_name = "rfc4106-gcm-aesni",
  1168. .cra_priority = 400,
  1169. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  1170. .cra_blocksize = 1,
  1171. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) +
  1172. AESNI_ALIGN,
  1173. .cra_alignmask = 0,
  1174. .cra_type = &crypto_nivaead_type,
  1175. .cra_module = THIS_MODULE,
  1176. .cra_init = rfc4106_init,
  1177. .cra_exit = rfc4106_exit,
  1178. .cra_u = {
  1179. .aead = {
  1180. .setkey = rfc4106_set_key,
  1181. .setauthsize = rfc4106_set_authsize,
  1182. .encrypt = rfc4106_encrypt,
  1183. .decrypt = rfc4106_decrypt,
  1184. .geniv = "seqiv",
  1185. .ivsize = 8,
  1186. .maxauthsize = 16,
  1187. },
  1188. },
  1189. #endif
  1190. #ifdef HAS_PCBC
  1191. }, {
  1192. .cra_name = "pcbc(aes)",
  1193. .cra_driver_name = "pcbc-aes-aesni",
  1194. .cra_priority = 400,
  1195. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1196. .cra_blocksize = AES_BLOCK_SIZE,
  1197. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1198. .cra_alignmask = 0,
  1199. .cra_type = &crypto_ablkcipher_type,
  1200. .cra_module = THIS_MODULE,
  1201. .cra_init = ablk_pcbc_init,
  1202. .cra_exit = ablk_exit,
  1203. .cra_u = {
  1204. .ablkcipher = {
  1205. .min_keysize = AES_MIN_KEY_SIZE,
  1206. .max_keysize = AES_MAX_KEY_SIZE,
  1207. .ivsize = AES_BLOCK_SIZE,
  1208. .setkey = ablk_set_key,
  1209. .encrypt = ablk_encrypt,
  1210. .decrypt = ablk_decrypt,
  1211. },
  1212. },
  1213. #endif
  1214. }, {
  1215. .cra_name = "__lrw-aes-aesni",
  1216. .cra_driver_name = "__driver-lrw-aes-aesni",
  1217. .cra_priority = 0,
  1218. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1219. .cra_blocksize = AES_BLOCK_SIZE,
  1220. .cra_ctxsize = sizeof(struct aesni_lrw_ctx),
  1221. .cra_alignmask = 0,
  1222. .cra_type = &crypto_blkcipher_type,
  1223. .cra_module = THIS_MODULE,
  1224. .cra_exit = lrw_aesni_exit_tfm,
  1225. .cra_u = {
  1226. .blkcipher = {
  1227. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  1228. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  1229. .ivsize = AES_BLOCK_SIZE,
  1230. .setkey = lrw_aesni_setkey,
  1231. .encrypt = lrw_encrypt,
  1232. .decrypt = lrw_decrypt,
  1233. },
  1234. },
  1235. }, {
  1236. .cra_name = "__xts-aes-aesni",
  1237. .cra_driver_name = "__driver-xts-aes-aesni",
  1238. .cra_priority = 0,
  1239. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  1240. .cra_blocksize = AES_BLOCK_SIZE,
  1241. .cra_ctxsize = sizeof(struct aesni_xts_ctx),
  1242. .cra_alignmask = 0,
  1243. .cra_type = &crypto_blkcipher_type,
  1244. .cra_module = THIS_MODULE,
  1245. .cra_u = {
  1246. .blkcipher = {
  1247. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1248. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1249. .ivsize = AES_BLOCK_SIZE,
  1250. .setkey = xts_aesni_setkey,
  1251. .encrypt = xts_encrypt,
  1252. .decrypt = xts_decrypt,
  1253. },
  1254. },
  1255. }, {
  1256. .cra_name = "lrw(aes)",
  1257. .cra_driver_name = "lrw-aes-aesni",
  1258. .cra_priority = 400,
  1259. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1260. .cra_blocksize = AES_BLOCK_SIZE,
  1261. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1262. .cra_alignmask = 0,
  1263. .cra_type = &crypto_ablkcipher_type,
  1264. .cra_module = THIS_MODULE,
  1265. .cra_init = ablk_init,
  1266. .cra_exit = ablk_exit,
  1267. .cra_u = {
  1268. .ablkcipher = {
  1269. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  1270. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  1271. .ivsize = AES_BLOCK_SIZE,
  1272. .setkey = ablk_set_key,
  1273. .encrypt = ablk_encrypt,
  1274. .decrypt = ablk_decrypt,
  1275. },
  1276. },
  1277. }, {
  1278. .cra_name = "xts(aes)",
  1279. .cra_driver_name = "xts-aes-aesni",
  1280. .cra_priority = 400,
  1281. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  1282. .cra_blocksize = AES_BLOCK_SIZE,
  1283. .cra_ctxsize = sizeof(struct async_helper_ctx),
  1284. .cra_alignmask = 0,
  1285. .cra_type = &crypto_ablkcipher_type,
  1286. .cra_module = THIS_MODULE,
  1287. .cra_init = ablk_init,
  1288. .cra_exit = ablk_exit,
  1289. .cra_u = {
  1290. .ablkcipher = {
  1291. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  1292. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  1293. .ivsize = AES_BLOCK_SIZE,
  1294. .setkey = ablk_set_key,
  1295. .encrypt = ablk_encrypt,
  1296. .decrypt = ablk_decrypt,
  1297. },
  1298. },
  1299. } };
  1300. static const struct x86_cpu_id aesni_cpu_id[] = {
  1301. X86_FEATURE_MATCH(X86_FEATURE_AES),
  1302. {}
  1303. };
  1304. MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
  1305. static int __init aesni_init(void)
  1306. {
  1307. int err;
  1308. if (!x86_match_cpu(aesni_cpu_id))
  1309. return -ENODEV;
  1310. #ifdef CONFIG_X86_64
  1311. #ifdef CONFIG_AS_AVX2
  1312. if (boot_cpu_has(X86_FEATURE_AVX2)) {
  1313. pr_info("AVX2 version of gcm_enc/dec engaged.\n");
  1314. aesni_gcm_enc_tfm = aesni_gcm_enc_avx2;
  1315. aesni_gcm_dec_tfm = aesni_gcm_dec_avx2;
  1316. } else
  1317. #endif
  1318. #ifdef CONFIG_AS_AVX
  1319. if (boot_cpu_has(X86_FEATURE_AVX)) {
  1320. pr_info("AVX version of gcm_enc/dec engaged.\n");
  1321. aesni_gcm_enc_tfm = aesni_gcm_enc_avx;
  1322. aesni_gcm_dec_tfm = aesni_gcm_dec_avx;
  1323. } else
  1324. #endif
  1325. {
  1326. pr_info("SSE version of gcm_enc/dec engaged.\n");
  1327. aesni_gcm_enc_tfm = aesni_gcm_enc;
  1328. aesni_gcm_dec_tfm = aesni_gcm_dec;
  1329. }
  1330. #endif
  1331. err = crypto_fpu_init();
  1332. if (err)
  1333. return err;
  1334. return crypto_register_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1335. }
  1336. static void __exit aesni_exit(void)
  1337. {
  1338. crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1339. crypto_fpu_exit();
  1340. }
  1341. module_init(aesni_init);
  1342. module_exit(aesni_exit);
  1343. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1344. MODULE_LICENSE("GPL");
  1345. MODULE_ALIAS("aes");