setup-sh5.c 4.0 KB

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  1. /*
  2. * SH5-101/SH5-103 CPU Setup
  3. *
  4. * Copyright (C) 2009 Paul Mundt
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/platform_device.h>
  11. #include <linux/init.h>
  12. #include <linux/serial.h>
  13. #include <linux/serial_sci.h>
  14. #include <linux/io.h>
  15. #include <linux/mm.h>
  16. #include <linux/sh_timer.h>
  17. #include <asm/addrspace.h>
  18. static struct plat_sci_port scif0_platform_data = {
  19. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  20. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
  21. .type = PORT_SCIF,
  22. };
  23. static struct resource scif0_resources[] = {
  24. DEFINE_RES_MEM(PHYS_PERIPHERAL_BLOCK + 0x01030000, 0x100),
  25. DEFINE_RES_IRQ(39),
  26. DEFINE_RES_IRQ(40),
  27. DEFINE_RES_IRQ(42),
  28. };
  29. static struct platform_device scif0_device = {
  30. .name = "sh-sci",
  31. .id = 0,
  32. .resource = scif0_resources,
  33. .num_resources = ARRAY_SIZE(scif0_resources),
  34. .dev = {
  35. .platform_data = &scif0_platform_data,
  36. },
  37. };
  38. static struct resource rtc_resources[] = {
  39. [0] = {
  40. .start = PHYS_PERIPHERAL_BLOCK + 0x01040000,
  41. .end = PHYS_PERIPHERAL_BLOCK + 0x01040000 + 0x58 - 1,
  42. .flags = IORESOURCE_IO,
  43. },
  44. [1] = {
  45. /* Period IRQ */
  46. .start = IRQ_PRI,
  47. .flags = IORESOURCE_IRQ,
  48. },
  49. [2] = {
  50. /* Carry IRQ */
  51. .start = IRQ_CUI,
  52. .flags = IORESOURCE_IRQ,
  53. },
  54. [3] = {
  55. /* Alarm IRQ */
  56. .start = IRQ_ATI,
  57. .flags = IORESOURCE_IRQ,
  58. },
  59. };
  60. static struct platform_device rtc_device = {
  61. .name = "sh-rtc",
  62. .id = -1,
  63. .num_resources = ARRAY_SIZE(rtc_resources),
  64. .resource = rtc_resources,
  65. };
  66. #define TMU_BLOCK_OFF 0x01020000
  67. #define TMU_BASE PHYS_PERIPHERAL_BLOCK + TMU_BLOCK_OFF
  68. #define TMU0_BASE (TMU_BASE + 0x8 + (0xc * 0x0))
  69. #define TMU1_BASE (TMU_BASE + 0x8 + (0xc * 0x1))
  70. #define TMU2_BASE (TMU_BASE + 0x8 + (0xc * 0x2))
  71. static struct sh_timer_config tmu0_platform_data = {
  72. .channel_offset = 0x04,
  73. .timer_bit = 0,
  74. .clockevent_rating = 200,
  75. };
  76. static struct resource tmu0_resources[] = {
  77. [0] = {
  78. .start = TMU0_BASE,
  79. .end = TMU0_BASE + 0xc - 1,
  80. .flags = IORESOURCE_MEM,
  81. },
  82. [1] = {
  83. .start = IRQ_TUNI0,
  84. .flags = IORESOURCE_IRQ,
  85. },
  86. };
  87. static struct platform_device tmu0_device = {
  88. .name = "sh_tmu",
  89. .id = 0,
  90. .dev = {
  91. .platform_data = &tmu0_platform_data,
  92. },
  93. .resource = tmu0_resources,
  94. .num_resources = ARRAY_SIZE(tmu0_resources),
  95. };
  96. static struct sh_timer_config tmu1_platform_data = {
  97. .channel_offset = 0x10,
  98. .timer_bit = 1,
  99. .clocksource_rating = 200,
  100. };
  101. static struct resource tmu1_resources[] = {
  102. [0] = {
  103. .start = TMU1_BASE,
  104. .end = TMU1_BASE + 0xc - 1,
  105. .flags = IORESOURCE_MEM,
  106. },
  107. [1] = {
  108. .start = IRQ_TUNI1,
  109. .flags = IORESOURCE_IRQ,
  110. },
  111. };
  112. static struct platform_device tmu1_device = {
  113. .name = "sh_tmu",
  114. .id = 1,
  115. .dev = {
  116. .platform_data = &tmu1_platform_data,
  117. },
  118. .resource = tmu1_resources,
  119. .num_resources = ARRAY_SIZE(tmu1_resources),
  120. };
  121. static struct sh_timer_config tmu2_platform_data = {
  122. .channel_offset = 0x1c,
  123. .timer_bit = 2,
  124. };
  125. static struct resource tmu2_resources[] = {
  126. [0] = {
  127. .start = TMU2_BASE,
  128. .end = TMU2_BASE + 0xc - 1,
  129. .flags = IORESOURCE_MEM,
  130. },
  131. [1] = {
  132. .start = IRQ_TUNI2,
  133. .flags = IORESOURCE_IRQ,
  134. },
  135. };
  136. static struct platform_device tmu2_device = {
  137. .name = "sh_tmu",
  138. .id = 2,
  139. .dev = {
  140. .platform_data = &tmu2_platform_data,
  141. },
  142. .resource = tmu2_resources,
  143. .num_resources = ARRAY_SIZE(tmu2_resources),
  144. };
  145. static struct platform_device *sh5_early_devices[] __initdata = {
  146. &scif0_device,
  147. &tmu0_device,
  148. &tmu1_device,
  149. &tmu2_device,
  150. };
  151. static struct platform_device *sh5_devices[] __initdata = {
  152. &rtc_device,
  153. };
  154. static int __init sh5_devices_setup(void)
  155. {
  156. int ret;
  157. ret = platform_add_devices(sh5_early_devices,
  158. ARRAY_SIZE(sh5_early_devices));
  159. if (unlikely(ret != 0))
  160. return ret;
  161. return platform_add_devices(sh5_devices,
  162. ARRAY_SIZE(sh5_devices));
  163. }
  164. arch_initcall(sh5_devices_setup);
  165. void __init plat_early_device_setup(void)
  166. {
  167. early_platform_add_devices(sh5_early_devices,
  168. ARRAY_SIZE(sh5_early_devices));
  169. }