cputable.c 68 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276
  1. /*
  2. * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
  3. *
  4. * Modifications for ppc64:
  5. * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/string.h>
  13. #include <linux/sched.h>
  14. #include <linux/threads.h>
  15. #include <linux/init.h>
  16. #include <linux/export.h>
  17. #include <asm/oprofile_impl.h>
  18. #include <asm/cputable.h>
  19. #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
  20. #include <asm/mmu.h>
  21. #include <asm/setup.h>
  22. struct cpu_spec* cur_cpu_spec = NULL;
  23. EXPORT_SYMBOL(cur_cpu_spec);
  24. /* The platform string corresponding to the real PVR */
  25. const char *powerpc_base_platform;
  26. /* NOTE:
  27. * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
  28. * the responsibility of the appropriate CPU save/restore functions to
  29. * eventually copy these settings over. Those save/restore aren't yet
  30. * part of the cputable though. That has to be fixed for both ppc32
  31. * and ppc64
  32. */
  33. #ifdef CONFIG_PPC32
  34. extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
  35. extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
  36. extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
  37. extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
  38. extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
  39. extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
  40. extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
  41. extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
  42. extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
  43. extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
  44. extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
  45. extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
  46. extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
  47. extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
  48. extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
  49. extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
  50. extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
  51. extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
  52. extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
  53. extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
  54. extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
  55. extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
  56. #endif /* CONFIG_PPC32 */
  57. #ifdef CONFIG_PPC64
  58. extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
  59. extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
  60. extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
  61. extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
  62. extern void __restore_cpu_pa6t(void);
  63. extern void __restore_cpu_ppc970(void);
  64. extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
  65. extern void __restore_cpu_power7(void);
  66. extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
  67. extern void __restore_cpu_power8(void);
  68. extern void __restore_cpu_a2(void);
  69. extern void __flush_tlb_power7(unsigned long inval_selector);
  70. extern void __flush_tlb_power8(unsigned long inval_selector);
  71. extern long __machine_check_early_realmode_p7(struct pt_regs *regs);
  72. extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
  73. #endif /* CONFIG_PPC64 */
  74. #if defined(CONFIG_E500)
  75. extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
  76. extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
  77. extern void __restore_cpu_e5500(void);
  78. extern void __restore_cpu_e6500(void);
  79. #endif /* CONFIG_E500 */
  80. /* This table only contains "desktop" CPUs, it need to be filled with embedded
  81. * ones as well...
  82. */
  83. #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
  84. PPC_FEATURE_HAS_MMU)
  85. #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
  86. #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
  87. #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
  88. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  89. #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
  90. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  91. #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
  92. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  93. PPC_FEATURE_TRUE_LE | \
  94. PPC_FEATURE_PSERIES_PERFMON_COMPAT)
  95. #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
  96. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  97. PPC_FEATURE_TRUE_LE | \
  98. PPC_FEATURE_PSERIES_PERFMON_COMPAT)
  99. #define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
  100. #define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
  101. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  102. PPC_FEATURE_TRUE_LE | \
  103. PPC_FEATURE_PSERIES_PERFMON_COMPAT)
  104. #define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
  105. PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_DSCR | \
  106. PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR)
  107. #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
  108. PPC_FEATURE_TRUE_LE | \
  109. PPC_FEATURE_HAS_ALTIVEC_COMP)
  110. #ifdef CONFIG_PPC_BOOK3E_64
  111. #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
  112. #else
  113. #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
  114. PPC_FEATURE_BOOKE)
  115. #endif
  116. static struct cpu_spec __initdata cpu_specs[] = {
  117. #ifdef CONFIG_PPC_BOOK3S_64
  118. { /* Power3 */
  119. .pvr_mask = 0xffff0000,
  120. .pvr_value = 0x00400000,
  121. .cpu_name = "POWER3 (630)",
  122. .cpu_features = CPU_FTRS_POWER3,
  123. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  124. .mmu_features = MMU_FTR_HPTE_TABLE,
  125. .icache_bsize = 128,
  126. .dcache_bsize = 128,
  127. .num_pmcs = 8,
  128. .pmc_type = PPC_PMC_IBM,
  129. .oprofile_cpu_type = "ppc64/power3",
  130. .oprofile_type = PPC_OPROFILE_RS64,
  131. .platform = "power3",
  132. },
  133. { /* Power3+ */
  134. .pvr_mask = 0xffff0000,
  135. .pvr_value = 0x00410000,
  136. .cpu_name = "POWER3 (630+)",
  137. .cpu_features = CPU_FTRS_POWER3,
  138. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  139. .mmu_features = MMU_FTR_HPTE_TABLE,
  140. .icache_bsize = 128,
  141. .dcache_bsize = 128,
  142. .num_pmcs = 8,
  143. .pmc_type = PPC_PMC_IBM,
  144. .oprofile_cpu_type = "ppc64/power3",
  145. .oprofile_type = PPC_OPROFILE_RS64,
  146. .platform = "power3",
  147. },
  148. { /* Northstar */
  149. .pvr_mask = 0xffff0000,
  150. .pvr_value = 0x00330000,
  151. .cpu_name = "RS64-II (northstar)",
  152. .cpu_features = CPU_FTRS_RS64,
  153. .cpu_user_features = COMMON_USER_PPC64,
  154. .mmu_features = MMU_FTR_HPTE_TABLE,
  155. .icache_bsize = 128,
  156. .dcache_bsize = 128,
  157. .num_pmcs = 8,
  158. .pmc_type = PPC_PMC_IBM,
  159. .oprofile_cpu_type = "ppc64/rs64",
  160. .oprofile_type = PPC_OPROFILE_RS64,
  161. .platform = "rs64",
  162. },
  163. { /* Pulsar */
  164. .pvr_mask = 0xffff0000,
  165. .pvr_value = 0x00340000,
  166. .cpu_name = "RS64-III (pulsar)",
  167. .cpu_features = CPU_FTRS_RS64,
  168. .cpu_user_features = COMMON_USER_PPC64,
  169. .mmu_features = MMU_FTR_HPTE_TABLE,
  170. .icache_bsize = 128,
  171. .dcache_bsize = 128,
  172. .num_pmcs = 8,
  173. .pmc_type = PPC_PMC_IBM,
  174. .oprofile_cpu_type = "ppc64/rs64",
  175. .oprofile_type = PPC_OPROFILE_RS64,
  176. .platform = "rs64",
  177. },
  178. { /* I-star */
  179. .pvr_mask = 0xffff0000,
  180. .pvr_value = 0x00360000,
  181. .cpu_name = "RS64-III (icestar)",
  182. .cpu_features = CPU_FTRS_RS64,
  183. .cpu_user_features = COMMON_USER_PPC64,
  184. .mmu_features = MMU_FTR_HPTE_TABLE,
  185. .icache_bsize = 128,
  186. .dcache_bsize = 128,
  187. .num_pmcs = 8,
  188. .pmc_type = PPC_PMC_IBM,
  189. .oprofile_cpu_type = "ppc64/rs64",
  190. .oprofile_type = PPC_OPROFILE_RS64,
  191. .platform = "rs64",
  192. },
  193. { /* S-star */
  194. .pvr_mask = 0xffff0000,
  195. .pvr_value = 0x00370000,
  196. .cpu_name = "RS64-IV (sstar)",
  197. .cpu_features = CPU_FTRS_RS64,
  198. .cpu_user_features = COMMON_USER_PPC64,
  199. .mmu_features = MMU_FTR_HPTE_TABLE,
  200. .icache_bsize = 128,
  201. .dcache_bsize = 128,
  202. .num_pmcs = 8,
  203. .pmc_type = PPC_PMC_IBM,
  204. .oprofile_cpu_type = "ppc64/rs64",
  205. .oprofile_type = PPC_OPROFILE_RS64,
  206. .platform = "rs64",
  207. },
  208. { /* Power4 */
  209. .pvr_mask = 0xffff0000,
  210. .pvr_value = 0x00350000,
  211. .cpu_name = "POWER4 (gp)",
  212. .cpu_features = CPU_FTRS_POWER4,
  213. .cpu_user_features = COMMON_USER_POWER4,
  214. .mmu_features = MMU_FTRS_POWER4,
  215. .icache_bsize = 128,
  216. .dcache_bsize = 128,
  217. .num_pmcs = 8,
  218. .pmc_type = PPC_PMC_IBM,
  219. .oprofile_cpu_type = "ppc64/power4",
  220. .oprofile_type = PPC_OPROFILE_POWER4,
  221. .platform = "power4",
  222. },
  223. { /* Power4+ */
  224. .pvr_mask = 0xffff0000,
  225. .pvr_value = 0x00380000,
  226. .cpu_name = "POWER4+ (gq)",
  227. .cpu_features = CPU_FTRS_POWER4,
  228. .cpu_user_features = COMMON_USER_POWER4,
  229. .mmu_features = MMU_FTRS_POWER4,
  230. .icache_bsize = 128,
  231. .dcache_bsize = 128,
  232. .num_pmcs = 8,
  233. .pmc_type = PPC_PMC_IBM,
  234. .oprofile_cpu_type = "ppc64/power4",
  235. .oprofile_type = PPC_OPROFILE_POWER4,
  236. .platform = "power4",
  237. },
  238. { /* PPC970 */
  239. .pvr_mask = 0xffff0000,
  240. .pvr_value = 0x00390000,
  241. .cpu_name = "PPC970",
  242. .cpu_features = CPU_FTRS_PPC970,
  243. .cpu_user_features = COMMON_USER_POWER4 |
  244. PPC_FEATURE_HAS_ALTIVEC_COMP,
  245. .mmu_features = MMU_FTRS_PPC970,
  246. .icache_bsize = 128,
  247. .dcache_bsize = 128,
  248. .num_pmcs = 8,
  249. .pmc_type = PPC_PMC_IBM,
  250. .cpu_setup = __setup_cpu_ppc970,
  251. .cpu_restore = __restore_cpu_ppc970,
  252. .oprofile_cpu_type = "ppc64/970",
  253. .oprofile_type = PPC_OPROFILE_POWER4,
  254. .platform = "ppc970",
  255. },
  256. { /* PPC970FX */
  257. .pvr_mask = 0xffff0000,
  258. .pvr_value = 0x003c0000,
  259. .cpu_name = "PPC970FX",
  260. .cpu_features = CPU_FTRS_PPC970,
  261. .cpu_user_features = COMMON_USER_POWER4 |
  262. PPC_FEATURE_HAS_ALTIVEC_COMP,
  263. .mmu_features = MMU_FTRS_PPC970,
  264. .icache_bsize = 128,
  265. .dcache_bsize = 128,
  266. .num_pmcs = 8,
  267. .pmc_type = PPC_PMC_IBM,
  268. .cpu_setup = __setup_cpu_ppc970,
  269. .cpu_restore = __restore_cpu_ppc970,
  270. .oprofile_cpu_type = "ppc64/970",
  271. .oprofile_type = PPC_OPROFILE_POWER4,
  272. .platform = "ppc970",
  273. },
  274. { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
  275. .pvr_mask = 0xffffffff,
  276. .pvr_value = 0x00440100,
  277. .cpu_name = "PPC970MP",
  278. .cpu_features = CPU_FTRS_PPC970,
  279. .cpu_user_features = COMMON_USER_POWER4 |
  280. PPC_FEATURE_HAS_ALTIVEC_COMP,
  281. .mmu_features = MMU_FTRS_PPC970,
  282. .icache_bsize = 128,
  283. .dcache_bsize = 128,
  284. .num_pmcs = 8,
  285. .pmc_type = PPC_PMC_IBM,
  286. .cpu_setup = __setup_cpu_ppc970,
  287. .cpu_restore = __restore_cpu_ppc970,
  288. .oprofile_cpu_type = "ppc64/970MP",
  289. .oprofile_type = PPC_OPROFILE_POWER4,
  290. .platform = "ppc970",
  291. },
  292. { /* PPC970MP */
  293. .pvr_mask = 0xffff0000,
  294. .pvr_value = 0x00440000,
  295. .cpu_name = "PPC970MP",
  296. .cpu_features = CPU_FTRS_PPC970,
  297. .cpu_user_features = COMMON_USER_POWER4 |
  298. PPC_FEATURE_HAS_ALTIVEC_COMP,
  299. .mmu_features = MMU_FTRS_PPC970,
  300. .icache_bsize = 128,
  301. .dcache_bsize = 128,
  302. .num_pmcs = 8,
  303. .pmc_type = PPC_PMC_IBM,
  304. .cpu_setup = __setup_cpu_ppc970MP,
  305. .cpu_restore = __restore_cpu_ppc970,
  306. .oprofile_cpu_type = "ppc64/970MP",
  307. .oprofile_type = PPC_OPROFILE_POWER4,
  308. .platform = "ppc970",
  309. },
  310. { /* PPC970GX */
  311. .pvr_mask = 0xffff0000,
  312. .pvr_value = 0x00450000,
  313. .cpu_name = "PPC970GX",
  314. .cpu_features = CPU_FTRS_PPC970,
  315. .cpu_user_features = COMMON_USER_POWER4 |
  316. PPC_FEATURE_HAS_ALTIVEC_COMP,
  317. .mmu_features = MMU_FTRS_PPC970,
  318. .icache_bsize = 128,
  319. .dcache_bsize = 128,
  320. .num_pmcs = 8,
  321. .pmc_type = PPC_PMC_IBM,
  322. .cpu_setup = __setup_cpu_ppc970,
  323. .oprofile_cpu_type = "ppc64/970",
  324. .oprofile_type = PPC_OPROFILE_POWER4,
  325. .platform = "ppc970",
  326. },
  327. { /* Power5 GR */
  328. .pvr_mask = 0xffff0000,
  329. .pvr_value = 0x003a0000,
  330. .cpu_name = "POWER5 (gr)",
  331. .cpu_features = CPU_FTRS_POWER5,
  332. .cpu_user_features = COMMON_USER_POWER5,
  333. .mmu_features = MMU_FTRS_POWER5,
  334. .icache_bsize = 128,
  335. .dcache_bsize = 128,
  336. .num_pmcs = 6,
  337. .pmc_type = PPC_PMC_IBM,
  338. .oprofile_cpu_type = "ppc64/power5",
  339. .oprofile_type = PPC_OPROFILE_POWER4,
  340. /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
  341. * and above but only works on POWER5 and above
  342. */
  343. .oprofile_mmcra_sihv = MMCRA_SIHV,
  344. .oprofile_mmcra_sipr = MMCRA_SIPR,
  345. .platform = "power5",
  346. },
  347. { /* Power5++ */
  348. .pvr_mask = 0xffffff00,
  349. .pvr_value = 0x003b0300,
  350. .cpu_name = "POWER5+ (gs)",
  351. .cpu_features = CPU_FTRS_POWER5,
  352. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  353. .mmu_features = MMU_FTRS_POWER5,
  354. .icache_bsize = 128,
  355. .dcache_bsize = 128,
  356. .num_pmcs = 6,
  357. .oprofile_cpu_type = "ppc64/power5++",
  358. .oprofile_type = PPC_OPROFILE_POWER4,
  359. .oprofile_mmcra_sihv = MMCRA_SIHV,
  360. .oprofile_mmcra_sipr = MMCRA_SIPR,
  361. .platform = "power5+",
  362. },
  363. { /* Power5 GS */
  364. .pvr_mask = 0xffff0000,
  365. .pvr_value = 0x003b0000,
  366. .cpu_name = "POWER5+ (gs)",
  367. .cpu_features = CPU_FTRS_POWER5,
  368. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  369. .mmu_features = MMU_FTRS_POWER5,
  370. .icache_bsize = 128,
  371. .dcache_bsize = 128,
  372. .num_pmcs = 6,
  373. .pmc_type = PPC_PMC_IBM,
  374. .oprofile_cpu_type = "ppc64/power5+",
  375. .oprofile_type = PPC_OPROFILE_POWER4,
  376. .oprofile_mmcra_sihv = MMCRA_SIHV,
  377. .oprofile_mmcra_sipr = MMCRA_SIPR,
  378. .platform = "power5+",
  379. },
  380. { /* POWER6 in P5+ mode; 2.04-compliant processor */
  381. .pvr_mask = 0xffffffff,
  382. .pvr_value = 0x0f000001,
  383. .cpu_name = "POWER5+",
  384. .cpu_features = CPU_FTRS_POWER5,
  385. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  386. .mmu_features = MMU_FTRS_POWER5,
  387. .icache_bsize = 128,
  388. .dcache_bsize = 128,
  389. .oprofile_cpu_type = "ppc64/ibm-compat-v1",
  390. .oprofile_type = PPC_OPROFILE_POWER4,
  391. .platform = "power5+",
  392. },
  393. { /* Power6 */
  394. .pvr_mask = 0xffff0000,
  395. .pvr_value = 0x003e0000,
  396. .cpu_name = "POWER6 (raw)",
  397. .cpu_features = CPU_FTRS_POWER6,
  398. .cpu_user_features = COMMON_USER_POWER6 |
  399. PPC_FEATURE_POWER6_EXT,
  400. .mmu_features = MMU_FTRS_POWER6,
  401. .icache_bsize = 128,
  402. .dcache_bsize = 128,
  403. .num_pmcs = 6,
  404. .pmc_type = PPC_PMC_IBM,
  405. .oprofile_cpu_type = "ppc64/power6",
  406. .oprofile_type = PPC_OPROFILE_POWER4,
  407. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  408. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  409. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  410. POWER6_MMCRA_OTHER,
  411. .platform = "power6x",
  412. },
  413. { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
  414. .pvr_mask = 0xffffffff,
  415. .pvr_value = 0x0f000002,
  416. .cpu_name = "POWER6 (architected)",
  417. .cpu_features = CPU_FTRS_POWER6,
  418. .cpu_user_features = COMMON_USER_POWER6,
  419. .mmu_features = MMU_FTRS_POWER6,
  420. .icache_bsize = 128,
  421. .dcache_bsize = 128,
  422. .oprofile_cpu_type = "ppc64/ibm-compat-v1",
  423. .oprofile_type = PPC_OPROFILE_POWER4,
  424. .platform = "power6",
  425. },
  426. { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
  427. .pvr_mask = 0xffffffff,
  428. .pvr_value = 0x0f000003,
  429. .cpu_name = "POWER7 (architected)",
  430. .cpu_features = CPU_FTRS_POWER7,
  431. .cpu_user_features = COMMON_USER_POWER7,
  432. .cpu_user_features2 = COMMON_USER2_POWER7,
  433. .mmu_features = MMU_FTRS_POWER7,
  434. .icache_bsize = 128,
  435. .dcache_bsize = 128,
  436. .oprofile_type = PPC_OPROFILE_POWER4,
  437. .oprofile_cpu_type = "ppc64/ibm-compat-v1",
  438. .cpu_setup = __setup_cpu_power7,
  439. .cpu_restore = __restore_cpu_power7,
  440. .flush_tlb = __flush_tlb_power7,
  441. .machine_check_early = __machine_check_early_realmode_p7,
  442. .platform = "power7",
  443. },
  444. { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
  445. .pvr_mask = 0xffffffff,
  446. .pvr_value = 0x0f000004,
  447. .cpu_name = "POWER8 (architected)",
  448. .cpu_features = CPU_FTRS_POWER8,
  449. .cpu_user_features = COMMON_USER_POWER8,
  450. .cpu_user_features2 = COMMON_USER2_POWER8,
  451. .mmu_features = MMU_FTRS_POWER8,
  452. .icache_bsize = 128,
  453. .dcache_bsize = 128,
  454. .oprofile_type = PPC_OPROFILE_INVALID,
  455. .oprofile_cpu_type = "ppc64/ibm-compat-v1",
  456. .cpu_setup = __setup_cpu_power8,
  457. .cpu_restore = __restore_cpu_power8,
  458. .flush_tlb = __flush_tlb_power8,
  459. .machine_check_early = __machine_check_early_realmode_p8,
  460. .platform = "power8",
  461. },
  462. { /* Power7 */
  463. .pvr_mask = 0xffff0000,
  464. .pvr_value = 0x003f0000,
  465. .cpu_name = "POWER7 (raw)",
  466. .cpu_features = CPU_FTRS_POWER7,
  467. .cpu_user_features = COMMON_USER_POWER7,
  468. .cpu_user_features2 = COMMON_USER2_POWER7,
  469. .mmu_features = MMU_FTRS_POWER7,
  470. .icache_bsize = 128,
  471. .dcache_bsize = 128,
  472. .num_pmcs = 6,
  473. .pmc_type = PPC_PMC_IBM,
  474. .oprofile_cpu_type = "ppc64/power7",
  475. .oprofile_type = PPC_OPROFILE_POWER4,
  476. .cpu_setup = __setup_cpu_power7,
  477. .cpu_restore = __restore_cpu_power7,
  478. .flush_tlb = __flush_tlb_power7,
  479. .machine_check_early = __machine_check_early_realmode_p7,
  480. .platform = "power7",
  481. },
  482. { /* Power7+ */
  483. .pvr_mask = 0xffff0000,
  484. .pvr_value = 0x004A0000,
  485. .cpu_name = "POWER7+ (raw)",
  486. .cpu_features = CPU_FTRS_POWER7,
  487. .cpu_user_features = COMMON_USER_POWER7,
  488. .cpu_user_features2 = COMMON_USER2_POWER7,
  489. .mmu_features = MMU_FTRS_POWER7,
  490. .icache_bsize = 128,
  491. .dcache_bsize = 128,
  492. .num_pmcs = 6,
  493. .pmc_type = PPC_PMC_IBM,
  494. .oprofile_cpu_type = "ppc64/power7",
  495. .oprofile_type = PPC_OPROFILE_POWER4,
  496. .cpu_setup = __setup_cpu_power7,
  497. .cpu_restore = __restore_cpu_power7,
  498. .flush_tlb = __flush_tlb_power7,
  499. .machine_check_early = __machine_check_early_realmode_p7,
  500. .platform = "power7+",
  501. },
  502. { /* Power8E */
  503. .pvr_mask = 0xffff0000,
  504. .pvr_value = 0x004b0000,
  505. .cpu_name = "POWER8E (raw)",
  506. .cpu_features = CPU_FTRS_POWER8E,
  507. .cpu_user_features = COMMON_USER_POWER8,
  508. .cpu_user_features2 = COMMON_USER2_POWER8,
  509. .mmu_features = MMU_FTRS_POWER8,
  510. .icache_bsize = 128,
  511. .dcache_bsize = 128,
  512. .num_pmcs = 6,
  513. .pmc_type = PPC_PMC_IBM,
  514. .oprofile_cpu_type = "ppc64/power8",
  515. .oprofile_type = PPC_OPROFILE_INVALID,
  516. .cpu_setup = __setup_cpu_power8,
  517. .cpu_restore = __restore_cpu_power8,
  518. .flush_tlb = __flush_tlb_power8,
  519. .machine_check_early = __machine_check_early_realmode_p8,
  520. .platform = "power8",
  521. },
  522. { /* Power8 */
  523. .pvr_mask = 0xffff0000,
  524. .pvr_value = 0x004d0000,
  525. .cpu_name = "POWER8 (raw)",
  526. .cpu_features = CPU_FTRS_POWER8,
  527. .cpu_user_features = COMMON_USER_POWER8,
  528. .cpu_user_features2 = COMMON_USER2_POWER8,
  529. .mmu_features = MMU_FTRS_POWER8,
  530. .icache_bsize = 128,
  531. .dcache_bsize = 128,
  532. .num_pmcs = 6,
  533. .pmc_type = PPC_PMC_IBM,
  534. .oprofile_cpu_type = "ppc64/power8",
  535. .oprofile_type = PPC_OPROFILE_INVALID,
  536. .cpu_setup = __setup_cpu_power8,
  537. .cpu_restore = __restore_cpu_power8,
  538. .flush_tlb = __flush_tlb_power8,
  539. .machine_check_early = __machine_check_early_realmode_p8,
  540. .platform = "power8",
  541. },
  542. { /* Cell Broadband Engine */
  543. .pvr_mask = 0xffff0000,
  544. .pvr_value = 0x00700000,
  545. .cpu_name = "Cell Broadband Engine",
  546. .cpu_features = CPU_FTRS_CELL,
  547. .cpu_user_features = COMMON_USER_PPC64 |
  548. PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
  549. PPC_FEATURE_SMT,
  550. .mmu_features = MMU_FTRS_CELL,
  551. .icache_bsize = 128,
  552. .dcache_bsize = 128,
  553. .num_pmcs = 4,
  554. .pmc_type = PPC_PMC_IBM,
  555. .oprofile_cpu_type = "ppc64/cell-be",
  556. .oprofile_type = PPC_OPROFILE_CELL,
  557. .platform = "ppc-cell-be",
  558. },
  559. { /* PA Semi PA6T */
  560. .pvr_mask = 0x7fff0000,
  561. .pvr_value = 0x00900000,
  562. .cpu_name = "PA6T",
  563. .cpu_features = CPU_FTRS_PA6T,
  564. .cpu_user_features = COMMON_USER_PA6T,
  565. .mmu_features = MMU_FTRS_PA6T,
  566. .icache_bsize = 64,
  567. .dcache_bsize = 64,
  568. .num_pmcs = 6,
  569. .pmc_type = PPC_PMC_PA6T,
  570. .cpu_setup = __setup_cpu_pa6t,
  571. .cpu_restore = __restore_cpu_pa6t,
  572. .oprofile_cpu_type = "ppc64/pa6t",
  573. .oprofile_type = PPC_OPROFILE_PA6T,
  574. .platform = "pa6t",
  575. },
  576. { /* default match */
  577. .pvr_mask = 0x00000000,
  578. .pvr_value = 0x00000000,
  579. .cpu_name = "POWER4 (compatible)",
  580. .cpu_features = CPU_FTRS_COMPATIBLE,
  581. .cpu_user_features = COMMON_USER_PPC64,
  582. .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
  583. .icache_bsize = 128,
  584. .dcache_bsize = 128,
  585. .num_pmcs = 6,
  586. .pmc_type = PPC_PMC_IBM,
  587. .platform = "power4",
  588. }
  589. #endif /* CONFIG_PPC_BOOK3S_64 */
  590. #ifdef CONFIG_PPC32
  591. #if CLASSIC_PPC
  592. { /* 601 */
  593. .pvr_mask = 0xffff0000,
  594. .pvr_value = 0x00010000,
  595. .cpu_name = "601",
  596. .cpu_features = CPU_FTRS_PPC601,
  597. .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
  598. PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
  599. .mmu_features = MMU_FTR_HPTE_TABLE,
  600. .icache_bsize = 32,
  601. .dcache_bsize = 32,
  602. .machine_check = machine_check_generic,
  603. .platform = "ppc601",
  604. },
  605. { /* 603 */
  606. .pvr_mask = 0xffff0000,
  607. .pvr_value = 0x00030000,
  608. .cpu_name = "603",
  609. .cpu_features = CPU_FTRS_603,
  610. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  611. .mmu_features = 0,
  612. .icache_bsize = 32,
  613. .dcache_bsize = 32,
  614. .cpu_setup = __setup_cpu_603,
  615. .machine_check = machine_check_generic,
  616. .platform = "ppc603",
  617. },
  618. { /* 603e */
  619. .pvr_mask = 0xffff0000,
  620. .pvr_value = 0x00060000,
  621. .cpu_name = "603e",
  622. .cpu_features = CPU_FTRS_603,
  623. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  624. .mmu_features = 0,
  625. .icache_bsize = 32,
  626. .dcache_bsize = 32,
  627. .cpu_setup = __setup_cpu_603,
  628. .machine_check = machine_check_generic,
  629. .platform = "ppc603",
  630. },
  631. { /* 603ev */
  632. .pvr_mask = 0xffff0000,
  633. .pvr_value = 0x00070000,
  634. .cpu_name = "603ev",
  635. .cpu_features = CPU_FTRS_603,
  636. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  637. .mmu_features = 0,
  638. .icache_bsize = 32,
  639. .dcache_bsize = 32,
  640. .cpu_setup = __setup_cpu_603,
  641. .machine_check = machine_check_generic,
  642. .platform = "ppc603",
  643. },
  644. { /* 604 */
  645. .pvr_mask = 0xffff0000,
  646. .pvr_value = 0x00040000,
  647. .cpu_name = "604",
  648. .cpu_features = CPU_FTRS_604,
  649. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  650. .mmu_features = MMU_FTR_HPTE_TABLE,
  651. .icache_bsize = 32,
  652. .dcache_bsize = 32,
  653. .num_pmcs = 2,
  654. .cpu_setup = __setup_cpu_604,
  655. .machine_check = machine_check_generic,
  656. .platform = "ppc604",
  657. },
  658. { /* 604e */
  659. .pvr_mask = 0xfffff000,
  660. .pvr_value = 0x00090000,
  661. .cpu_name = "604e",
  662. .cpu_features = CPU_FTRS_604,
  663. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  664. .mmu_features = MMU_FTR_HPTE_TABLE,
  665. .icache_bsize = 32,
  666. .dcache_bsize = 32,
  667. .num_pmcs = 4,
  668. .cpu_setup = __setup_cpu_604,
  669. .machine_check = machine_check_generic,
  670. .platform = "ppc604",
  671. },
  672. { /* 604r */
  673. .pvr_mask = 0xffff0000,
  674. .pvr_value = 0x00090000,
  675. .cpu_name = "604r",
  676. .cpu_features = CPU_FTRS_604,
  677. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  678. .mmu_features = MMU_FTR_HPTE_TABLE,
  679. .icache_bsize = 32,
  680. .dcache_bsize = 32,
  681. .num_pmcs = 4,
  682. .cpu_setup = __setup_cpu_604,
  683. .machine_check = machine_check_generic,
  684. .platform = "ppc604",
  685. },
  686. { /* 604ev */
  687. .pvr_mask = 0xffff0000,
  688. .pvr_value = 0x000a0000,
  689. .cpu_name = "604ev",
  690. .cpu_features = CPU_FTRS_604,
  691. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  692. .mmu_features = MMU_FTR_HPTE_TABLE,
  693. .icache_bsize = 32,
  694. .dcache_bsize = 32,
  695. .num_pmcs = 4,
  696. .cpu_setup = __setup_cpu_604,
  697. .machine_check = machine_check_generic,
  698. .platform = "ppc604",
  699. },
  700. { /* 740/750 (0x4202, don't support TAU ?) */
  701. .pvr_mask = 0xffffffff,
  702. .pvr_value = 0x00084202,
  703. .cpu_name = "740/750",
  704. .cpu_features = CPU_FTRS_740_NOTAU,
  705. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  706. .mmu_features = MMU_FTR_HPTE_TABLE,
  707. .icache_bsize = 32,
  708. .dcache_bsize = 32,
  709. .num_pmcs = 4,
  710. .cpu_setup = __setup_cpu_750,
  711. .machine_check = machine_check_generic,
  712. .platform = "ppc750",
  713. },
  714. { /* 750CX (80100 and 8010x?) */
  715. .pvr_mask = 0xfffffff0,
  716. .pvr_value = 0x00080100,
  717. .cpu_name = "750CX",
  718. .cpu_features = CPU_FTRS_750,
  719. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  720. .mmu_features = MMU_FTR_HPTE_TABLE,
  721. .icache_bsize = 32,
  722. .dcache_bsize = 32,
  723. .num_pmcs = 4,
  724. .cpu_setup = __setup_cpu_750cx,
  725. .machine_check = machine_check_generic,
  726. .platform = "ppc750",
  727. },
  728. { /* 750CX (82201 and 82202) */
  729. .pvr_mask = 0xfffffff0,
  730. .pvr_value = 0x00082200,
  731. .cpu_name = "750CX",
  732. .cpu_features = CPU_FTRS_750,
  733. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  734. .mmu_features = MMU_FTR_HPTE_TABLE,
  735. .icache_bsize = 32,
  736. .dcache_bsize = 32,
  737. .num_pmcs = 4,
  738. .pmc_type = PPC_PMC_IBM,
  739. .cpu_setup = __setup_cpu_750cx,
  740. .machine_check = machine_check_generic,
  741. .platform = "ppc750",
  742. },
  743. { /* 750CXe (82214) */
  744. .pvr_mask = 0xfffffff0,
  745. .pvr_value = 0x00082210,
  746. .cpu_name = "750CXe",
  747. .cpu_features = CPU_FTRS_750,
  748. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  749. .mmu_features = MMU_FTR_HPTE_TABLE,
  750. .icache_bsize = 32,
  751. .dcache_bsize = 32,
  752. .num_pmcs = 4,
  753. .pmc_type = PPC_PMC_IBM,
  754. .cpu_setup = __setup_cpu_750cx,
  755. .machine_check = machine_check_generic,
  756. .platform = "ppc750",
  757. },
  758. { /* 750CXe "Gekko" (83214) */
  759. .pvr_mask = 0xffffffff,
  760. .pvr_value = 0x00083214,
  761. .cpu_name = "750CXe",
  762. .cpu_features = CPU_FTRS_750,
  763. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  764. .mmu_features = MMU_FTR_HPTE_TABLE,
  765. .icache_bsize = 32,
  766. .dcache_bsize = 32,
  767. .num_pmcs = 4,
  768. .pmc_type = PPC_PMC_IBM,
  769. .cpu_setup = __setup_cpu_750cx,
  770. .machine_check = machine_check_generic,
  771. .platform = "ppc750",
  772. },
  773. { /* 750CL (and "Broadway") */
  774. .pvr_mask = 0xfffff0e0,
  775. .pvr_value = 0x00087000,
  776. .cpu_name = "750CL",
  777. .cpu_features = CPU_FTRS_750CL,
  778. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  779. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  780. .icache_bsize = 32,
  781. .dcache_bsize = 32,
  782. .num_pmcs = 4,
  783. .pmc_type = PPC_PMC_IBM,
  784. .cpu_setup = __setup_cpu_750,
  785. .machine_check = machine_check_generic,
  786. .platform = "ppc750",
  787. .oprofile_cpu_type = "ppc/750",
  788. .oprofile_type = PPC_OPROFILE_G4,
  789. },
  790. { /* 745/755 */
  791. .pvr_mask = 0xfffff000,
  792. .pvr_value = 0x00083000,
  793. .cpu_name = "745/755",
  794. .cpu_features = CPU_FTRS_750,
  795. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  796. .mmu_features = MMU_FTR_HPTE_TABLE,
  797. .icache_bsize = 32,
  798. .dcache_bsize = 32,
  799. .num_pmcs = 4,
  800. .pmc_type = PPC_PMC_IBM,
  801. .cpu_setup = __setup_cpu_750,
  802. .machine_check = machine_check_generic,
  803. .platform = "ppc750",
  804. },
  805. { /* 750FX rev 1.x */
  806. .pvr_mask = 0xffffff00,
  807. .pvr_value = 0x70000100,
  808. .cpu_name = "750FX",
  809. .cpu_features = CPU_FTRS_750FX1,
  810. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  811. .mmu_features = MMU_FTR_HPTE_TABLE,
  812. .icache_bsize = 32,
  813. .dcache_bsize = 32,
  814. .num_pmcs = 4,
  815. .pmc_type = PPC_PMC_IBM,
  816. .cpu_setup = __setup_cpu_750,
  817. .machine_check = machine_check_generic,
  818. .platform = "ppc750",
  819. .oprofile_cpu_type = "ppc/750",
  820. .oprofile_type = PPC_OPROFILE_G4,
  821. },
  822. { /* 750FX rev 2.0 must disable HID0[DPM] */
  823. .pvr_mask = 0xffffffff,
  824. .pvr_value = 0x70000200,
  825. .cpu_name = "750FX",
  826. .cpu_features = CPU_FTRS_750FX2,
  827. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  828. .mmu_features = MMU_FTR_HPTE_TABLE,
  829. .icache_bsize = 32,
  830. .dcache_bsize = 32,
  831. .num_pmcs = 4,
  832. .pmc_type = PPC_PMC_IBM,
  833. .cpu_setup = __setup_cpu_750,
  834. .machine_check = machine_check_generic,
  835. .platform = "ppc750",
  836. .oprofile_cpu_type = "ppc/750",
  837. .oprofile_type = PPC_OPROFILE_G4,
  838. },
  839. { /* 750FX (All revs except 2.0) */
  840. .pvr_mask = 0xffff0000,
  841. .pvr_value = 0x70000000,
  842. .cpu_name = "750FX",
  843. .cpu_features = CPU_FTRS_750FX,
  844. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  845. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  846. .icache_bsize = 32,
  847. .dcache_bsize = 32,
  848. .num_pmcs = 4,
  849. .pmc_type = PPC_PMC_IBM,
  850. .cpu_setup = __setup_cpu_750fx,
  851. .machine_check = machine_check_generic,
  852. .platform = "ppc750",
  853. .oprofile_cpu_type = "ppc/750",
  854. .oprofile_type = PPC_OPROFILE_G4,
  855. },
  856. { /* 750GX */
  857. .pvr_mask = 0xffff0000,
  858. .pvr_value = 0x70020000,
  859. .cpu_name = "750GX",
  860. .cpu_features = CPU_FTRS_750GX,
  861. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  862. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  863. .icache_bsize = 32,
  864. .dcache_bsize = 32,
  865. .num_pmcs = 4,
  866. .pmc_type = PPC_PMC_IBM,
  867. .cpu_setup = __setup_cpu_750fx,
  868. .machine_check = machine_check_generic,
  869. .platform = "ppc750",
  870. .oprofile_cpu_type = "ppc/750",
  871. .oprofile_type = PPC_OPROFILE_G4,
  872. },
  873. { /* 740/750 (L2CR bit need fixup for 740) */
  874. .pvr_mask = 0xffff0000,
  875. .pvr_value = 0x00080000,
  876. .cpu_name = "740/750",
  877. .cpu_features = CPU_FTRS_740,
  878. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  879. .mmu_features = MMU_FTR_HPTE_TABLE,
  880. .icache_bsize = 32,
  881. .dcache_bsize = 32,
  882. .num_pmcs = 4,
  883. .pmc_type = PPC_PMC_IBM,
  884. .cpu_setup = __setup_cpu_750,
  885. .machine_check = machine_check_generic,
  886. .platform = "ppc750",
  887. },
  888. { /* 7400 rev 1.1 ? (no TAU) */
  889. .pvr_mask = 0xffffffff,
  890. .pvr_value = 0x000c1101,
  891. .cpu_name = "7400 (1.1)",
  892. .cpu_features = CPU_FTRS_7400_NOTAU,
  893. .cpu_user_features = COMMON_USER |
  894. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  895. .mmu_features = MMU_FTR_HPTE_TABLE,
  896. .icache_bsize = 32,
  897. .dcache_bsize = 32,
  898. .num_pmcs = 4,
  899. .pmc_type = PPC_PMC_G4,
  900. .cpu_setup = __setup_cpu_7400,
  901. .machine_check = machine_check_generic,
  902. .platform = "ppc7400",
  903. },
  904. { /* 7400 */
  905. .pvr_mask = 0xffff0000,
  906. .pvr_value = 0x000c0000,
  907. .cpu_name = "7400",
  908. .cpu_features = CPU_FTRS_7400,
  909. .cpu_user_features = COMMON_USER |
  910. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  911. .mmu_features = MMU_FTR_HPTE_TABLE,
  912. .icache_bsize = 32,
  913. .dcache_bsize = 32,
  914. .num_pmcs = 4,
  915. .pmc_type = PPC_PMC_G4,
  916. .cpu_setup = __setup_cpu_7400,
  917. .machine_check = machine_check_generic,
  918. .platform = "ppc7400",
  919. },
  920. { /* 7410 */
  921. .pvr_mask = 0xffff0000,
  922. .pvr_value = 0x800c0000,
  923. .cpu_name = "7410",
  924. .cpu_features = CPU_FTRS_7400,
  925. .cpu_user_features = COMMON_USER |
  926. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  927. .mmu_features = MMU_FTR_HPTE_TABLE,
  928. .icache_bsize = 32,
  929. .dcache_bsize = 32,
  930. .num_pmcs = 4,
  931. .pmc_type = PPC_PMC_G4,
  932. .cpu_setup = __setup_cpu_7410,
  933. .machine_check = machine_check_generic,
  934. .platform = "ppc7400",
  935. },
  936. { /* 7450 2.0 - no doze/nap */
  937. .pvr_mask = 0xffffffff,
  938. .pvr_value = 0x80000200,
  939. .cpu_name = "7450",
  940. .cpu_features = CPU_FTRS_7450_20,
  941. .cpu_user_features = COMMON_USER |
  942. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  943. .mmu_features = MMU_FTR_HPTE_TABLE,
  944. .icache_bsize = 32,
  945. .dcache_bsize = 32,
  946. .num_pmcs = 6,
  947. .pmc_type = PPC_PMC_G4,
  948. .cpu_setup = __setup_cpu_745x,
  949. .oprofile_cpu_type = "ppc/7450",
  950. .oprofile_type = PPC_OPROFILE_G4,
  951. .machine_check = machine_check_generic,
  952. .platform = "ppc7450",
  953. },
  954. { /* 7450 2.1 */
  955. .pvr_mask = 0xffffffff,
  956. .pvr_value = 0x80000201,
  957. .cpu_name = "7450",
  958. .cpu_features = CPU_FTRS_7450_21,
  959. .cpu_user_features = COMMON_USER |
  960. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  961. .mmu_features = MMU_FTR_HPTE_TABLE,
  962. .icache_bsize = 32,
  963. .dcache_bsize = 32,
  964. .num_pmcs = 6,
  965. .pmc_type = PPC_PMC_G4,
  966. .cpu_setup = __setup_cpu_745x,
  967. .oprofile_cpu_type = "ppc/7450",
  968. .oprofile_type = PPC_OPROFILE_G4,
  969. .machine_check = machine_check_generic,
  970. .platform = "ppc7450",
  971. },
  972. { /* 7450 2.3 and newer */
  973. .pvr_mask = 0xffff0000,
  974. .pvr_value = 0x80000000,
  975. .cpu_name = "7450",
  976. .cpu_features = CPU_FTRS_7450_23,
  977. .cpu_user_features = COMMON_USER |
  978. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  979. .mmu_features = MMU_FTR_HPTE_TABLE,
  980. .icache_bsize = 32,
  981. .dcache_bsize = 32,
  982. .num_pmcs = 6,
  983. .pmc_type = PPC_PMC_G4,
  984. .cpu_setup = __setup_cpu_745x,
  985. .oprofile_cpu_type = "ppc/7450",
  986. .oprofile_type = PPC_OPROFILE_G4,
  987. .machine_check = machine_check_generic,
  988. .platform = "ppc7450",
  989. },
  990. { /* 7455 rev 1.x */
  991. .pvr_mask = 0xffffff00,
  992. .pvr_value = 0x80010100,
  993. .cpu_name = "7455",
  994. .cpu_features = CPU_FTRS_7455_1,
  995. .cpu_user_features = COMMON_USER |
  996. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  997. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  998. .icache_bsize = 32,
  999. .dcache_bsize = 32,
  1000. .num_pmcs = 6,
  1001. .pmc_type = PPC_PMC_G4,
  1002. .cpu_setup = __setup_cpu_745x,
  1003. .oprofile_cpu_type = "ppc/7450",
  1004. .oprofile_type = PPC_OPROFILE_G4,
  1005. .machine_check = machine_check_generic,
  1006. .platform = "ppc7450",
  1007. },
  1008. { /* 7455 rev 2.0 */
  1009. .pvr_mask = 0xffffffff,
  1010. .pvr_value = 0x80010200,
  1011. .cpu_name = "7455",
  1012. .cpu_features = CPU_FTRS_7455_20,
  1013. .cpu_user_features = COMMON_USER |
  1014. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1015. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1016. .icache_bsize = 32,
  1017. .dcache_bsize = 32,
  1018. .num_pmcs = 6,
  1019. .pmc_type = PPC_PMC_G4,
  1020. .cpu_setup = __setup_cpu_745x,
  1021. .oprofile_cpu_type = "ppc/7450",
  1022. .oprofile_type = PPC_OPROFILE_G4,
  1023. .machine_check = machine_check_generic,
  1024. .platform = "ppc7450",
  1025. },
  1026. { /* 7455 others */
  1027. .pvr_mask = 0xffff0000,
  1028. .pvr_value = 0x80010000,
  1029. .cpu_name = "7455",
  1030. .cpu_features = CPU_FTRS_7455,
  1031. .cpu_user_features = COMMON_USER |
  1032. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1033. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1034. .icache_bsize = 32,
  1035. .dcache_bsize = 32,
  1036. .num_pmcs = 6,
  1037. .pmc_type = PPC_PMC_G4,
  1038. .cpu_setup = __setup_cpu_745x,
  1039. .oprofile_cpu_type = "ppc/7450",
  1040. .oprofile_type = PPC_OPROFILE_G4,
  1041. .machine_check = machine_check_generic,
  1042. .platform = "ppc7450",
  1043. },
  1044. { /* 7447/7457 Rev 1.0 */
  1045. .pvr_mask = 0xffffffff,
  1046. .pvr_value = 0x80020100,
  1047. .cpu_name = "7447/7457",
  1048. .cpu_features = CPU_FTRS_7447_10,
  1049. .cpu_user_features = COMMON_USER |
  1050. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1051. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1052. .icache_bsize = 32,
  1053. .dcache_bsize = 32,
  1054. .num_pmcs = 6,
  1055. .pmc_type = PPC_PMC_G4,
  1056. .cpu_setup = __setup_cpu_745x,
  1057. .oprofile_cpu_type = "ppc/7450",
  1058. .oprofile_type = PPC_OPROFILE_G4,
  1059. .machine_check = machine_check_generic,
  1060. .platform = "ppc7450",
  1061. },
  1062. { /* 7447/7457 Rev 1.1 */
  1063. .pvr_mask = 0xffffffff,
  1064. .pvr_value = 0x80020101,
  1065. .cpu_name = "7447/7457",
  1066. .cpu_features = CPU_FTRS_7447_10,
  1067. .cpu_user_features = COMMON_USER |
  1068. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1069. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1070. .icache_bsize = 32,
  1071. .dcache_bsize = 32,
  1072. .num_pmcs = 6,
  1073. .pmc_type = PPC_PMC_G4,
  1074. .cpu_setup = __setup_cpu_745x,
  1075. .oprofile_cpu_type = "ppc/7450",
  1076. .oprofile_type = PPC_OPROFILE_G4,
  1077. .machine_check = machine_check_generic,
  1078. .platform = "ppc7450",
  1079. },
  1080. { /* 7447/7457 Rev 1.2 and later */
  1081. .pvr_mask = 0xffff0000,
  1082. .pvr_value = 0x80020000,
  1083. .cpu_name = "7447/7457",
  1084. .cpu_features = CPU_FTRS_7447,
  1085. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1086. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1087. .icache_bsize = 32,
  1088. .dcache_bsize = 32,
  1089. .num_pmcs = 6,
  1090. .pmc_type = PPC_PMC_G4,
  1091. .cpu_setup = __setup_cpu_745x,
  1092. .oprofile_cpu_type = "ppc/7450",
  1093. .oprofile_type = PPC_OPROFILE_G4,
  1094. .machine_check = machine_check_generic,
  1095. .platform = "ppc7450",
  1096. },
  1097. { /* 7447A */
  1098. .pvr_mask = 0xffff0000,
  1099. .pvr_value = 0x80030000,
  1100. .cpu_name = "7447A",
  1101. .cpu_features = CPU_FTRS_7447A,
  1102. .cpu_user_features = COMMON_USER |
  1103. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1104. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1105. .icache_bsize = 32,
  1106. .dcache_bsize = 32,
  1107. .num_pmcs = 6,
  1108. .pmc_type = PPC_PMC_G4,
  1109. .cpu_setup = __setup_cpu_745x,
  1110. .oprofile_cpu_type = "ppc/7450",
  1111. .oprofile_type = PPC_OPROFILE_G4,
  1112. .machine_check = machine_check_generic,
  1113. .platform = "ppc7450",
  1114. },
  1115. { /* 7448 */
  1116. .pvr_mask = 0xffff0000,
  1117. .pvr_value = 0x80040000,
  1118. .cpu_name = "7448",
  1119. .cpu_features = CPU_FTRS_7448,
  1120. .cpu_user_features = COMMON_USER |
  1121. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1122. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1123. .icache_bsize = 32,
  1124. .dcache_bsize = 32,
  1125. .num_pmcs = 6,
  1126. .pmc_type = PPC_PMC_G4,
  1127. .cpu_setup = __setup_cpu_745x,
  1128. .oprofile_cpu_type = "ppc/7450",
  1129. .oprofile_type = PPC_OPROFILE_G4,
  1130. .machine_check = machine_check_generic,
  1131. .platform = "ppc7450",
  1132. },
  1133. { /* 82xx (8240, 8245, 8260 are all 603e cores) */
  1134. .pvr_mask = 0x7fff0000,
  1135. .pvr_value = 0x00810000,
  1136. .cpu_name = "82xx",
  1137. .cpu_features = CPU_FTRS_82XX,
  1138. .cpu_user_features = COMMON_USER,
  1139. .mmu_features = 0,
  1140. .icache_bsize = 32,
  1141. .dcache_bsize = 32,
  1142. .cpu_setup = __setup_cpu_603,
  1143. .machine_check = machine_check_generic,
  1144. .platform = "ppc603",
  1145. },
  1146. { /* All G2_LE (603e core, plus some) have the same pvr */
  1147. .pvr_mask = 0x7fff0000,
  1148. .pvr_value = 0x00820000,
  1149. .cpu_name = "G2_LE",
  1150. .cpu_features = CPU_FTRS_G2_LE,
  1151. .cpu_user_features = COMMON_USER,
  1152. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1153. .icache_bsize = 32,
  1154. .dcache_bsize = 32,
  1155. .cpu_setup = __setup_cpu_603,
  1156. .machine_check = machine_check_generic,
  1157. .platform = "ppc603",
  1158. },
  1159. { /* e300c1 (a 603e core, plus some) on 83xx */
  1160. .pvr_mask = 0x7fff0000,
  1161. .pvr_value = 0x00830000,
  1162. .cpu_name = "e300c1",
  1163. .cpu_features = CPU_FTRS_E300,
  1164. .cpu_user_features = COMMON_USER,
  1165. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1166. .icache_bsize = 32,
  1167. .dcache_bsize = 32,
  1168. .cpu_setup = __setup_cpu_603,
  1169. .machine_check = machine_check_generic,
  1170. .platform = "ppc603",
  1171. },
  1172. { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
  1173. .pvr_mask = 0x7fff0000,
  1174. .pvr_value = 0x00840000,
  1175. .cpu_name = "e300c2",
  1176. .cpu_features = CPU_FTRS_E300C2,
  1177. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1178. .mmu_features = MMU_FTR_USE_HIGH_BATS |
  1179. MMU_FTR_NEED_DTLB_SW_LRU,
  1180. .icache_bsize = 32,
  1181. .dcache_bsize = 32,
  1182. .cpu_setup = __setup_cpu_603,
  1183. .machine_check = machine_check_generic,
  1184. .platform = "ppc603",
  1185. },
  1186. { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
  1187. .pvr_mask = 0x7fff0000,
  1188. .pvr_value = 0x00850000,
  1189. .cpu_name = "e300c3",
  1190. .cpu_features = CPU_FTRS_E300,
  1191. .cpu_user_features = COMMON_USER,
  1192. .mmu_features = MMU_FTR_USE_HIGH_BATS |
  1193. MMU_FTR_NEED_DTLB_SW_LRU,
  1194. .icache_bsize = 32,
  1195. .dcache_bsize = 32,
  1196. .cpu_setup = __setup_cpu_603,
  1197. .num_pmcs = 4,
  1198. .oprofile_cpu_type = "ppc/e300",
  1199. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1200. .platform = "ppc603",
  1201. },
  1202. { /* e300c4 (e300c1, plus one IU) */
  1203. .pvr_mask = 0x7fff0000,
  1204. .pvr_value = 0x00860000,
  1205. .cpu_name = "e300c4",
  1206. .cpu_features = CPU_FTRS_E300,
  1207. .cpu_user_features = COMMON_USER,
  1208. .mmu_features = MMU_FTR_USE_HIGH_BATS |
  1209. MMU_FTR_NEED_DTLB_SW_LRU,
  1210. .icache_bsize = 32,
  1211. .dcache_bsize = 32,
  1212. .cpu_setup = __setup_cpu_603,
  1213. .machine_check = machine_check_generic,
  1214. .num_pmcs = 4,
  1215. .oprofile_cpu_type = "ppc/e300",
  1216. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1217. .platform = "ppc603",
  1218. },
  1219. { /* default match, we assume split I/D cache & TB (non-601)... */
  1220. .pvr_mask = 0x00000000,
  1221. .pvr_value = 0x00000000,
  1222. .cpu_name = "(generic PPC)",
  1223. .cpu_features = CPU_FTRS_CLASSIC32,
  1224. .cpu_user_features = COMMON_USER,
  1225. .mmu_features = MMU_FTR_HPTE_TABLE,
  1226. .icache_bsize = 32,
  1227. .dcache_bsize = 32,
  1228. .machine_check = machine_check_generic,
  1229. .platform = "ppc603",
  1230. },
  1231. #endif /* CLASSIC_PPC */
  1232. #ifdef CONFIG_8xx
  1233. { /* 8xx */
  1234. .pvr_mask = 0xffff0000,
  1235. .pvr_value = 0x00500000,
  1236. .cpu_name = "8xx",
  1237. /* CPU_FTR_MAYBE_CAN_DOZE is possible,
  1238. * if the 8xx code is there.... */
  1239. .cpu_features = CPU_FTRS_8XX,
  1240. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1241. .mmu_features = MMU_FTR_TYPE_8xx,
  1242. .icache_bsize = 16,
  1243. .dcache_bsize = 16,
  1244. .platform = "ppc823",
  1245. },
  1246. #endif /* CONFIG_8xx */
  1247. #ifdef CONFIG_40x
  1248. { /* 403GC */
  1249. .pvr_mask = 0xffffff00,
  1250. .pvr_value = 0x00200200,
  1251. .cpu_name = "403GC",
  1252. .cpu_features = CPU_FTRS_40X,
  1253. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1254. .mmu_features = MMU_FTR_TYPE_40x,
  1255. .icache_bsize = 16,
  1256. .dcache_bsize = 16,
  1257. .machine_check = machine_check_4xx,
  1258. .platform = "ppc403",
  1259. },
  1260. { /* 403GCX */
  1261. .pvr_mask = 0xffffff00,
  1262. .pvr_value = 0x00201400,
  1263. .cpu_name = "403GCX",
  1264. .cpu_features = CPU_FTRS_40X,
  1265. .cpu_user_features = PPC_FEATURE_32 |
  1266. PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
  1267. .mmu_features = MMU_FTR_TYPE_40x,
  1268. .icache_bsize = 16,
  1269. .dcache_bsize = 16,
  1270. .machine_check = machine_check_4xx,
  1271. .platform = "ppc403",
  1272. },
  1273. { /* 403G ?? */
  1274. .pvr_mask = 0xffff0000,
  1275. .pvr_value = 0x00200000,
  1276. .cpu_name = "403G ??",
  1277. .cpu_features = CPU_FTRS_40X,
  1278. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1279. .mmu_features = MMU_FTR_TYPE_40x,
  1280. .icache_bsize = 16,
  1281. .dcache_bsize = 16,
  1282. .machine_check = machine_check_4xx,
  1283. .platform = "ppc403",
  1284. },
  1285. { /* 405GP */
  1286. .pvr_mask = 0xffff0000,
  1287. .pvr_value = 0x40110000,
  1288. .cpu_name = "405GP",
  1289. .cpu_features = CPU_FTRS_40X,
  1290. .cpu_user_features = PPC_FEATURE_32 |
  1291. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1292. .mmu_features = MMU_FTR_TYPE_40x,
  1293. .icache_bsize = 32,
  1294. .dcache_bsize = 32,
  1295. .machine_check = machine_check_4xx,
  1296. .platform = "ppc405",
  1297. },
  1298. { /* STB 03xxx */
  1299. .pvr_mask = 0xffff0000,
  1300. .pvr_value = 0x40130000,
  1301. .cpu_name = "STB03xxx",
  1302. .cpu_features = CPU_FTRS_40X,
  1303. .cpu_user_features = PPC_FEATURE_32 |
  1304. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1305. .mmu_features = MMU_FTR_TYPE_40x,
  1306. .icache_bsize = 32,
  1307. .dcache_bsize = 32,
  1308. .machine_check = machine_check_4xx,
  1309. .platform = "ppc405",
  1310. },
  1311. { /* STB 04xxx */
  1312. .pvr_mask = 0xffff0000,
  1313. .pvr_value = 0x41810000,
  1314. .cpu_name = "STB04xxx",
  1315. .cpu_features = CPU_FTRS_40X,
  1316. .cpu_user_features = PPC_FEATURE_32 |
  1317. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1318. .mmu_features = MMU_FTR_TYPE_40x,
  1319. .icache_bsize = 32,
  1320. .dcache_bsize = 32,
  1321. .machine_check = machine_check_4xx,
  1322. .platform = "ppc405",
  1323. },
  1324. { /* NP405L */
  1325. .pvr_mask = 0xffff0000,
  1326. .pvr_value = 0x41610000,
  1327. .cpu_name = "NP405L",
  1328. .cpu_features = CPU_FTRS_40X,
  1329. .cpu_user_features = PPC_FEATURE_32 |
  1330. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1331. .mmu_features = MMU_FTR_TYPE_40x,
  1332. .icache_bsize = 32,
  1333. .dcache_bsize = 32,
  1334. .machine_check = machine_check_4xx,
  1335. .platform = "ppc405",
  1336. },
  1337. { /* NP4GS3 */
  1338. .pvr_mask = 0xffff0000,
  1339. .pvr_value = 0x40B10000,
  1340. .cpu_name = "NP4GS3",
  1341. .cpu_features = CPU_FTRS_40X,
  1342. .cpu_user_features = PPC_FEATURE_32 |
  1343. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1344. .mmu_features = MMU_FTR_TYPE_40x,
  1345. .icache_bsize = 32,
  1346. .dcache_bsize = 32,
  1347. .machine_check = machine_check_4xx,
  1348. .platform = "ppc405",
  1349. },
  1350. { /* NP405H */
  1351. .pvr_mask = 0xffff0000,
  1352. .pvr_value = 0x41410000,
  1353. .cpu_name = "NP405H",
  1354. .cpu_features = CPU_FTRS_40X,
  1355. .cpu_user_features = PPC_FEATURE_32 |
  1356. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1357. .mmu_features = MMU_FTR_TYPE_40x,
  1358. .icache_bsize = 32,
  1359. .dcache_bsize = 32,
  1360. .machine_check = machine_check_4xx,
  1361. .platform = "ppc405",
  1362. },
  1363. { /* 405GPr */
  1364. .pvr_mask = 0xffff0000,
  1365. .pvr_value = 0x50910000,
  1366. .cpu_name = "405GPr",
  1367. .cpu_features = CPU_FTRS_40X,
  1368. .cpu_user_features = PPC_FEATURE_32 |
  1369. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1370. .mmu_features = MMU_FTR_TYPE_40x,
  1371. .icache_bsize = 32,
  1372. .dcache_bsize = 32,
  1373. .machine_check = machine_check_4xx,
  1374. .platform = "ppc405",
  1375. },
  1376. { /* STBx25xx */
  1377. .pvr_mask = 0xffff0000,
  1378. .pvr_value = 0x51510000,
  1379. .cpu_name = "STBx25xx",
  1380. .cpu_features = CPU_FTRS_40X,
  1381. .cpu_user_features = PPC_FEATURE_32 |
  1382. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1383. .mmu_features = MMU_FTR_TYPE_40x,
  1384. .icache_bsize = 32,
  1385. .dcache_bsize = 32,
  1386. .machine_check = machine_check_4xx,
  1387. .platform = "ppc405",
  1388. },
  1389. { /* 405LP */
  1390. .pvr_mask = 0xffff0000,
  1391. .pvr_value = 0x41F10000,
  1392. .cpu_name = "405LP",
  1393. .cpu_features = CPU_FTRS_40X,
  1394. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1395. .mmu_features = MMU_FTR_TYPE_40x,
  1396. .icache_bsize = 32,
  1397. .dcache_bsize = 32,
  1398. .machine_check = machine_check_4xx,
  1399. .platform = "ppc405",
  1400. },
  1401. { /* Xilinx Virtex-II Pro */
  1402. .pvr_mask = 0xfffff000,
  1403. .pvr_value = 0x20010000,
  1404. .cpu_name = "Virtex-II Pro",
  1405. .cpu_features = CPU_FTRS_40X,
  1406. .cpu_user_features = PPC_FEATURE_32 |
  1407. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1408. .mmu_features = MMU_FTR_TYPE_40x,
  1409. .icache_bsize = 32,
  1410. .dcache_bsize = 32,
  1411. .machine_check = machine_check_4xx,
  1412. .platform = "ppc405",
  1413. },
  1414. { /* Xilinx Virtex-4 FX */
  1415. .pvr_mask = 0xfffff000,
  1416. .pvr_value = 0x20011000,
  1417. .cpu_name = "Virtex-4 FX",
  1418. .cpu_features = CPU_FTRS_40X,
  1419. .cpu_user_features = PPC_FEATURE_32 |
  1420. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1421. .mmu_features = MMU_FTR_TYPE_40x,
  1422. .icache_bsize = 32,
  1423. .dcache_bsize = 32,
  1424. .machine_check = machine_check_4xx,
  1425. .platform = "ppc405",
  1426. },
  1427. { /* 405EP */
  1428. .pvr_mask = 0xffff0000,
  1429. .pvr_value = 0x51210000,
  1430. .cpu_name = "405EP",
  1431. .cpu_features = CPU_FTRS_40X,
  1432. .cpu_user_features = PPC_FEATURE_32 |
  1433. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1434. .mmu_features = MMU_FTR_TYPE_40x,
  1435. .icache_bsize = 32,
  1436. .dcache_bsize = 32,
  1437. .machine_check = machine_check_4xx,
  1438. .platform = "ppc405",
  1439. },
  1440. { /* 405EX Rev. A/B with Security */
  1441. .pvr_mask = 0xffff000f,
  1442. .pvr_value = 0x12910007,
  1443. .cpu_name = "405EX Rev. A/B",
  1444. .cpu_features = CPU_FTRS_40X,
  1445. .cpu_user_features = PPC_FEATURE_32 |
  1446. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1447. .mmu_features = MMU_FTR_TYPE_40x,
  1448. .icache_bsize = 32,
  1449. .dcache_bsize = 32,
  1450. .machine_check = machine_check_4xx,
  1451. .platform = "ppc405",
  1452. },
  1453. { /* 405EX Rev. C without Security */
  1454. .pvr_mask = 0xffff000f,
  1455. .pvr_value = 0x1291000d,
  1456. .cpu_name = "405EX Rev. C",
  1457. .cpu_features = CPU_FTRS_40X,
  1458. .cpu_user_features = PPC_FEATURE_32 |
  1459. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1460. .mmu_features = MMU_FTR_TYPE_40x,
  1461. .icache_bsize = 32,
  1462. .dcache_bsize = 32,
  1463. .machine_check = machine_check_4xx,
  1464. .platform = "ppc405",
  1465. },
  1466. { /* 405EX Rev. C with Security */
  1467. .pvr_mask = 0xffff000f,
  1468. .pvr_value = 0x1291000f,
  1469. .cpu_name = "405EX Rev. C",
  1470. .cpu_features = CPU_FTRS_40X,
  1471. .cpu_user_features = PPC_FEATURE_32 |
  1472. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1473. .mmu_features = MMU_FTR_TYPE_40x,
  1474. .icache_bsize = 32,
  1475. .dcache_bsize = 32,
  1476. .machine_check = machine_check_4xx,
  1477. .platform = "ppc405",
  1478. },
  1479. { /* 405EX Rev. D without Security */
  1480. .pvr_mask = 0xffff000f,
  1481. .pvr_value = 0x12910003,
  1482. .cpu_name = "405EX Rev. D",
  1483. .cpu_features = CPU_FTRS_40X,
  1484. .cpu_user_features = PPC_FEATURE_32 |
  1485. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1486. .mmu_features = MMU_FTR_TYPE_40x,
  1487. .icache_bsize = 32,
  1488. .dcache_bsize = 32,
  1489. .machine_check = machine_check_4xx,
  1490. .platform = "ppc405",
  1491. },
  1492. { /* 405EX Rev. D with Security */
  1493. .pvr_mask = 0xffff000f,
  1494. .pvr_value = 0x12910005,
  1495. .cpu_name = "405EX Rev. D",
  1496. .cpu_features = CPU_FTRS_40X,
  1497. .cpu_user_features = PPC_FEATURE_32 |
  1498. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1499. .mmu_features = MMU_FTR_TYPE_40x,
  1500. .icache_bsize = 32,
  1501. .dcache_bsize = 32,
  1502. .machine_check = machine_check_4xx,
  1503. .platform = "ppc405",
  1504. },
  1505. { /* 405EXr Rev. A/B without Security */
  1506. .pvr_mask = 0xffff000f,
  1507. .pvr_value = 0x12910001,
  1508. .cpu_name = "405EXr Rev. A/B",
  1509. .cpu_features = CPU_FTRS_40X,
  1510. .cpu_user_features = PPC_FEATURE_32 |
  1511. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1512. .mmu_features = MMU_FTR_TYPE_40x,
  1513. .icache_bsize = 32,
  1514. .dcache_bsize = 32,
  1515. .machine_check = machine_check_4xx,
  1516. .platform = "ppc405",
  1517. },
  1518. { /* 405EXr Rev. C without Security */
  1519. .pvr_mask = 0xffff000f,
  1520. .pvr_value = 0x12910009,
  1521. .cpu_name = "405EXr Rev. C",
  1522. .cpu_features = CPU_FTRS_40X,
  1523. .cpu_user_features = PPC_FEATURE_32 |
  1524. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1525. .mmu_features = MMU_FTR_TYPE_40x,
  1526. .icache_bsize = 32,
  1527. .dcache_bsize = 32,
  1528. .machine_check = machine_check_4xx,
  1529. .platform = "ppc405",
  1530. },
  1531. { /* 405EXr Rev. C with Security */
  1532. .pvr_mask = 0xffff000f,
  1533. .pvr_value = 0x1291000b,
  1534. .cpu_name = "405EXr Rev. C",
  1535. .cpu_features = CPU_FTRS_40X,
  1536. .cpu_user_features = PPC_FEATURE_32 |
  1537. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1538. .mmu_features = MMU_FTR_TYPE_40x,
  1539. .icache_bsize = 32,
  1540. .dcache_bsize = 32,
  1541. .machine_check = machine_check_4xx,
  1542. .platform = "ppc405",
  1543. },
  1544. { /* 405EXr Rev. D without Security */
  1545. .pvr_mask = 0xffff000f,
  1546. .pvr_value = 0x12910000,
  1547. .cpu_name = "405EXr Rev. D",
  1548. .cpu_features = CPU_FTRS_40X,
  1549. .cpu_user_features = PPC_FEATURE_32 |
  1550. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1551. .mmu_features = MMU_FTR_TYPE_40x,
  1552. .icache_bsize = 32,
  1553. .dcache_bsize = 32,
  1554. .machine_check = machine_check_4xx,
  1555. .platform = "ppc405",
  1556. },
  1557. { /* 405EXr Rev. D with Security */
  1558. .pvr_mask = 0xffff000f,
  1559. .pvr_value = 0x12910002,
  1560. .cpu_name = "405EXr Rev. D",
  1561. .cpu_features = CPU_FTRS_40X,
  1562. .cpu_user_features = PPC_FEATURE_32 |
  1563. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1564. .mmu_features = MMU_FTR_TYPE_40x,
  1565. .icache_bsize = 32,
  1566. .dcache_bsize = 32,
  1567. .machine_check = machine_check_4xx,
  1568. .platform = "ppc405",
  1569. },
  1570. {
  1571. /* 405EZ */
  1572. .pvr_mask = 0xffff0000,
  1573. .pvr_value = 0x41510000,
  1574. .cpu_name = "405EZ",
  1575. .cpu_features = CPU_FTRS_40X,
  1576. .cpu_user_features = PPC_FEATURE_32 |
  1577. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1578. .mmu_features = MMU_FTR_TYPE_40x,
  1579. .icache_bsize = 32,
  1580. .dcache_bsize = 32,
  1581. .machine_check = machine_check_4xx,
  1582. .platform = "ppc405",
  1583. },
  1584. { /* APM8018X */
  1585. .pvr_mask = 0xffff0000,
  1586. .pvr_value = 0x7ff11432,
  1587. .cpu_name = "APM8018X",
  1588. .cpu_features = CPU_FTRS_40X,
  1589. .cpu_user_features = PPC_FEATURE_32 |
  1590. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1591. .mmu_features = MMU_FTR_TYPE_40x,
  1592. .icache_bsize = 32,
  1593. .dcache_bsize = 32,
  1594. .machine_check = machine_check_4xx,
  1595. .platform = "ppc405",
  1596. },
  1597. { /* default match */
  1598. .pvr_mask = 0x00000000,
  1599. .pvr_value = 0x00000000,
  1600. .cpu_name = "(generic 40x PPC)",
  1601. .cpu_features = CPU_FTRS_40X,
  1602. .cpu_user_features = PPC_FEATURE_32 |
  1603. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1604. .mmu_features = MMU_FTR_TYPE_40x,
  1605. .icache_bsize = 32,
  1606. .dcache_bsize = 32,
  1607. .machine_check = machine_check_4xx,
  1608. .platform = "ppc405",
  1609. }
  1610. #endif /* CONFIG_40x */
  1611. #ifdef CONFIG_44x
  1612. {
  1613. .pvr_mask = 0xf0000fff,
  1614. .pvr_value = 0x40000850,
  1615. .cpu_name = "440GR Rev. A",
  1616. .cpu_features = CPU_FTRS_44X,
  1617. .cpu_user_features = COMMON_USER_BOOKE,
  1618. .mmu_features = MMU_FTR_TYPE_44x,
  1619. .icache_bsize = 32,
  1620. .dcache_bsize = 32,
  1621. .machine_check = machine_check_4xx,
  1622. .platform = "ppc440",
  1623. },
  1624. { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1625. .pvr_mask = 0xf0000fff,
  1626. .pvr_value = 0x40000858,
  1627. .cpu_name = "440EP Rev. A",
  1628. .cpu_features = CPU_FTRS_44X,
  1629. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1630. .mmu_features = MMU_FTR_TYPE_44x,
  1631. .icache_bsize = 32,
  1632. .dcache_bsize = 32,
  1633. .cpu_setup = __setup_cpu_440ep,
  1634. .machine_check = machine_check_4xx,
  1635. .platform = "ppc440",
  1636. },
  1637. {
  1638. .pvr_mask = 0xf0000fff,
  1639. .pvr_value = 0x400008d3,
  1640. .cpu_name = "440GR Rev. B",
  1641. .cpu_features = CPU_FTRS_44X,
  1642. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1643. .mmu_features = MMU_FTR_TYPE_44x,
  1644. .icache_bsize = 32,
  1645. .dcache_bsize = 32,
  1646. .machine_check = machine_check_4xx,
  1647. .platform = "ppc440",
  1648. },
  1649. { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1650. .pvr_mask = 0xf0000ff7,
  1651. .pvr_value = 0x400008d4,
  1652. .cpu_name = "440EP Rev. C",
  1653. .cpu_features = CPU_FTRS_44X,
  1654. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1655. .mmu_features = MMU_FTR_TYPE_44x,
  1656. .icache_bsize = 32,
  1657. .dcache_bsize = 32,
  1658. .cpu_setup = __setup_cpu_440ep,
  1659. .machine_check = machine_check_4xx,
  1660. .platform = "ppc440",
  1661. },
  1662. { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1663. .pvr_mask = 0xf0000fff,
  1664. .pvr_value = 0x400008db,
  1665. .cpu_name = "440EP Rev. B",
  1666. .cpu_features = CPU_FTRS_44X,
  1667. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1668. .mmu_features = MMU_FTR_TYPE_44x,
  1669. .icache_bsize = 32,
  1670. .dcache_bsize = 32,
  1671. .cpu_setup = __setup_cpu_440ep,
  1672. .machine_check = machine_check_4xx,
  1673. .platform = "ppc440",
  1674. },
  1675. { /* 440GRX */
  1676. .pvr_mask = 0xf0000ffb,
  1677. .pvr_value = 0x200008D0,
  1678. .cpu_name = "440GRX",
  1679. .cpu_features = CPU_FTRS_44X,
  1680. .cpu_user_features = COMMON_USER_BOOKE,
  1681. .mmu_features = MMU_FTR_TYPE_44x,
  1682. .icache_bsize = 32,
  1683. .dcache_bsize = 32,
  1684. .cpu_setup = __setup_cpu_440grx,
  1685. .machine_check = machine_check_440A,
  1686. .platform = "ppc440",
  1687. },
  1688. { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
  1689. .pvr_mask = 0xf0000ffb,
  1690. .pvr_value = 0x200008D8,
  1691. .cpu_name = "440EPX",
  1692. .cpu_features = CPU_FTRS_44X,
  1693. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1694. .mmu_features = MMU_FTR_TYPE_44x,
  1695. .icache_bsize = 32,
  1696. .dcache_bsize = 32,
  1697. .cpu_setup = __setup_cpu_440epx,
  1698. .machine_check = machine_check_440A,
  1699. .platform = "ppc440",
  1700. },
  1701. { /* 440GP Rev. B */
  1702. .pvr_mask = 0xf0000fff,
  1703. .pvr_value = 0x40000440,
  1704. .cpu_name = "440GP Rev. B",
  1705. .cpu_features = CPU_FTRS_44X,
  1706. .cpu_user_features = COMMON_USER_BOOKE,
  1707. .mmu_features = MMU_FTR_TYPE_44x,
  1708. .icache_bsize = 32,
  1709. .dcache_bsize = 32,
  1710. .machine_check = machine_check_4xx,
  1711. .platform = "ppc440gp",
  1712. },
  1713. { /* 440GP Rev. C */
  1714. .pvr_mask = 0xf0000fff,
  1715. .pvr_value = 0x40000481,
  1716. .cpu_name = "440GP Rev. C",
  1717. .cpu_features = CPU_FTRS_44X,
  1718. .cpu_user_features = COMMON_USER_BOOKE,
  1719. .mmu_features = MMU_FTR_TYPE_44x,
  1720. .icache_bsize = 32,
  1721. .dcache_bsize = 32,
  1722. .machine_check = machine_check_4xx,
  1723. .platform = "ppc440gp",
  1724. },
  1725. { /* 440GX Rev. A */
  1726. .pvr_mask = 0xf0000fff,
  1727. .pvr_value = 0x50000850,
  1728. .cpu_name = "440GX Rev. A",
  1729. .cpu_features = CPU_FTRS_44X,
  1730. .cpu_user_features = COMMON_USER_BOOKE,
  1731. .mmu_features = MMU_FTR_TYPE_44x,
  1732. .icache_bsize = 32,
  1733. .dcache_bsize = 32,
  1734. .cpu_setup = __setup_cpu_440gx,
  1735. .machine_check = machine_check_440A,
  1736. .platform = "ppc440",
  1737. },
  1738. { /* 440GX Rev. B */
  1739. .pvr_mask = 0xf0000fff,
  1740. .pvr_value = 0x50000851,
  1741. .cpu_name = "440GX Rev. B",
  1742. .cpu_features = CPU_FTRS_44X,
  1743. .cpu_user_features = COMMON_USER_BOOKE,
  1744. .mmu_features = MMU_FTR_TYPE_44x,
  1745. .icache_bsize = 32,
  1746. .dcache_bsize = 32,
  1747. .cpu_setup = __setup_cpu_440gx,
  1748. .machine_check = machine_check_440A,
  1749. .platform = "ppc440",
  1750. },
  1751. { /* 440GX Rev. C */
  1752. .pvr_mask = 0xf0000fff,
  1753. .pvr_value = 0x50000892,
  1754. .cpu_name = "440GX Rev. C",
  1755. .cpu_features = CPU_FTRS_44X,
  1756. .cpu_user_features = COMMON_USER_BOOKE,
  1757. .mmu_features = MMU_FTR_TYPE_44x,
  1758. .icache_bsize = 32,
  1759. .dcache_bsize = 32,
  1760. .cpu_setup = __setup_cpu_440gx,
  1761. .machine_check = machine_check_440A,
  1762. .platform = "ppc440",
  1763. },
  1764. { /* 440GX Rev. F */
  1765. .pvr_mask = 0xf0000fff,
  1766. .pvr_value = 0x50000894,
  1767. .cpu_name = "440GX Rev. F",
  1768. .cpu_features = CPU_FTRS_44X,
  1769. .cpu_user_features = COMMON_USER_BOOKE,
  1770. .mmu_features = MMU_FTR_TYPE_44x,
  1771. .icache_bsize = 32,
  1772. .dcache_bsize = 32,
  1773. .cpu_setup = __setup_cpu_440gx,
  1774. .machine_check = machine_check_440A,
  1775. .platform = "ppc440",
  1776. },
  1777. { /* 440SP Rev. A */
  1778. .pvr_mask = 0xfff00fff,
  1779. .pvr_value = 0x53200891,
  1780. .cpu_name = "440SP Rev. A",
  1781. .cpu_features = CPU_FTRS_44X,
  1782. .cpu_user_features = COMMON_USER_BOOKE,
  1783. .mmu_features = MMU_FTR_TYPE_44x,
  1784. .icache_bsize = 32,
  1785. .dcache_bsize = 32,
  1786. .machine_check = machine_check_4xx,
  1787. .platform = "ppc440",
  1788. },
  1789. { /* 440SPe Rev. A */
  1790. .pvr_mask = 0xfff00fff,
  1791. .pvr_value = 0x53400890,
  1792. .cpu_name = "440SPe Rev. A",
  1793. .cpu_features = CPU_FTRS_44X,
  1794. .cpu_user_features = COMMON_USER_BOOKE,
  1795. .mmu_features = MMU_FTR_TYPE_44x,
  1796. .icache_bsize = 32,
  1797. .dcache_bsize = 32,
  1798. .cpu_setup = __setup_cpu_440spe,
  1799. .machine_check = machine_check_440A,
  1800. .platform = "ppc440",
  1801. },
  1802. { /* 440SPe Rev. B */
  1803. .pvr_mask = 0xfff00fff,
  1804. .pvr_value = 0x53400891,
  1805. .cpu_name = "440SPe Rev. B",
  1806. .cpu_features = CPU_FTRS_44X,
  1807. .cpu_user_features = COMMON_USER_BOOKE,
  1808. .mmu_features = MMU_FTR_TYPE_44x,
  1809. .icache_bsize = 32,
  1810. .dcache_bsize = 32,
  1811. .cpu_setup = __setup_cpu_440spe,
  1812. .machine_check = machine_check_440A,
  1813. .platform = "ppc440",
  1814. },
  1815. { /* 440 in Xilinx Virtex-5 FXT */
  1816. .pvr_mask = 0xfffffff0,
  1817. .pvr_value = 0x7ff21910,
  1818. .cpu_name = "440 in Virtex-5 FXT",
  1819. .cpu_features = CPU_FTRS_44X,
  1820. .cpu_user_features = COMMON_USER_BOOKE,
  1821. .mmu_features = MMU_FTR_TYPE_44x,
  1822. .icache_bsize = 32,
  1823. .dcache_bsize = 32,
  1824. .cpu_setup = __setup_cpu_440x5,
  1825. .machine_check = machine_check_440A,
  1826. .platform = "ppc440",
  1827. },
  1828. { /* 460EX */
  1829. .pvr_mask = 0xffff0006,
  1830. .pvr_value = 0x13020002,
  1831. .cpu_name = "460EX",
  1832. .cpu_features = CPU_FTRS_440x6,
  1833. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1834. .mmu_features = MMU_FTR_TYPE_44x,
  1835. .icache_bsize = 32,
  1836. .dcache_bsize = 32,
  1837. .cpu_setup = __setup_cpu_460ex,
  1838. .machine_check = machine_check_440A,
  1839. .platform = "ppc440",
  1840. },
  1841. { /* 460EX Rev B */
  1842. .pvr_mask = 0xffff0007,
  1843. .pvr_value = 0x13020004,
  1844. .cpu_name = "460EX Rev. B",
  1845. .cpu_features = CPU_FTRS_440x6,
  1846. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1847. .mmu_features = MMU_FTR_TYPE_44x,
  1848. .icache_bsize = 32,
  1849. .dcache_bsize = 32,
  1850. .cpu_setup = __setup_cpu_460ex,
  1851. .machine_check = machine_check_440A,
  1852. .platform = "ppc440",
  1853. },
  1854. { /* 460GT */
  1855. .pvr_mask = 0xffff0006,
  1856. .pvr_value = 0x13020000,
  1857. .cpu_name = "460GT",
  1858. .cpu_features = CPU_FTRS_440x6,
  1859. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1860. .mmu_features = MMU_FTR_TYPE_44x,
  1861. .icache_bsize = 32,
  1862. .dcache_bsize = 32,
  1863. .cpu_setup = __setup_cpu_460gt,
  1864. .machine_check = machine_check_440A,
  1865. .platform = "ppc440",
  1866. },
  1867. { /* 460GT Rev B */
  1868. .pvr_mask = 0xffff0007,
  1869. .pvr_value = 0x13020005,
  1870. .cpu_name = "460GT Rev. B",
  1871. .cpu_features = CPU_FTRS_440x6,
  1872. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1873. .mmu_features = MMU_FTR_TYPE_44x,
  1874. .icache_bsize = 32,
  1875. .dcache_bsize = 32,
  1876. .cpu_setup = __setup_cpu_460gt,
  1877. .machine_check = machine_check_440A,
  1878. .platform = "ppc440",
  1879. },
  1880. { /* 460SX */
  1881. .pvr_mask = 0xffffff00,
  1882. .pvr_value = 0x13541800,
  1883. .cpu_name = "460SX",
  1884. .cpu_features = CPU_FTRS_44X,
  1885. .cpu_user_features = COMMON_USER_BOOKE,
  1886. .mmu_features = MMU_FTR_TYPE_44x,
  1887. .icache_bsize = 32,
  1888. .dcache_bsize = 32,
  1889. .cpu_setup = __setup_cpu_460sx,
  1890. .machine_check = machine_check_440A,
  1891. .platform = "ppc440",
  1892. },
  1893. { /* 464 in APM821xx */
  1894. .pvr_mask = 0xfffffff0,
  1895. .pvr_value = 0x12C41C80,
  1896. .cpu_name = "APM821XX",
  1897. .cpu_features = CPU_FTRS_44X,
  1898. .cpu_user_features = COMMON_USER_BOOKE |
  1899. PPC_FEATURE_HAS_FPU,
  1900. .mmu_features = MMU_FTR_TYPE_44x,
  1901. .icache_bsize = 32,
  1902. .dcache_bsize = 32,
  1903. .cpu_setup = __setup_cpu_apm821xx,
  1904. .machine_check = machine_check_440A,
  1905. .platform = "ppc440",
  1906. },
  1907. { /* 476 DD2 core */
  1908. .pvr_mask = 0xffffffff,
  1909. .pvr_value = 0x11a52080,
  1910. .cpu_name = "476",
  1911. .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
  1912. .cpu_user_features = COMMON_USER_BOOKE |
  1913. PPC_FEATURE_HAS_FPU,
  1914. .mmu_features = MMU_FTR_TYPE_47x |
  1915. MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
  1916. .icache_bsize = 32,
  1917. .dcache_bsize = 128,
  1918. .machine_check = machine_check_47x,
  1919. .platform = "ppc470",
  1920. },
  1921. { /* 476fpe */
  1922. .pvr_mask = 0xffff0000,
  1923. .pvr_value = 0x7ff50000,
  1924. .cpu_name = "476fpe",
  1925. .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
  1926. .cpu_user_features = COMMON_USER_BOOKE |
  1927. PPC_FEATURE_HAS_FPU,
  1928. .mmu_features = MMU_FTR_TYPE_47x |
  1929. MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
  1930. .icache_bsize = 32,
  1931. .dcache_bsize = 128,
  1932. .machine_check = machine_check_47x,
  1933. .platform = "ppc470",
  1934. },
  1935. { /* 476 iss */
  1936. .pvr_mask = 0xffff0000,
  1937. .pvr_value = 0x00050000,
  1938. .cpu_name = "476",
  1939. .cpu_features = CPU_FTRS_47X,
  1940. .cpu_user_features = COMMON_USER_BOOKE |
  1941. PPC_FEATURE_HAS_FPU,
  1942. .mmu_features = MMU_FTR_TYPE_47x |
  1943. MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
  1944. .icache_bsize = 32,
  1945. .dcache_bsize = 128,
  1946. .machine_check = machine_check_47x,
  1947. .platform = "ppc470",
  1948. },
  1949. { /* 476 others */
  1950. .pvr_mask = 0xffff0000,
  1951. .pvr_value = 0x11a50000,
  1952. .cpu_name = "476",
  1953. .cpu_features = CPU_FTRS_47X,
  1954. .cpu_user_features = COMMON_USER_BOOKE |
  1955. PPC_FEATURE_HAS_FPU,
  1956. .mmu_features = MMU_FTR_TYPE_47x |
  1957. MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
  1958. .icache_bsize = 32,
  1959. .dcache_bsize = 128,
  1960. .machine_check = machine_check_47x,
  1961. .platform = "ppc470",
  1962. },
  1963. { /* default match */
  1964. .pvr_mask = 0x00000000,
  1965. .pvr_value = 0x00000000,
  1966. .cpu_name = "(generic 44x PPC)",
  1967. .cpu_features = CPU_FTRS_44X,
  1968. .cpu_user_features = COMMON_USER_BOOKE,
  1969. .mmu_features = MMU_FTR_TYPE_44x,
  1970. .icache_bsize = 32,
  1971. .dcache_bsize = 32,
  1972. .machine_check = machine_check_4xx,
  1973. .platform = "ppc440",
  1974. }
  1975. #endif /* CONFIG_44x */
  1976. #ifdef CONFIG_E200
  1977. { /* e200z5 */
  1978. .pvr_mask = 0xfff00000,
  1979. .pvr_value = 0x81000000,
  1980. .cpu_name = "e200z5",
  1981. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1982. .cpu_features = CPU_FTRS_E200,
  1983. .cpu_user_features = COMMON_USER_BOOKE |
  1984. PPC_FEATURE_HAS_EFP_SINGLE |
  1985. PPC_FEATURE_UNIFIED_CACHE,
  1986. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1987. .dcache_bsize = 32,
  1988. .machine_check = machine_check_e200,
  1989. .platform = "ppc5554",
  1990. },
  1991. { /* e200z6 */
  1992. .pvr_mask = 0xfff00000,
  1993. .pvr_value = 0x81100000,
  1994. .cpu_name = "e200z6",
  1995. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1996. .cpu_features = CPU_FTRS_E200,
  1997. .cpu_user_features = COMMON_USER_BOOKE |
  1998. PPC_FEATURE_HAS_SPE_COMP |
  1999. PPC_FEATURE_HAS_EFP_SINGLE_COMP |
  2000. PPC_FEATURE_UNIFIED_CACHE,
  2001. .mmu_features = MMU_FTR_TYPE_FSL_E,
  2002. .dcache_bsize = 32,
  2003. .machine_check = machine_check_e200,
  2004. .platform = "ppc5554",
  2005. },
  2006. { /* default match */
  2007. .pvr_mask = 0x00000000,
  2008. .pvr_value = 0x00000000,
  2009. .cpu_name = "(generic E200 PPC)",
  2010. .cpu_features = CPU_FTRS_E200,
  2011. .cpu_user_features = COMMON_USER_BOOKE |
  2012. PPC_FEATURE_HAS_EFP_SINGLE |
  2013. PPC_FEATURE_UNIFIED_CACHE,
  2014. .mmu_features = MMU_FTR_TYPE_FSL_E,
  2015. .dcache_bsize = 32,
  2016. .cpu_setup = __setup_cpu_e200,
  2017. .machine_check = machine_check_e200,
  2018. .platform = "ppc5554",
  2019. }
  2020. #endif /* CONFIG_E200 */
  2021. #endif /* CONFIG_PPC32 */
  2022. #ifdef CONFIG_E500
  2023. #ifdef CONFIG_PPC32
  2024. { /* e500 */
  2025. .pvr_mask = 0xffff0000,
  2026. .pvr_value = 0x80200000,
  2027. .cpu_name = "e500",
  2028. .cpu_features = CPU_FTRS_E500,
  2029. .cpu_user_features = COMMON_USER_BOOKE |
  2030. PPC_FEATURE_HAS_SPE_COMP |
  2031. PPC_FEATURE_HAS_EFP_SINGLE_COMP,
  2032. .cpu_user_features2 = PPC_FEATURE2_ISEL,
  2033. .mmu_features = MMU_FTR_TYPE_FSL_E,
  2034. .icache_bsize = 32,
  2035. .dcache_bsize = 32,
  2036. .num_pmcs = 4,
  2037. .oprofile_cpu_type = "ppc/e500",
  2038. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  2039. .cpu_setup = __setup_cpu_e500v1,
  2040. .machine_check = machine_check_e500,
  2041. .platform = "ppc8540",
  2042. },
  2043. { /* e500v2 */
  2044. .pvr_mask = 0xffff0000,
  2045. .pvr_value = 0x80210000,
  2046. .cpu_name = "e500v2",
  2047. .cpu_features = CPU_FTRS_E500_2,
  2048. .cpu_user_features = COMMON_USER_BOOKE |
  2049. PPC_FEATURE_HAS_SPE_COMP |
  2050. PPC_FEATURE_HAS_EFP_SINGLE_COMP |
  2051. PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
  2052. .cpu_user_features2 = PPC_FEATURE2_ISEL,
  2053. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
  2054. .icache_bsize = 32,
  2055. .dcache_bsize = 32,
  2056. .num_pmcs = 4,
  2057. .oprofile_cpu_type = "ppc/e500",
  2058. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  2059. .cpu_setup = __setup_cpu_e500v2,
  2060. .machine_check = machine_check_e500,
  2061. .platform = "ppc8548",
  2062. },
  2063. { /* e500mc */
  2064. .pvr_mask = 0xffff0000,
  2065. .pvr_value = 0x80230000,
  2066. .cpu_name = "e500mc",
  2067. .cpu_features = CPU_FTRS_E500MC,
  2068. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  2069. .cpu_user_features2 = PPC_FEATURE2_ISEL,
  2070. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
  2071. MMU_FTR_USE_TLBILX,
  2072. .icache_bsize = 64,
  2073. .dcache_bsize = 64,
  2074. .num_pmcs = 4,
  2075. .oprofile_cpu_type = "ppc/e500mc",
  2076. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  2077. .cpu_setup = __setup_cpu_e500mc,
  2078. .machine_check = machine_check_e500mc,
  2079. .platform = "ppce500mc",
  2080. },
  2081. #endif /* CONFIG_PPC32 */
  2082. { /* e5500 */
  2083. .pvr_mask = 0xffff0000,
  2084. .pvr_value = 0x80240000,
  2085. .cpu_name = "e5500",
  2086. .cpu_features = CPU_FTRS_E5500,
  2087. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  2088. .cpu_user_features2 = PPC_FEATURE2_ISEL,
  2089. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
  2090. MMU_FTR_USE_TLBILX,
  2091. .icache_bsize = 64,
  2092. .dcache_bsize = 64,
  2093. .num_pmcs = 4,
  2094. .oprofile_cpu_type = "ppc/e500mc",
  2095. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  2096. .cpu_setup = __setup_cpu_e5500,
  2097. #ifndef CONFIG_PPC32
  2098. .cpu_restore = __restore_cpu_e5500,
  2099. #endif
  2100. .machine_check = machine_check_e500mc,
  2101. .platform = "ppce5500",
  2102. },
  2103. { /* e6500 */
  2104. .pvr_mask = 0xffff0000,
  2105. .pvr_value = 0x80400000,
  2106. .cpu_name = "e6500",
  2107. .cpu_features = CPU_FTRS_E6500,
  2108. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
  2109. PPC_FEATURE_HAS_ALTIVEC_COMP,
  2110. .cpu_user_features2 = PPC_FEATURE2_ISEL,
  2111. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
  2112. MMU_FTR_USE_TLBILX,
  2113. .icache_bsize = 64,
  2114. .dcache_bsize = 64,
  2115. .num_pmcs = 6,
  2116. .oprofile_cpu_type = "ppc/e6500",
  2117. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  2118. .cpu_setup = __setup_cpu_e6500,
  2119. #ifndef CONFIG_PPC32
  2120. .cpu_restore = __restore_cpu_e6500,
  2121. #endif
  2122. .machine_check = machine_check_e500mc,
  2123. .platform = "ppce6500",
  2124. },
  2125. #ifdef CONFIG_PPC32
  2126. { /* default match */
  2127. .pvr_mask = 0x00000000,
  2128. .pvr_value = 0x00000000,
  2129. .cpu_name = "(generic E500 PPC)",
  2130. .cpu_features = CPU_FTRS_E500,
  2131. .cpu_user_features = COMMON_USER_BOOKE |
  2132. PPC_FEATURE_HAS_SPE_COMP |
  2133. PPC_FEATURE_HAS_EFP_SINGLE_COMP,
  2134. .mmu_features = MMU_FTR_TYPE_FSL_E,
  2135. .icache_bsize = 32,
  2136. .dcache_bsize = 32,
  2137. .machine_check = machine_check_e500,
  2138. .platform = "powerpc",
  2139. }
  2140. #endif /* CONFIG_PPC32 */
  2141. #endif /* CONFIG_E500 */
  2142. #ifdef CONFIG_PPC_A2
  2143. { /* Standard A2 (>= DD2) + FPU core */
  2144. .pvr_mask = 0xffff0000,
  2145. .pvr_value = 0x00480000,
  2146. .cpu_name = "A2 (>= DD2)",
  2147. .cpu_features = CPU_FTRS_A2,
  2148. .cpu_user_features = COMMON_USER_PPC64,
  2149. .mmu_features = MMU_FTRS_A2,
  2150. .icache_bsize = 64,
  2151. .dcache_bsize = 64,
  2152. .num_pmcs = 0,
  2153. .cpu_setup = __setup_cpu_a2,
  2154. .cpu_restore = __restore_cpu_a2,
  2155. .machine_check = machine_check_generic,
  2156. .platform = "ppca2",
  2157. },
  2158. { /* This is a default entry to get going, to be replaced by
  2159. * a real one at some stage
  2160. */
  2161. #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
  2162. CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
  2163. CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
  2164. .pvr_mask = 0x00000000,
  2165. .pvr_value = 0x00000000,
  2166. .cpu_name = "Book3E",
  2167. .cpu_features = CPU_FTRS_BASE_BOOK3E,
  2168. .cpu_user_features = COMMON_USER_PPC64,
  2169. .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
  2170. MMU_FTR_USE_TLBIVAX_BCAST |
  2171. MMU_FTR_LOCK_BCAST_INVAL,
  2172. .icache_bsize = 64,
  2173. .dcache_bsize = 64,
  2174. .num_pmcs = 0,
  2175. .machine_check = machine_check_generic,
  2176. .platform = "power6",
  2177. },
  2178. #endif /* CONFIG_PPC_A2 */
  2179. };
  2180. static struct cpu_spec the_cpu_spec;
  2181. static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
  2182. struct cpu_spec *s)
  2183. {
  2184. struct cpu_spec *t = &the_cpu_spec;
  2185. struct cpu_spec old;
  2186. t = PTRRELOC(t);
  2187. old = *t;
  2188. /* Copy everything, then do fixups */
  2189. *t = *s;
  2190. /*
  2191. * If we are overriding a previous value derived from the real
  2192. * PVR with a new value obtained using a logical PVR value,
  2193. * don't modify the performance monitor fields.
  2194. */
  2195. if (old.num_pmcs && !s->num_pmcs) {
  2196. t->num_pmcs = old.num_pmcs;
  2197. t->pmc_type = old.pmc_type;
  2198. t->oprofile_type = old.oprofile_type;
  2199. t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
  2200. t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
  2201. t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
  2202. /*
  2203. * If we have passed through this logic once before and
  2204. * have pulled the default case because the real PVR was
  2205. * not found inside cpu_specs[], then we are possibly
  2206. * running in compatibility mode. In that case, let the
  2207. * oprofiler know which set of compatibility counters to
  2208. * pull from by making sure the oprofile_cpu_type string
  2209. * is set to that of compatibility mode. If the
  2210. * oprofile_cpu_type already has a value, then we are
  2211. * possibly overriding a real PVR with a logical one,
  2212. * and, in that case, keep the current value for
  2213. * oprofile_cpu_type.
  2214. */
  2215. if (old.oprofile_cpu_type != NULL) {
  2216. t->oprofile_cpu_type = old.oprofile_cpu_type;
  2217. t->oprofile_type = old.oprofile_type;
  2218. }
  2219. }
  2220. *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
  2221. /*
  2222. * Set the base platform string once; assumes
  2223. * we're called with real pvr first.
  2224. */
  2225. if (*PTRRELOC(&powerpc_base_platform) == NULL)
  2226. *PTRRELOC(&powerpc_base_platform) = t->platform;
  2227. #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
  2228. /* ppc64 and booke expect identify_cpu to also call setup_cpu for
  2229. * that processor. I will consolidate that at a later time, for now,
  2230. * just use #ifdef. We also don't need to PTRRELOC the function
  2231. * pointer on ppc64 and booke as we are running at 0 in real mode
  2232. * on ppc64 and reloc_offset is always 0 on booke.
  2233. */
  2234. if (t->cpu_setup) {
  2235. t->cpu_setup(offset, t);
  2236. }
  2237. #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
  2238. return t;
  2239. }
  2240. struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
  2241. {
  2242. struct cpu_spec *s = cpu_specs;
  2243. int i;
  2244. s = PTRRELOC(s);
  2245. for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
  2246. if ((pvr & s->pvr_mask) == s->pvr_value)
  2247. return setup_cpu_spec(offset, s);
  2248. }
  2249. BUG();
  2250. return NULL;
  2251. }