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  1. /*
  2. * ARC CPU startup Code
  3. *
  4. * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Vineetg: Dec 2007
  11. * -Check if we are running on Simulator or on real hardware
  12. * to skip certain things during boot on simulator
  13. */
  14. #include <asm/asm-offsets.h>
  15. #include <asm/entry.h>
  16. #include <linux/linkage.h>
  17. #include <asm/arcregs.h>
  18. .cpu A7
  19. .section .init.text, "ax",@progbits
  20. .type stext, @function
  21. .globl stext
  22. stext:
  23. ;-------------------------------------------------------------------
  24. ; Don't clobber r0-r2 yet. It might have bootloader provided info
  25. ;-------------------------------------------------------------------
  26. sr @_int_vec_base_lds, [AUX_INTR_VEC_BASE]
  27. #ifdef CONFIG_SMP
  28. ; Ensure Boot (Master) proceeds. Others wait in platform dependent way
  29. ; IDENTITY Reg [ 3 2 1 0 ]
  30. ; (cpu-id) ^^^ => Zero for UP ARC700
  31. ; => #Core-ID if SMP (Master 0)
  32. ; Note that non-boot CPUs might not land here if halt-on-reset and
  33. ; instead breath life from @first_lines_of_secondary, but we still
  34. ; need to make sure only boot cpu takes this path.
  35. GET_CPU_ID r5
  36. cmp r5, 0
  37. mov.ne r0, r5
  38. jne arc_platform_smp_wait_to_boot
  39. #endif
  40. ; Clear BSS before updating any globals
  41. ; XXX: use ZOL here
  42. mov r5, __bss_start
  43. mov r6, __bss_stop
  44. 1:
  45. st.ab 0, [r5,4]
  46. brlt r5, r6, 1b
  47. ; Uboot - kernel ABI
  48. ; r0 = [0] No uboot interaction, [1] cmdline in r2, [2] DTB in r2
  49. ; r1 = magic number (board identity, unused as of now
  50. ; r2 = pointer to uboot provided cmdline or external DTB in mem
  51. ; These are handled later in setup_arch()
  52. st r0, [@uboot_tag]
  53. st r2, [@uboot_arg]
  54. ; Identify if running on ISS vs Silicon
  55. ; IDENTITY Reg [ 3 2 1 0 ]
  56. ; (chip-id) ^^^^^ ==> 0xffff for ISS
  57. lr r0, [identity]
  58. lsr r3, r0, 16
  59. cmp r3, 0xffff
  60. mov.z r4, 0
  61. mov.nz r4, 1
  62. st r4, [@running_on_hw]
  63. ; setup "current" tsk and optionally cache it in dedicated r25
  64. mov r9, @init_task
  65. SET_CURR_TASK_ON_CPU r9, r0 ; r9 = tsk, r0 = scratch
  66. ; setup stack (fp, sp)
  67. mov fp, 0
  68. ; tsk->thread_info is really a PAGE, whose bottom hoists stack
  69. GET_TSK_STACK_BASE r9, sp ; r9 = tsk, sp = stack base(output)
  70. j start_kernel ; "C" entry point
  71. #ifdef CONFIG_SMP
  72. ;----------------------------------------------------------------
  73. ; First lines of code run by secondary before jumping to 'C'
  74. ;----------------------------------------------------------------
  75. .section .text, "ax",@progbits
  76. .type first_lines_of_secondary, @function
  77. .globl first_lines_of_secondary
  78. first_lines_of_secondary:
  79. sr @_int_vec_base_lds, [AUX_INTR_VEC_BASE]
  80. ; setup per-cpu idle task as "current" on this CPU
  81. ld r0, [@secondary_idle_tsk]
  82. SET_CURR_TASK_ON_CPU r0, r1
  83. ; setup stack (fp, sp)
  84. mov fp, 0
  85. ; set it's stack base to tsk->thread_info bottom
  86. GET_TSK_STACK_BASE r0, sp
  87. j start_kernel_secondary
  88. #endif