rtc-cmos.c 35 KB

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  1. /*
  2. * RTC class driver for "CMOS RTC": PCs, ACPI, etc
  3. *
  4. * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
  5. * Copyright (C) 2006 David Brownell (convert to new framework)
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. /*
  13. * The original "cmos clock" chip was an MC146818 chip, now obsolete.
  14. * That defined the register interface now provided by all PCs, some
  15. * non-PC systems, and incorporated into ACPI. Modern PC chipsets
  16. * integrate an MC146818 clone in their southbridge, and boards use
  17. * that instead of discrete clones like the DS12887 or M48T86. There
  18. * are also clones that connect using the LPC bus.
  19. *
  20. * That register API is also used directly by various other drivers
  21. * (notably for integrated NVRAM), infrastructure (x86 has code to
  22. * bypass the RTC framework, directly reading the RTC during boot
  23. * and updating minutes/seconds for systems using NTP synch) and
  24. * utilities (like userspace 'hwclock', if no /dev node exists).
  25. *
  26. * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
  27. * interrupts disabled, holding the global rtc_lock, to exclude those
  28. * other drivers and utilities on correctly configured systems.
  29. */
  30. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31. #include <linux/kernel.h>
  32. #include <linux/module.h>
  33. #include <linux/init.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/platform_device.h>
  37. #include <linux/log2.h>
  38. #include <linux/pm.h>
  39. #include <linux/of.h>
  40. #include <linux/of_platform.h>
  41. #ifdef CONFIG_X86
  42. #include <asm/i8259.h>
  43. #endif
  44. /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
  45. #include <linux/mc146818rtc.h>
  46. struct cmos_rtc {
  47. struct rtc_device *rtc;
  48. struct device *dev;
  49. int irq;
  50. struct resource *iomem;
  51. time64_t alarm_expires;
  52. void (*wake_on)(struct device *);
  53. void (*wake_off)(struct device *);
  54. u8 enabled_wake;
  55. u8 suspend_ctrl;
  56. /* newer hardware extends the original register set */
  57. u8 day_alrm;
  58. u8 mon_alrm;
  59. u8 century;
  60. struct rtc_wkalrm saved_wkalrm;
  61. };
  62. /* both platform and pnp busses use negative numbers for invalid irqs */
  63. #define is_valid_irq(n) ((n) > 0)
  64. static const char driver_name[] = "rtc_cmos";
  65. /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
  66. * always mask it against the irq enable bits in RTC_CONTROL. Bit values
  67. * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
  68. */
  69. #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
  70. static inline int is_intr(u8 rtc_intr)
  71. {
  72. if (!(rtc_intr & RTC_IRQF))
  73. return 0;
  74. return rtc_intr & RTC_IRQMASK;
  75. }
  76. /*----------------------------------------------------------------*/
  77. /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
  78. * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
  79. * used in a broken "legacy replacement" mode. The breakage includes
  80. * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
  81. * other (better) use.
  82. *
  83. * When that broken mode is in use, platform glue provides a partial
  84. * emulation of hardware RTC IRQ facilities using HPET #1. We don't
  85. * want to use HPET for anything except those IRQs though...
  86. */
  87. #ifdef CONFIG_HPET_EMULATE_RTC
  88. #include <asm/hpet.h>
  89. #else
  90. static inline int is_hpet_enabled(void)
  91. {
  92. return 0;
  93. }
  94. static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
  95. {
  96. return 0;
  97. }
  98. static inline int hpet_set_rtc_irq_bit(unsigned long mask)
  99. {
  100. return 0;
  101. }
  102. static inline int
  103. hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
  104. {
  105. return 0;
  106. }
  107. static inline int hpet_set_periodic_freq(unsigned long freq)
  108. {
  109. return 0;
  110. }
  111. static inline int hpet_rtc_dropped_irq(void)
  112. {
  113. return 0;
  114. }
  115. static inline int hpet_rtc_timer_init(void)
  116. {
  117. return 0;
  118. }
  119. extern irq_handler_t hpet_rtc_interrupt;
  120. static inline int hpet_register_irq_handler(irq_handler_t handler)
  121. {
  122. return 0;
  123. }
  124. static inline int hpet_unregister_irq_handler(irq_handler_t handler)
  125. {
  126. return 0;
  127. }
  128. #endif
  129. /*----------------------------------------------------------------*/
  130. #ifdef RTC_PORT
  131. /* Most newer x86 systems have two register banks, the first used
  132. * for RTC and NVRAM and the second only for NVRAM. Caller must
  133. * own rtc_lock ... and we won't worry about access during NMI.
  134. */
  135. #define can_bank2 true
  136. static inline unsigned char cmos_read_bank2(unsigned char addr)
  137. {
  138. outb(addr, RTC_PORT(2));
  139. return inb(RTC_PORT(3));
  140. }
  141. static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
  142. {
  143. outb(addr, RTC_PORT(2));
  144. outb(val, RTC_PORT(3));
  145. }
  146. #else
  147. #define can_bank2 false
  148. static inline unsigned char cmos_read_bank2(unsigned char addr)
  149. {
  150. return 0;
  151. }
  152. static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
  153. {
  154. }
  155. #endif
  156. /*----------------------------------------------------------------*/
  157. static int cmos_read_time(struct device *dev, struct rtc_time *t)
  158. {
  159. /*
  160. * If pm_trace abused the RTC for storage, set the timespec to 0,
  161. * which tells the caller that this RTC value is unusable.
  162. */
  163. if (!pm_trace_rtc_valid())
  164. return -EIO;
  165. /* REVISIT: if the clock has a "century" register, use
  166. * that instead of the heuristic in mc146818_get_time().
  167. * That'll make Y3K compatility (year > 2070) easy!
  168. */
  169. mc146818_get_time(t);
  170. return 0;
  171. }
  172. static int cmos_set_time(struct device *dev, struct rtc_time *t)
  173. {
  174. /* REVISIT: set the "century" register if available
  175. *
  176. * NOTE: this ignores the issue whereby updating the seconds
  177. * takes effect exactly 500ms after we write the register.
  178. * (Also queueing and other delays before we get this far.)
  179. */
  180. return mc146818_set_time(t);
  181. }
  182. static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  183. {
  184. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  185. unsigned char rtc_control;
  186. if (!is_valid_irq(cmos->irq))
  187. return -EIO;
  188. /* Basic alarms only support hour, minute, and seconds fields.
  189. * Some also support day and month, for alarms up to a year in
  190. * the future.
  191. */
  192. spin_lock_irq(&rtc_lock);
  193. t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
  194. t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
  195. t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
  196. if (cmos->day_alrm) {
  197. /* ignore upper bits on readback per ACPI spec */
  198. t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
  199. if (!t->time.tm_mday)
  200. t->time.tm_mday = -1;
  201. if (cmos->mon_alrm) {
  202. t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
  203. if (!t->time.tm_mon)
  204. t->time.tm_mon = -1;
  205. }
  206. }
  207. rtc_control = CMOS_READ(RTC_CONTROL);
  208. spin_unlock_irq(&rtc_lock);
  209. if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
  210. if (((unsigned)t->time.tm_sec) < 0x60)
  211. t->time.tm_sec = bcd2bin(t->time.tm_sec);
  212. else
  213. t->time.tm_sec = -1;
  214. if (((unsigned)t->time.tm_min) < 0x60)
  215. t->time.tm_min = bcd2bin(t->time.tm_min);
  216. else
  217. t->time.tm_min = -1;
  218. if (((unsigned)t->time.tm_hour) < 0x24)
  219. t->time.tm_hour = bcd2bin(t->time.tm_hour);
  220. else
  221. t->time.tm_hour = -1;
  222. if (cmos->day_alrm) {
  223. if (((unsigned)t->time.tm_mday) <= 0x31)
  224. t->time.tm_mday = bcd2bin(t->time.tm_mday);
  225. else
  226. t->time.tm_mday = -1;
  227. if (cmos->mon_alrm) {
  228. if (((unsigned)t->time.tm_mon) <= 0x12)
  229. t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
  230. else
  231. t->time.tm_mon = -1;
  232. }
  233. }
  234. }
  235. t->enabled = !!(rtc_control & RTC_AIE);
  236. t->pending = 0;
  237. return 0;
  238. }
  239. static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
  240. {
  241. unsigned char rtc_intr;
  242. /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
  243. * allegedly some older rtcs need that to handle irqs properly
  244. */
  245. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  246. if (is_hpet_enabled())
  247. return;
  248. rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  249. if (is_intr(rtc_intr))
  250. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  251. }
  252. static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
  253. {
  254. unsigned char rtc_control;
  255. /* flush any pending IRQ status, notably for update irqs,
  256. * before we enable new IRQs
  257. */
  258. rtc_control = CMOS_READ(RTC_CONTROL);
  259. cmos_checkintr(cmos, rtc_control);
  260. rtc_control |= mask;
  261. CMOS_WRITE(rtc_control, RTC_CONTROL);
  262. hpet_set_rtc_irq_bit(mask);
  263. cmos_checkintr(cmos, rtc_control);
  264. }
  265. static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
  266. {
  267. unsigned char rtc_control;
  268. rtc_control = CMOS_READ(RTC_CONTROL);
  269. rtc_control &= ~mask;
  270. CMOS_WRITE(rtc_control, RTC_CONTROL);
  271. hpet_mask_rtc_irq_bit(mask);
  272. cmos_checkintr(cmos, rtc_control);
  273. }
  274. static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
  275. {
  276. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  277. struct rtc_time now;
  278. cmos_read_time(dev, &now);
  279. if (!cmos->day_alrm) {
  280. time64_t t_max_date;
  281. time64_t t_alrm;
  282. t_max_date = rtc_tm_to_time64(&now);
  283. t_max_date += 24 * 60 * 60 - 1;
  284. t_alrm = rtc_tm_to_time64(&t->time);
  285. if (t_alrm > t_max_date) {
  286. dev_err(dev,
  287. "Alarms can be up to one day in the future\n");
  288. return -EINVAL;
  289. }
  290. } else if (!cmos->mon_alrm) {
  291. struct rtc_time max_date = now;
  292. time64_t t_max_date;
  293. time64_t t_alrm;
  294. int max_mday;
  295. if (max_date.tm_mon == 11) {
  296. max_date.tm_mon = 0;
  297. max_date.tm_year += 1;
  298. } else {
  299. max_date.tm_mon += 1;
  300. }
  301. max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
  302. if (max_date.tm_mday > max_mday)
  303. max_date.tm_mday = max_mday;
  304. t_max_date = rtc_tm_to_time64(&max_date);
  305. t_max_date -= 1;
  306. t_alrm = rtc_tm_to_time64(&t->time);
  307. if (t_alrm > t_max_date) {
  308. dev_err(dev,
  309. "Alarms can be up to one month in the future\n");
  310. return -EINVAL;
  311. }
  312. } else {
  313. struct rtc_time max_date = now;
  314. time64_t t_max_date;
  315. time64_t t_alrm;
  316. int max_mday;
  317. max_date.tm_year += 1;
  318. max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
  319. if (max_date.tm_mday > max_mday)
  320. max_date.tm_mday = max_mday;
  321. t_max_date = rtc_tm_to_time64(&max_date);
  322. t_max_date -= 1;
  323. t_alrm = rtc_tm_to_time64(&t->time);
  324. if (t_alrm > t_max_date) {
  325. dev_err(dev,
  326. "Alarms can be up to one year in the future\n");
  327. return -EINVAL;
  328. }
  329. }
  330. return 0;
  331. }
  332. static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  333. {
  334. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  335. unsigned char mon, mday, hrs, min, sec, rtc_control;
  336. int ret;
  337. if (!is_valid_irq(cmos->irq))
  338. return -EIO;
  339. ret = cmos_validate_alarm(dev, t);
  340. if (ret < 0)
  341. return ret;
  342. mon = t->time.tm_mon + 1;
  343. mday = t->time.tm_mday;
  344. hrs = t->time.tm_hour;
  345. min = t->time.tm_min;
  346. sec = t->time.tm_sec;
  347. rtc_control = CMOS_READ(RTC_CONTROL);
  348. if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
  349. /* Writing 0xff means "don't care" or "match all". */
  350. mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
  351. mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
  352. hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
  353. min = (min < 60) ? bin2bcd(min) : 0xff;
  354. sec = (sec < 60) ? bin2bcd(sec) : 0xff;
  355. }
  356. spin_lock_irq(&rtc_lock);
  357. /* next rtc irq must not be from previous alarm setting */
  358. cmos_irq_disable(cmos, RTC_AIE);
  359. /* update alarm */
  360. CMOS_WRITE(hrs, RTC_HOURS_ALARM);
  361. CMOS_WRITE(min, RTC_MINUTES_ALARM);
  362. CMOS_WRITE(sec, RTC_SECONDS_ALARM);
  363. /* the system may support an "enhanced" alarm */
  364. if (cmos->day_alrm) {
  365. CMOS_WRITE(mday, cmos->day_alrm);
  366. if (cmos->mon_alrm)
  367. CMOS_WRITE(mon, cmos->mon_alrm);
  368. }
  369. /* FIXME the HPET alarm glue currently ignores day_alrm
  370. * and mon_alrm ...
  371. */
  372. hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
  373. if (t->enabled)
  374. cmos_irq_enable(cmos, RTC_AIE);
  375. spin_unlock_irq(&rtc_lock);
  376. cmos->alarm_expires = rtc_tm_to_time64(&t->time);
  377. return 0;
  378. }
  379. static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
  380. {
  381. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  382. unsigned long flags;
  383. if (!is_valid_irq(cmos->irq))
  384. return -EINVAL;
  385. spin_lock_irqsave(&rtc_lock, flags);
  386. if (enabled)
  387. cmos_irq_enable(cmos, RTC_AIE);
  388. else
  389. cmos_irq_disable(cmos, RTC_AIE);
  390. spin_unlock_irqrestore(&rtc_lock, flags);
  391. return 0;
  392. }
  393. #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
  394. static int cmos_procfs(struct device *dev, struct seq_file *seq)
  395. {
  396. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  397. unsigned char rtc_control, valid;
  398. spin_lock_irq(&rtc_lock);
  399. rtc_control = CMOS_READ(RTC_CONTROL);
  400. valid = CMOS_READ(RTC_VALID);
  401. spin_unlock_irq(&rtc_lock);
  402. /* NOTE: at least ICH6 reports battery status using a different
  403. * (non-RTC) bit; and SQWE is ignored on many current systems.
  404. */
  405. seq_printf(seq,
  406. "periodic_IRQ\t: %s\n"
  407. "update_IRQ\t: %s\n"
  408. "HPET_emulated\t: %s\n"
  409. // "square_wave\t: %s\n"
  410. "BCD\t\t: %s\n"
  411. "DST_enable\t: %s\n"
  412. "periodic_freq\t: %d\n"
  413. "batt_status\t: %s\n",
  414. (rtc_control & RTC_PIE) ? "yes" : "no",
  415. (rtc_control & RTC_UIE) ? "yes" : "no",
  416. is_hpet_enabled() ? "yes" : "no",
  417. // (rtc_control & RTC_SQWE) ? "yes" : "no",
  418. (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
  419. (rtc_control & RTC_DST_EN) ? "yes" : "no",
  420. cmos->rtc->irq_freq,
  421. (valid & RTC_VRT) ? "okay" : "dead");
  422. return 0;
  423. }
  424. #else
  425. #define cmos_procfs NULL
  426. #endif
  427. static const struct rtc_class_ops cmos_rtc_ops = {
  428. .read_time = cmos_read_time,
  429. .set_time = cmos_set_time,
  430. .read_alarm = cmos_read_alarm,
  431. .set_alarm = cmos_set_alarm,
  432. .proc = cmos_procfs,
  433. .alarm_irq_enable = cmos_alarm_irq_enable,
  434. };
  435. /*----------------------------------------------------------------*/
  436. /*
  437. * All these chips have at least 64 bytes of address space, shared by
  438. * RTC registers and NVRAM. Most of those bytes of NVRAM are used
  439. * by boot firmware. Modern chips have 128 or 256 bytes.
  440. */
  441. #define NVRAM_OFFSET (RTC_REG_D + 1)
  442. static ssize_t
  443. cmos_nvram_read(struct file *filp, struct kobject *kobj,
  444. struct bin_attribute *attr,
  445. char *buf, loff_t off, size_t count)
  446. {
  447. int retval;
  448. off += NVRAM_OFFSET;
  449. spin_lock_irq(&rtc_lock);
  450. for (retval = 0; count; count--, off++, retval++) {
  451. if (off < 128)
  452. *buf++ = CMOS_READ(off);
  453. else if (can_bank2)
  454. *buf++ = cmos_read_bank2(off);
  455. else
  456. break;
  457. }
  458. spin_unlock_irq(&rtc_lock);
  459. return retval;
  460. }
  461. static ssize_t
  462. cmos_nvram_write(struct file *filp, struct kobject *kobj,
  463. struct bin_attribute *attr,
  464. char *buf, loff_t off, size_t count)
  465. {
  466. struct cmos_rtc *cmos;
  467. int retval;
  468. cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
  469. /* NOTE: on at least PCs and Ataris, the boot firmware uses a
  470. * checksum on part of the NVRAM data. That's currently ignored
  471. * here. If userspace is smart enough to know what fields of
  472. * NVRAM to update, updating checksums is also part of its job.
  473. */
  474. off += NVRAM_OFFSET;
  475. spin_lock_irq(&rtc_lock);
  476. for (retval = 0; count; count--, off++, retval++) {
  477. /* don't trash RTC registers */
  478. if (off == cmos->day_alrm
  479. || off == cmos->mon_alrm
  480. || off == cmos->century)
  481. buf++;
  482. else if (off < 128)
  483. CMOS_WRITE(*buf++, off);
  484. else if (can_bank2)
  485. cmos_write_bank2(*buf++, off);
  486. else
  487. break;
  488. }
  489. spin_unlock_irq(&rtc_lock);
  490. return retval;
  491. }
  492. static struct bin_attribute nvram = {
  493. .attr = {
  494. .name = "nvram",
  495. .mode = S_IRUGO | S_IWUSR,
  496. },
  497. .read = cmos_nvram_read,
  498. .write = cmos_nvram_write,
  499. /* size gets set up later */
  500. };
  501. /*----------------------------------------------------------------*/
  502. static struct cmos_rtc cmos_rtc;
  503. static irqreturn_t cmos_interrupt(int irq, void *p)
  504. {
  505. u8 irqstat;
  506. u8 rtc_control;
  507. spin_lock(&rtc_lock);
  508. /* When the HPET interrupt handler calls us, the interrupt
  509. * status is passed as arg1 instead of the irq number. But
  510. * always clear irq status, even when HPET is in the way.
  511. *
  512. * Note that HPET and RTC are almost certainly out of phase,
  513. * giving different IRQ status ...
  514. */
  515. irqstat = CMOS_READ(RTC_INTR_FLAGS);
  516. rtc_control = CMOS_READ(RTC_CONTROL);
  517. if (is_hpet_enabled())
  518. irqstat = (unsigned long)irq & 0xF0;
  519. /* If we were suspended, RTC_CONTROL may not be accurate since the
  520. * bios may have cleared it.
  521. */
  522. if (!cmos_rtc.suspend_ctrl)
  523. irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
  524. else
  525. irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
  526. /* All Linux RTC alarms should be treated as if they were oneshot.
  527. * Similar code may be needed in system wakeup paths, in case the
  528. * alarm woke the system.
  529. */
  530. if (irqstat & RTC_AIE) {
  531. cmos_rtc.suspend_ctrl &= ~RTC_AIE;
  532. rtc_control &= ~RTC_AIE;
  533. CMOS_WRITE(rtc_control, RTC_CONTROL);
  534. hpet_mask_rtc_irq_bit(RTC_AIE);
  535. CMOS_READ(RTC_INTR_FLAGS);
  536. }
  537. spin_unlock(&rtc_lock);
  538. if (is_intr(irqstat)) {
  539. rtc_update_irq(p, 1, irqstat);
  540. return IRQ_HANDLED;
  541. } else
  542. return IRQ_NONE;
  543. }
  544. #ifdef CONFIG_PNP
  545. #define INITSECTION
  546. #else
  547. #define INITSECTION __init
  548. #endif
  549. static int INITSECTION
  550. cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
  551. {
  552. struct cmos_rtc_board_info *info = dev_get_platdata(dev);
  553. int retval = 0;
  554. unsigned char rtc_control;
  555. unsigned address_space;
  556. u32 flags = 0;
  557. /* there can be only one ... */
  558. if (cmos_rtc.dev)
  559. return -EBUSY;
  560. if (!ports)
  561. return -ENODEV;
  562. /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
  563. *
  564. * REVISIT non-x86 systems may instead use memory space resources
  565. * (needing ioremap etc), not i/o space resources like this ...
  566. */
  567. if (RTC_IOMAPPED)
  568. ports = request_region(ports->start, resource_size(ports),
  569. driver_name);
  570. else
  571. ports = request_mem_region(ports->start, resource_size(ports),
  572. driver_name);
  573. if (!ports) {
  574. dev_dbg(dev, "i/o registers already in use\n");
  575. return -EBUSY;
  576. }
  577. cmos_rtc.irq = rtc_irq;
  578. cmos_rtc.iomem = ports;
  579. /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
  580. * driver did, but don't reject unknown configs. Old hardware
  581. * won't address 128 bytes. Newer chips have multiple banks,
  582. * though they may not be listed in one I/O resource.
  583. */
  584. #if defined(CONFIG_ATARI)
  585. address_space = 64;
  586. #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
  587. || defined(__sparc__) || defined(__mips__) \
  588. || defined(__powerpc__) || defined(CONFIG_MN10300)
  589. address_space = 128;
  590. #else
  591. #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
  592. address_space = 128;
  593. #endif
  594. if (can_bank2 && ports->end > (ports->start + 1))
  595. address_space = 256;
  596. /* For ACPI systems extension info comes from the FADT. On others,
  597. * board specific setup provides it as appropriate. Systems where
  598. * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
  599. * some almost-clones) can provide hooks to make that behave.
  600. *
  601. * Note that ACPI doesn't preclude putting these registers into
  602. * "extended" areas of the chip, including some that we won't yet
  603. * expect CMOS_READ and friends to handle.
  604. */
  605. if (info) {
  606. if (info->flags)
  607. flags = info->flags;
  608. if (info->address_space)
  609. address_space = info->address_space;
  610. if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
  611. cmos_rtc.day_alrm = info->rtc_day_alarm;
  612. if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
  613. cmos_rtc.mon_alrm = info->rtc_mon_alarm;
  614. if (info->rtc_century && info->rtc_century < 128)
  615. cmos_rtc.century = info->rtc_century;
  616. if (info->wake_on && info->wake_off) {
  617. cmos_rtc.wake_on = info->wake_on;
  618. cmos_rtc.wake_off = info->wake_off;
  619. }
  620. }
  621. cmos_rtc.dev = dev;
  622. dev_set_drvdata(dev, &cmos_rtc);
  623. cmos_rtc.rtc = rtc_device_register(driver_name, dev,
  624. &cmos_rtc_ops, THIS_MODULE);
  625. if (IS_ERR(cmos_rtc.rtc)) {
  626. retval = PTR_ERR(cmos_rtc.rtc);
  627. goto cleanup0;
  628. }
  629. rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
  630. spin_lock_irq(&rtc_lock);
  631. if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
  632. /* force periodic irq to CMOS reset default of 1024Hz;
  633. *
  634. * REVISIT it's been reported that at least one x86_64 ALI
  635. * mobo doesn't use 32KHz here ... for portability we might
  636. * need to do something about other clock frequencies.
  637. */
  638. cmos_rtc.rtc->irq_freq = 1024;
  639. hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
  640. CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
  641. }
  642. /* disable irqs */
  643. if (is_valid_irq(rtc_irq))
  644. cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
  645. rtc_control = CMOS_READ(RTC_CONTROL);
  646. spin_unlock_irq(&rtc_lock);
  647. if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
  648. dev_warn(dev, "only 24-hr supported\n");
  649. retval = -ENXIO;
  650. goto cleanup1;
  651. }
  652. hpet_rtc_timer_init();
  653. if (is_valid_irq(rtc_irq)) {
  654. irq_handler_t rtc_cmos_int_handler;
  655. if (is_hpet_enabled()) {
  656. rtc_cmos_int_handler = hpet_rtc_interrupt;
  657. retval = hpet_register_irq_handler(cmos_interrupt);
  658. if (retval) {
  659. hpet_mask_rtc_irq_bit(RTC_IRQMASK);
  660. dev_warn(dev, "hpet_register_irq_handler "
  661. " failed in rtc_init().");
  662. goto cleanup1;
  663. }
  664. } else
  665. rtc_cmos_int_handler = cmos_interrupt;
  666. retval = request_irq(rtc_irq, rtc_cmos_int_handler,
  667. IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev),
  668. cmos_rtc.rtc);
  669. if (retval < 0) {
  670. dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
  671. goto cleanup1;
  672. }
  673. }
  674. /* export at least the first block of NVRAM */
  675. nvram.size = address_space - NVRAM_OFFSET;
  676. retval = sysfs_create_bin_file(&dev->kobj, &nvram);
  677. if (retval < 0) {
  678. dev_dbg(dev, "can't create nvram file? %d\n", retval);
  679. goto cleanup2;
  680. }
  681. dev_info(dev, "%s%s, %zd bytes nvram%s\n",
  682. !is_valid_irq(rtc_irq) ? "no alarms" :
  683. cmos_rtc.mon_alrm ? "alarms up to one year" :
  684. cmos_rtc.day_alrm ? "alarms up to one month" :
  685. "alarms up to one day",
  686. cmos_rtc.century ? ", y3k" : "",
  687. nvram.size,
  688. is_hpet_enabled() ? ", hpet irqs" : "");
  689. return 0;
  690. cleanup2:
  691. if (is_valid_irq(rtc_irq))
  692. free_irq(rtc_irq, cmos_rtc.rtc);
  693. cleanup1:
  694. cmos_rtc.dev = NULL;
  695. rtc_device_unregister(cmos_rtc.rtc);
  696. cleanup0:
  697. if (RTC_IOMAPPED)
  698. release_region(ports->start, resource_size(ports));
  699. else
  700. release_mem_region(ports->start, resource_size(ports));
  701. return retval;
  702. }
  703. static void cmos_do_shutdown(int rtc_irq)
  704. {
  705. spin_lock_irq(&rtc_lock);
  706. if (is_valid_irq(rtc_irq))
  707. cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
  708. spin_unlock_irq(&rtc_lock);
  709. }
  710. static void cmos_do_remove(struct device *dev)
  711. {
  712. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  713. struct resource *ports;
  714. cmos_do_shutdown(cmos->irq);
  715. sysfs_remove_bin_file(&dev->kobj, &nvram);
  716. if (is_valid_irq(cmos->irq)) {
  717. free_irq(cmos->irq, cmos->rtc);
  718. hpet_unregister_irq_handler(cmos_interrupt);
  719. }
  720. rtc_device_unregister(cmos->rtc);
  721. cmos->rtc = NULL;
  722. ports = cmos->iomem;
  723. if (RTC_IOMAPPED)
  724. release_region(ports->start, resource_size(ports));
  725. else
  726. release_mem_region(ports->start, resource_size(ports));
  727. cmos->iomem = NULL;
  728. cmos->dev = NULL;
  729. }
  730. static int cmos_aie_poweroff(struct device *dev)
  731. {
  732. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  733. struct rtc_time now;
  734. time64_t t_now;
  735. int retval = 0;
  736. unsigned char rtc_control;
  737. if (!cmos->alarm_expires)
  738. return -EINVAL;
  739. spin_lock_irq(&rtc_lock);
  740. rtc_control = CMOS_READ(RTC_CONTROL);
  741. spin_unlock_irq(&rtc_lock);
  742. /* We only care about the situation where AIE is disabled. */
  743. if (rtc_control & RTC_AIE)
  744. return -EBUSY;
  745. cmos_read_time(dev, &now);
  746. t_now = rtc_tm_to_time64(&now);
  747. /*
  748. * When enabling "RTC wake-up" in BIOS setup, the machine reboots
  749. * automatically right after shutdown on some buggy boxes.
  750. * This automatic rebooting issue won't happen when the alarm
  751. * time is larger than now+1 seconds.
  752. *
  753. * If the alarm time is equal to now+1 seconds, the issue can be
  754. * prevented by cancelling the alarm.
  755. */
  756. if (cmos->alarm_expires == t_now + 1) {
  757. struct rtc_wkalrm alarm;
  758. /* Cancel the AIE timer by configuring the past time. */
  759. rtc_time64_to_tm(t_now - 1, &alarm.time);
  760. alarm.enabled = 0;
  761. retval = cmos_set_alarm(dev, &alarm);
  762. } else if (cmos->alarm_expires > t_now + 1) {
  763. retval = -EBUSY;
  764. }
  765. return retval;
  766. }
  767. static int cmos_suspend(struct device *dev)
  768. {
  769. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  770. unsigned char tmp;
  771. /* only the alarm might be a wakeup event source */
  772. spin_lock_irq(&rtc_lock);
  773. cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
  774. if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
  775. unsigned char mask;
  776. if (device_may_wakeup(dev))
  777. mask = RTC_IRQMASK & ~RTC_AIE;
  778. else
  779. mask = RTC_IRQMASK;
  780. tmp &= ~mask;
  781. CMOS_WRITE(tmp, RTC_CONTROL);
  782. hpet_mask_rtc_irq_bit(mask);
  783. cmos_checkintr(cmos, tmp);
  784. }
  785. spin_unlock_irq(&rtc_lock);
  786. if (tmp & RTC_AIE) {
  787. cmos->enabled_wake = 1;
  788. if (cmos->wake_on)
  789. cmos->wake_on(dev);
  790. else
  791. enable_irq_wake(cmos->irq);
  792. }
  793. cmos_read_alarm(dev, &cmos->saved_wkalrm);
  794. dev_dbg(dev, "suspend%s, ctrl %02x\n",
  795. (tmp & RTC_AIE) ? ", alarm may wake" : "",
  796. tmp);
  797. return 0;
  798. }
  799. /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
  800. * after a detour through G3 "mechanical off", although the ACPI spec
  801. * says wakeup should only work from G1/S4 "hibernate". To most users,
  802. * distinctions between S4 and S5 are pointless. So when the hardware
  803. * allows, don't draw that distinction.
  804. */
  805. static inline int cmos_poweroff(struct device *dev)
  806. {
  807. if (!IS_ENABLED(CONFIG_PM))
  808. return -ENOSYS;
  809. return cmos_suspend(dev);
  810. }
  811. static void cmos_check_wkalrm(struct device *dev)
  812. {
  813. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  814. struct rtc_wkalrm current_alarm;
  815. time64_t t_current_expires;
  816. time64_t t_saved_expires;
  817. cmos_read_alarm(dev, &current_alarm);
  818. t_current_expires = rtc_tm_to_time64(&current_alarm.time);
  819. t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
  820. if (t_current_expires != t_saved_expires ||
  821. cmos->saved_wkalrm.enabled != current_alarm.enabled) {
  822. cmos_set_alarm(dev, &cmos->saved_wkalrm);
  823. }
  824. }
  825. static void cmos_check_acpi_rtc_status(struct device *dev,
  826. unsigned char *rtc_control);
  827. static int __maybe_unused cmos_resume(struct device *dev)
  828. {
  829. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  830. unsigned char tmp;
  831. if (cmos->enabled_wake) {
  832. if (cmos->wake_off)
  833. cmos->wake_off(dev);
  834. else
  835. disable_irq_wake(cmos->irq);
  836. cmos->enabled_wake = 0;
  837. }
  838. /* The BIOS might have changed the alarm, restore it */
  839. cmos_check_wkalrm(dev);
  840. spin_lock_irq(&rtc_lock);
  841. tmp = cmos->suspend_ctrl;
  842. cmos->suspend_ctrl = 0;
  843. /* re-enable any irqs previously active */
  844. if (tmp & RTC_IRQMASK) {
  845. unsigned char mask;
  846. if (device_may_wakeup(dev))
  847. hpet_rtc_timer_init();
  848. do {
  849. CMOS_WRITE(tmp, RTC_CONTROL);
  850. hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
  851. mask = CMOS_READ(RTC_INTR_FLAGS);
  852. mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
  853. if (!is_hpet_enabled() || !is_intr(mask))
  854. break;
  855. /* force one-shot behavior if HPET blocked
  856. * the wake alarm's irq
  857. */
  858. rtc_update_irq(cmos->rtc, 1, mask);
  859. tmp &= ~RTC_AIE;
  860. hpet_mask_rtc_irq_bit(RTC_AIE);
  861. } while (mask & RTC_AIE);
  862. if (tmp & RTC_AIE)
  863. cmos_check_acpi_rtc_status(dev, &tmp);
  864. }
  865. spin_unlock_irq(&rtc_lock);
  866. dev_dbg(dev, "resume, ctrl %02x\n", tmp);
  867. return 0;
  868. }
  869. static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
  870. /*----------------------------------------------------------------*/
  871. /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
  872. * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
  873. * probably list them in similar PNPBIOS tables; so PNP is more common.
  874. *
  875. * We don't use legacy "poke at the hardware" probing. Ancient PCs that
  876. * predate even PNPBIOS should set up platform_bus devices.
  877. */
  878. #ifdef CONFIG_ACPI
  879. #include <linux/acpi.h>
  880. static u32 rtc_handler(void *context)
  881. {
  882. struct device *dev = context;
  883. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  884. unsigned char rtc_control = 0;
  885. unsigned char rtc_intr;
  886. unsigned long flags;
  887. spin_lock_irqsave(&rtc_lock, flags);
  888. if (cmos_rtc.suspend_ctrl)
  889. rtc_control = CMOS_READ(RTC_CONTROL);
  890. if (rtc_control & RTC_AIE) {
  891. cmos_rtc.suspend_ctrl &= ~RTC_AIE;
  892. CMOS_WRITE(rtc_control, RTC_CONTROL);
  893. rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
  894. rtc_update_irq(cmos->rtc, 1, rtc_intr);
  895. }
  896. spin_unlock_irqrestore(&rtc_lock, flags);
  897. pm_wakeup_hard_event(dev);
  898. acpi_clear_event(ACPI_EVENT_RTC);
  899. acpi_disable_event(ACPI_EVENT_RTC, 0);
  900. return ACPI_INTERRUPT_HANDLED;
  901. }
  902. static inline void rtc_wake_setup(struct device *dev)
  903. {
  904. acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
  905. /*
  906. * After the RTC handler is installed, the Fixed_RTC event should
  907. * be disabled. Only when the RTC alarm is set will it be enabled.
  908. */
  909. acpi_clear_event(ACPI_EVENT_RTC);
  910. acpi_disable_event(ACPI_EVENT_RTC, 0);
  911. }
  912. static void rtc_wake_on(struct device *dev)
  913. {
  914. acpi_clear_event(ACPI_EVENT_RTC);
  915. acpi_enable_event(ACPI_EVENT_RTC, 0);
  916. }
  917. static void rtc_wake_off(struct device *dev)
  918. {
  919. acpi_disable_event(ACPI_EVENT_RTC, 0);
  920. }
  921. /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
  922. * its device node and pass extra config data. This helps its driver use
  923. * capabilities that the now-obsolete mc146818 didn't have, and informs it
  924. * that this board's RTC is wakeup-capable (per ACPI spec).
  925. */
  926. static struct cmos_rtc_board_info acpi_rtc_info;
  927. static void cmos_wake_setup(struct device *dev)
  928. {
  929. if (acpi_disabled)
  930. return;
  931. rtc_wake_setup(dev);
  932. acpi_rtc_info.wake_on = rtc_wake_on;
  933. acpi_rtc_info.wake_off = rtc_wake_off;
  934. /* workaround bug in some ACPI tables */
  935. if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
  936. dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
  937. acpi_gbl_FADT.month_alarm);
  938. acpi_gbl_FADT.month_alarm = 0;
  939. }
  940. acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
  941. acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
  942. acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
  943. /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
  944. if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
  945. dev_info(dev, "RTC can wake from S4\n");
  946. dev->platform_data = &acpi_rtc_info;
  947. /* RTC always wakes from S1/S2/S3, and often S4/STD */
  948. device_init_wakeup(dev, 1);
  949. }
  950. static void cmos_check_acpi_rtc_status(struct device *dev,
  951. unsigned char *rtc_control)
  952. {
  953. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  954. acpi_event_status rtc_status;
  955. acpi_status status;
  956. if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
  957. return;
  958. status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
  959. if (ACPI_FAILURE(status)) {
  960. dev_err(dev, "Could not get RTC status\n");
  961. } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
  962. unsigned char mask;
  963. *rtc_control &= ~RTC_AIE;
  964. CMOS_WRITE(*rtc_control, RTC_CONTROL);
  965. mask = CMOS_READ(RTC_INTR_FLAGS);
  966. rtc_update_irq(cmos->rtc, 1, mask);
  967. }
  968. }
  969. #else
  970. static void cmos_wake_setup(struct device *dev)
  971. {
  972. }
  973. static void cmos_check_acpi_rtc_status(struct device *dev,
  974. unsigned char *rtc_control)
  975. {
  976. }
  977. #endif
  978. #ifdef CONFIG_PNP
  979. #include <linux/pnp.h>
  980. static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
  981. {
  982. cmos_wake_setup(&pnp->dev);
  983. if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
  984. unsigned int irq = 0;
  985. #ifdef CONFIG_X86
  986. /* Some machines contain a PNP entry for the RTC, but
  987. * don't define the IRQ. It should always be safe to
  988. * hardcode it on systems with a legacy PIC.
  989. */
  990. if (nr_legacy_irqs())
  991. irq = 8;
  992. #endif
  993. return cmos_do_probe(&pnp->dev,
  994. pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
  995. } else {
  996. return cmos_do_probe(&pnp->dev,
  997. pnp_get_resource(pnp, IORESOURCE_IO, 0),
  998. pnp_irq(pnp, 0));
  999. }
  1000. }
  1001. static void cmos_pnp_remove(struct pnp_dev *pnp)
  1002. {
  1003. cmos_do_remove(&pnp->dev);
  1004. }
  1005. static void cmos_pnp_shutdown(struct pnp_dev *pnp)
  1006. {
  1007. struct device *dev = &pnp->dev;
  1008. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1009. if (system_state == SYSTEM_POWER_OFF) {
  1010. int retval = cmos_poweroff(dev);
  1011. if (cmos_aie_poweroff(dev) < 0 && !retval)
  1012. return;
  1013. }
  1014. cmos_do_shutdown(cmos->irq);
  1015. }
  1016. static const struct pnp_device_id rtc_ids[] = {
  1017. { .id = "PNP0b00", },
  1018. { .id = "PNP0b01", },
  1019. { .id = "PNP0b02", },
  1020. { },
  1021. };
  1022. MODULE_DEVICE_TABLE(pnp, rtc_ids);
  1023. static struct pnp_driver cmos_pnp_driver = {
  1024. .name = (char *) driver_name,
  1025. .id_table = rtc_ids,
  1026. .probe = cmos_pnp_probe,
  1027. .remove = cmos_pnp_remove,
  1028. .shutdown = cmos_pnp_shutdown,
  1029. /* flag ensures resume() gets called, and stops syslog spam */
  1030. .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
  1031. .driver = {
  1032. .pm = &cmos_pm_ops,
  1033. },
  1034. };
  1035. #endif /* CONFIG_PNP */
  1036. #ifdef CONFIG_OF
  1037. static const struct of_device_id of_cmos_match[] = {
  1038. {
  1039. .compatible = "motorola,mc146818",
  1040. },
  1041. { },
  1042. };
  1043. MODULE_DEVICE_TABLE(of, of_cmos_match);
  1044. static __init void cmos_of_init(struct platform_device *pdev)
  1045. {
  1046. struct device_node *node = pdev->dev.of_node;
  1047. struct rtc_time time;
  1048. int ret;
  1049. const __be32 *val;
  1050. if (!node)
  1051. return;
  1052. val = of_get_property(node, "ctrl-reg", NULL);
  1053. if (val)
  1054. CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
  1055. val = of_get_property(node, "freq-reg", NULL);
  1056. if (val)
  1057. CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
  1058. cmos_read_time(&pdev->dev, &time);
  1059. ret = rtc_valid_tm(&time);
  1060. if (ret) {
  1061. struct rtc_time def_time = {
  1062. .tm_year = 1,
  1063. .tm_mday = 1,
  1064. };
  1065. cmos_set_time(&pdev->dev, &def_time);
  1066. }
  1067. }
  1068. #else
  1069. static inline void cmos_of_init(struct platform_device *pdev) {}
  1070. #endif
  1071. /*----------------------------------------------------------------*/
  1072. /* Platform setup should have set up an RTC device, when PNP is
  1073. * unavailable ... this could happen even on (older) PCs.
  1074. */
  1075. static int __init cmos_platform_probe(struct platform_device *pdev)
  1076. {
  1077. struct resource *resource;
  1078. int irq;
  1079. cmos_of_init(pdev);
  1080. cmos_wake_setup(&pdev->dev);
  1081. if (RTC_IOMAPPED)
  1082. resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1083. else
  1084. resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1085. irq = platform_get_irq(pdev, 0);
  1086. if (irq < 0)
  1087. irq = -1;
  1088. return cmos_do_probe(&pdev->dev, resource, irq);
  1089. }
  1090. static int cmos_platform_remove(struct platform_device *pdev)
  1091. {
  1092. cmos_do_remove(&pdev->dev);
  1093. return 0;
  1094. }
  1095. static void cmos_platform_shutdown(struct platform_device *pdev)
  1096. {
  1097. struct device *dev = &pdev->dev;
  1098. struct cmos_rtc *cmos = dev_get_drvdata(dev);
  1099. if (system_state == SYSTEM_POWER_OFF) {
  1100. int retval = cmos_poweroff(dev);
  1101. if (cmos_aie_poweroff(dev) < 0 && !retval)
  1102. return;
  1103. }
  1104. cmos_do_shutdown(cmos->irq);
  1105. }
  1106. /* work with hotplug and coldplug */
  1107. MODULE_ALIAS("platform:rtc_cmos");
  1108. static struct platform_driver cmos_platform_driver = {
  1109. .remove = cmos_platform_remove,
  1110. .shutdown = cmos_platform_shutdown,
  1111. .driver = {
  1112. .name = driver_name,
  1113. .pm = &cmos_pm_ops,
  1114. .of_match_table = of_match_ptr(of_cmos_match),
  1115. }
  1116. };
  1117. #ifdef CONFIG_PNP
  1118. static bool pnp_driver_registered;
  1119. #endif
  1120. static bool platform_driver_registered;
  1121. static int __init cmos_init(void)
  1122. {
  1123. int retval = 0;
  1124. #ifdef CONFIG_PNP
  1125. retval = pnp_register_driver(&cmos_pnp_driver);
  1126. if (retval == 0)
  1127. pnp_driver_registered = true;
  1128. #endif
  1129. if (!cmos_rtc.dev) {
  1130. retval = platform_driver_probe(&cmos_platform_driver,
  1131. cmos_platform_probe);
  1132. if (retval == 0)
  1133. platform_driver_registered = true;
  1134. }
  1135. if (retval == 0)
  1136. return 0;
  1137. #ifdef CONFIG_PNP
  1138. if (pnp_driver_registered)
  1139. pnp_unregister_driver(&cmos_pnp_driver);
  1140. #endif
  1141. return retval;
  1142. }
  1143. module_init(cmos_init);
  1144. static void __exit cmos_exit(void)
  1145. {
  1146. #ifdef CONFIG_PNP
  1147. if (pnp_driver_registered)
  1148. pnp_unregister_driver(&cmos_pnp_driver);
  1149. #endif
  1150. if (platform_driver_registered)
  1151. platform_driver_unregister(&cmos_platform_driver);
  1152. }
  1153. module_exit(cmos_exit);
  1154. MODULE_AUTHOR("David Brownell");
  1155. MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
  1156. MODULE_LICENSE("GPL");