nvme.h 10 KB

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  1. /*
  2. * Copyright (c) 2011-2014, Intel Corporation.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. */
  13. #ifndef _NVME_H
  14. #define _NVME_H
  15. #include <linux/nvme.h>
  16. #include <linux/pci.h>
  17. #include <linux/kref.h>
  18. #include <linux/blk-mq.h>
  19. #include <linux/lightnvm.h>
  20. #include <linux/sed-opal.h>
  21. extern unsigned char nvme_io_timeout;
  22. #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  23. extern unsigned char admin_timeout;
  24. #define ADMIN_TIMEOUT (admin_timeout * HZ)
  25. #define NVME_DEFAULT_KATO 5
  26. #define NVME_KATO_GRACE 10
  27. extern struct workqueue_struct *nvme_wq;
  28. enum {
  29. NVME_NS_LBA = 0,
  30. NVME_NS_LIGHTNVM = 1,
  31. };
  32. /*
  33. * List of workarounds for devices that required behavior not specified in
  34. * the standard.
  35. */
  36. enum nvme_quirks {
  37. /*
  38. * Prefers I/O aligned to a stripe size specified in a vendor
  39. * specific Identify field.
  40. */
  41. NVME_QUIRK_STRIPE_SIZE = (1 << 0),
  42. /*
  43. * The controller doesn't handle Identify value others than 0 or 1
  44. * correctly.
  45. */
  46. NVME_QUIRK_IDENTIFY_CNS = (1 << 1),
  47. /*
  48. * The controller deterministically returns O's on reads to
  49. * logical blocks that deallocate was called on.
  50. */
  51. NVME_QUIRK_DEALLOCATE_ZEROES = (1 << 2),
  52. /*
  53. * The controller needs a delay before starts checking the device
  54. * readiness, which is done by reading the NVME_CSTS_RDY bit.
  55. */
  56. NVME_QUIRK_DELAY_BEFORE_CHK_RDY = (1 << 3),
  57. /*
  58. * APST should not be used.
  59. */
  60. NVME_QUIRK_NO_APST = (1 << 4),
  61. /*
  62. * The deepest sleep state should not be used.
  63. */
  64. NVME_QUIRK_NO_DEEPEST_PS = (1 << 5),
  65. };
  66. /*
  67. * Common request structure for NVMe passthrough. All drivers must have
  68. * this structure as the first member of their request-private data.
  69. */
  70. struct nvme_request {
  71. struct nvme_command *cmd;
  72. union nvme_result result;
  73. u8 retries;
  74. u8 flags;
  75. u16 status;
  76. };
  77. enum {
  78. NVME_REQ_CANCELLED = (1 << 0),
  79. };
  80. static inline struct nvme_request *nvme_req(struct request *req)
  81. {
  82. return blk_mq_rq_to_pdu(req);
  83. }
  84. /* The below value is the specific amount of delay needed before checking
  85. * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
  86. * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
  87. * found empirically.
  88. */
  89. #define NVME_QUIRK_DELAY_AMOUNT 2000
  90. enum nvme_ctrl_state {
  91. NVME_CTRL_NEW,
  92. NVME_CTRL_LIVE,
  93. NVME_CTRL_RESETTING,
  94. NVME_CTRL_RECONNECTING,
  95. NVME_CTRL_DELETING,
  96. NVME_CTRL_DEAD,
  97. };
  98. struct nvme_ctrl {
  99. enum nvme_ctrl_state state;
  100. bool identified;
  101. spinlock_t lock;
  102. const struct nvme_ctrl_ops *ops;
  103. struct request_queue *admin_q;
  104. struct request_queue *connect_q;
  105. struct device *dev;
  106. struct kref kref;
  107. int instance;
  108. struct blk_mq_tag_set *tagset;
  109. struct list_head namespaces;
  110. struct mutex namespaces_mutex;
  111. struct device *device; /* char device */
  112. struct list_head node;
  113. struct ida ns_ida;
  114. struct work_struct reset_work;
  115. struct opal_dev *opal_dev;
  116. char name[12];
  117. char serial[20];
  118. char model[40];
  119. char firmware_rev[8];
  120. u16 cntlid;
  121. u32 ctrl_config;
  122. u32 page_size;
  123. u32 max_hw_sectors;
  124. u16 oncs;
  125. u16 vid;
  126. u16 oacs;
  127. atomic_t abort_limit;
  128. u8 event_limit;
  129. u8 vwc;
  130. u32 vs;
  131. u32 sgls;
  132. u16 kas;
  133. u8 npss;
  134. u8 apsta;
  135. unsigned int kato;
  136. bool subsystem;
  137. unsigned long quirks;
  138. struct nvme_id_power_state psd[32];
  139. struct work_struct scan_work;
  140. struct work_struct async_event_work;
  141. struct delayed_work ka_work;
  142. /* Power saving configuration */
  143. u64 ps_max_latency_us;
  144. u32 hmpre;
  145. u32 hmmin;
  146. /* Fabrics only */
  147. u16 sqsize;
  148. u32 ioccsz;
  149. u32 iorcsz;
  150. u16 icdoff;
  151. u16 maxcmd;
  152. int nr_reconnects;
  153. struct nvmf_ctrl_options *opts;
  154. };
  155. /*
  156. * An NVM Express namespace is equivalent to a SCSI LUN
  157. */
  158. struct nvme_ns {
  159. struct list_head list;
  160. struct nvme_ctrl *ctrl;
  161. struct request_queue *queue;
  162. struct gendisk *disk;
  163. struct nvm_dev *ndev;
  164. struct kref kref;
  165. int instance;
  166. u8 eui[8];
  167. u8 nguid[16];
  168. uuid_t uuid;
  169. unsigned ns_id;
  170. int lba_shift;
  171. u16 ms;
  172. bool ext;
  173. u8 pi_type;
  174. unsigned long flags;
  175. u16 noiob;
  176. #define NVME_NS_REMOVING 0
  177. #define NVME_NS_DEAD 1
  178. u64 mode_select_num_blocks;
  179. u32 mode_select_block_len;
  180. };
  181. struct nvme_ctrl_ops {
  182. const char *name;
  183. struct module *module;
  184. unsigned int flags;
  185. #define NVME_F_FABRICS (1 << 0)
  186. #define NVME_F_METADATA_SUPPORTED (1 << 1)
  187. int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
  188. int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
  189. int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
  190. void (*free_ctrl)(struct nvme_ctrl *ctrl);
  191. void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx);
  192. int (*delete_ctrl)(struct nvme_ctrl *ctrl);
  193. const char *(*get_subsysnqn)(struct nvme_ctrl *ctrl);
  194. int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
  195. };
  196. static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
  197. {
  198. u32 val = 0;
  199. if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
  200. return false;
  201. return val & NVME_CSTS_RDY;
  202. }
  203. static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
  204. {
  205. if (!ctrl->subsystem)
  206. return -ENOTTY;
  207. return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
  208. }
  209. static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
  210. {
  211. return (sector >> (ns->lba_shift - 9));
  212. }
  213. static inline void nvme_cleanup_cmd(struct request *req)
  214. {
  215. if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
  216. kfree(page_address(req->special_vec.bv_page) +
  217. req->special_vec.bv_offset);
  218. }
  219. }
  220. static inline void nvme_end_request(struct request *req, __le16 status,
  221. union nvme_result result)
  222. {
  223. struct nvme_request *rq = nvme_req(req);
  224. rq->status = le16_to_cpu(status) >> 1;
  225. rq->result = result;
  226. blk_mq_complete_request(req);
  227. }
  228. void nvme_complete_rq(struct request *req);
  229. void nvme_cancel_request(struct request *req, void *data, bool reserved);
  230. bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
  231. enum nvme_ctrl_state new_state);
  232. int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
  233. int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
  234. int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
  235. int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
  236. const struct nvme_ctrl_ops *ops, unsigned long quirks);
  237. void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
  238. void nvme_put_ctrl(struct nvme_ctrl *ctrl);
  239. int nvme_init_identify(struct nvme_ctrl *ctrl);
  240. void nvme_queue_scan(struct nvme_ctrl *ctrl);
  241. void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
  242. int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
  243. bool send);
  244. #define NVME_NR_AERS 1
  245. void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
  246. union nvme_result *res);
  247. void nvme_queue_async_events(struct nvme_ctrl *ctrl);
  248. void nvme_stop_queues(struct nvme_ctrl *ctrl);
  249. void nvme_start_queues(struct nvme_ctrl *ctrl);
  250. void nvme_kill_queues(struct nvme_ctrl *ctrl);
  251. void nvme_unfreeze(struct nvme_ctrl *ctrl);
  252. void nvme_wait_freeze(struct nvme_ctrl *ctrl);
  253. void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
  254. void nvme_start_freeze(struct nvme_ctrl *ctrl);
  255. #define NVME_QID_ANY -1
  256. struct request *nvme_alloc_request(struct request_queue *q,
  257. struct nvme_command *cmd, unsigned int flags, int qid);
  258. blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
  259. struct nvme_command *cmd);
  260. int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  261. void *buf, unsigned bufflen);
  262. int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  263. union nvme_result *result, void *buffer, unsigned bufflen,
  264. unsigned timeout, int qid, int at_head, int flags);
  265. int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
  266. void __user *ubuffer, unsigned bufflen, u32 *result,
  267. unsigned timeout);
  268. int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
  269. void __user *ubuffer, unsigned bufflen,
  270. void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
  271. u32 *result, unsigned timeout);
  272. int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id);
  273. int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
  274. struct nvme_id_ns **id);
  275. int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log);
  276. int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
  277. void *buffer, size_t buflen, u32 *result);
  278. int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
  279. void *buffer, size_t buflen, u32 *result);
  280. int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
  281. void nvme_start_keep_alive(struct nvme_ctrl *ctrl);
  282. void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
  283. int nvme_reset_ctrl(struct nvme_ctrl *ctrl);
  284. struct sg_io_hdr;
  285. int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr);
  286. int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg);
  287. int nvme_sg_get_version_num(int __user *ip);
  288. #ifdef CONFIG_NVM
  289. int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id);
  290. int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
  291. void nvme_nvm_unregister(struct nvme_ns *ns);
  292. int nvme_nvm_register_sysfs(struct nvme_ns *ns);
  293. void nvme_nvm_unregister_sysfs(struct nvme_ns *ns);
  294. int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
  295. #else
  296. static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
  297. int node)
  298. {
  299. return 0;
  300. }
  301. static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
  302. static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns)
  303. {
  304. return 0;
  305. }
  306. static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {};
  307. static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id)
  308. {
  309. return 0;
  310. }
  311. static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
  312. unsigned long arg)
  313. {
  314. return -ENOTTY;
  315. }
  316. #endif /* CONFIG_NVM */
  317. static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
  318. {
  319. return dev_to_disk(dev)->private_data;
  320. }
  321. int __init nvme_core_init(void);
  322. void nvme_core_exit(void);
  323. #endif /* _NVME_H */