qede_ethtool.c 46 KB

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  1. /* QLogic qede NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/version.h>
  33. #include <linux/types.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/etherdevice.h>
  36. #include <linux/ethtool.h>
  37. #include <linux/string.h>
  38. #include <linux/pci.h>
  39. #include <linux/capability.h>
  40. #include <linux/vmalloc.h>
  41. #include "qede.h"
  42. #include "qede_ptp.h"
  43. #define QEDE_RQSTAT_OFFSET(stat_name) \
  44. (offsetof(struct qede_rx_queue, stat_name))
  45. #define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
  46. #define QEDE_RQSTAT(stat_name) \
  47. {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
  48. #define QEDE_SELFTEST_POLL_COUNT 100
  49. static const struct {
  50. u64 offset;
  51. char string[ETH_GSTRING_LEN];
  52. } qede_rqstats_arr[] = {
  53. QEDE_RQSTAT(rcv_pkts),
  54. QEDE_RQSTAT(rx_hw_errors),
  55. QEDE_RQSTAT(rx_alloc_errors),
  56. QEDE_RQSTAT(rx_ip_frags),
  57. QEDE_RQSTAT(xdp_no_pass),
  58. };
  59. #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
  60. #define QEDE_TQSTAT_OFFSET(stat_name) \
  61. (offsetof(struct qede_tx_queue, stat_name))
  62. #define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
  63. #define QEDE_TQSTAT(stat_name) \
  64. {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
  65. #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
  66. static const struct {
  67. u64 offset;
  68. char string[ETH_GSTRING_LEN];
  69. } qede_tqstats_arr[] = {
  70. QEDE_TQSTAT(xmit_pkts),
  71. QEDE_TQSTAT(stopped_cnt),
  72. };
  73. #define QEDE_STAT_OFFSET(stat_name, type, base) \
  74. (offsetof(type, stat_name) + (base))
  75. #define QEDE_STAT_STRING(stat_name) (#stat_name)
  76. #define _QEDE_STAT(stat_name, type, base, attr) \
  77. {QEDE_STAT_OFFSET(stat_name, type, base), \
  78. QEDE_STAT_STRING(stat_name), \
  79. attr}
  80. #define QEDE_STAT(stat_name) \
  81. _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0)
  82. #define QEDE_PF_STAT(stat_name) \
  83. _QEDE_STAT(stat_name, struct qede_stats_common, 0, \
  84. BIT(QEDE_STAT_PF_ONLY))
  85. #define QEDE_PF_BB_STAT(stat_name) \
  86. _QEDE_STAT(stat_name, struct qede_stats_bb, \
  87. offsetof(struct qede_stats, bb), \
  88. BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY))
  89. #define QEDE_PF_AH_STAT(stat_name) \
  90. _QEDE_STAT(stat_name, struct qede_stats_ah, \
  91. offsetof(struct qede_stats, ah), \
  92. BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY))
  93. static const struct {
  94. u64 offset;
  95. char string[ETH_GSTRING_LEN];
  96. unsigned long attr;
  97. #define QEDE_STAT_PF_ONLY 0
  98. #define QEDE_STAT_BB_ONLY 1
  99. #define QEDE_STAT_AH_ONLY 2
  100. } qede_stats_arr[] = {
  101. QEDE_STAT(rx_ucast_bytes),
  102. QEDE_STAT(rx_mcast_bytes),
  103. QEDE_STAT(rx_bcast_bytes),
  104. QEDE_STAT(rx_ucast_pkts),
  105. QEDE_STAT(rx_mcast_pkts),
  106. QEDE_STAT(rx_bcast_pkts),
  107. QEDE_STAT(tx_ucast_bytes),
  108. QEDE_STAT(tx_mcast_bytes),
  109. QEDE_STAT(tx_bcast_bytes),
  110. QEDE_STAT(tx_ucast_pkts),
  111. QEDE_STAT(tx_mcast_pkts),
  112. QEDE_STAT(tx_bcast_pkts),
  113. QEDE_PF_STAT(rx_64_byte_packets),
  114. QEDE_PF_STAT(rx_65_to_127_byte_packets),
  115. QEDE_PF_STAT(rx_128_to_255_byte_packets),
  116. QEDE_PF_STAT(rx_256_to_511_byte_packets),
  117. QEDE_PF_STAT(rx_512_to_1023_byte_packets),
  118. QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
  119. QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets),
  120. QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets),
  121. QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets),
  122. QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets),
  123. QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets),
  124. QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets),
  125. QEDE_PF_STAT(tx_64_byte_packets),
  126. QEDE_PF_STAT(tx_65_to_127_byte_packets),
  127. QEDE_PF_STAT(tx_128_to_255_byte_packets),
  128. QEDE_PF_STAT(tx_256_to_511_byte_packets),
  129. QEDE_PF_STAT(tx_512_to_1023_byte_packets),
  130. QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
  131. QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets),
  132. QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets),
  133. QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets),
  134. QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets),
  135. QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets),
  136. QEDE_PF_STAT(rx_mac_crtl_frames),
  137. QEDE_PF_STAT(tx_mac_ctrl_frames),
  138. QEDE_PF_STAT(rx_pause_frames),
  139. QEDE_PF_STAT(tx_pause_frames),
  140. QEDE_PF_STAT(rx_pfc_frames),
  141. QEDE_PF_STAT(tx_pfc_frames),
  142. QEDE_PF_STAT(rx_crc_errors),
  143. QEDE_PF_STAT(rx_align_errors),
  144. QEDE_PF_STAT(rx_carrier_errors),
  145. QEDE_PF_STAT(rx_oversize_packets),
  146. QEDE_PF_STAT(rx_jabbers),
  147. QEDE_PF_STAT(rx_undersize_packets),
  148. QEDE_PF_STAT(rx_fragments),
  149. QEDE_PF_BB_STAT(tx_lpi_entry_count),
  150. QEDE_PF_BB_STAT(tx_total_collisions),
  151. QEDE_PF_STAT(brb_truncates),
  152. QEDE_PF_STAT(brb_discards),
  153. QEDE_STAT(no_buff_discards),
  154. QEDE_PF_STAT(mftag_filter_discards),
  155. QEDE_PF_STAT(mac_filter_discards),
  156. QEDE_STAT(tx_err_drop_pkts),
  157. QEDE_STAT(ttl0_discard),
  158. QEDE_STAT(packet_too_big_discard),
  159. QEDE_STAT(coalesced_pkts),
  160. QEDE_STAT(coalesced_events),
  161. QEDE_STAT(coalesced_aborts_num),
  162. QEDE_STAT(non_coalesced_pkts),
  163. QEDE_STAT(coalesced_bytes),
  164. };
  165. #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr)
  166. #define QEDE_STAT_IS_PF_ONLY(i) \
  167. test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr)
  168. #define QEDE_STAT_IS_BB_ONLY(i) \
  169. test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr)
  170. #define QEDE_STAT_IS_AH_ONLY(i) \
  171. test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr)
  172. enum {
  173. QEDE_PRI_FLAG_CMT,
  174. QEDE_PRI_FLAG_LEN,
  175. };
  176. static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
  177. "Coupled-Function",
  178. };
  179. enum qede_ethtool_tests {
  180. QEDE_ETHTOOL_INT_LOOPBACK,
  181. QEDE_ETHTOOL_INTERRUPT_TEST,
  182. QEDE_ETHTOOL_MEMORY_TEST,
  183. QEDE_ETHTOOL_REGISTER_TEST,
  184. QEDE_ETHTOOL_CLOCK_TEST,
  185. QEDE_ETHTOOL_NVRAM_TEST,
  186. QEDE_ETHTOOL_TEST_MAX
  187. };
  188. static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
  189. "Internal loopback (offline)",
  190. "Interrupt (online)\t",
  191. "Memory (online)\t\t",
  192. "Register (online)\t",
  193. "Clock (online)\t\t",
  194. "Nvram (online)\t\t",
  195. };
  196. static void qede_get_strings_stats_txq(struct qede_dev *edev,
  197. struct qede_tx_queue *txq, u8 **buf)
  198. {
  199. int i;
  200. for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
  201. if (txq->is_xdp)
  202. sprintf(*buf, "%d [XDP]: %s",
  203. QEDE_TXQ_XDP_TO_IDX(edev, txq),
  204. qede_tqstats_arr[i].string);
  205. else
  206. sprintf(*buf, "%d: %s", txq->index,
  207. qede_tqstats_arr[i].string);
  208. *buf += ETH_GSTRING_LEN;
  209. }
  210. }
  211. static void qede_get_strings_stats_rxq(struct qede_dev *edev,
  212. struct qede_rx_queue *rxq, u8 **buf)
  213. {
  214. int i;
  215. for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
  216. sprintf(*buf, "%d: %s", rxq->rxq_id,
  217. qede_rqstats_arr[i].string);
  218. *buf += ETH_GSTRING_LEN;
  219. }
  220. }
  221. static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index)
  222. {
  223. return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) ||
  224. (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) ||
  225. (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index));
  226. }
  227. static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
  228. {
  229. struct qede_fastpath *fp;
  230. int i;
  231. /* Account for queue statistics */
  232. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
  233. fp = &edev->fp_array[i];
  234. if (fp->type & QEDE_FASTPATH_RX)
  235. qede_get_strings_stats_rxq(edev, fp->rxq, &buf);
  236. if (fp->type & QEDE_FASTPATH_XDP)
  237. qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf);
  238. if (fp->type & QEDE_FASTPATH_TX)
  239. qede_get_strings_stats_txq(edev, fp->txq, &buf);
  240. }
  241. /* Account for non-queue statistics */
  242. for (i = 0; i < QEDE_NUM_STATS; i++) {
  243. if (qede_is_irrelevant_stat(edev, i))
  244. continue;
  245. strcpy(buf, qede_stats_arr[i].string);
  246. buf += ETH_GSTRING_LEN;
  247. }
  248. }
  249. static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
  250. {
  251. struct qede_dev *edev = netdev_priv(dev);
  252. switch (stringset) {
  253. case ETH_SS_STATS:
  254. qede_get_strings_stats(edev, buf);
  255. break;
  256. case ETH_SS_PRIV_FLAGS:
  257. memcpy(buf, qede_private_arr,
  258. ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN);
  259. break;
  260. case ETH_SS_TEST:
  261. memcpy(buf, qede_tests_str_arr,
  262. ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX);
  263. break;
  264. default:
  265. DP_VERBOSE(edev, QED_MSG_DEBUG,
  266. "Unsupported stringset 0x%08x\n", stringset);
  267. }
  268. }
  269. static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf)
  270. {
  271. int i;
  272. for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
  273. **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset));
  274. (*buf)++;
  275. }
  276. }
  277. static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf)
  278. {
  279. int i;
  280. for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
  281. **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset));
  282. (*buf)++;
  283. }
  284. }
  285. static void qede_get_ethtool_stats(struct net_device *dev,
  286. struct ethtool_stats *stats, u64 *buf)
  287. {
  288. struct qede_dev *edev = netdev_priv(dev);
  289. struct qede_fastpath *fp;
  290. int i;
  291. qede_fill_by_demand_stats(edev);
  292. /* Need to protect the access to the fastpath array */
  293. __qede_lock(edev);
  294. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
  295. fp = &edev->fp_array[i];
  296. if (fp->type & QEDE_FASTPATH_RX)
  297. qede_get_ethtool_stats_rxq(fp->rxq, &buf);
  298. if (fp->type & QEDE_FASTPATH_XDP)
  299. qede_get_ethtool_stats_txq(fp->xdp_tx, &buf);
  300. if (fp->type & QEDE_FASTPATH_TX)
  301. qede_get_ethtool_stats_txq(fp->txq, &buf);
  302. }
  303. for (i = 0; i < QEDE_NUM_STATS; i++) {
  304. if (qede_is_irrelevant_stat(edev, i))
  305. continue;
  306. *buf = *((u64 *)(((void *)&edev->stats) +
  307. qede_stats_arr[i].offset));
  308. buf++;
  309. }
  310. __qede_unlock(edev);
  311. }
  312. static int qede_get_sset_count(struct net_device *dev, int stringset)
  313. {
  314. struct qede_dev *edev = netdev_priv(dev);
  315. int num_stats = QEDE_NUM_STATS, i;
  316. switch (stringset) {
  317. case ETH_SS_STATS:
  318. for (i = 0; i < QEDE_NUM_STATS; i++)
  319. if (qede_is_irrelevant_stat(edev, i))
  320. num_stats--;
  321. /* Account for the Regular Tx statistics */
  322. num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS;
  323. /* Account for the Regular Rx statistics */
  324. num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS;
  325. /* Account for XDP statistics [if needed] */
  326. if (edev->xdp_prog)
  327. num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS;
  328. return num_stats;
  329. case ETH_SS_PRIV_FLAGS:
  330. return QEDE_PRI_FLAG_LEN;
  331. case ETH_SS_TEST:
  332. if (!IS_VF(edev))
  333. return QEDE_ETHTOOL_TEST_MAX;
  334. else
  335. return 0;
  336. default:
  337. DP_VERBOSE(edev, QED_MSG_DEBUG,
  338. "Unsupported stringset 0x%08x\n", stringset);
  339. return -EINVAL;
  340. }
  341. }
  342. static u32 qede_get_priv_flags(struct net_device *dev)
  343. {
  344. struct qede_dev *edev = netdev_priv(dev);
  345. return (!!(edev->dev_info.common.num_hwfns > 1)) << QEDE_PRI_FLAG_CMT;
  346. }
  347. struct qede_link_mode_mapping {
  348. u32 qed_link_mode;
  349. u32 ethtool_link_mode;
  350. };
  351. static const struct qede_link_mode_mapping qed_lm_map[] = {
  352. {QED_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT},
  353. {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT},
  354. {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT},
  355. {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT},
  356. {QED_LM_1000baseT_Half_BIT, ETHTOOL_LINK_MODE_1000baseT_Half_BIT},
  357. {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT},
  358. {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
  359. {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT},
  360. {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT},
  361. {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT},
  362. {QED_LM_100000baseKR4_Full_BIT,
  363. ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT},
  364. };
  365. #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \
  366. { \
  367. int i; \
  368. \
  369. for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \
  370. if ((caps) & (qed_lm_map[i].qed_link_mode)) \
  371. __set_bit(qed_lm_map[i].ethtool_link_mode,\
  372. lk_ksettings->link_modes.name); \
  373. } \
  374. }
  375. #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \
  376. { \
  377. int i; \
  378. \
  379. for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \
  380. if (test_bit(qed_lm_map[i].ethtool_link_mode, \
  381. lk_ksettings->link_modes.name)) \
  382. caps |= qed_lm_map[i].qed_link_mode; \
  383. } \
  384. }
  385. static int qede_get_link_ksettings(struct net_device *dev,
  386. struct ethtool_link_ksettings *cmd)
  387. {
  388. struct ethtool_link_settings *base = &cmd->base;
  389. struct qede_dev *edev = netdev_priv(dev);
  390. struct qed_link_output current_link;
  391. __qede_lock(edev);
  392. memset(&current_link, 0, sizeof(current_link));
  393. edev->ops->common->get_link(edev->cdev, &current_link);
  394. ethtool_link_ksettings_zero_link_mode(cmd, supported);
  395. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported)
  396. ethtool_link_ksettings_zero_link_mode(cmd, advertising);
  397. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising)
  398. ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
  399. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising)
  400. if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
  401. base->speed = current_link.speed;
  402. base->duplex = current_link.duplex;
  403. } else {
  404. base->speed = SPEED_UNKNOWN;
  405. base->duplex = DUPLEX_UNKNOWN;
  406. }
  407. __qede_unlock(edev);
  408. base->port = current_link.port;
  409. base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
  410. AUTONEG_DISABLE;
  411. return 0;
  412. }
  413. static int qede_set_link_ksettings(struct net_device *dev,
  414. const struct ethtool_link_ksettings *cmd)
  415. {
  416. const struct ethtool_link_settings *base = &cmd->base;
  417. struct qede_dev *edev = netdev_priv(dev);
  418. struct qed_link_output current_link;
  419. struct qed_link_params params;
  420. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  421. DP_INFO(edev, "Link settings are not allowed to be changed\n");
  422. return -EOPNOTSUPP;
  423. }
  424. memset(&current_link, 0, sizeof(current_link));
  425. memset(&params, 0, sizeof(params));
  426. edev->ops->common->get_link(edev->cdev, &current_link);
  427. params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
  428. params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
  429. if (base->autoneg == AUTONEG_ENABLE) {
  430. if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
  431. DP_INFO(edev, "Auto negotiation is not supported\n");
  432. return -EOPNOTSUPP;
  433. }
  434. params.autoneg = true;
  435. params.forced_speed = 0;
  436. QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising)
  437. } else { /* forced speed */
  438. params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
  439. params.autoneg = false;
  440. params.forced_speed = base->speed;
  441. switch (base->speed) {
  442. case SPEED_10000:
  443. if (!(current_link.supported_caps &
  444. QED_LM_10000baseKR_Full_BIT)) {
  445. DP_INFO(edev, "10G speed not supported\n");
  446. return -EINVAL;
  447. }
  448. params.adv_speeds = QED_LM_10000baseKR_Full_BIT;
  449. break;
  450. case SPEED_25000:
  451. if (!(current_link.supported_caps &
  452. QED_LM_25000baseKR_Full_BIT)) {
  453. DP_INFO(edev, "25G speed not supported\n");
  454. return -EINVAL;
  455. }
  456. params.adv_speeds = QED_LM_25000baseKR_Full_BIT;
  457. break;
  458. case SPEED_40000:
  459. if (!(current_link.supported_caps &
  460. QED_LM_40000baseLR4_Full_BIT)) {
  461. DP_INFO(edev, "40G speed not supported\n");
  462. return -EINVAL;
  463. }
  464. params.adv_speeds = QED_LM_40000baseLR4_Full_BIT;
  465. break;
  466. case SPEED_50000:
  467. if (!(current_link.supported_caps &
  468. QED_LM_50000baseKR2_Full_BIT)) {
  469. DP_INFO(edev, "50G speed not supported\n");
  470. return -EINVAL;
  471. }
  472. params.adv_speeds = QED_LM_50000baseKR2_Full_BIT;
  473. break;
  474. case SPEED_100000:
  475. if (!(current_link.supported_caps &
  476. QED_LM_100000baseKR4_Full_BIT)) {
  477. DP_INFO(edev, "100G speed not supported\n");
  478. return -EINVAL;
  479. }
  480. params.adv_speeds = QED_LM_100000baseKR4_Full_BIT;
  481. break;
  482. default:
  483. DP_INFO(edev, "Unsupported speed %u\n", base->speed);
  484. return -EINVAL;
  485. }
  486. }
  487. params.link_up = true;
  488. edev->ops->common->set_link(edev->cdev, &params);
  489. return 0;
  490. }
  491. static void qede_get_drvinfo(struct net_device *ndev,
  492. struct ethtool_drvinfo *info)
  493. {
  494. char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
  495. struct qede_dev *edev = netdev_priv(ndev);
  496. strlcpy(info->driver, "qede", sizeof(info->driver));
  497. strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
  498. snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
  499. edev->dev_info.common.fw_major,
  500. edev->dev_info.common.fw_minor,
  501. edev->dev_info.common.fw_rev,
  502. edev->dev_info.common.fw_eng);
  503. snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
  504. (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
  505. (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
  506. (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
  507. edev->dev_info.common.mfw_rev & 0xFF);
  508. if ((strlen(storm) + strlen(mfw) + strlen("mfw storm ")) <
  509. sizeof(info->fw_version)) {
  510. snprintf(info->fw_version, sizeof(info->fw_version),
  511. "mfw %s storm %s", mfw, storm);
  512. } else {
  513. snprintf(info->fw_version, sizeof(info->fw_version),
  514. "%s %s", mfw, storm);
  515. }
  516. strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
  517. }
  518. static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
  519. {
  520. struct qede_dev *edev = netdev_priv(ndev);
  521. if (edev->dev_info.common.wol_support) {
  522. wol->supported = WAKE_MAGIC;
  523. wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0;
  524. }
  525. }
  526. static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
  527. {
  528. struct qede_dev *edev = netdev_priv(ndev);
  529. bool wol_requested;
  530. int rc;
  531. if (wol->wolopts & ~WAKE_MAGIC) {
  532. DP_INFO(edev,
  533. "Can't support WoL options other than magic-packet\n");
  534. return -EINVAL;
  535. }
  536. wol_requested = !!(wol->wolopts & WAKE_MAGIC);
  537. if (wol_requested == edev->wol_enabled)
  538. return 0;
  539. /* Need to actually change configuration */
  540. if (!edev->dev_info.common.wol_support) {
  541. DP_INFO(edev, "Device doesn't support WoL\n");
  542. return -EINVAL;
  543. }
  544. rc = edev->ops->common->update_wol(edev->cdev, wol_requested);
  545. if (!rc)
  546. edev->wol_enabled = wol_requested;
  547. return rc;
  548. }
  549. static u32 qede_get_msglevel(struct net_device *ndev)
  550. {
  551. struct qede_dev *edev = netdev_priv(ndev);
  552. return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
  553. }
  554. static void qede_set_msglevel(struct net_device *ndev, u32 level)
  555. {
  556. struct qede_dev *edev = netdev_priv(ndev);
  557. u32 dp_module = 0;
  558. u8 dp_level = 0;
  559. qede_config_debug(level, &dp_module, &dp_level);
  560. edev->dp_level = dp_level;
  561. edev->dp_module = dp_module;
  562. edev->ops->common->update_msglvl(edev->cdev,
  563. dp_module, dp_level);
  564. }
  565. static int qede_nway_reset(struct net_device *dev)
  566. {
  567. struct qede_dev *edev = netdev_priv(dev);
  568. struct qed_link_output current_link;
  569. struct qed_link_params link_params;
  570. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  571. DP_INFO(edev, "Link settings are not allowed to be changed\n");
  572. return -EOPNOTSUPP;
  573. }
  574. if (!netif_running(dev))
  575. return 0;
  576. memset(&current_link, 0, sizeof(current_link));
  577. edev->ops->common->get_link(edev->cdev, &current_link);
  578. if (!current_link.link_up)
  579. return 0;
  580. /* Toggle the link */
  581. memset(&link_params, 0, sizeof(link_params));
  582. link_params.link_up = false;
  583. edev->ops->common->set_link(edev->cdev, &link_params);
  584. link_params.link_up = true;
  585. edev->ops->common->set_link(edev->cdev, &link_params);
  586. return 0;
  587. }
  588. static u32 qede_get_link(struct net_device *dev)
  589. {
  590. struct qede_dev *edev = netdev_priv(dev);
  591. struct qed_link_output current_link;
  592. memset(&current_link, 0, sizeof(current_link));
  593. edev->ops->common->get_link(edev->cdev, &current_link);
  594. return current_link.link_up;
  595. }
  596. static int qede_get_coalesce(struct net_device *dev,
  597. struct ethtool_coalesce *coal)
  598. {
  599. struct qede_dev *edev = netdev_priv(dev);
  600. u16 rxc, txc;
  601. memset(coal, 0, sizeof(struct ethtool_coalesce));
  602. edev->ops->common->get_coalesce(edev->cdev, &rxc, &txc);
  603. coal->rx_coalesce_usecs = rxc;
  604. coal->tx_coalesce_usecs = txc;
  605. return 0;
  606. }
  607. static int qede_set_coalesce(struct net_device *dev,
  608. struct ethtool_coalesce *coal)
  609. {
  610. struct qede_dev *edev = netdev_priv(dev);
  611. int i, rc = 0;
  612. u16 rxc, txc, sb_id;
  613. if (!netif_running(dev)) {
  614. DP_INFO(edev, "Interface is down\n");
  615. return -EINVAL;
  616. }
  617. if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
  618. coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
  619. DP_INFO(edev,
  620. "Can't support requested %s coalesce value [max supported value %d]\n",
  621. coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx"
  622. : "tx",
  623. QED_COALESCE_MAX);
  624. return -EINVAL;
  625. }
  626. rxc = (u16)coal->rx_coalesce_usecs;
  627. txc = (u16)coal->tx_coalesce_usecs;
  628. for_each_queue(i) {
  629. sb_id = edev->fp_array[i].sb_info->igu_sb_id;
  630. rc = edev->ops->common->set_coalesce(edev->cdev, rxc, txc,
  631. (u16)i, sb_id);
  632. if (rc) {
  633. DP_INFO(edev, "Set coalesce error, rc = %d\n", rc);
  634. return rc;
  635. }
  636. }
  637. return rc;
  638. }
  639. static void qede_get_ringparam(struct net_device *dev,
  640. struct ethtool_ringparam *ering)
  641. {
  642. struct qede_dev *edev = netdev_priv(dev);
  643. ering->rx_max_pending = NUM_RX_BDS_MAX;
  644. ering->rx_pending = edev->q_num_rx_buffers;
  645. ering->tx_max_pending = NUM_TX_BDS_MAX;
  646. ering->tx_pending = edev->q_num_tx_buffers;
  647. }
  648. static int qede_set_ringparam(struct net_device *dev,
  649. struct ethtool_ringparam *ering)
  650. {
  651. struct qede_dev *edev = netdev_priv(dev);
  652. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  653. "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
  654. ering->rx_pending, ering->tx_pending);
  655. /* Validate legality of configuration */
  656. if (ering->rx_pending > NUM_RX_BDS_MAX ||
  657. ering->rx_pending < NUM_RX_BDS_MIN ||
  658. ering->tx_pending > NUM_TX_BDS_MAX ||
  659. ering->tx_pending < NUM_TX_BDS_MIN) {
  660. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  661. "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
  662. NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
  663. NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
  664. return -EINVAL;
  665. }
  666. /* Change ring size and re-load */
  667. edev->q_num_rx_buffers = ering->rx_pending;
  668. edev->q_num_tx_buffers = ering->tx_pending;
  669. qede_reload(edev, NULL, false);
  670. return 0;
  671. }
  672. static void qede_get_pauseparam(struct net_device *dev,
  673. struct ethtool_pauseparam *epause)
  674. {
  675. struct qede_dev *edev = netdev_priv(dev);
  676. struct qed_link_output current_link;
  677. memset(&current_link, 0, sizeof(current_link));
  678. edev->ops->common->get_link(edev->cdev, &current_link);
  679. if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
  680. epause->autoneg = true;
  681. if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
  682. epause->rx_pause = true;
  683. if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
  684. epause->tx_pause = true;
  685. DP_VERBOSE(edev, QED_MSG_DEBUG,
  686. "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n",
  687. epause->cmd, epause->autoneg, epause->rx_pause,
  688. epause->tx_pause);
  689. }
  690. static int qede_set_pauseparam(struct net_device *dev,
  691. struct ethtool_pauseparam *epause)
  692. {
  693. struct qede_dev *edev = netdev_priv(dev);
  694. struct qed_link_params params;
  695. struct qed_link_output current_link;
  696. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  697. DP_INFO(edev,
  698. "Pause settings are not allowed to be changed\n");
  699. return -EOPNOTSUPP;
  700. }
  701. memset(&current_link, 0, sizeof(current_link));
  702. edev->ops->common->get_link(edev->cdev, &current_link);
  703. memset(&params, 0, sizeof(params));
  704. params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
  705. if (epause->autoneg) {
  706. if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
  707. DP_INFO(edev, "autoneg not supported\n");
  708. return -EINVAL;
  709. }
  710. params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
  711. }
  712. if (epause->rx_pause)
  713. params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
  714. if (epause->tx_pause)
  715. params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
  716. params.link_up = true;
  717. edev->ops->common->set_link(edev->cdev, &params);
  718. return 0;
  719. }
  720. static void qede_get_regs(struct net_device *ndev,
  721. struct ethtool_regs *regs, void *buffer)
  722. {
  723. struct qede_dev *edev = netdev_priv(ndev);
  724. regs->version = 0;
  725. memset(buffer, 0, regs->len);
  726. if (edev->ops && edev->ops->common)
  727. edev->ops->common->dbg_all_data(edev->cdev, buffer);
  728. }
  729. static int qede_get_regs_len(struct net_device *ndev)
  730. {
  731. struct qede_dev *edev = netdev_priv(ndev);
  732. if (edev->ops && edev->ops->common)
  733. return edev->ops->common->dbg_all_data_size(edev->cdev);
  734. else
  735. return -EINVAL;
  736. }
  737. static void qede_update_mtu(struct qede_dev *edev,
  738. struct qede_reload_args *args)
  739. {
  740. edev->ndev->mtu = args->u.mtu;
  741. }
  742. /* Netdevice NDOs */
  743. int qede_change_mtu(struct net_device *ndev, int new_mtu)
  744. {
  745. struct qede_dev *edev = netdev_priv(ndev);
  746. struct qede_reload_args args;
  747. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  748. "Configuring MTU size of %d\n", new_mtu);
  749. /* Set the mtu field and re-start the interface if needed */
  750. args.u.mtu = new_mtu;
  751. args.func = &qede_update_mtu;
  752. qede_reload(edev, &args, false);
  753. edev->ops->common->update_mtu(edev->cdev, new_mtu);
  754. return 0;
  755. }
  756. static void qede_get_channels(struct net_device *dev,
  757. struct ethtool_channels *channels)
  758. {
  759. struct qede_dev *edev = netdev_priv(dev);
  760. channels->max_combined = QEDE_MAX_RSS_CNT(edev);
  761. channels->max_rx = QEDE_MAX_RSS_CNT(edev);
  762. channels->max_tx = QEDE_MAX_RSS_CNT(edev);
  763. channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
  764. edev->fp_num_rx;
  765. channels->tx_count = edev->fp_num_tx;
  766. channels->rx_count = edev->fp_num_rx;
  767. }
  768. static int qede_set_channels(struct net_device *dev,
  769. struct ethtool_channels *channels)
  770. {
  771. struct qede_dev *edev = netdev_priv(dev);
  772. u32 count;
  773. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  774. "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
  775. channels->rx_count, channels->tx_count,
  776. channels->other_count, channels->combined_count);
  777. count = channels->rx_count + channels->tx_count +
  778. channels->combined_count;
  779. /* We don't support `other' channels */
  780. if (channels->other_count) {
  781. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  782. "command parameters not supported\n");
  783. return -EINVAL;
  784. }
  785. if (!(channels->combined_count || (channels->rx_count &&
  786. channels->tx_count))) {
  787. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  788. "need to request at least one transmit and one receive channel\n");
  789. return -EINVAL;
  790. }
  791. if (count > QEDE_MAX_RSS_CNT(edev)) {
  792. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  793. "requested channels = %d max supported channels = %d\n",
  794. count, QEDE_MAX_RSS_CNT(edev));
  795. return -EINVAL;
  796. }
  797. /* Check if there was a change in the active parameters */
  798. if ((count == QEDE_QUEUE_CNT(edev)) &&
  799. (channels->tx_count == edev->fp_num_tx) &&
  800. (channels->rx_count == edev->fp_num_rx)) {
  801. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  802. "No change in active parameters\n");
  803. return 0;
  804. }
  805. /* We need the number of queues to be divisible between the hwfns */
  806. if ((count % edev->dev_info.common.num_hwfns) ||
  807. (channels->tx_count % edev->dev_info.common.num_hwfns) ||
  808. (channels->rx_count % edev->dev_info.common.num_hwfns)) {
  809. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  810. "Number of channels must be divisible by %04x\n",
  811. edev->dev_info.common.num_hwfns);
  812. return -EINVAL;
  813. }
  814. /* Set number of queues and reload if necessary */
  815. edev->req_queues = count;
  816. edev->req_num_tx = channels->tx_count;
  817. edev->req_num_rx = channels->rx_count;
  818. /* Reset the indirection table if rx queue count is updated */
  819. if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) {
  820. edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED;
  821. memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table));
  822. }
  823. qede_reload(edev, NULL, false);
  824. return 0;
  825. }
  826. static int qede_get_ts_info(struct net_device *dev,
  827. struct ethtool_ts_info *info)
  828. {
  829. struct qede_dev *edev = netdev_priv(dev);
  830. return qede_ptp_get_ts_info(edev, info);
  831. }
  832. static int qede_set_phys_id(struct net_device *dev,
  833. enum ethtool_phys_id_state state)
  834. {
  835. struct qede_dev *edev = netdev_priv(dev);
  836. u8 led_state = 0;
  837. switch (state) {
  838. case ETHTOOL_ID_ACTIVE:
  839. return 1; /* cycle on/off once per second */
  840. case ETHTOOL_ID_ON:
  841. led_state = QED_LED_MODE_ON;
  842. break;
  843. case ETHTOOL_ID_OFF:
  844. led_state = QED_LED_MODE_OFF;
  845. break;
  846. case ETHTOOL_ID_INACTIVE:
  847. led_state = QED_LED_MODE_RESTORE;
  848. break;
  849. }
  850. edev->ops->common->set_led(edev->cdev, led_state);
  851. return 0;
  852. }
  853. static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
  854. {
  855. info->data = RXH_IP_SRC | RXH_IP_DST;
  856. switch (info->flow_type) {
  857. case TCP_V4_FLOW:
  858. case TCP_V6_FLOW:
  859. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  860. break;
  861. case UDP_V4_FLOW:
  862. if (edev->rss_caps & QED_RSS_IPV4_UDP)
  863. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  864. break;
  865. case UDP_V6_FLOW:
  866. if (edev->rss_caps & QED_RSS_IPV6_UDP)
  867. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  868. break;
  869. case IPV4_FLOW:
  870. case IPV6_FLOW:
  871. break;
  872. default:
  873. info->data = 0;
  874. break;
  875. }
  876. return 0;
  877. }
  878. static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
  879. u32 *rules __always_unused)
  880. {
  881. struct qede_dev *edev = netdev_priv(dev);
  882. switch (info->cmd) {
  883. case ETHTOOL_GRXRINGS:
  884. info->data = QEDE_RSS_COUNT(edev);
  885. return 0;
  886. case ETHTOOL_GRXFH:
  887. return qede_get_rss_flags(edev, info);
  888. default:
  889. DP_ERR(edev, "Command parameters not supported\n");
  890. return -EOPNOTSUPP;
  891. }
  892. }
  893. static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
  894. {
  895. struct qed_update_vport_params *vport_update_params;
  896. u8 set_caps = 0, clr_caps = 0;
  897. int rc = 0;
  898. DP_VERBOSE(edev, QED_MSG_DEBUG,
  899. "Set rss flags command parameters: flow type = %d, data = %llu\n",
  900. info->flow_type, info->data);
  901. switch (info->flow_type) {
  902. case TCP_V4_FLOW:
  903. case TCP_V6_FLOW:
  904. /* For TCP only 4-tuple hash is supported */
  905. if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
  906. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  907. DP_INFO(edev, "Command parameters not supported\n");
  908. return -EINVAL;
  909. }
  910. return 0;
  911. case UDP_V4_FLOW:
  912. /* For UDP either 2-tuple hash or 4-tuple hash is supported */
  913. if (info->data == (RXH_IP_SRC | RXH_IP_DST |
  914. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  915. set_caps = QED_RSS_IPV4_UDP;
  916. DP_VERBOSE(edev, QED_MSG_DEBUG,
  917. "UDP 4-tuple enabled\n");
  918. } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
  919. clr_caps = QED_RSS_IPV4_UDP;
  920. DP_VERBOSE(edev, QED_MSG_DEBUG,
  921. "UDP 4-tuple disabled\n");
  922. } else {
  923. return -EINVAL;
  924. }
  925. break;
  926. case UDP_V6_FLOW:
  927. /* For UDP either 2-tuple hash or 4-tuple hash is supported */
  928. if (info->data == (RXH_IP_SRC | RXH_IP_DST |
  929. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  930. set_caps = QED_RSS_IPV6_UDP;
  931. DP_VERBOSE(edev, QED_MSG_DEBUG,
  932. "UDP 4-tuple enabled\n");
  933. } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
  934. clr_caps = QED_RSS_IPV6_UDP;
  935. DP_VERBOSE(edev, QED_MSG_DEBUG,
  936. "UDP 4-tuple disabled\n");
  937. } else {
  938. return -EINVAL;
  939. }
  940. break;
  941. case IPV4_FLOW:
  942. case IPV6_FLOW:
  943. /* For IP only 2-tuple hash is supported */
  944. if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
  945. DP_INFO(edev, "Command parameters not supported\n");
  946. return -EINVAL;
  947. }
  948. return 0;
  949. case SCTP_V4_FLOW:
  950. case AH_ESP_V4_FLOW:
  951. case AH_V4_FLOW:
  952. case ESP_V4_FLOW:
  953. case SCTP_V6_FLOW:
  954. case AH_ESP_V6_FLOW:
  955. case AH_V6_FLOW:
  956. case ESP_V6_FLOW:
  957. case IP_USER_FLOW:
  958. case ETHER_FLOW:
  959. /* RSS is not supported for these protocols */
  960. if (info->data) {
  961. DP_INFO(edev, "Command parameters not supported\n");
  962. return -EINVAL;
  963. }
  964. return 0;
  965. default:
  966. return -EINVAL;
  967. }
  968. /* No action is needed if there is no change in the rss capability */
  969. if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))
  970. return 0;
  971. /* Update internal configuration */
  972. edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);
  973. edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
  974. /* Re-configure if possible */
  975. __qede_lock(edev);
  976. if (edev->state == QEDE_STATE_OPEN) {
  977. vport_update_params = vzalloc(sizeof(*vport_update_params));
  978. if (!vport_update_params) {
  979. __qede_unlock(edev);
  980. return -ENOMEM;
  981. }
  982. qede_fill_rss_params(edev, &vport_update_params->rss_params,
  983. &vport_update_params->update_rss_flg);
  984. rc = edev->ops->vport_update(edev->cdev, vport_update_params);
  985. vfree(vport_update_params);
  986. }
  987. __qede_unlock(edev);
  988. return rc;
  989. }
  990. static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
  991. {
  992. struct qede_dev *edev = netdev_priv(dev);
  993. switch (info->cmd) {
  994. case ETHTOOL_SRXFH:
  995. return qede_set_rss_flags(edev, info);
  996. default:
  997. DP_INFO(edev, "Command parameters not supported\n");
  998. return -EOPNOTSUPP;
  999. }
  1000. }
  1001. static u32 qede_get_rxfh_indir_size(struct net_device *dev)
  1002. {
  1003. return QED_RSS_IND_TABLE_SIZE;
  1004. }
  1005. static u32 qede_get_rxfh_key_size(struct net_device *dev)
  1006. {
  1007. struct qede_dev *edev = netdev_priv(dev);
  1008. return sizeof(edev->rss_key);
  1009. }
  1010. static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc)
  1011. {
  1012. struct qede_dev *edev = netdev_priv(dev);
  1013. int i;
  1014. if (hfunc)
  1015. *hfunc = ETH_RSS_HASH_TOP;
  1016. if (!indir)
  1017. return 0;
  1018. for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
  1019. indir[i] = edev->rss_ind_table[i];
  1020. if (key)
  1021. memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev));
  1022. return 0;
  1023. }
  1024. static int qede_set_rxfh(struct net_device *dev, const u32 *indir,
  1025. const u8 *key, const u8 hfunc)
  1026. {
  1027. struct qed_update_vport_params *vport_update_params;
  1028. struct qede_dev *edev = netdev_priv(dev);
  1029. int i, rc = 0;
  1030. if (edev->dev_info.common.num_hwfns > 1) {
  1031. DP_INFO(edev,
  1032. "RSS configuration is not supported for 100G devices\n");
  1033. return -EOPNOTSUPP;
  1034. }
  1035. if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
  1036. return -EOPNOTSUPP;
  1037. if (!indir && !key)
  1038. return 0;
  1039. if (indir) {
  1040. for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
  1041. edev->rss_ind_table[i] = indir[i];
  1042. edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
  1043. }
  1044. if (key) {
  1045. memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev));
  1046. edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
  1047. }
  1048. __qede_lock(edev);
  1049. if (edev->state == QEDE_STATE_OPEN) {
  1050. vport_update_params = vzalloc(sizeof(*vport_update_params));
  1051. if (!vport_update_params) {
  1052. __qede_unlock(edev);
  1053. return -ENOMEM;
  1054. }
  1055. qede_fill_rss_params(edev, &vport_update_params->rss_params,
  1056. &vport_update_params->update_rss_flg);
  1057. rc = edev->ops->vport_update(edev->cdev, vport_update_params);
  1058. vfree(vport_update_params);
  1059. }
  1060. __qede_unlock(edev);
  1061. return rc;
  1062. }
  1063. /* This function enables the interrupt generation and the NAPI on the device */
  1064. static void qede_netif_start(struct qede_dev *edev)
  1065. {
  1066. int i;
  1067. if (!netif_running(edev->ndev))
  1068. return;
  1069. for_each_queue(i) {
  1070. /* Update and reenable interrupts */
  1071. qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
  1072. napi_enable(&edev->fp_array[i].napi);
  1073. }
  1074. }
  1075. /* This function disables the NAPI and the interrupt generation on the device */
  1076. static void qede_netif_stop(struct qede_dev *edev)
  1077. {
  1078. int i;
  1079. for_each_queue(i) {
  1080. napi_disable(&edev->fp_array[i].napi);
  1081. /* Disable interrupts */
  1082. qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
  1083. }
  1084. }
  1085. static int qede_selftest_transmit_traffic(struct qede_dev *edev,
  1086. struct sk_buff *skb)
  1087. {
  1088. struct qede_tx_queue *txq = NULL;
  1089. struct eth_tx_1st_bd *first_bd;
  1090. dma_addr_t mapping;
  1091. int i, idx, val;
  1092. for_each_queue(i) {
  1093. if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
  1094. txq = edev->fp_array[i].txq;
  1095. break;
  1096. }
  1097. }
  1098. if (!txq) {
  1099. DP_NOTICE(edev, "Tx path is not available\n");
  1100. return -1;
  1101. }
  1102. /* Fill the entry in the SW ring and the BDs in the FW ring */
  1103. idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
  1104. txq->sw_tx_ring.skbs[idx].skb = skb;
  1105. first_bd = qed_chain_produce(&txq->tx_pbl);
  1106. memset(first_bd, 0, sizeof(*first_bd));
  1107. val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
  1108. first_bd->data.bd_flags.bitfields = val;
  1109. val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
  1110. first_bd->data.bitfields |= (val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT);
  1111. /* Map skb linear data for DMA and set in the first BD */
  1112. mapping = dma_map_single(&edev->pdev->dev, skb->data,
  1113. skb_headlen(skb), DMA_TO_DEVICE);
  1114. if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
  1115. DP_NOTICE(edev, "SKB mapping failed\n");
  1116. return -ENOMEM;
  1117. }
  1118. BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
  1119. /* update the first BD with the actual num BDs */
  1120. first_bd->data.nbds = 1;
  1121. txq->sw_tx_prod++;
  1122. /* 'next page' entries are counted in the producer value */
  1123. val = cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
  1124. txq->tx_db.data.bd_prod = val;
  1125. /* wmb makes sure that the BDs data is updated before updating the
  1126. * producer, otherwise FW may read old data from the BDs.
  1127. */
  1128. wmb();
  1129. barrier();
  1130. writel(txq->tx_db.raw, txq->doorbell_addr);
  1131. /* mmiowb is needed to synchronize doorbell writes from more than one
  1132. * processor. It guarantees that the write arrives to the device before
  1133. * the queue lock is released and another start_xmit is called (possibly
  1134. * on another CPU). Without this barrier, the next doorbell can bypass
  1135. * this doorbell. This is applicable to IA64/Altix systems.
  1136. */
  1137. mmiowb();
  1138. for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
  1139. if (qede_txq_has_work(txq))
  1140. break;
  1141. usleep_range(100, 200);
  1142. }
  1143. if (!qede_txq_has_work(txq)) {
  1144. DP_NOTICE(edev, "Tx completion didn't happen\n");
  1145. return -1;
  1146. }
  1147. first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
  1148. dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
  1149. BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
  1150. txq->sw_tx_cons++;
  1151. txq->sw_tx_ring.skbs[idx].skb = NULL;
  1152. return 0;
  1153. }
  1154. static int qede_selftest_receive_traffic(struct qede_dev *edev)
  1155. {
  1156. u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len;
  1157. struct eth_fast_path_rx_reg_cqe *fp_cqe;
  1158. struct qede_rx_queue *rxq = NULL;
  1159. struct sw_rx_data *sw_rx_data;
  1160. union eth_rx_cqe *cqe;
  1161. int i, iter, rc = 0;
  1162. u8 *data_ptr;
  1163. for_each_queue(i) {
  1164. if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
  1165. rxq = edev->fp_array[i].rxq;
  1166. break;
  1167. }
  1168. }
  1169. if (!rxq) {
  1170. DP_NOTICE(edev, "Rx path is not available\n");
  1171. return -1;
  1172. }
  1173. /* The packet is expected to receive on rx-queue 0 even though RSS is
  1174. * enabled. This is because the queue 0 is configured as the default
  1175. * queue and that the loopback traffic is not IP.
  1176. */
  1177. for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) {
  1178. if (!qede_has_rx_work(rxq)) {
  1179. usleep_range(100, 200);
  1180. continue;
  1181. }
  1182. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  1183. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1184. /* Memory barrier to prevent the CPU from doing speculative
  1185. * reads of CQE/BD before reading hw_comp_cons. If the CQE is
  1186. * read before it is written by FW, then FW writes CQE and SB,
  1187. * and then the CPU reads the hw_comp_cons, it will use an old
  1188. * CQE.
  1189. */
  1190. rmb();
  1191. /* Get the CQE from the completion ring */
  1192. cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
  1193. /* Get the data from the SW ring */
  1194. sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  1195. sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
  1196. fp_cqe = &cqe->fast_path_regular;
  1197. len = le16_to_cpu(fp_cqe->len_on_first_bd);
  1198. data_ptr = (u8 *)(page_address(sw_rx_data->data) +
  1199. fp_cqe->placement_offset +
  1200. sw_rx_data->page_offset);
  1201. if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) &&
  1202. ether_addr_equal(data_ptr + ETH_ALEN,
  1203. edev->ndev->dev_addr)) {
  1204. for (i = ETH_HLEN; i < len; i++)
  1205. if (data_ptr[i] != (unsigned char)(i & 0xff)) {
  1206. rc = -1;
  1207. break;
  1208. }
  1209. qede_recycle_rx_bd_ring(rxq, 1);
  1210. qed_chain_recycle_consumed(&rxq->rx_comp_ring);
  1211. break;
  1212. }
  1213. DP_INFO(edev, "Not the transmitted packet\n");
  1214. qede_recycle_rx_bd_ring(rxq, 1);
  1215. qed_chain_recycle_consumed(&rxq->rx_comp_ring);
  1216. }
  1217. if (iter == QEDE_SELFTEST_POLL_COUNT) {
  1218. DP_NOTICE(edev, "Failed to receive the traffic\n");
  1219. return -1;
  1220. }
  1221. qede_update_rx_prod(edev, rxq);
  1222. return rc;
  1223. }
  1224. static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
  1225. {
  1226. struct qed_link_params link_params;
  1227. struct sk_buff *skb = NULL;
  1228. int rc = 0, i;
  1229. u32 pkt_size;
  1230. u8 *packet;
  1231. if (!netif_running(edev->ndev)) {
  1232. DP_NOTICE(edev, "Interface is down\n");
  1233. return -EINVAL;
  1234. }
  1235. qede_netif_stop(edev);
  1236. /* Bring up the link in Loopback mode */
  1237. memset(&link_params, 0, sizeof(link_params));
  1238. link_params.link_up = true;
  1239. link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
  1240. link_params.loopback_mode = loopback_mode;
  1241. edev->ops->common->set_link(edev->cdev, &link_params);
  1242. /* Wait for loopback configuration to apply */
  1243. msleep_interruptible(500);
  1244. /* prepare the loopback packet */
  1245. pkt_size = edev->ndev->mtu + ETH_HLEN;
  1246. skb = netdev_alloc_skb(edev->ndev, pkt_size);
  1247. if (!skb) {
  1248. DP_INFO(edev, "Can't allocate skb\n");
  1249. rc = -ENOMEM;
  1250. goto test_loopback_exit;
  1251. }
  1252. packet = skb_put(skb, pkt_size);
  1253. ether_addr_copy(packet, edev->ndev->dev_addr);
  1254. ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
  1255. memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
  1256. for (i = ETH_HLEN; i < pkt_size; i++)
  1257. packet[i] = (unsigned char)(i & 0xff);
  1258. rc = qede_selftest_transmit_traffic(edev, skb);
  1259. if (rc)
  1260. goto test_loopback_exit;
  1261. rc = qede_selftest_receive_traffic(edev);
  1262. if (rc)
  1263. goto test_loopback_exit;
  1264. DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
  1265. test_loopback_exit:
  1266. dev_kfree_skb(skb);
  1267. /* Bring up the link in Normal mode */
  1268. memset(&link_params, 0, sizeof(link_params));
  1269. link_params.link_up = true;
  1270. link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
  1271. link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
  1272. edev->ops->common->set_link(edev->cdev, &link_params);
  1273. /* Wait for loopback configuration to apply */
  1274. msleep_interruptible(500);
  1275. qede_netif_start(edev);
  1276. return rc;
  1277. }
  1278. static void qede_self_test(struct net_device *dev,
  1279. struct ethtool_test *etest, u64 *buf)
  1280. {
  1281. struct qede_dev *edev = netdev_priv(dev);
  1282. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1283. "Self-test command parameters: offline = %d, external_lb = %d\n",
  1284. (etest->flags & ETH_TEST_FL_OFFLINE),
  1285. (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
  1286. memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
  1287. if (etest->flags & ETH_TEST_FL_OFFLINE) {
  1288. if (qede_selftest_run_loopback(edev,
  1289. QED_LINK_LOOPBACK_INT_PHY)) {
  1290. buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
  1291. etest->flags |= ETH_TEST_FL_FAILED;
  1292. }
  1293. }
  1294. if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
  1295. buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
  1296. etest->flags |= ETH_TEST_FL_FAILED;
  1297. }
  1298. if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
  1299. buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
  1300. etest->flags |= ETH_TEST_FL_FAILED;
  1301. }
  1302. if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
  1303. buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
  1304. etest->flags |= ETH_TEST_FL_FAILED;
  1305. }
  1306. if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
  1307. buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
  1308. etest->flags |= ETH_TEST_FL_FAILED;
  1309. }
  1310. if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
  1311. buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
  1312. etest->flags |= ETH_TEST_FL_FAILED;
  1313. }
  1314. }
  1315. static int qede_set_tunable(struct net_device *dev,
  1316. const struct ethtool_tunable *tuna,
  1317. const void *data)
  1318. {
  1319. struct qede_dev *edev = netdev_priv(dev);
  1320. u32 val;
  1321. switch (tuna->id) {
  1322. case ETHTOOL_RX_COPYBREAK:
  1323. val = *(u32 *)data;
  1324. if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
  1325. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1326. "Invalid rx copy break value, range is [%u, %u]",
  1327. QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
  1328. return -EINVAL;
  1329. }
  1330. edev->rx_copybreak = *(u32 *)data;
  1331. break;
  1332. default:
  1333. return -EOPNOTSUPP;
  1334. }
  1335. return 0;
  1336. }
  1337. static int qede_get_tunable(struct net_device *dev,
  1338. const struct ethtool_tunable *tuna, void *data)
  1339. {
  1340. struct qede_dev *edev = netdev_priv(dev);
  1341. switch (tuna->id) {
  1342. case ETHTOOL_RX_COPYBREAK:
  1343. *(u32 *)data = edev->rx_copybreak;
  1344. break;
  1345. default:
  1346. return -EOPNOTSUPP;
  1347. }
  1348. return 0;
  1349. }
  1350. static const struct ethtool_ops qede_ethtool_ops = {
  1351. .get_link_ksettings = qede_get_link_ksettings,
  1352. .set_link_ksettings = qede_set_link_ksettings,
  1353. .get_drvinfo = qede_get_drvinfo,
  1354. .get_regs_len = qede_get_regs_len,
  1355. .get_regs = qede_get_regs,
  1356. .get_wol = qede_get_wol,
  1357. .set_wol = qede_set_wol,
  1358. .get_msglevel = qede_get_msglevel,
  1359. .set_msglevel = qede_set_msglevel,
  1360. .nway_reset = qede_nway_reset,
  1361. .get_link = qede_get_link,
  1362. .get_coalesce = qede_get_coalesce,
  1363. .set_coalesce = qede_set_coalesce,
  1364. .get_ringparam = qede_get_ringparam,
  1365. .set_ringparam = qede_set_ringparam,
  1366. .get_pauseparam = qede_get_pauseparam,
  1367. .set_pauseparam = qede_set_pauseparam,
  1368. .get_strings = qede_get_strings,
  1369. .set_phys_id = qede_set_phys_id,
  1370. .get_ethtool_stats = qede_get_ethtool_stats,
  1371. .get_priv_flags = qede_get_priv_flags,
  1372. .get_sset_count = qede_get_sset_count,
  1373. .get_rxnfc = qede_get_rxnfc,
  1374. .set_rxnfc = qede_set_rxnfc,
  1375. .get_rxfh_indir_size = qede_get_rxfh_indir_size,
  1376. .get_rxfh_key_size = qede_get_rxfh_key_size,
  1377. .get_rxfh = qede_get_rxfh,
  1378. .set_rxfh = qede_set_rxfh,
  1379. .get_ts_info = qede_get_ts_info,
  1380. .get_channels = qede_get_channels,
  1381. .set_channels = qede_set_channels,
  1382. .self_test = qede_self_test,
  1383. .get_tunable = qede_get_tunable,
  1384. .set_tunable = qede_set_tunable,
  1385. };
  1386. static const struct ethtool_ops qede_vf_ethtool_ops = {
  1387. .get_link_ksettings = qede_get_link_ksettings,
  1388. .get_drvinfo = qede_get_drvinfo,
  1389. .get_msglevel = qede_get_msglevel,
  1390. .set_msglevel = qede_set_msglevel,
  1391. .get_link = qede_get_link,
  1392. .get_ringparam = qede_get_ringparam,
  1393. .set_ringparam = qede_set_ringparam,
  1394. .get_strings = qede_get_strings,
  1395. .get_ethtool_stats = qede_get_ethtool_stats,
  1396. .get_priv_flags = qede_get_priv_flags,
  1397. .get_sset_count = qede_get_sset_count,
  1398. .get_rxnfc = qede_get_rxnfc,
  1399. .set_rxnfc = qede_set_rxnfc,
  1400. .get_rxfh_indir_size = qede_get_rxfh_indir_size,
  1401. .get_rxfh_key_size = qede_get_rxfh_key_size,
  1402. .get_rxfh = qede_get_rxfh,
  1403. .set_rxfh = qede_set_rxfh,
  1404. .get_channels = qede_get_channels,
  1405. .set_channels = qede_set_channels,
  1406. .get_tunable = qede_get_tunable,
  1407. .set_tunable = qede_set_tunable,
  1408. };
  1409. void qede_set_ethtool_ops(struct net_device *dev)
  1410. {
  1411. struct qede_dev *edev = netdev_priv(dev);
  1412. if (IS_VF(edev))
  1413. dev->ethtool_ops = &qede_vf_ethtool_ops;
  1414. else
  1415. dev->ethtool_ops = &qede_ethtool_ops;
  1416. }