t4vf_common.h 13 KB

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  1. /*
  2. * This file is part of the Chelsio T4 PCI-E SR-IOV Virtual Function Ethernet
  3. * driver for Linux.
  4. *
  5. * Copyright (c) 2009-2010 Chelsio Communications, Inc. All rights reserved.
  6. *
  7. * This software is available to you under a choice of one of two
  8. * licenses. You may choose to be licensed under the terms of the GNU
  9. * General Public License (GPL) Version 2, available from the file
  10. * COPYING in the main directory of this source tree, or the
  11. * OpenIB.org BSD license below:
  12. *
  13. * Redistribution and use in source and binary forms, with or
  14. * without modification, are permitted provided that the following
  15. * conditions are met:
  16. *
  17. * - Redistributions of source code must retain the above
  18. * copyright notice, this list of conditions and the following
  19. * disclaimer.
  20. *
  21. * - Redistributions in binary form must reproduce the above
  22. * copyright notice, this list of conditions and the following
  23. * disclaimer in the documentation and/or other materials
  24. * provided with the distribution.
  25. *
  26. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33. * SOFTWARE.
  34. */
  35. #ifndef __T4VF_COMMON_H__
  36. #define __T4VF_COMMON_H__
  37. #include "../cxgb4/t4_hw.h"
  38. #include "../cxgb4/t4fw_api.h"
  39. #define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision))
  40. #define CHELSIO_CHIP_VERSION(code) (((code) >> 4) & 0xf)
  41. #define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf)
  42. /* All T4 and later chips have their PCI-E Device IDs encoded as 0xVFPP where:
  43. *
  44. * V = "4" for T4; "5" for T5, etc. or
  45. * = "a" for T4 FPGA; "b" for T4 FPGA, etc.
  46. * F = "0" for PF 0..3; "4".."7" for PF4..7; and "8" for VFs
  47. * PP = adapter product designation
  48. */
  49. #define CHELSIO_T4 0x4
  50. #define CHELSIO_T5 0x5
  51. #define CHELSIO_T6 0x6
  52. enum chip_type {
  53. T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1),
  54. T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2),
  55. T4_FIRST_REV = T4_A1,
  56. T4_LAST_REV = T4_A2,
  57. T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),
  58. T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1),
  59. T5_FIRST_REV = T5_A0,
  60. T5_LAST_REV = T5_A1,
  61. };
  62. /*
  63. * The "len16" field of a Firmware Command Structure ...
  64. */
  65. #define FW_LEN16(fw_struct) FW_CMD_LEN16_V(sizeof(fw_struct) / 16)
  66. /*
  67. * Per-VF statistics.
  68. */
  69. struct t4vf_port_stats {
  70. /*
  71. * TX statistics.
  72. */
  73. u64 tx_bcast_bytes; /* broadcast */
  74. u64 tx_bcast_frames;
  75. u64 tx_mcast_bytes; /* multicast */
  76. u64 tx_mcast_frames;
  77. u64 tx_ucast_bytes; /* unicast */
  78. u64 tx_ucast_frames;
  79. u64 tx_drop_frames; /* TX dropped frames */
  80. u64 tx_offload_bytes; /* offload */
  81. u64 tx_offload_frames;
  82. /*
  83. * RX statistics.
  84. */
  85. u64 rx_bcast_bytes; /* broadcast */
  86. u64 rx_bcast_frames;
  87. u64 rx_mcast_bytes; /* multicast */
  88. u64 rx_mcast_frames;
  89. u64 rx_ucast_bytes;
  90. u64 rx_ucast_frames; /* unicast */
  91. u64 rx_err_frames; /* RX error frames */
  92. };
  93. /*
  94. * Per-"port" (Virtual Interface) link configuration ...
  95. */
  96. struct link_config {
  97. unsigned int supported; /* link capabilities */
  98. unsigned int advertising; /* advertised capabilities */
  99. unsigned short lp_advertising; /* peer advertised capabilities */
  100. unsigned int requested_speed; /* speed user has requested */
  101. unsigned int speed; /* actual link speed */
  102. unsigned char requested_fc; /* flow control user has requested */
  103. unsigned char fc; /* actual link flow control */
  104. unsigned char autoneg; /* autonegotiating? */
  105. unsigned char link_ok; /* link up? */
  106. };
  107. enum {
  108. PAUSE_RX = 1 << 0,
  109. PAUSE_TX = 1 << 1,
  110. PAUSE_AUTONEG = 1 << 2
  111. };
  112. /*
  113. * General device parameters ...
  114. */
  115. struct dev_params {
  116. u32 fwrev; /* firmware version */
  117. u32 tprev; /* TP Microcode Version */
  118. };
  119. /*
  120. * Scatter Gather Engine parameters. These are almost all determined by the
  121. * Physical Function Driver. We just need to grab them to see within which
  122. * environment we're playing ...
  123. */
  124. struct sge_params {
  125. u32 sge_control; /* padding, boundaries, lengths, etc. */
  126. u32 sge_control2; /* T5: more of the same */
  127. u32 sge_host_page_size; /* PF0-7 page sizes */
  128. u32 sge_egress_queues_per_page; /* PF0-7 egress queues/page */
  129. u32 sge_ingress_queues_per_page;/* PF0-7 ingress queues/page */
  130. u32 sge_vf_hps; /* host page size for our vf */
  131. u32 sge_vf_eq_qpp; /* egress queues/page for our VF */
  132. u32 sge_vf_iq_qpp; /* ingress queues/page for our VF */
  133. u32 sge_fl_buffer_size[16]; /* free list buffer sizes */
  134. u32 sge_ingress_rx_threshold; /* RX counter interrupt threshold[4] */
  135. u32 sge_congestion_control; /* congestion thresholds, etc. */
  136. u32 sge_timer_value_0_and_1; /* interrupt coalescing timer values */
  137. u32 sge_timer_value_2_and_3;
  138. u32 sge_timer_value_4_and_5;
  139. };
  140. /*
  141. * Vital Product Data parameters.
  142. */
  143. struct vpd_params {
  144. u32 cclk; /* Core Clock (KHz) */
  145. };
  146. /* Stores chip specific parameters */
  147. struct arch_specific_params {
  148. u32 sge_fl_db;
  149. u16 mps_tcam_size;
  150. };
  151. /*
  152. * Global Receive Side Scaling (RSS) parameters in host-native format.
  153. */
  154. struct rss_params {
  155. unsigned int mode; /* RSS mode */
  156. union {
  157. struct {
  158. unsigned int synmapen:1; /* SYN Map Enable */
  159. unsigned int syn4tupenipv6:1; /* enable hashing 4-tuple IPv6 SYNs */
  160. unsigned int syn2tupenipv6:1; /* enable hashing 2-tuple IPv6 SYNs */
  161. unsigned int syn4tupenipv4:1; /* enable hashing 4-tuple IPv4 SYNs */
  162. unsigned int syn2tupenipv4:1; /* enable hashing 2-tuple IPv4 SYNs */
  163. unsigned int ofdmapen:1; /* Offload Map Enable */
  164. unsigned int tnlmapen:1; /* Tunnel Map Enable */
  165. unsigned int tnlalllookup:1; /* Tunnel All Lookup */
  166. unsigned int hashtoeplitz:1; /* use Toeplitz hash */
  167. } basicvirtual;
  168. } u;
  169. };
  170. /*
  171. * Virtual Interface RSS Configuration in host-native format.
  172. */
  173. union rss_vi_config {
  174. struct {
  175. u16 defaultq; /* Ingress Queue ID for !tnlalllookup */
  176. unsigned int ip6fourtupen:1; /* hash 4-tuple IPv6 ingress packets */
  177. unsigned int ip6twotupen:1; /* hash 2-tuple IPv6 ingress packets */
  178. unsigned int ip4fourtupen:1; /* hash 4-tuple IPv4 ingress packets */
  179. unsigned int ip4twotupen:1; /* hash 2-tuple IPv4 ingress packets */
  180. int udpen; /* hash 4-tuple UDP ingress packets */
  181. } basicvirtual;
  182. };
  183. /*
  184. * Maximum resources provisioned for a PCI VF.
  185. */
  186. struct vf_resources {
  187. unsigned int nvi; /* N virtual interfaces */
  188. unsigned int neq; /* N egress Qs */
  189. unsigned int nethctrl; /* N egress ETH or CTRL Qs */
  190. unsigned int niqflint; /* N ingress Qs/w free list(s) & intr */
  191. unsigned int niq; /* N ingress Qs */
  192. unsigned int tc; /* PCI-E traffic class */
  193. unsigned int pmask; /* port access rights mask */
  194. unsigned int nexactf; /* N exact MPS filters */
  195. unsigned int r_caps; /* read capabilities */
  196. unsigned int wx_caps; /* write/execute capabilities */
  197. };
  198. /*
  199. * Per-"adapter" (Virtual Function) parameters.
  200. */
  201. struct adapter_params {
  202. struct dev_params dev; /* general device parameters */
  203. struct sge_params sge; /* Scatter Gather Engine */
  204. struct vpd_params vpd; /* Vital Product Data */
  205. struct rss_params rss; /* Receive Side Scaling */
  206. struct vf_resources vfres; /* Virtual Function Resource limits */
  207. struct arch_specific_params arch; /* chip specific params */
  208. enum chip_type chip; /* chip code */
  209. u8 nports; /* # of Ethernet "ports" */
  210. };
  211. /* Firmware Mailbox Command/Reply log. All values are in Host-Endian format.
  212. * The access and execute times are signed in order to accommodate negative
  213. * error returns.
  214. */
  215. struct mbox_cmd {
  216. u64 cmd[MBOX_LEN / 8]; /* a Firmware Mailbox Command/Reply */
  217. u64 timestamp; /* OS-dependent timestamp */
  218. u32 seqno; /* sequence number */
  219. s16 access; /* time (ms) to access mailbox */
  220. s16 execute; /* time (ms) to execute */
  221. };
  222. struct mbox_cmd_log {
  223. unsigned int size; /* number of entries in the log */
  224. unsigned int cursor; /* next position in the log to write */
  225. u32 seqno; /* next sequence number */
  226. /* variable length mailbox command log starts here */
  227. };
  228. /* Given a pointer to a Firmware Mailbox Command Log and a log entry index,
  229. * return a pointer to the specified entry.
  230. */
  231. static inline struct mbox_cmd *mbox_cmd_log_entry(struct mbox_cmd_log *log,
  232. unsigned int entry_idx)
  233. {
  234. return &((struct mbox_cmd *)&(log)[1])[entry_idx];
  235. }
  236. #include "adapter.h"
  237. #ifndef PCI_VENDOR_ID_CHELSIO
  238. # define PCI_VENDOR_ID_CHELSIO 0x1425
  239. #endif
  240. #define for_each_port(adapter, iter) \
  241. for (iter = 0; iter < (adapter)->params.nports; iter++)
  242. static inline bool is_10g_port(const struct link_config *lc)
  243. {
  244. return (lc->supported & FW_PORT_CAP_SPEED_10G) != 0;
  245. }
  246. /* Return true if the Link Configuration supports "High Speeds" (those greater
  247. * than 1Gb/s).
  248. */
  249. static inline bool is_x_10g_port(const struct link_config *lc)
  250. {
  251. unsigned int speeds, high_speeds;
  252. speeds = FW_PORT_CAP_SPEED_V(FW_PORT_CAP_SPEED_G(lc->supported));
  253. high_speeds = speeds & ~(FW_PORT_CAP_SPEED_100M | FW_PORT_CAP_SPEED_1G);
  254. return high_speeds != 0;
  255. }
  256. static inline unsigned int core_ticks_per_usec(const struct adapter *adapter)
  257. {
  258. return adapter->params.vpd.cclk / 1000;
  259. }
  260. static inline unsigned int us_to_core_ticks(const struct adapter *adapter,
  261. unsigned int us)
  262. {
  263. return (us * adapter->params.vpd.cclk) / 1000;
  264. }
  265. static inline unsigned int core_ticks_to_us(const struct adapter *adapter,
  266. unsigned int ticks)
  267. {
  268. return (ticks * 1000) / adapter->params.vpd.cclk;
  269. }
  270. int t4vf_wr_mbox_core(struct adapter *, const void *, int, void *, bool);
  271. static inline int t4vf_wr_mbox(struct adapter *adapter, const void *cmd,
  272. int size, void *rpl)
  273. {
  274. return t4vf_wr_mbox_core(adapter, cmd, size, rpl, true);
  275. }
  276. static inline int t4vf_wr_mbox_ns(struct adapter *adapter, const void *cmd,
  277. int size, void *rpl)
  278. {
  279. return t4vf_wr_mbox_core(adapter, cmd, size, rpl, false);
  280. }
  281. #define CHELSIO_PCI_ID_VER(dev_id) ((dev_id) >> 12)
  282. static inline int is_t4(enum chip_type chip)
  283. {
  284. return CHELSIO_CHIP_VERSION(chip) == CHELSIO_T4;
  285. }
  286. /**
  287. * hash_mac_addr - return the hash value of a MAC address
  288. * @addr: the 48-bit Ethernet MAC address
  289. *
  290. * Hashes a MAC address according to the hash function used by hardware
  291. * inexact (hash) address matching.
  292. */
  293. static inline int hash_mac_addr(const u8 *addr)
  294. {
  295. u32 a = ((u32)addr[0] << 16) | ((u32)addr[1] << 8) | addr[2];
  296. u32 b = ((u32)addr[3] << 16) | ((u32)addr[4] << 8) | addr[5];
  297. a ^= b;
  298. a ^= (a >> 12);
  299. a ^= (a >> 6);
  300. return a & 0x3f;
  301. }
  302. int t4vf_wait_dev_ready(struct adapter *);
  303. int t4vf_port_init(struct adapter *, int);
  304. int t4vf_fw_reset(struct adapter *);
  305. int t4vf_set_params(struct adapter *, unsigned int, const u32 *, const u32 *);
  306. int t4vf_fl_pkt_align(struct adapter *adapter);
  307. enum t4_bar2_qtype { T4_BAR2_QTYPE_EGRESS, T4_BAR2_QTYPE_INGRESS };
  308. int t4vf_bar2_sge_qregs(struct adapter *adapter,
  309. unsigned int qid,
  310. enum t4_bar2_qtype qtype,
  311. u64 *pbar2_qoffset,
  312. unsigned int *pbar2_qid);
  313. unsigned int t4vf_get_pf_from_vf(struct adapter *);
  314. int t4vf_get_sge_params(struct adapter *);
  315. int t4vf_get_vpd_params(struct adapter *);
  316. int t4vf_get_dev_params(struct adapter *);
  317. int t4vf_get_rss_glb_config(struct adapter *);
  318. int t4vf_get_vfres(struct adapter *);
  319. int t4vf_read_rss_vi_config(struct adapter *, unsigned int,
  320. union rss_vi_config *);
  321. int t4vf_write_rss_vi_config(struct adapter *, unsigned int,
  322. union rss_vi_config *);
  323. int t4vf_config_rss_range(struct adapter *, unsigned int, int, int,
  324. const u16 *, int);
  325. int t4vf_alloc_vi(struct adapter *, int);
  326. int t4vf_free_vi(struct adapter *, int);
  327. int t4vf_enable_vi(struct adapter *, unsigned int, bool, bool);
  328. int t4vf_identify_port(struct adapter *, unsigned int, unsigned int);
  329. int t4vf_set_rxmode(struct adapter *, unsigned int, int, int, int, int, int,
  330. bool);
  331. int t4vf_alloc_mac_filt(struct adapter *, unsigned int, bool, unsigned int,
  332. const u8 **, u16 *, u64 *, bool);
  333. int t4vf_free_mac_filt(struct adapter *, unsigned int, unsigned int naddr,
  334. const u8 **, bool);
  335. int t4vf_change_mac(struct adapter *, unsigned int, int, const u8 *, bool);
  336. int t4vf_set_addr_hash(struct adapter *, unsigned int, bool, u64, bool);
  337. int t4vf_get_port_stats(struct adapter *, int, struct t4vf_port_stats *);
  338. int t4vf_iq_free(struct adapter *, unsigned int, unsigned int, unsigned int,
  339. unsigned int);
  340. int t4vf_eth_eq_free(struct adapter *, unsigned int);
  341. int t4vf_handle_fw_rpl(struct adapter *, const __be64 *);
  342. int t4vf_prep_adapter(struct adapter *);
  343. int t4vf_get_vf_mac_acl(struct adapter *adapter, unsigned int pf,
  344. unsigned int *naddr, u8 *addr);
  345. #endif /* __T4VF_COMMON_H__ */