cx88-dvb.c 48 KB

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  1. /*
  2. * device driver for Conexant 2388x based TV cards
  3. * MPEG Transport Stream (DVB) routines
  4. *
  5. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  6. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include "cx88.h"
  19. #include "dvb-pll.h"
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/device.h>
  23. #include <linux/fs.h>
  24. #include <linux/kthread.h>
  25. #include <linux/file.h>
  26. #include <linux/suspend.h>
  27. #include <media/v4l2-common.h>
  28. #include "mt352.h"
  29. #include "mt352_priv.h"
  30. #include "cx88-vp3054-i2c.h"
  31. #include "zl10353.h"
  32. #include "cx22702.h"
  33. #include "or51132.h"
  34. #include "lgdt330x.h"
  35. #include "s5h1409.h"
  36. #include "xc4000.h"
  37. #include "xc5000.h"
  38. #include "nxt200x.h"
  39. #include "cx24123.h"
  40. #include "isl6421.h"
  41. #include "tuner-simple.h"
  42. #include "tda9887.h"
  43. #include "s5h1411.h"
  44. #include "stv0299.h"
  45. #include "z0194a.h"
  46. #include "stv0288.h"
  47. #include "stb6000.h"
  48. #include "cx24116.h"
  49. #include "stv0900.h"
  50. #include "stb6100.h"
  51. #include "stb6100_proc.h"
  52. #include "mb86a16.h"
  53. #include "ts2020.h"
  54. #include "ds3000.h"
  55. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  56. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  57. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  58. MODULE_LICENSE("GPL");
  59. MODULE_VERSION(CX88_VERSION);
  60. static unsigned int debug;
  61. module_param(debug, int, 0644);
  62. MODULE_PARM_DESC(debug, "enable debug messages [dvb]");
  63. static unsigned int dvb_buf_tscnt = 32;
  64. module_param(dvb_buf_tscnt, int, 0644);
  65. MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
  66. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  67. #define dprintk(level, fmt, arg...) do { \
  68. if (debug >= level) \
  69. printk(KERN_DEBUG pr_fmt("%s: dvb:" fmt), \
  70. __func__, ##arg); \
  71. } while (0)
  72. /* ------------------------------------------------------------------ */
  73. static int queue_setup(struct vb2_queue *q,
  74. unsigned int *num_buffers, unsigned int *num_planes,
  75. unsigned int sizes[], struct device *alloc_devs[])
  76. {
  77. struct cx8802_dev *dev = q->drv_priv;
  78. *num_planes = 1;
  79. dev->ts_packet_size = 188 * 4;
  80. dev->ts_packet_count = dvb_buf_tscnt;
  81. sizes[0] = dev->ts_packet_size * dev->ts_packet_count;
  82. *num_buffers = dvb_buf_tscnt;
  83. return 0;
  84. }
  85. static int buffer_prepare(struct vb2_buffer *vb)
  86. {
  87. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  88. struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
  89. struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
  90. return cx8802_buf_prepare(vb->vb2_queue, dev, buf);
  91. }
  92. static void buffer_finish(struct vb2_buffer *vb)
  93. {
  94. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  95. struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
  96. struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
  97. struct cx88_riscmem *risc = &buf->risc;
  98. if (risc->cpu)
  99. pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
  100. memset(risc, 0, sizeof(*risc));
  101. }
  102. static void buffer_queue(struct vb2_buffer *vb)
  103. {
  104. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  105. struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
  106. struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
  107. cx8802_buf_queue(dev, buf);
  108. }
  109. static int start_streaming(struct vb2_queue *q, unsigned int count)
  110. {
  111. struct cx8802_dev *dev = q->drv_priv;
  112. struct cx88_dmaqueue *dmaq = &dev->mpegq;
  113. struct cx88_buffer *buf;
  114. buf = list_entry(dmaq->active.next, struct cx88_buffer, list);
  115. cx8802_start_dma(dev, dmaq, buf);
  116. return 0;
  117. }
  118. static void stop_streaming(struct vb2_queue *q)
  119. {
  120. struct cx8802_dev *dev = q->drv_priv;
  121. struct cx88_dmaqueue *dmaq = &dev->mpegq;
  122. unsigned long flags;
  123. cx8802_cancel_buffers(dev);
  124. spin_lock_irqsave(&dev->slock, flags);
  125. while (!list_empty(&dmaq->active)) {
  126. struct cx88_buffer *buf = list_entry(dmaq->active.next,
  127. struct cx88_buffer, list);
  128. list_del(&buf->list);
  129. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  130. }
  131. spin_unlock_irqrestore(&dev->slock, flags);
  132. }
  133. static const struct vb2_ops dvb_qops = {
  134. .queue_setup = queue_setup,
  135. .buf_prepare = buffer_prepare,
  136. .buf_finish = buffer_finish,
  137. .buf_queue = buffer_queue,
  138. .wait_prepare = vb2_ops_wait_prepare,
  139. .wait_finish = vb2_ops_wait_finish,
  140. .start_streaming = start_streaming,
  141. .stop_streaming = stop_streaming,
  142. };
  143. /* ------------------------------------------------------------------ */
  144. static int cx88_dvb_bus_ctrl(struct dvb_frontend *fe, int acquire)
  145. {
  146. struct cx8802_dev *dev = fe->dvb->priv;
  147. struct cx8802_driver *drv = NULL;
  148. int ret = 0;
  149. int fe_id;
  150. fe_id = vb2_dvb_find_frontend(&dev->frontends, fe);
  151. if (!fe_id) {
  152. pr_err("%s() No frontend found\n", __func__);
  153. return -EINVAL;
  154. }
  155. mutex_lock(&dev->core->lock);
  156. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  157. if (drv) {
  158. if (acquire) {
  159. dev->frontends.active_fe_id = fe_id;
  160. ret = drv->request_acquire(drv);
  161. } else {
  162. ret = drv->request_release(drv);
  163. dev->frontends.active_fe_id = 0;
  164. }
  165. }
  166. mutex_unlock(&dev->core->lock);
  167. return ret;
  168. }
  169. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  170. {
  171. struct vb2_dvb_frontends *f;
  172. struct vb2_dvb_frontend *fe;
  173. if (!core->dvbdev)
  174. return;
  175. f = &core->dvbdev->frontends;
  176. if (!f)
  177. return;
  178. if (f->gate <= 1) /* undefined or fe0 */
  179. fe = vb2_dvb_get_frontend(f, 1);
  180. else
  181. fe = vb2_dvb_get_frontend(f, f->gate);
  182. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  183. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  184. }
  185. /* ------------------------------------------------------------------ */
  186. static int dvico_fusionhdtv_demod_init(struct dvb_frontend *fe)
  187. {
  188. static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x39 };
  189. static const u8 reset[] = { RESET, 0x80 };
  190. static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
  191. static const u8 agc_cfg[] = { AGC_TARGET, 0x24, 0x20 };
  192. static const u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 };
  193. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  194. mt352_write(fe, clock_config, sizeof(clock_config));
  195. udelay(200);
  196. mt352_write(fe, reset, sizeof(reset));
  197. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  198. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  199. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  200. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  201. return 0;
  202. }
  203. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  204. {
  205. static const u8 clock_config[] = { CLOCK_CTL, 0x38, 0x38 };
  206. static const u8 reset[] = { RESET, 0x80 };
  207. static const u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
  208. static const u8 agc_cfg[] = { AGC_TARGET, 0x28, 0x20 };
  209. static const u8 gpp_ctl_cfg[] = { GPP_CTL, 0x33 };
  210. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  211. mt352_write(fe, clock_config, sizeof(clock_config));
  212. udelay(200);
  213. mt352_write(fe, reset, sizeof(reset));
  214. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  215. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  216. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  217. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  218. return 0;
  219. }
  220. static int dntv_live_dvbt_demod_init(struct dvb_frontend *fe)
  221. {
  222. static const u8 clock_config[] = { 0x89, 0x38, 0x39 };
  223. static const u8 reset[] = { 0x50, 0x80 };
  224. static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 };
  225. static const u8 agc_cfg[] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  226. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  227. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  228. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  229. mt352_write(fe, clock_config, sizeof(clock_config));
  230. udelay(2000);
  231. mt352_write(fe, reset, sizeof(reset));
  232. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  233. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  234. udelay(2000);
  235. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  236. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  237. return 0;
  238. }
  239. static const struct mt352_config dvico_fusionhdtv = {
  240. .demod_address = 0x0f,
  241. .demod_init = dvico_fusionhdtv_demod_init,
  242. };
  243. static const struct mt352_config dntv_live_dvbt_config = {
  244. .demod_address = 0x0f,
  245. .demod_init = dntv_live_dvbt_demod_init,
  246. };
  247. static const struct mt352_config dvico_fusionhdtv_dual = {
  248. .demod_address = 0x0f,
  249. .demod_init = dvico_dual_demod_init,
  250. };
  251. static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
  252. .demod_address = (0x1e >> 1),
  253. .no_tuner = 1,
  254. .if2 = 45600,
  255. };
  256. static const struct mb86a16_config twinhan_vp1027 = {
  257. .demod_address = 0x08,
  258. };
  259. #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
  260. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend *fe)
  261. {
  262. static const u8 clock_config[] = { 0x89, 0x38, 0x38 };
  263. static const u8 reset[] = { 0x50, 0x80 };
  264. static const u8 adc_ctl_1_cfg[] = { 0x8E, 0x40 };
  265. static const u8 agc_cfg[] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  266. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  267. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  268. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  269. mt352_write(fe, clock_config, sizeof(clock_config));
  270. udelay(2000);
  271. mt352_write(fe, reset, sizeof(reset));
  272. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  273. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  274. udelay(2000);
  275. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  276. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  277. return 0;
  278. }
  279. static const struct mt352_config dntv_live_dvbt_pro_config = {
  280. .demod_address = 0x0f,
  281. .no_tuner = 1,
  282. .demod_init = dntv_live_dvbt_pro_demod_init,
  283. };
  284. #endif
  285. static const struct zl10353_config dvico_fusionhdtv_hybrid = {
  286. .demod_address = 0x0f,
  287. .no_tuner = 1,
  288. };
  289. static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
  290. .demod_address = 0x0f,
  291. .if2 = 45600,
  292. .no_tuner = 1,
  293. };
  294. static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  295. .demod_address = 0x0f,
  296. .if2 = 4560,
  297. .no_tuner = 1,
  298. .demod_init = dvico_fusionhdtv_demod_init,
  299. };
  300. static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  301. .demod_address = 0x0f,
  302. };
  303. static const struct cx22702_config connexant_refboard_config = {
  304. .demod_address = 0x43,
  305. .output_mode = CX22702_SERIAL_OUTPUT,
  306. };
  307. static const struct cx22702_config hauppauge_hvr_config = {
  308. .demod_address = 0x63,
  309. .output_mode = CX22702_SERIAL_OUTPUT,
  310. };
  311. static int or51132_set_ts_param(struct dvb_frontend *fe, int is_punctured)
  312. {
  313. struct cx8802_dev *dev = fe->dvb->priv;
  314. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  315. return 0;
  316. }
  317. static const struct or51132_config pchdtv_hd3000 = {
  318. .demod_address = 0x15,
  319. .set_ts_params = or51132_set_ts_param,
  320. };
  321. static int lgdt330x_pll_rf_set(struct dvb_frontend *fe, int index)
  322. {
  323. struct cx8802_dev *dev = fe->dvb->priv;
  324. struct cx88_core *core = dev->core;
  325. dprintk(1, "%s: index = %d\n", __func__, index);
  326. if (index == 0)
  327. cx_clear(MO_GP0_IO, 8);
  328. else
  329. cx_set(MO_GP0_IO, 8);
  330. return 0;
  331. }
  332. static int lgdt330x_set_ts_param(struct dvb_frontend *fe, int is_punctured)
  333. {
  334. struct cx8802_dev *dev = fe->dvb->priv;
  335. if (is_punctured)
  336. dev->ts_gen_cntrl |= 0x04;
  337. else
  338. dev->ts_gen_cntrl &= ~0x04;
  339. return 0;
  340. }
  341. static struct lgdt330x_config fusionhdtv_3_gold = {
  342. .demod_address = 0x0e,
  343. .demod_chip = LGDT3302,
  344. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  345. .set_ts_params = lgdt330x_set_ts_param,
  346. };
  347. static const struct lgdt330x_config fusionhdtv_5_gold = {
  348. .demod_address = 0x0e,
  349. .demod_chip = LGDT3303,
  350. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  351. .set_ts_params = lgdt330x_set_ts_param,
  352. };
  353. static const struct lgdt330x_config pchdtv_hd5500 = {
  354. .demod_address = 0x59,
  355. .demod_chip = LGDT3303,
  356. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  357. .set_ts_params = lgdt330x_set_ts_param,
  358. };
  359. static int nxt200x_set_ts_param(struct dvb_frontend *fe, int is_punctured)
  360. {
  361. struct cx8802_dev *dev = fe->dvb->priv;
  362. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  363. return 0;
  364. }
  365. static const struct nxt200x_config ati_hdtvwonder = {
  366. .demod_address = 0x0a,
  367. .set_ts_params = nxt200x_set_ts_param,
  368. };
  369. static int cx24123_set_ts_param(struct dvb_frontend *fe,
  370. int is_punctured)
  371. {
  372. struct cx8802_dev *dev = fe->dvb->priv;
  373. dev->ts_gen_cntrl = 0x02;
  374. return 0;
  375. }
  376. static int kworld_dvbs_100_set_voltage(struct dvb_frontend *fe,
  377. enum fe_sec_voltage voltage)
  378. {
  379. struct cx8802_dev *dev = fe->dvb->priv;
  380. struct cx88_core *core = dev->core;
  381. if (voltage == SEC_VOLTAGE_OFF)
  382. cx_write(MO_GP0_IO, 0x000006fb);
  383. else
  384. cx_write(MO_GP0_IO, 0x000006f9);
  385. if (core->prev_set_voltage)
  386. return core->prev_set_voltage(fe, voltage);
  387. return 0;
  388. }
  389. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  390. enum fe_sec_voltage voltage)
  391. {
  392. struct cx8802_dev *dev = fe->dvb->priv;
  393. struct cx88_core *core = dev->core;
  394. if (voltage == SEC_VOLTAGE_OFF) {
  395. dprintk(1, "LNB Voltage OFF\n");
  396. cx_write(MO_GP0_IO, 0x0000efff);
  397. }
  398. if (core->prev_set_voltage)
  399. return core->prev_set_voltage(fe, voltage);
  400. return 0;
  401. }
  402. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  403. enum fe_sec_voltage voltage)
  404. {
  405. struct cx8802_dev *dev = fe->dvb->priv;
  406. struct cx88_core *core = dev->core;
  407. cx_set(MO_GP0_IO, 0x6040);
  408. switch (voltage) {
  409. case SEC_VOLTAGE_13:
  410. cx_clear(MO_GP0_IO, 0x20);
  411. break;
  412. case SEC_VOLTAGE_18:
  413. cx_set(MO_GP0_IO, 0x20);
  414. break;
  415. case SEC_VOLTAGE_OFF:
  416. cx_clear(MO_GP0_IO, 0x20);
  417. break;
  418. }
  419. if (core->prev_set_voltage)
  420. return core->prev_set_voltage(fe, voltage);
  421. return 0;
  422. }
  423. static int vp1027_set_voltage(struct dvb_frontend *fe,
  424. enum fe_sec_voltage voltage)
  425. {
  426. struct cx8802_dev *dev = fe->dvb->priv;
  427. struct cx88_core *core = dev->core;
  428. switch (voltage) {
  429. case SEC_VOLTAGE_13:
  430. dprintk(1, "LNB SEC Voltage=13\n");
  431. cx_write(MO_GP0_IO, 0x00001220);
  432. break;
  433. case SEC_VOLTAGE_18:
  434. dprintk(1, "LNB SEC Voltage=18\n");
  435. cx_write(MO_GP0_IO, 0x00001222);
  436. break;
  437. case SEC_VOLTAGE_OFF:
  438. dprintk(1, "LNB Voltage OFF\n");
  439. cx_write(MO_GP0_IO, 0x00001230);
  440. break;
  441. }
  442. if (core->prev_set_voltage)
  443. return core->prev_set_voltage(fe, voltage);
  444. return 0;
  445. }
  446. static const struct cx24123_config geniatech_dvbs_config = {
  447. .demod_address = 0x55,
  448. .set_ts_params = cx24123_set_ts_param,
  449. };
  450. static const struct cx24123_config hauppauge_novas_config = {
  451. .demod_address = 0x55,
  452. .set_ts_params = cx24123_set_ts_param,
  453. };
  454. static const struct cx24123_config kworld_dvbs_100_config = {
  455. .demod_address = 0x15,
  456. .set_ts_params = cx24123_set_ts_param,
  457. .lnb_polarity = 1,
  458. };
  459. static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  460. .demod_address = 0x32 >> 1,
  461. .output_mode = S5H1409_PARALLEL_OUTPUT,
  462. .gpio = S5H1409_GPIO_ON,
  463. .qam_if = 44000,
  464. .inversion = S5H1409_INVERSION_OFF,
  465. .status_mode = S5H1409_DEMODLOCKING,
  466. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  467. };
  468. static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  469. .demod_address = 0x32 >> 1,
  470. .output_mode = S5H1409_SERIAL_OUTPUT,
  471. .gpio = S5H1409_GPIO_OFF,
  472. .inversion = S5H1409_INVERSION_OFF,
  473. .status_mode = S5H1409_DEMODLOCKING,
  474. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  475. };
  476. static const struct s5h1409_config kworld_atsc_120_config = {
  477. .demod_address = 0x32 >> 1,
  478. .output_mode = S5H1409_SERIAL_OUTPUT,
  479. .gpio = S5H1409_GPIO_OFF,
  480. .inversion = S5H1409_INVERSION_OFF,
  481. .status_mode = S5H1409_DEMODLOCKING,
  482. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  483. };
  484. static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  485. .i2c_address = 0x64,
  486. .if_khz = 5380,
  487. };
  488. static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  489. .demod_address = (0x1e >> 1),
  490. .no_tuner = 1,
  491. .if2 = 45600,
  492. };
  493. static const struct zl10353_config cx88_geniatech_x8000_mt = {
  494. .demod_address = (0x1e >> 1),
  495. .no_tuner = 1,
  496. .disable_i2c_gate_ctrl = 1,
  497. };
  498. static const struct s5h1411_config dvico_fusionhdtv7_config = {
  499. .output_mode = S5H1411_SERIAL_OUTPUT,
  500. .gpio = S5H1411_GPIO_ON,
  501. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  502. .qam_if = S5H1411_IF_44000,
  503. .vsb_if = S5H1411_IF_44000,
  504. .inversion = S5H1411_INVERSION_OFF,
  505. .status_mode = S5H1411_DEMODLOCKING
  506. };
  507. static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  508. .i2c_address = 0xc2 >> 1,
  509. .if_khz = 5380,
  510. };
  511. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  512. {
  513. struct dvb_frontend *fe;
  514. struct vb2_dvb_frontend *fe0 = NULL;
  515. struct xc2028_ctrl ctl;
  516. struct xc2028_config cfg = {
  517. .i2c_adap = &dev->core->i2c_adap,
  518. .i2c_addr = addr,
  519. .ctrl = &ctl,
  520. };
  521. /* Get the first frontend */
  522. fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
  523. if (!fe0)
  524. return -EINVAL;
  525. if (!fe0->dvb.frontend) {
  526. pr_err("dvb frontend not attached. Can't attach xc3028\n");
  527. return -EINVAL;
  528. }
  529. /*
  530. * Some xc3028 devices may be hidden by an I2C gate. This is known
  531. * to happen with some s5h1409-based devices.
  532. * Now that I2C gate is open, sets up xc3028 configuration
  533. */
  534. cx88_setup_xc3028(dev->core, &ctl);
  535. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  536. if (!fe) {
  537. pr_err("xc3028 attach failed\n");
  538. dvb_frontend_detach(fe0->dvb.frontend);
  539. dvb_unregister_frontend(fe0->dvb.frontend);
  540. fe0->dvb.frontend = NULL;
  541. return -EINVAL;
  542. }
  543. pr_info("xc3028 attached\n");
  544. return 0;
  545. }
  546. static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg)
  547. {
  548. struct dvb_frontend *fe;
  549. struct vb2_dvb_frontend *fe0 = NULL;
  550. /* Get the first frontend */
  551. fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
  552. if (!fe0)
  553. return -EINVAL;
  554. if (!fe0->dvb.frontend) {
  555. pr_err("dvb frontend not attached. Can't attach xc4000\n");
  556. return -EINVAL;
  557. }
  558. fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap,
  559. cfg);
  560. if (!fe) {
  561. pr_err("xc4000 attach failed\n");
  562. dvb_frontend_detach(fe0->dvb.frontend);
  563. dvb_unregister_frontend(fe0->dvb.frontend);
  564. fe0->dvb.frontend = NULL;
  565. return -EINVAL;
  566. }
  567. pr_info("xc4000 attached\n");
  568. return 0;
  569. }
  570. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  571. int is_punctured)
  572. {
  573. struct cx8802_dev *dev = fe->dvb->priv;
  574. dev->ts_gen_cntrl = 0x2;
  575. return 0;
  576. }
  577. static int stv0900_set_ts_param(struct dvb_frontend *fe,
  578. int is_punctured)
  579. {
  580. struct cx8802_dev *dev = fe->dvb->priv;
  581. dev->ts_gen_cntrl = 0;
  582. return 0;
  583. }
  584. static int cx24116_reset_device(struct dvb_frontend *fe)
  585. {
  586. struct cx8802_dev *dev = fe->dvb->priv;
  587. struct cx88_core *core = dev->core;
  588. /* Reset the part */
  589. /* Put the cx24116 into reset */
  590. cx_write(MO_SRST_IO, 0);
  591. usleep_range(10000, 20000);
  592. /* Take the cx24116 out of reset */
  593. cx_write(MO_SRST_IO, 1);
  594. usleep_range(10000, 20000);
  595. return 0;
  596. }
  597. static const struct cx24116_config hauppauge_hvr4000_config = {
  598. .demod_address = 0x05,
  599. .set_ts_params = cx24116_set_ts_param,
  600. .reset_device = cx24116_reset_device,
  601. };
  602. static const struct cx24116_config tevii_s460_config = {
  603. .demod_address = 0x55,
  604. .set_ts_params = cx24116_set_ts_param,
  605. .reset_device = cx24116_reset_device,
  606. };
  607. static int ds3000_set_ts_param(struct dvb_frontend *fe,
  608. int is_punctured)
  609. {
  610. struct cx8802_dev *dev = fe->dvb->priv;
  611. dev->ts_gen_cntrl = 4;
  612. return 0;
  613. }
  614. static struct ds3000_config tevii_ds3000_config = {
  615. .demod_address = 0x68,
  616. .set_ts_params = ds3000_set_ts_param,
  617. };
  618. static struct ts2020_config tevii_ts2020_config = {
  619. .tuner_address = 0x60,
  620. .clk_out_div = 1,
  621. };
  622. static const struct stv0900_config prof_7301_stv0900_config = {
  623. .demod_address = 0x6a,
  624. /* demod_mode = 0,*/
  625. .xtal = 27000000,
  626. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  627. .diseqc_mode = 2,/* 2/3 PWM */
  628. .tun1_maddress = 0,/* 0x60 */
  629. .tun1_adc = 0,/* 2 Vpp */
  630. .path1_mode = 3,
  631. .set_ts_params = stv0900_set_ts_param,
  632. };
  633. static const struct stb6100_config prof_7301_stb6100_config = {
  634. .tuner_address = 0x60,
  635. .refclock = 27000000,
  636. };
  637. static const struct stv0299_config tevii_tuner_sharp_config = {
  638. .demod_address = 0x68,
  639. .inittab = sharp_z0194a_inittab,
  640. .mclk = 88000000UL,
  641. .invert = 1,
  642. .skip_reinit = 0,
  643. .lock_output = 1,
  644. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  645. .min_delay_ms = 100,
  646. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  647. .set_ts_params = cx24116_set_ts_param,
  648. };
  649. static const struct stv0288_config tevii_tuner_earda_config = {
  650. .demod_address = 0x68,
  651. .min_delay_ms = 100,
  652. .set_ts_params = cx24116_set_ts_param,
  653. };
  654. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  655. {
  656. struct cx88_core *core = dev->core;
  657. struct vb2_dvb_frontend *fe = NULL;
  658. int i;
  659. mutex_init(&dev->frontends.lock);
  660. INIT_LIST_HEAD(&dev->frontends.felist);
  661. if (!core->board.num_frontends)
  662. return -ENODEV;
  663. pr_info("%s: allocating %d frontend(s)\n", __func__,
  664. core->board.num_frontends);
  665. for (i = 1; i <= core->board.num_frontends; i++) {
  666. fe = vb2_dvb_alloc_frontend(&dev->frontends, i);
  667. if (!fe) {
  668. pr_err("%s() failed to alloc\n", __func__);
  669. vb2_dvb_dealloc_frontends(&dev->frontends);
  670. return -ENOMEM;
  671. }
  672. }
  673. return 0;
  674. }
  675. static const u8 samsung_smt_7020_inittab[] = {
  676. 0x01, 0x15,
  677. 0x02, 0x00,
  678. 0x03, 0x00,
  679. 0x04, 0x7D,
  680. 0x05, 0x0F,
  681. 0x06, 0x02,
  682. 0x07, 0x00,
  683. 0x08, 0x60,
  684. 0x0A, 0xC2,
  685. 0x0B, 0x00,
  686. 0x0C, 0x01,
  687. 0x0D, 0x81,
  688. 0x0E, 0x44,
  689. 0x0F, 0x09,
  690. 0x10, 0x3C,
  691. 0x11, 0x84,
  692. 0x12, 0xDA,
  693. 0x13, 0x99,
  694. 0x14, 0x8D,
  695. 0x15, 0xCE,
  696. 0x16, 0xE8,
  697. 0x17, 0x43,
  698. 0x18, 0x1C,
  699. 0x19, 0x1B,
  700. 0x1A, 0x1D,
  701. 0x1C, 0x12,
  702. 0x1D, 0x00,
  703. 0x1E, 0x00,
  704. 0x1F, 0x00,
  705. 0x20, 0x00,
  706. 0x21, 0x00,
  707. 0x22, 0x00,
  708. 0x23, 0x00,
  709. 0x28, 0x02,
  710. 0x29, 0x28,
  711. 0x2A, 0x14,
  712. 0x2B, 0x0F,
  713. 0x2C, 0x09,
  714. 0x2D, 0x05,
  715. 0x31, 0x1F,
  716. 0x32, 0x19,
  717. 0x33, 0xFC,
  718. 0x34, 0x13,
  719. 0xff, 0xff,
  720. };
  721. static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe)
  722. {
  723. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  724. struct cx8802_dev *dev = fe->dvb->priv;
  725. u8 buf[4];
  726. u32 div;
  727. struct i2c_msg msg = {
  728. .addr = 0x61,
  729. .flags = 0,
  730. .buf = buf,
  731. .len = sizeof(buf) };
  732. div = c->frequency / 125;
  733. buf[0] = (div >> 8) & 0x7f;
  734. buf[1] = div & 0xff;
  735. buf[2] = 0x84; /* 0xC4 */
  736. buf[3] = 0x00;
  737. if (c->frequency < 1500000)
  738. buf[3] |= 0x10;
  739. if (fe->ops.i2c_gate_ctrl)
  740. fe->ops.i2c_gate_ctrl(fe, 1);
  741. if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
  742. return -EIO;
  743. return 0;
  744. }
  745. static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
  746. enum fe_sec_tone_mode tone)
  747. {
  748. struct cx8802_dev *dev = fe->dvb->priv;
  749. struct cx88_core *core = dev->core;
  750. cx_set(MO_GP0_IO, 0x0800);
  751. switch (tone) {
  752. case SEC_TONE_ON:
  753. cx_set(MO_GP0_IO, 0x08);
  754. break;
  755. case SEC_TONE_OFF:
  756. cx_clear(MO_GP0_IO, 0x08);
  757. break;
  758. default:
  759. return -EINVAL;
  760. }
  761. return 0;
  762. }
  763. static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
  764. enum fe_sec_voltage voltage)
  765. {
  766. struct cx8802_dev *dev = fe->dvb->priv;
  767. struct cx88_core *core = dev->core;
  768. u8 data;
  769. struct i2c_msg msg = {
  770. .addr = 8,
  771. .flags = 0,
  772. .buf = &data,
  773. .len = sizeof(data) };
  774. cx_set(MO_GP0_IO, 0x8000);
  775. switch (voltage) {
  776. case SEC_VOLTAGE_OFF:
  777. break;
  778. case SEC_VOLTAGE_13:
  779. data = ISL6421_EN1 | ISL6421_LLC1;
  780. cx_clear(MO_GP0_IO, 0x80);
  781. break;
  782. case SEC_VOLTAGE_18:
  783. data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
  784. cx_clear(MO_GP0_IO, 0x80);
  785. break;
  786. default:
  787. return -EINVAL;
  788. }
  789. return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
  790. }
  791. static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
  792. u32 srate, u32 ratio)
  793. {
  794. u8 aclk = 0;
  795. u8 bclk = 0;
  796. if (srate < 1500000) {
  797. aclk = 0xb7;
  798. bclk = 0x47;
  799. } else if (srate < 3000000) {
  800. aclk = 0xb7;
  801. bclk = 0x4b;
  802. } else if (srate < 7000000) {
  803. aclk = 0xb7;
  804. bclk = 0x4f;
  805. } else if (srate < 14000000) {
  806. aclk = 0xb7;
  807. bclk = 0x53;
  808. } else if (srate < 30000000) {
  809. aclk = 0xb6;
  810. bclk = 0x53;
  811. } else if (srate < 45000000) {
  812. aclk = 0xb4;
  813. bclk = 0x51;
  814. }
  815. stv0299_writereg(fe, 0x13, aclk);
  816. stv0299_writereg(fe, 0x14, bclk);
  817. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  818. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  819. stv0299_writereg(fe, 0x21, ratio & 0xf0);
  820. return 0;
  821. }
  822. static const struct stv0299_config samsung_stv0299_config = {
  823. .demod_address = 0x68,
  824. .inittab = samsung_smt_7020_inittab,
  825. .mclk = 88000000UL,
  826. .invert = 0,
  827. .skip_reinit = 0,
  828. .lock_output = STV0299_LOCKOUTPUT_LK,
  829. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  830. .min_delay_ms = 100,
  831. .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
  832. };
  833. static int dvb_register(struct cx8802_dev *dev)
  834. {
  835. struct cx88_core *core = dev->core;
  836. struct vb2_dvb_frontend *fe0, *fe1 = NULL;
  837. int mfe_shared = 0; /* bus not shared by default */
  838. int res = -EINVAL;
  839. if (core->i2c_rc != 0) {
  840. pr_err("no i2c-bus available, cannot attach dvb drivers\n");
  841. goto frontend_detach;
  842. }
  843. /* Get the first frontend */
  844. fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
  845. if (!fe0)
  846. goto frontend_detach;
  847. /* multi-frontend gate control is undefined or defaults to fe0 */
  848. dev->frontends.gate = 0;
  849. /* Sets the gate control callback to be used by i2c command calls */
  850. core->gate_ctrl = cx88_dvb_gate_ctrl;
  851. /* init frontend(s) */
  852. switch (core->boardnr) {
  853. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  854. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  855. &connexant_refboard_config,
  856. &core->i2c_adap);
  857. if (fe0->dvb.frontend) {
  858. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  859. 0x61, &core->i2c_adap,
  860. DVB_PLL_THOMSON_DTT759X))
  861. goto frontend_detach;
  862. }
  863. break;
  864. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  865. case CX88_BOARD_CONEXANT_DVB_T1:
  866. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  867. case CX88_BOARD_WINFAST_DTV1000:
  868. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  869. &connexant_refboard_config,
  870. &core->i2c_adap);
  871. if (fe0->dvb.frontend) {
  872. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  873. 0x60, &core->i2c_adap,
  874. DVB_PLL_THOMSON_DTT7579))
  875. goto frontend_detach;
  876. }
  877. break;
  878. case CX88_BOARD_WINFAST_DTV2000H:
  879. case CX88_BOARD_HAUPPAUGE_HVR1100:
  880. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  881. case CX88_BOARD_HAUPPAUGE_HVR1300:
  882. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  883. &hauppauge_hvr_config,
  884. &core->i2c_adap);
  885. if (fe0->dvb.frontend) {
  886. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  887. &core->i2c_adap, 0x61,
  888. TUNER_PHILIPS_FMD1216ME_MK3))
  889. goto frontend_detach;
  890. }
  891. break;
  892. case CX88_BOARD_WINFAST_DTV2000H_J:
  893. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  894. &hauppauge_hvr_config,
  895. &core->i2c_adap);
  896. if (fe0->dvb.frontend) {
  897. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  898. &core->i2c_adap, 0x61,
  899. TUNER_PHILIPS_FMD1216MEX_MK3))
  900. goto frontend_detach;
  901. }
  902. break;
  903. case CX88_BOARD_HAUPPAUGE_HVR3000:
  904. /* MFE frontend 1 */
  905. mfe_shared = 1;
  906. dev->frontends.gate = 2;
  907. /* DVB-S init */
  908. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  909. &hauppauge_novas_config,
  910. &dev->core->i2c_adap);
  911. if (fe0->dvb.frontend) {
  912. if (!dvb_attach(isl6421_attach,
  913. fe0->dvb.frontend,
  914. &dev->core->i2c_adap,
  915. 0x08, ISL6421_DCL, 0x00, false))
  916. goto frontend_detach;
  917. }
  918. /* MFE frontend 2 */
  919. fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
  920. if (!fe1)
  921. goto frontend_detach;
  922. /* DVB-T init */
  923. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  924. &hauppauge_hvr_config,
  925. &dev->core->i2c_adap);
  926. if (fe1->dvb.frontend) {
  927. fe1->dvb.frontend->id = 1;
  928. if (!dvb_attach(simple_tuner_attach,
  929. fe1->dvb.frontend,
  930. &dev->core->i2c_adap,
  931. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  932. goto frontend_detach;
  933. }
  934. break;
  935. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  936. fe0->dvb.frontend = dvb_attach(mt352_attach,
  937. &dvico_fusionhdtv,
  938. &core->i2c_adap);
  939. if (fe0->dvb.frontend) {
  940. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  941. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  942. goto frontend_detach;
  943. break;
  944. }
  945. /* ZL10353 replaces MT352 on later cards */
  946. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  947. &dvico_fusionhdtv_plus_v1_1,
  948. &core->i2c_adap);
  949. if (fe0->dvb.frontend) {
  950. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  951. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  952. goto frontend_detach;
  953. }
  954. break;
  955. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  956. /*
  957. * The tin box says DEE1601, but it seems to be DTT7579
  958. * compatible, with a slightly different MT352 AGC gain.
  959. */
  960. fe0->dvb.frontend = dvb_attach(mt352_attach,
  961. &dvico_fusionhdtv_dual,
  962. &core->i2c_adap);
  963. if (fe0->dvb.frontend) {
  964. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  965. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  966. goto frontend_detach;
  967. break;
  968. }
  969. /* ZL10353 replaces MT352 on later cards */
  970. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  971. &dvico_fusionhdtv_plus_v1_1,
  972. &core->i2c_adap);
  973. if (fe0->dvb.frontend) {
  974. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  975. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  976. goto frontend_detach;
  977. }
  978. break;
  979. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  980. fe0->dvb.frontend = dvb_attach(mt352_attach,
  981. &dvico_fusionhdtv,
  982. &core->i2c_adap);
  983. if (fe0->dvb.frontend) {
  984. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  985. 0x61, NULL, DVB_PLL_LG_Z201))
  986. goto frontend_detach;
  987. }
  988. break;
  989. case CX88_BOARD_KWORLD_DVB_T:
  990. case CX88_BOARD_DNTV_LIVE_DVB_T:
  991. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  992. fe0->dvb.frontend = dvb_attach(mt352_attach,
  993. &dntv_live_dvbt_config,
  994. &core->i2c_adap);
  995. if (fe0->dvb.frontend) {
  996. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  997. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  998. goto frontend_detach;
  999. }
  1000. break;
  1001. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  1002. #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
  1003. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  1004. fe0->dvb.frontend = dvb_attach(mt352_attach,
  1005. &dntv_live_dvbt_pro_config,
  1006. &dev->vp3054->adap);
  1007. if (fe0->dvb.frontend) {
  1008. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1009. &core->i2c_adap, 0x61,
  1010. TUNER_PHILIPS_FMD1216ME_MK3))
  1011. goto frontend_detach;
  1012. }
  1013. #else
  1014. pr_err("built without vp3054 support\n");
  1015. #endif
  1016. break;
  1017. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  1018. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1019. &dvico_fusionhdtv_hybrid,
  1020. &core->i2c_adap);
  1021. if (fe0->dvb.frontend) {
  1022. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1023. &core->i2c_adap, 0x61,
  1024. TUNER_THOMSON_FE6600))
  1025. goto frontend_detach;
  1026. }
  1027. break;
  1028. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  1029. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1030. &dvico_fusionhdtv_xc3028,
  1031. &core->i2c_adap);
  1032. if (!fe0->dvb.frontend)
  1033. fe0->dvb.frontend = dvb_attach(mt352_attach,
  1034. &dvico_fusionhdtv_mt352_xc3028,
  1035. &core->i2c_adap);
  1036. /*
  1037. * On this board, the demod provides the I2C bus pullup.
  1038. * We must not permit gate_ctrl to be performed, or
  1039. * the xc3028 cannot communicate on the bus.
  1040. */
  1041. if (fe0->dvb.frontend)
  1042. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1043. if (attach_xc3028(0x61, dev) < 0)
  1044. goto frontend_detach;
  1045. break;
  1046. case CX88_BOARD_PCHDTV_HD3000:
  1047. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  1048. &core->i2c_adap);
  1049. if (fe0->dvb.frontend) {
  1050. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1051. &core->i2c_adap, 0x61,
  1052. TUNER_THOMSON_DTT761X))
  1053. goto frontend_detach;
  1054. }
  1055. break;
  1056. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  1057. dev->ts_gen_cntrl = 0x08;
  1058. /* Do a hardware reset of chip before using it. */
  1059. cx_clear(MO_GP0_IO, 1);
  1060. mdelay(100);
  1061. cx_set(MO_GP0_IO, 1);
  1062. mdelay(200);
  1063. /* Select RF connector callback */
  1064. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  1065. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1066. &fusionhdtv_3_gold,
  1067. &core->i2c_adap);
  1068. if (fe0->dvb.frontend) {
  1069. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1070. &core->i2c_adap, 0x61,
  1071. TUNER_MICROTUNE_4042FI5))
  1072. goto frontend_detach;
  1073. }
  1074. break;
  1075. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  1076. dev->ts_gen_cntrl = 0x08;
  1077. /* Do a hardware reset of chip before using it. */
  1078. cx_clear(MO_GP0_IO, 1);
  1079. mdelay(100);
  1080. cx_set(MO_GP0_IO, 9);
  1081. mdelay(200);
  1082. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1083. &fusionhdtv_3_gold,
  1084. &core->i2c_adap);
  1085. if (fe0->dvb.frontend) {
  1086. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1087. &core->i2c_adap, 0x61,
  1088. TUNER_THOMSON_DTT761X))
  1089. goto frontend_detach;
  1090. }
  1091. break;
  1092. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1093. dev->ts_gen_cntrl = 0x08;
  1094. /* Do a hardware reset of chip before using it. */
  1095. cx_clear(MO_GP0_IO, 1);
  1096. mdelay(100);
  1097. cx_set(MO_GP0_IO, 1);
  1098. mdelay(200);
  1099. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1100. &fusionhdtv_5_gold,
  1101. &core->i2c_adap);
  1102. if (fe0->dvb.frontend) {
  1103. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1104. &core->i2c_adap, 0x61,
  1105. TUNER_LG_TDVS_H06XF))
  1106. goto frontend_detach;
  1107. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1108. &core->i2c_adap, 0x43))
  1109. goto frontend_detach;
  1110. }
  1111. break;
  1112. case CX88_BOARD_PCHDTV_HD5500:
  1113. dev->ts_gen_cntrl = 0x08;
  1114. /* Do a hardware reset of chip before using it. */
  1115. cx_clear(MO_GP0_IO, 1);
  1116. mdelay(100);
  1117. cx_set(MO_GP0_IO, 1);
  1118. mdelay(200);
  1119. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1120. &pchdtv_hd5500,
  1121. &core->i2c_adap);
  1122. if (fe0->dvb.frontend) {
  1123. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1124. &core->i2c_adap, 0x61,
  1125. TUNER_LG_TDVS_H06XF))
  1126. goto frontend_detach;
  1127. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1128. &core->i2c_adap, 0x43))
  1129. goto frontend_detach;
  1130. }
  1131. break;
  1132. case CX88_BOARD_ATI_HDTVWONDER:
  1133. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  1134. &ati_hdtvwonder,
  1135. &core->i2c_adap);
  1136. if (fe0->dvb.frontend) {
  1137. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1138. &core->i2c_adap, 0x61,
  1139. TUNER_PHILIPS_TUV1236D))
  1140. goto frontend_detach;
  1141. }
  1142. break;
  1143. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  1144. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  1145. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1146. &hauppauge_novas_config,
  1147. &core->i2c_adap);
  1148. if (fe0->dvb.frontend) {
  1149. bool override_tone;
  1150. if (core->model == 92001)
  1151. override_tone = true;
  1152. else
  1153. override_tone = false;
  1154. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  1155. &core->i2c_adap, 0x08, ISL6421_DCL,
  1156. 0x00, override_tone))
  1157. goto frontend_detach;
  1158. }
  1159. break;
  1160. case CX88_BOARD_KWORLD_DVBS_100:
  1161. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1162. &kworld_dvbs_100_config,
  1163. &core->i2c_adap);
  1164. if (fe0->dvb.frontend) {
  1165. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1166. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  1167. }
  1168. break;
  1169. case CX88_BOARD_GENIATECH_DVBS:
  1170. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1171. &geniatech_dvbs_config,
  1172. &core->i2c_adap);
  1173. if (fe0->dvb.frontend) {
  1174. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1175. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  1176. }
  1177. break;
  1178. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  1179. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1180. &pinnacle_pctv_hd_800i_config,
  1181. &core->i2c_adap);
  1182. if (fe0->dvb.frontend) {
  1183. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1184. &core->i2c_adap,
  1185. &pinnacle_pctv_hd_800i_tuner_config))
  1186. goto frontend_detach;
  1187. }
  1188. break;
  1189. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1190. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1191. &dvico_hdtv5_pci_nano_config,
  1192. &core->i2c_adap);
  1193. if (fe0->dvb.frontend) {
  1194. struct dvb_frontend *fe;
  1195. struct xc2028_config cfg = {
  1196. .i2c_adap = &core->i2c_adap,
  1197. .i2c_addr = 0x61,
  1198. };
  1199. static struct xc2028_ctrl ctl = {
  1200. .fname = XC2028_DEFAULT_FIRMWARE,
  1201. .max_len = 64,
  1202. .scode_table = XC3028_FE_OREN538,
  1203. };
  1204. fe = dvb_attach(xc2028_attach,
  1205. fe0->dvb.frontend, &cfg);
  1206. if (fe && fe->ops.tuner_ops.set_config)
  1207. fe->ops.tuner_ops.set_config(fe, &ctl);
  1208. }
  1209. break;
  1210. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  1211. case CX88_BOARD_WINFAST_DTV1800H:
  1212. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1213. &cx88_pinnacle_hybrid_pctv,
  1214. &core->i2c_adap);
  1215. if (fe0->dvb.frontend) {
  1216. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1217. if (attach_xc3028(0x61, dev) < 0)
  1218. goto frontend_detach;
  1219. }
  1220. break;
  1221. case CX88_BOARD_WINFAST_DTV1800H_XC4000:
  1222. case CX88_BOARD_WINFAST_DTV2000H_PLUS:
  1223. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1224. &cx88_pinnacle_hybrid_pctv,
  1225. &core->i2c_adap);
  1226. if (fe0->dvb.frontend) {
  1227. struct xc4000_config cfg = {
  1228. .i2c_address = 0x61,
  1229. .default_pm = 0,
  1230. .dvb_amplitude = 134,
  1231. .set_smoothedcvbs = 1,
  1232. .if_khz = 4560
  1233. };
  1234. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1235. if (attach_xc4000(dev, &cfg) < 0)
  1236. goto frontend_detach;
  1237. }
  1238. break;
  1239. case CX88_BOARD_GENIATECH_X8000_MT:
  1240. dev->ts_gen_cntrl = 0x00;
  1241. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1242. &cx88_geniatech_x8000_mt,
  1243. &core->i2c_adap);
  1244. if (attach_xc3028(0x61, dev) < 0)
  1245. goto frontend_detach;
  1246. break;
  1247. case CX88_BOARD_KWORLD_ATSC_120:
  1248. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1249. &kworld_atsc_120_config,
  1250. &core->i2c_adap);
  1251. if (attach_xc3028(0x61, dev) < 0)
  1252. goto frontend_detach;
  1253. break;
  1254. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  1255. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  1256. &dvico_fusionhdtv7_config,
  1257. &core->i2c_adap);
  1258. if (fe0->dvb.frontend) {
  1259. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1260. &core->i2c_adap,
  1261. &dvico_fusionhdtv7_tuner_config))
  1262. goto frontend_detach;
  1263. }
  1264. break;
  1265. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1266. /* MFE frontend 1 */
  1267. mfe_shared = 1;
  1268. dev->frontends.gate = 2;
  1269. /* DVB-S/S2 Init */
  1270. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1271. &hauppauge_hvr4000_config,
  1272. &dev->core->i2c_adap);
  1273. if (fe0->dvb.frontend) {
  1274. if (!dvb_attach(isl6421_attach,
  1275. fe0->dvb.frontend,
  1276. &dev->core->i2c_adap,
  1277. 0x08, ISL6421_DCL, 0x00, false))
  1278. goto frontend_detach;
  1279. }
  1280. /* MFE frontend 2 */
  1281. fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
  1282. if (!fe1)
  1283. goto frontend_detach;
  1284. /* DVB-T Init */
  1285. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  1286. &hauppauge_hvr_config,
  1287. &dev->core->i2c_adap);
  1288. if (fe1->dvb.frontend) {
  1289. fe1->dvb.frontend->id = 1;
  1290. if (!dvb_attach(simple_tuner_attach,
  1291. fe1->dvb.frontend,
  1292. &dev->core->i2c_adap,
  1293. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  1294. goto frontend_detach;
  1295. }
  1296. break;
  1297. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  1298. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1299. &hauppauge_hvr4000_config,
  1300. &dev->core->i2c_adap);
  1301. if (fe0->dvb.frontend) {
  1302. if (!dvb_attach(isl6421_attach,
  1303. fe0->dvb.frontend,
  1304. &dev->core->i2c_adap,
  1305. 0x08, ISL6421_DCL, 0x00, false))
  1306. goto frontend_detach;
  1307. }
  1308. break;
  1309. case CX88_BOARD_PROF_6200:
  1310. case CX88_BOARD_TBS_8910:
  1311. case CX88_BOARD_TEVII_S420:
  1312. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1313. &tevii_tuner_sharp_config,
  1314. &core->i2c_adap);
  1315. if (fe0->dvb.frontend) {
  1316. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  1317. &core->i2c_adap, DVB_PLL_OPERA1))
  1318. goto frontend_detach;
  1319. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1320. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1321. } else {
  1322. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  1323. &tevii_tuner_earda_config,
  1324. &core->i2c_adap);
  1325. if (fe0->dvb.frontend) {
  1326. if (!dvb_attach(stb6000_attach,
  1327. fe0->dvb.frontend, 0x61,
  1328. &core->i2c_adap))
  1329. goto frontend_detach;
  1330. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1331. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1332. }
  1333. }
  1334. break;
  1335. case CX88_BOARD_TEVII_S460:
  1336. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1337. &tevii_s460_config,
  1338. &core->i2c_adap);
  1339. if (fe0->dvb.frontend)
  1340. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1341. break;
  1342. case CX88_BOARD_TEVII_S464:
  1343. fe0->dvb.frontend = dvb_attach(ds3000_attach,
  1344. &tevii_ds3000_config,
  1345. &core->i2c_adap);
  1346. if (fe0->dvb.frontend) {
  1347. dvb_attach(ts2020_attach, fe0->dvb.frontend,
  1348. &tevii_ts2020_config, &core->i2c_adap);
  1349. fe0->dvb.frontend->ops.set_voltage =
  1350. tevii_dvbs_set_voltage;
  1351. }
  1352. break;
  1353. case CX88_BOARD_OMICOM_SS4_PCI:
  1354. case CX88_BOARD_TBS_8920:
  1355. case CX88_BOARD_PROF_7300:
  1356. case CX88_BOARD_SATTRADE_ST4200:
  1357. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1358. &hauppauge_hvr4000_config,
  1359. &core->i2c_adap);
  1360. if (fe0->dvb.frontend)
  1361. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1362. break;
  1363. case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
  1364. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1365. &cx88_terratec_cinergy_ht_pci_mkii_config,
  1366. &core->i2c_adap);
  1367. if (fe0->dvb.frontend) {
  1368. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1369. if (attach_xc3028(0x61, dev) < 0)
  1370. goto frontend_detach;
  1371. }
  1372. break;
  1373. case CX88_BOARD_PROF_7301:{
  1374. struct dvb_tuner_ops *tuner_ops = NULL;
  1375. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  1376. &prof_7301_stv0900_config,
  1377. &core->i2c_adap, 0);
  1378. if (fe0->dvb.frontend) {
  1379. if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
  1380. &prof_7301_stb6100_config,
  1381. &core->i2c_adap))
  1382. goto frontend_detach;
  1383. tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
  1384. tuner_ops->set_frequency = stb6100_set_freq;
  1385. tuner_ops->get_frequency = stb6100_get_freq;
  1386. tuner_ops->set_bandwidth = stb6100_set_bandw;
  1387. tuner_ops->get_bandwidth = stb6100_get_bandw;
  1388. core->prev_set_voltage =
  1389. fe0->dvb.frontend->ops.set_voltage;
  1390. fe0->dvb.frontend->ops.set_voltage =
  1391. tevii_dvbs_set_voltage;
  1392. }
  1393. break;
  1394. }
  1395. case CX88_BOARD_SAMSUNG_SMT_7020:
  1396. dev->ts_gen_cntrl = 0x08;
  1397. cx_set(MO_GP0_IO, 0x0101);
  1398. cx_clear(MO_GP0_IO, 0x01);
  1399. mdelay(100);
  1400. cx_set(MO_GP0_IO, 0x01);
  1401. mdelay(200);
  1402. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1403. &samsung_stv0299_config,
  1404. &dev->core->i2c_adap);
  1405. if (fe0->dvb.frontend) {
  1406. fe0->dvb.frontend->ops.tuner_ops.set_params =
  1407. samsung_smt_7020_tuner_set_params;
  1408. fe0->dvb.frontend->tuner_priv =
  1409. &dev->core->i2c_adap;
  1410. fe0->dvb.frontend->ops.set_voltage =
  1411. samsung_smt_7020_set_voltage;
  1412. fe0->dvb.frontend->ops.set_tone =
  1413. samsung_smt_7020_set_tone;
  1414. }
  1415. break;
  1416. case CX88_BOARD_TWINHAN_VP1027_DVBS:
  1417. dev->ts_gen_cntrl = 0x00;
  1418. fe0->dvb.frontend = dvb_attach(mb86a16_attach,
  1419. &twinhan_vp1027,
  1420. &core->i2c_adap);
  1421. if (fe0->dvb.frontend) {
  1422. core->prev_set_voltage =
  1423. fe0->dvb.frontend->ops.set_voltage;
  1424. fe0->dvb.frontend->ops.set_voltage =
  1425. vp1027_set_voltage;
  1426. }
  1427. break;
  1428. default:
  1429. pr_err("The frontend of your DVB/ATSC card isn't supported yet\n");
  1430. break;
  1431. }
  1432. if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
  1433. pr_err("frontend initialization failed\n");
  1434. goto frontend_detach;
  1435. }
  1436. /* define general-purpose callback pointer */
  1437. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1438. /* Ensure all frontends negotiate bus access */
  1439. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1440. if (fe1)
  1441. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1442. /* Put the analog decoder in standby to keep it quiet */
  1443. call_all(core, core, s_power, 0);
  1444. /* register everything */
  1445. res = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1446. &dev->pci->dev, NULL, adapter_nr,
  1447. mfe_shared);
  1448. if (res)
  1449. goto frontend_detach;
  1450. return res;
  1451. frontend_detach:
  1452. core->gate_ctrl = NULL;
  1453. vb2_dvb_dealloc_frontends(&dev->frontends);
  1454. return res;
  1455. }
  1456. /* ----------------------------------------------------------- */
  1457. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1458. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1459. {
  1460. struct cx88_core *core = drv->core;
  1461. int err = 0;
  1462. dprintk(1, "%s\n", __func__);
  1463. switch (core->boardnr) {
  1464. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1465. /* We arrive here with either the cx23416 or the cx22702
  1466. * on the bus. Take the bus from the cx23416 and enable the
  1467. * cx22702 demod
  1468. */
  1469. /* Toggle reset on cx22702 leaving i2c active */
  1470. cx_set(MO_GP0_IO, 0x00000080);
  1471. udelay(1000);
  1472. cx_clear(MO_GP0_IO, 0x00000080);
  1473. udelay(50);
  1474. cx_set(MO_GP0_IO, 0x00000080);
  1475. udelay(1000);
  1476. /* enable the cx22702 pins */
  1477. cx_clear(MO_GP0_IO, 0x00000004);
  1478. udelay(1000);
  1479. break;
  1480. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1481. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1482. /* Toggle reset on cx22702 leaving i2c active */
  1483. cx_set(MO_GP0_IO, 0x00000080);
  1484. udelay(1000);
  1485. cx_clear(MO_GP0_IO, 0x00000080);
  1486. udelay(50);
  1487. cx_set(MO_GP0_IO, 0x00000080);
  1488. udelay(1000);
  1489. switch (core->dvbdev->frontends.active_fe_id) {
  1490. case 1: /* DVB-S/S2 Enabled */
  1491. /* tri-state the cx22702 pins */
  1492. cx_set(MO_GP0_IO, 0x00000004);
  1493. /* Take the cx24116/cx24123 out of reset */
  1494. cx_write(MO_SRST_IO, 1);
  1495. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1496. break;
  1497. case 2: /* DVB-T Enabled */
  1498. /* Put the cx24116/cx24123 into reset */
  1499. cx_write(MO_SRST_IO, 0);
  1500. /* enable the cx22702 pins */
  1501. cx_clear(MO_GP0_IO, 0x00000004);
  1502. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1503. break;
  1504. }
  1505. udelay(1000);
  1506. break;
  1507. case CX88_BOARD_WINFAST_DTV2000H_PLUS:
  1508. /* set RF input to AIR for DVB-T (GPIO 16) */
  1509. cx_write(MO_GP2_IO, 0x0101);
  1510. break;
  1511. default:
  1512. err = -ENODEV;
  1513. }
  1514. return err;
  1515. }
  1516. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1517. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1518. {
  1519. struct cx88_core *core = drv->core;
  1520. int err = 0;
  1521. dprintk(1, "%s\n", __func__);
  1522. switch (core->boardnr) {
  1523. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1524. /* Do Nothing, leave the cx22702 on the bus. */
  1525. break;
  1526. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1527. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1528. break;
  1529. default:
  1530. err = -ENODEV;
  1531. }
  1532. return err;
  1533. }
  1534. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1535. {
  1536. struct cx88_core *core = drv->core;
  1537. struct cx8802_dev *dev = drv->core->dvbdev;
  1538. int err;
  1539. struct vb2_dvb_frontend *fe;
  1540. int i;
  1541. dprintk(1, "%s\n", __func__);
  1542. dprintk(1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1543. core->boardnr,
  1544. core->name,
  1545. core->pci_bus,
  1546. core->pci_slot);
  1547. err = -ENODEV;
  1548. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1549. goto fail_core;
  1550. /* If vp3054 isn't enabled, a stub will just return 0 */
  1551. err = vp3054_i2c_probe(dev);
  1552. if (err != 0)
  1553. goto fail_core;
  1554. /* dvb stuff */
  1555. pr_info("cx2388x based DVB/ATSC card\n");
  1556. dev->ts_gen_cntrl = 0x0c;
  1557. err = cx8802_alloc_frontends(dev);
  1558. if (err)
  1559. goto fail_core;
  1560. for (i = 1; i <= core->board.num_frontends; i++) {
  1561. struct vb2_queue *q;
  1562. fe = vb2_dvb_get_frontend(&core->dvbdev->frontends, i);
  1563. if (!fe) {
  1564. pr_err("%s() failed to get frontend(%d)\n",
  1565. __func__, i);
  1566. err = -ENODEV;
  1567. goto fail_probe;
  1568. }
  1569. q = &fe->dvb.dvbq;
  1570. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1571. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
  1572. q->gfp_flags = GFP_DMA32;
  1573. q->min_buffers_needed = 2;
  1574. q->drv_priv = dev;
  1575. q->buf_struct_size = sizeof(struct cx88_buffer);
  1576. q->ops = &dvb_qops;
  1577. q->mem_ops = &vb2_dma_sg_memops;
  1578. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1579. q->lock = &core->lock;
  1580. q->dev = &dev->pci->dev;
  1581. err = vb2_queue_init(q);
  1582. if (err < 0)
  1583. goto fail_probe;
  1584. /* init struct vb2_dvb */
  1585. fe->dvb.name = dev->core->name;
  1586. }
  1587. err = dvb_register(dev);
  1588. if (err)
  1589. /* frontends/adapter de-allocated in dvb_register */
  1590. pr_err("dvb_register failed (err = %d)\n", err);
  1591. return err;
  1592. fail_probe:
  1593. vb2_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1594. fail_core:
  1595. return err;
  1596. }
  1597. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1598. {
  1599. struct cx88_core *core = drv->core;
  1600. struct cx8802_dev *dev = drv->core->dvbdev;
  1601. dprintk(1, "%s\n", __func__);
  1602. vb2_dvb_unregister_bus(&dev->frontends);
  1603. vp3054_i2c_remove(dev);
  1604. core->gate_ctrl = NULL;
  1605. return 0;
  1606. }
  1607. static struct cx8802_driver cx8802_dvb_driver = {
  1608. .type_id = CX88_MPEG_DVB,
  1609. .hw_access = CX8802_DRVCTL_SHARED,
  1610. .probe = cx8802_dvb_probe,
  1611. .remove = cx8802_dvb_remove,
  1612. .advise_acquire = cx8802_dvb_advise_acquire,
  1613. .advise_release = cx8802_dvb_advise_release,
  1614. };
  1615. static int __init dvb_init(void)
  1616. {
  1617. pr_info("cx2388x dvb driver version %s loaded\n", CX88_VERSION);
  1618. return cx8802_register_driver(&cx8802_dvb_driver);
  1619. }
  1620. static void __exit dvb_fini(void)
  1621. {
  1622. cx8802_unregister_driver(&cx8802_dvb_driver);
  1623. }
  1624. module_init(dvb_init);
  1625. module_exit(dvb_fini);