hdmi4.c 17 KB

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  1. /*
  2. * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
  3. * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
  4. * Authors: Yong Zhi
  5. * Mythri pk <mythripk@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #define DSS_SUBSYS_NAME "HDMI"
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/err.h>
  23. #include <linux/io.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/mutex.h>
  26. #include <linux/delay.h>
  27. #include <linux/string.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/clk.h>
  31. #include <linux/gpio.h>
  32. #include <linux/regulator/consumer.h>
  33. #include <linux/component.h>
  34. #include <linux/of.h>
  35. #include <linux/of_graph.h>
  36. #include <sound/omap-hdmi-audio.h>
  37. #include "omapdss.h"
  38. #include "hdmi4_core.h"
  39. #include "dss.h"
  40. #include "dss_features.h"
  41. #include "hdmi.h"
  42. static struct omap_hdmi hdmi;
  43. static int hdmi_runtime_get(void)
  44. {
  45. int r;
  46. DSSDBG("hdmi_runtime_get\n");
  47. r = pm_runtime_get_sync(&hdmi.pdev->dev);
  48. WARN_ON(r < 0);
  49. if (r < 0)
  50. return r;
  51. return 0;
  52. }
  53. static void hdmi_runtime_put(void)
  54. {
  55. int r;
  56. DSSDBG("hdmi_runtime_put\n");
  57. r = pm_runtime_put_sync(&hdmi.pdev->dev);
  58. WARN_ON(r < 0 && r != -ENOSYS);
  59. }
  60. static irqreturn_t hdmi_irq_handler(int irq, void *data)
  61. {
  62. struct hdmi_wp_data *wp = data;
  63. u32 irqstatus;
  64. irqstatus = hdmi_wp_get_irqstatus(wp);
  65. hdmi_wp_set_irqstatus(wp, irqstatus);
  66. if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  67. irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  68. /*
  69. * If we get both connect and disconnect interrupts at the same
  70. * time, turn off the PHY, clear interrupts, and restart, which
  71. * raises connect interrupt if a cable is connected, or nothing
  72. * if cable is not connected.
  73. */
  74. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  75. hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
  76. HDMI_IRQ_LINK_DISCONNECT);
  77. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  78. } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
  79. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
  80. } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  81. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  82. }
  83. return IRQ_HANDLED;
  84. }
  85. static int hdmi_init_regulator(void)
  86. {
  87. struct regulator *reg;
  88. if (hdmi.vdda_reg != NULL)
  89. return 0;
  90. reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
  91. if (IS_ERR(reg)) {
  92. if (PTR_ERR(reg) != -EPROBE_DEFER)
  93. DSSERR("can't get VDDA regulator\n");
  94. return PTR_ERR(reg);
  95. }
  96. hdmi.vdda_reg = reg;
  97. return 0;
  98. }
  99. static int hdmi_power_on_core(struct omap_dss_device *dssdev)
  100. {
  101. int r;
  102. r = regulator_enable(hdmi.vdda_reg);
  103. if (r)
  104. return r;
  105. r = hdmi_runtime_get();
  106. if (r)
  107. goto err_runtime_get;
  108. /* Make selection of HDMI in DSS */
  109. dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
  110. hdmi.core_enabled = true;
  111. return 0;
  112. err_runtime_get:
  113. regulator_disable(hdmi.vdda_reg);
  114. return r;
  115. }
  116. static void hdmi_power_off_core(struct omap_dss_device *dssdev)
  117. {
  118. hdmi.core_enabled = false;
  119. hdmi_runtime_put();
  120. regulator_disable(hdmi.vdda_reg);
  121. }
  122. static int hdmi_power_on_full(struct omap_dss_device *dssdev)
  123. {
  124. int r;
  125. struct videomode *vm;
  126. enum omap_channel channel = dssdev->dispc_channel;
  127. struct hdmi_wp_data *wp = &hdmi.wp;
  128. struct dss_pll_clock_info hdmi_cinfo = { 0 };
  129. unsigned pc;
  130. r = hdmi_power_on_core(dssdev);
  131. if (r)
  132. return r;
  133. /* disable and clear irqs */
  134. hdmi_wp_clear_irqenable(wp, 0xffffffff);
  135. hdmi_wp_set_irqstatus(wp, 0xffffffff);
  136. vm = &hdmi.cfg.vm;
  137. DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive,
  138. vm->vactive);
  139. pc = vm->pixelclock;
  140. if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
  141. pc *= 2;
  142. /* DSS_HDMI_TCLK is bitclk / 10 */
  143. pc *= 10;
  144. dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin),
  145. pc, &hdmi_cinfo);
  146. r = dss_pll_enable(&hdmi.pll.pll);
  147. if (r) {
  148. DSSERR("Failed to enable PLL\n");
  149. goto err_pll_enable;
  150. }
  151. r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
  152. if (r) {
  153. DSSERR("Failed to configure PLL\n");
  154. goto err_pll_cfg;
  155. }
  156. r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
  157. hdmi_cinfo.clkout[0]);
  158. if (r) {
  159. DSSDBG("Failed to configure PHY\n");
  160. goto err_phy_cfg;
  161. }
  162. r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  163. if (r)
  164. goto err_phy_pwr;
  165. hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
  166. /* tv size */
  167. dss_mgr_set_timings(channel, vm);
  168. r = dss_mgr_enable(channel);
  169. if (r)
  170. goto err_mgr_enable;
  171. r = hdmi_wp_video_start(&hdmi.wp);
  172. if (r)
  173. goto err_vid_enable;
  174. hdmi_wp_set_irqenable(wp,
  175. HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
  176. return 0;
  177. err_vid_enable:
  178. dss_mgr_disable(channel);
  179. err_mgr_enable:
  180. hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
  181. err_phy_pwr:
  182. err_phy_cfg:
  183. err_pll_cfg:
  184. dss_pll_disable(&hdmi.pll.pll);
  185. err_pll_enable:
  186. hdmi_power_off_core(dssdev);
  187. return -EIO;
  188. }
  189. static void hdmi_power_off_full(struct omap_dss_device *dssdev)
  190. {
  191. enum omap_channel channel = dssdev->dispc_channel;
  192. hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
  193. hdmi_wp_video_stop(&hdmi.wp);
  194. dss_mgr_disable(channel);
  195. hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
  196. dss_pll_disable(&hdmi.pll.pll);
  197. hdmi_power_off_core(dssdev);
  198. }
  199. static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
  200. struct videomode *vm)
  201. {
  202. if (!dispc_mgr_timings_ok(dssdev->dispc_channel, vm))
  203. return -EINVAL;
  204. return 0;
  205. }
  206. static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
  207. struct videomode *vm)
  208. {
  209. mutex_lock(&hdmi.lock);
  210. hdmi.cfg.vm = *vm;
  211. dispc_set_tv_pclk(vm->pixelclock);
  212. mutex_unlock(&hdmi.lock);
  213. }
  214. static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
  215. struct videomode *vm)
  216. {
  217. *vm = hdmi.cfg.vm;
  218. }
  219. static void hdmi_dump_regs(struct seq_file *s)
  220. {
  221. mutex_lock(&hdmi.lock);
  222. if (hdmi_runtime_get()) {
  223. mutex_unlock(&hdmi.lock);
  224. return;
  225. }
  226. hdmi_wp_dump(&hdmi.wp, s);
  227. hdmi_pll_dump(&hdmi.pll, s);
  228. hdmi_phy_dump(&hdmi.phy, s);
  229. hdmi4_core_dump(&hdmi.core, s);
  230. hdmi_runtime_put();
  231. mutex_unlock(&hdmi.lock);
  232. }
  233. static int read_edid(u8 *buf, int len)
  234. {
  235. int r;
  236. mutex_lock(&hdmi.lock);
  237. r = hdmi_runtime_get();
  238. BUG_ON(r);
  239. r = hdmi4_read_edid(&hdmi.core, buf, len);
  240. hdmi_runtime_put();
  241. mutex_unlock(&hdmi.lock);
  242. return r;
  243. }
  244. static void hdmi_start_audio_stream(struct omap_hdmi *hd)
  245. {
  246. hdmi_wp_audio_enable(&hd->wp, true);
  247. hdmi4_audio_start(&hd->core, &hd->wp);
  248. }
  249. static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
  250. {
  251. hdmi4_audio_stop(&hd->core, &hd->wp);
  252. hdmi_wp_audio_enable(&hd->wp, false);
  253. }
  254. static int hdmi_display_enable(struct omap_dss_device *dssdev)
  255. {
  256. struct omap_dss_device *out = &hdmi.output;
  257. unsigned long flags;
  258. int r = 0;
  259. DSSDBG("ENTER hdmi_display_enable\n");
  260. mutex_lock(&hdmi.lock);
  261. if (!out->dispc_channel_connected) {
  262. DSSERR("failed to enable display: no output/manager\n");
  263. r = -ENODEV;
  264. goto err0;
  265. }
  266. r = hdmi_power_on_full(dssdev);
  267. if (r) {
  268. DSSERR("failed to power on device\n");
  269. goto err0;
  270. }
  271. if (hdmi.audio_configured) {
  272. r = hdmi4_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,
  273. hdmi.cfg.vm.pixelclock);
  274. if (r) {
  275. DSSERR("Error restoring audio configuration: %d", r);
  276. hdmi.audio_abort_cb(&hdmi.pdev->dev);
  277. hdmi.audio_configured = false;
  278. }
  279. }
  280. spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
  281. if (hdmi.audio_configured && hdmi.audio_playing)
  282. hdmi_start_audio_stream(&hdmi);
  283. hdmi.display_enabled = true;
  284. spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
  285. mutex_unlock(&hdmi.lock);
  286. return 0;
  287. err0:
  288. mutex_unlock(&hdmi.lock);
  289. return r;
  290. }
  291. static void hdmi_display_disable(struct omap_dss_device *dssdev)
  292. {
  293. unsigned long flags;
  294. DSSDBG("Enter hdmi_display_disable\n");
  295. mutex_lock(&hdmi.lock);
  296. spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
  297. hdmi_stop_audio_stream(&hdmi);
  298. hdmi.display_enabled = false;
  299. spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
  300. hdmi_power_off_full(dssdev);
  301. mutex_unlock(&hdmi.lock);
  302. }
  303. static int hdmi_core_enable(struct omap_dss_device *dssdev)
  304. {
  305. int r = 0;
  306. DSSDBG("ENTER omapdss_hdmi_core_enable\n");
  307. mutex_lock(&hdmi.lock);
  308. r = hdmi_power_on_core(dssdev);
  309. if (r) {
  310. DSSERR("failed to power on device\n");
  311. goto err0;
  312. }
  313. mutex_unlock(&hdmi.lock);
  314. return 0;
  315. err0:
  316. mutex_unlock(&hdmi.lock);
  317. return r;
  318. }
  319. static void hdmi_core_disable(struct omap_dss_device *dssdev)
  320. {
  321. DSSDBG("Enter omapdss_hdmi_core_disable\n");
  322. mutex_lock(&hdmi.lock);
  323. hdmi_power_off_core(dssdev);
  324. mutex_unlock(&hdmi.lock);
  325. }
  326. static int hdmi_connect(struct omap_dss_device *dssdev,
  327. struct omap_dss_device *dst)
  328. {
  329. enum omap_channel channel = dssdev->dispc_channel;
  330. int r;
  331. r = hdmi_init_regulator();
  332. if (r)
  333. return r;
  334. r = dss_mgr_connect(channel, dssdev);
  335. if (r)
  336. return r;
  337. r = omapdss_output_set_device(dssdev, dst);
  338. if (r) {
  339. DSSERR("failed to connect output to new device: %s\n",
  340. dst->name);
  341. dss_mgr_disconnect(channel, dssdev);
  342. return r;
  343. }
  344. return 0;
  345. }
  346. static void hdmi_disconnect(struct omap_dss_device *dssdev,
  347. struct omap_dss_device *dst)
  348. {
  349. enum omap_channel channel = dssdev->dispc_channel;
  350. WARN_ON(dst != dssdev->dst);
  351. if (dst != dssdev->dst)
  352. return;
  353. omapdss_output_unset_device(dssdev);
  354. dss_mgr_disconnect(channel, dssdev);
  355. }
  356. static int hdmi_read_edid(struct omap_dss_device *dssdev,
  357. u8 *edid, int len)
  358. {
  359. bool need_enable;
  360. int r;
  361. need_enable = hdmi.core_enabled == false;
  362. if (need_enable) {
  363. r = hdmi_core_enable(dssdev);
  364. if (r)
  365. return r;
  366. }
  367. r = read_edid(edid, len);
  368. if (need_enable)
  369. hdmi_core_disable(dssdev);
  370. return r;
  371. }
  372. static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
  373. const struct hdmi_avi_infoframe *avi)
  374. {
  375. hdmi.cfg.infoframe = *avi;
  376. return 0;
  377. }
  378. static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
  379. bool hdmi_mode)
  380. {
  381. hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
  382. return 0;
  383. }
  384. static const struct omapdss_hdmi_ops hdmi_ops = {
  385. .connect = hdmi_connect,
  386. .disconnect = hdmi_disconnect,
  387. .enable = hdmi_display_enable,
  388. .disable = hdmi_display_disable,
  389. .check_timings = hdmi_display_check_timing,
  390. .set_timings = hdmi_display_set_timing,
  391. .get_timings = hdmi_display_get_timings,
  392. .read_edid = hdmi_read_edid,
  393. .set_infoframe = hdmi_set_infoframe,
  394. .set_hdmi_mode = hdmi_set_hdmi_mode,
  395. };
  396. static void hdmi_init_output(struct platform_device *pdev)
  397. {
  398. struct omap_dss_device *out = &hdmi.output;
  399. out->dev = &pdev->dev;
  400. out->id = OMAP_DSS_OUTPUT_HDMI;
  401. out->output_type = OMAP_DISPLAY_TYPE_HDMI;
  402. out->name = "hdmi.0";
  403. out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
  404. out->ops.hdmi = &hdmi_ops;
  405. out->owner = THIS_MODULE;
  406. omapdss_register_output(out);
  407. }
  408. static void hdmi_uninit_output(struct platform_device *pdev)
  409. {
  410. struct omap_dss_device *out = &hdmi.output;
  411. omapdss_unregister_output(out);
  412. }
  413. static int hdmi_probe_of(struct platform_device *pdev)
  414. {
  415. struct device_node *node = pdev->dev.of_node;
  416. struct device_node *ep;
  417. int r;
  418. ep = of_graph_get_endpoint_by_regs(node, 0, 0);
  419. if (!ep)
  420. return 0;
  421. r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
  422. if (r)
  423. goto err;
  424. of_node_put(ep);
  425. return 0;
  426. err:
  427. of_node_put(ep);
  428. return r;
  429. }
  430. /* Audio callbacks */
  431. static int hdmi_audio_startup(struct device *dev,
  432. void (*abort_cb)(struct device *dev))
  433. {
  434. struct omap_hdmi *hd = dev_get_drvdata(dev);
  435. int ret = 0;
  436. mutex_lock(&hd->lock);
  437. if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
  438. ret = -EPERM;
  439. goto out;
  440. }
  441. hd->audio_abort_cb = abort_cb;
  442. out:
  443. mutex_unlock(&hd->lock);
  444. return ret;
  445. }
  446. static int hdmi_audio_shutdown(struct device *dev)
  447. {
  448. struct omap_hdmi *hd = dev_get_drvdata(dev);
  449. mutex_lock(&hd->lock);
  450. hd->audio_abort_cb = NULL;
  451. hd->audio_configured = false;
  452. hd->audio_playing = false;
  453. mutex_unlock(&hd->lock);
  454. return 0;
  455. }
  456. static int hdmi_audio_start(struct device *dev)
  457. {
  458. struct omap_hdmi *hd = dev_get_drvdata(dev);
  459. unsigned long flags;
  460. WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
  461. spin_lock_irqsave(&hd->audio_playing_lock, flags);
  462. if (hd->display_enabled)
  463. hdmi_start_audio_stream(hd);
  464. hd->audio_playing = true;
  465. spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
  466. return 0;
  467. }
  468. static void hdmi_audio_stop(struct device *dev)
  469. {
  470. struct omap_hdmi *hd = dev_get_drvdata(dev);
  471. unsigned long flags;
  472. WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
  473. spin_lock_irqsave(&hd->audio_playing_lock, flags);
  474. if (hd->display_enabled)
  475. hdmi_stop_audio_stream(hd);
  476. hd->audio_playing = false;
  477. spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
  478. }
  479. static int hdmi_audio_config(struct device *dev,
  480. struct omap_dss_audio *dss_audio)
  481. {
  482. struct omap_hdmi *hd = dev_get_drvdata(dev);
  483. int ret;
  484. mutex_lock(&hd->lock);
  485. if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
  486. ret = -EPERM;
  487. goto out;
  488. }
  489. ret = hdmi4_audio_config(&hd->core, &hd->wp, dss_audio,
  490. hd->cfg.vm.pixelclock);
  491. if (!ret) {
  492. hd->audio_configured = true;
  493. hd->audio_config = *dss_audio;
  494. }
  495. out:
  496. mutex_unlock(&hd->lock);
  497. return ret;
  498. }
  499. static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
  500. .audio_startup = hdmi_audio_startup,
  501. .audio_shutdown = hdmi_audio_shutdown,
  502. .audio_start = hdmi_audio_start,
  503. .audio_stop = hdmi_audio_stop,
  504. .audio_config = hdmi_audio_config,
  505. };
  506. static int hdmi_audio_register(struct device *dev)
  507. {
  508. struct omap_hdmi_audio_pdata pdata = {
  509. .dev = dev,
  510. .dss_version = omapdss_get_version(),
  511. .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
  512. .ops = &hdmi_audio_ops,
  513. };
  514. hdmi.audio_pdev = platform_device_register_data(
  515. dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
  516. &pdata, sizeof(pdata));
  517. if (IS_ERR(hdmi.audio_pdev))
  518. return PTR_ERR(hdmi.audio_pdev);
  519. return 0;
  520. }
  521. /* HDMI HW IP initialisation */
  522. static int hdmi4_bind(struct device *dev, struct device *master, void *data)
  523. {
  524. struct platform_device *pdev = to_platform_device(dev);
  525. int r;
  526. int irq;
  527. hdmi.pdev = pdev;
  528. dev_set_drvdata(&pdev->dev, &hdmi);
  529. mutex_init(&hdmi.lock);
  530. spin_lock_init(&hdmi.audio_playing_lock);
  531. if (pdev->dev.of_node) {
  532. r = hdmi_probe_of(pdev);
  533. if (r)
  534. return r;
  535. }
  536. r = hdmi_wp_init(pdev, &hdmi.wp);
  537. if (r)
  538. return r;
  539. r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
  540. if (r)
  541. return r;
  542. r = hdmi_phy_init(pdev, &hdmi.phy);
  543. if (r)
  544. goto err;
  545. r = hdmi4_core_init(pdev, &hdmi.core);
  546. if (r)
  547. goto err;
  548. irq = platform_get_irq(pdev, 0);
  549. if (irq < 0) {
  550. DSSERR("platform_get_irq failed\n");
  551. r = -ENODEV;
  552. goto err;
  553. }
  554. r = devm_request_threaded_irq(&pdev->dev, irq,
  555. NULL, hdmi_irq_handler,
  556. IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
  557. if (r) {
  558. DSSERR("HDMI IRQ request failed\n");
  559. goto err;
  560. }
  561. pm_runtime_enable(&pdev->dev);
  562. hdmi_init_output(pdev);
  563. r = hdmi_audio_register(&pdev->dev);
  564. if (r) {
  565. DSSERR("Registering HDMI audio failed\n");
  566. hdmi_uninit_output(pdev);
  567. pm_runtime_disable(&pdev->dev);
  568. return r;
  569. }
  570. dss_debugfs_create_file("hdmi", hdmi_dump_regs);
  571. return 0;
  572. err:
  573. hdmi_pll_uninit(&hdmi.pll);
  574. return r;
  575. }
  576. static void hdmi4_unbind(struct device *dev, struct device *master, void *data)
  577. {
  578. struct platform_device *pdev = to_platform_device(dev);
  579. if (hdmi.audio_pdev)
  580. platform_device_unregister(hdmi.audio_pdev);
  581. hdmi_uninit_output(pdev);
  582. hdmi_pll_uninit(&hdmi.pll);
  583. pm_runtime_disable(&pdev->dev);
  584. }
  585. static const struct component_ops hdmi4_component_ops = {
  586. .bind = hdmi4_bind,
  587. .unbind = hdmi4_unbind,
  588. };
  589. static int hdmi4_probe(struct platform_device *pdev)
  590. {
  591. return component_add(&pdev->dev, &hdmi4_component_ops);
  592. }
  593. static int hdmi4_remove(struct platform_device *pdev)
  594. {
  595. component_del(&pdev->dev, &hdmi4_component_ops);
  596. return 0;
  597. }
  598. static int hdmi_runtime_suspend(struct device *dev)
  599. {
  600. dispc_runtime_put();
  601. return 0;
  602. }
  603. static int hdmi_runtime_resume(struct device *dev)
  604. {
  605. int r;
  606. r = dispc_runtime_get();
  607. if (r < 0)
  608. return r;
  609. return 0;
  610. }
  611. static const struct dev_pm_ops hdmi_pm_ops = {
  612. .runtime_suspend = hdmi_runtime_suspend,
  613. .runtime_resume = hdmi_runtime_resume,
  614. };
  615. static const struct of_device_id hdmi_of_match[] = {
  616. { .compatible = "ti,omap4-hdmi", },
  617. {},
  618. };
  619. static struct platform_driver omapdss_hdmihw_driver = {
  620. .probe = hdmi4_probe,
  621. .remove = hdmi4_remove,
  622. .driver = {
  623. .name = "omapdss_hdmi",
  624. .pm = &hdmi_pm_ops,
  625. .of_match_table = hdmi_of_match,
  626. .suppress_bind_attrs = true,
  627. },
  628. };
  629. int __init hdmi4_init_platform_driver(void)
  630. {
  631. return platform_driver_register(&omapdss_hdmihw_driver);
  632. }
  633. void hdmi4_uninit_platform_driver(void)
  634. {
  635. platform_driver_unregister(&omapdss_hdmihw_driver);
  636. }