nouveau_drm.c 29 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/delay.h>
  26. #include <linux/module.h>
  27. #include <linux/pci.h>
  28. #include <linux/pm_runtime.h>
  29. #include <linux/vga_switcheroo.h>
  30. #include "drmP.h"
  31. #include "drm_crtc_helper.h"
  32. #include <core/gpuobj.h>
  33. #include <core/option.h>
  34. #include <core/pci.h>
  35. #include <core/tegra.h>
  36. #include <nvif/driver.h>
  37. #include <nvif/class.h>
  38. #include <nvif/cl0002.h>
  39. #include <nvif/cla06f.h>
  40. #include <nvif/if0004.h>
  41. #include "nouveau_drv.h"
  42. #include "nouveau_dma.h"
  43. #include "nouveau_ttm.h"
  44. #include "nouveau_gem.h"
  45. #include "nouveau_vga.h"
  46. #include "nouveau_led.h"
  47. #include "nouveau_hwmon.h"
  48. #include "nouveau_acpi.h"
  49. #include "nouveau_bios.h"
  50. #include "nouveau_ioctl.h"
  51. #include "nouveau_abi16.h"
  52. #include "nouveau_fbcon.h"
  53. #include "nouveau_fence.h"
  54. #include "nouveau_debugfs.h"
  55. #include "nouveau_usif.h"
  56. #include "nouveau_connector.h"
  57. #include "nouveau_platform.h"
  58. MODULE_PARM_DESC(config, "option string to pass to driver core");
  59. static char *nouveau_config;
  60. module_param_named(config, nouveau_config, charp, 0400);
  61. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  62. static char *nouveau_debug;
  63. module_param_named(debug, nouveau_debug, charp, 0400);
  64. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  65. static int nouveau_noaccel = 0;
  66. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  67. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  68. "0 = disabled, 1 = enabled, 2 = headless)");
  69. int nouveau_modeset = -1;
  70. module_param_named(modeset, nouveau_modeset, int, 0400);
  71. MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
  72. static int nouveau_runtime_pm = -1;
  73. module_param_named(runpm, nouveau_runtime_pm, int, 0400);
  74. static struct drm_driver driver_stub;
  75. static struct drm_driver driver_pci;
  76. static struct drm_driver driver_platform;
  77. static u64
  78. nouveau_pci_name(struct pci_dev *pdev)
  79. {
  80. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  81. name |= pdev->bus->number << 16;
  82. name |= PCI_SLOT(pdev->devfn) << 8;
  83. return name | PCI_FUNC(pdev->devfn);
  84. }
  85. static u64
  86. nouveau_platform_name(struct platform_device *platformdev)
  87. {
  88. return platformdev->id;
  89. }
  90. static u64
  91. nouveau_name(struct drm_device *dev)
  92. {
  93. if (dev->pdev)
  94. return nouveau_pci_name(dev->pdev);
  95. else
  96. return nouveau_platform_name(to_platform_device(dev->dev));
  97. }
  98. static void
  99. nouveau_cli_fini(struct nouveau_cli *cli)
  100. {
  101. nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
  102. usif_client_fini(cli);
  103. nvif_device_fini(&cli->device);
  104. nvif_client_fini(&cli->base);
  105. }
  106. static int
  107. nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
  108. struct nouveau_cli *cli)
  109. {
  110. u64 device = nouveau_name(drm->dev);
  111. int ret;
  112. snprintf(cli->name, sizeof(cli->name), "%s", sname);
  113. cli->dev = drm->dev;
  114. mutex_init(&cli->mutex);
  115. usif_client_init(cli);
  116. if (cli == &drm->client) {
  117. ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug,
  118. cli->name, device, &cli->base);
  119. } else {
  120. ret = nvif_client_init(&drm->client.base, cli->name, device,
  121. &cli->base);
  122. }
  123. if (ret) {
  124. NV_ERROR(drm, "Client allocation failed: %d\n", ret);
  125. goto done;
  126. }
  127. ret = nvif_device_init(&cli->base.object, 0, NV_DEVICE,
  128. &(struct nv_device_v0) {
  129. .device = ~0,
  130. }, sizeof(struct nv_device_v0),
  131. &cli->device);
  132. if (ret) {
  133. NV_ERROR(drm, "Device allocation failed: %d\n", ret);
  134. goto done;
  135. }
  136. done:
  137. if (ret)
  138. nouveau_cli_fini(cli);
  139. return ret;
  140. }
  141. static void
  142. nouveau_accel_fini(struct nouveau_drm *drm)
  143. {
  144. nouveau_channel_idle(drm->channel);
  145. nvif_object_fini(&drm->ntfy);
  146. nvkm_gpuobj_del(&drm->notify);
  147. nvif_notify_fini(&drm->flip);
  148. nvif_object_fini(&drm->nvsw);
  149. nouveau_channel_del(&drm->channel);
  150. nouveau_channel_idle(drm->cechan);
  151. nvif_object_fini(&drm->ttm.copy);
  152. nouveau_channel_del(&drm->cechan);
  153. if (drm->fence)
  154. nouveau_fence(drm)->dtor(drm);
  155. }
  156. static void
  157. nouveau_accel_init(struct nouveau_drm *drm)
  158. {
  159. struct nvif_device *device = &drm->client.device;
  160. struct nvif_sclass *sclass;
  161. u32 arg0, arg1;
  162. int ret, i, n;
  163. if (nouveau_noaccel)
  164. return;
  165. /* initialise synchronisation routines */
  166. /*XXX: this is crap, but the fence/channel stuff is a little
  167. * backwards in some places. this will be fixed.
  168. */
  169. ret = n = nvif_object_sclass_get(&device->object, &sclass);
  170. if (ret < 0)
  171. return;
  172. for (ret = -ENOSYS, i = 0; i < n; i++) {
  173. switch (sclass[i].oclass) {
  174. case NV03_CHANNEL_DMA:
  175. ret = nv04_fence_create(drm);
  176. break;
  177. case NV10_CHANNEL_DMA:
  178. ret = nv10_fence_create(drm);
  179. break;
  180. case NV17_CHANNEL_DMA:
  181. case NV40_CHANNEL_DMA:
  182. ret = nv17_fence_create(drm);
  183. break;
  184. case NV50_CHANNEL_GPFIFO:
  185. ret = nv50_fence_create(drm);
  186. break;
  187. case G82_CHANNEL_GPFIFO:
  188. ret = nv84_fence_create(drm);
  189. break;
  190. case FERMI_CHANNEL_GPFIFO:
  191. case KEPLER_CHANNEL_GPFIFO_A:
  192. case KEPLER_CHANNEL_GPFIFO_B:
  193. case MAXWELL_CHANNEL_GPFIFO_A:
  194. case PASCAL_CHANNEL_GPFIFO_A:
  195. ret = nvc0_fence_create(drm);
  196. break;
  197. default:
  198. break;
  199. }
  200. }
  201. nvif_object_sclass_put(&sclass);
  202. if (ret) {
  203. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  204. nouveau_accel_fini(drm);
  205. return;
  206. }
  207. if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
  208. ret = nouveau_channel_new(drm, &drm->client.device,
  209. NVA06F_V0_ENGINE_CE0 |
  210. NVA06F_V0_ENGINE_CE1,
  211. 0, &drm->cechan);
  212. if (ret)
  213. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  214. arg0 = NVA06F_V0_ENGINE_GR;
  215. arg1 = 1;
  216. } else
  217. if (device->info.chipset >= 0xa3 &&
  218. device->info.chipset != 0xaa &&
  219. device->info.chipset != 0xac) {
  220. ret = nouveau_channel_new(drm, &drm->client.device,
  221. NvDmaFB, NvDmaTT, &drm->cechan);
  222. if (ret)
  223. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  224. arg0 = NvDmaFB;
  225. arg1 = NvDmaTT;
  226. } else {
  227. arg0 = NvDmaFB;
  228. arg1 = NvDmaTT;
  229. }
  230. ret = nouveau_channel_new(drm, &drm->client.device,
  231. arg0, arg1, &drm->channel);
  232. if (ret) {
  233. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  234. nouveau_accel_fini(drm);
  235. return;
  236. }
  237. ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
  238. nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
  239. if (ret == 0) {
  240. ret = RING_SPACE(drm->channel, 2);
  241. if (ret == 0) {
  242. if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
  243. BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
  244. OUT_RING (drm->channel, NVDRM_NVSW);
  245. } else
  246. if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
  247. BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
  248. OUT_RING (drm->channel, 0x001f0000);
  249. }
  250. }
  251. ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
  252. false, NV04_NVSW_NTFY_UEVENT,
  253. NULL, 0, 0, &drm->flip);
  254. if (ret == 0)
  255. ret = nvif_notify_get(&drm->flip);
  256. if (ret) {
  257. nouveau_accel_fini(drm);
  258. return;
  259. }
  260. }
  261. if (ret) {
  262. NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
  263. nouveau_accel_fini(drm);
  264. return;
  265. }
  266. if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
  267. ret = nvkm_gpuobj_new(nvxx_device(&drm->client.device), 32, 0,
  268. false, NULL, &drm->notify);
  269. if (ret) {
  270. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  271. nouveau_accel_fini(drm);
  272. return;
  273. }
  274. ret = nvif_object_init(&drm->channel->user, NvNotify0,
  275. NV_DMA_IN_MEMORY,
  276. &(struct nv_dma_v0) {
  277. .target = NV_DMA_V0_TARGET_VRAM,
  278. .access = NV_DMA_V0_ACCESS_RDWR,
  279. .start = drm->notify->addr,
  280. .limit = drm->notify->addr + 31
  281. }, sizeof(struct nv_dma_v0),
  282. &drm->ntfy);
  283. if (ret) {
  284. nouveau_accel_fini(drm);
  285. return;
  286. }
  287. }
  288. nouveau_bo_move_init(drm);
  289. }
  290. static int nouveau_drm_probe(struct pci_dev *pdev,
  291. const struct pci_device_id *pent)
  292. {
  293. struct nvkm_device *device;
  294. struct apertures_struct *aper;
  295. bool boot = false;
  296. int ret;
  297. if (vga_switcheroo_client_probe_defer(pdev))
  298. return -EPROBE_DEFER;
  299. /* We need to check that the chipset is supported before booting
  300. * fbdev off the hardware, as there's no way to put it back.
  301. */
  302. ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device);
  303. if (ret)
  304. return ret;
  305. nvkm_device_del(&device);
  306. /* Remove conflicting drivers (vesafb, efifb etc). */
  307. aper = alloc_apertures(3);
  308. if (!aper)
  309. return -ENOMEM;
  310. aper->ranges[0].base = pci_resource_start(pdev, 1);
  311. aper->ranges[0].size = pci_resource_len(pdev, 1);
  312. aper->count = 1;
  313. if (pci_resource_len(pdev, 2)) {
  314. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  315. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  316. aper->count++;
  317. }
  318. if (pci_resource_len(pdev, 3)) {
  319. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  320. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  321. aper->count++;
  322. }
  323. #ifdef CONFIG_X86
  324. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  325. #endif
  326. if (nouveau_modeset != 2)
  327. drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  328. kfree(aper);
  329. ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
  330. true, true, ~0ULL, &device);
  331. if (ret)
  332. return ret;
  333. pci_set_master(pdev);
  334. ret = drm_get_pci_dev(pdev, pent, &driver_pci);
  335. if (ret) {
  336. nvkm_device_del(&device);
  337. return ret;
  338. }
  339. return 0;
  340. }
  341. #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
  342. static void
  343. nouveau_get_hdmi_dev(struct nouveau_drm *drm)
  344. {
  345. struct pci_dev *pdev = drm->dev->pdev;
  346. if (!pdev) {
  347. NV_DEBUG(drm, "not a PCI device; no HDMI\n");
  348. drm->hdmi_device = NULL;
  349. return;
  350. }
  351. /* subfunction one is a hdmi audio device? */
  352. drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
  353. PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
  354. if (!drm->hdmi_device) {
  355. NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
  356. return;
  357. }
  358. if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
  359. NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
  360. pci_dev_put(drm->hdmi_device);
  361. drm->hdmi_device = NULL;
  362. return;
  363. }
  364. }
  365. static int
  366. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  367. {
  368. struct nouveau_drm *drm;
  369. int ret;
  370. if (!(drm = kzalloc(sizeof(*drm), GFP_KERNEL)))
  371. return -ENOMEM;
  372. dev->dev_private = drm;
  373. drm->dev = dev;
  374. ret = nouveau_cli_init(drm, "DRM", &drm->client);
  375. if (ret)
  376. return ret;
  377. dev->irq_enabled = true;
  378. nvxx_client(&drm->client.base)->debug =
  379. nvkm_dbgopt(nouveau_debug, "DRM");
  380. INIT_LIST_HEAD(&drm->clients);
  381. spin_lock_init(&drm->tile.lock);
  382. nouveau_get_hdmi_dev(drm);
  383. /* workaround an odd issue on nvc1 by disabling the device's
  384. * nosnoop capability. hopefully won't cause issues until a
  385. * better fix is found - assuming there is one...
  386. */
  387. if (drm->client.device.info.chipset == 0xc1)
  388. nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
  389. nouveau_vga_init(drm);
  390. if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
  391. if (!nvxx_device(&drm->client.device)->mmu) {
  392. ret = -ENOSYS;
  393. goto fail_device;
  394. }
  395. ret = nvkm_vm_new(nvxx_device(&drm->client.device),
  396. 0, (1ULL << 40), 0x1000, NULL,
  397. &drm->client.vm);
  398. if (ret)
  399. goto fail_device;
  400. nvxx_client(&drm->client.base)->vm = drm->client.vm;
  401. }
  402. ret = nouveau_ttm_init(drm);
  403. if (ret)
  404. goto fail_ttm;
  405. ret = nouveau_bios_init(dev);
  406. if (ret)
  407. goto fail_bios;
  408. ret = nouveau_display_create(dev);
  409. if (ret)
  410. goto fail_dispctor;
  411. if (dev->mode_config.num_crtc) {
  412. ret = nouveau_display_init(dev);
  413. if (ret)
  414. goto fail_dispinit;
  415. }
  416. nouveau_debugfs_init(drm);
  417. nouveau_hwmon_init(dev);
  418. nouveau_accel_init(drm);
  419. nouveau_fbcon_init(dev);
  420. nouveau_led_init(dev);
  421. if (nouveau_pmops_runtime()) {
  422. pm_runtime_use_autosuspend(dev->dev);
  423. pm_runtime_set_autosuspend_delay(dev->dev, 5000);
  424. pm_runtime_set_active(dev->dev);
  425. pm_runtime_allow(dev->dev);
  426. pm_runtime_mark_last_busy(dev->dev);
  427. pm_runtime_put(dev->dev);
  428. } else {
  429. /* enable polling for external displays */
  430. drm_kms_helper_poll_enable(dev);
  431. }
  432. return 0;
  433. fail_dispinit:
  434. nouveau_display_destroy(dev);
  435. fail_dispctor:
  436. nouveau_bios_takedown(dev);
  437. fail_bios:
  438. nouveau_ttm_fini(drm);
  439. fail_ttm:
  440. nouveau_vga_fini(drm);
  441. fail_device:
  442. nouveau_cli_fini(&drm->client);
  443. kfree(drm);
  444. return ret;
  445. }
  446. static void
  447. nouveau_drm_unload(struct drm_device *dev)
  448. {
  449. struct nouveau_drm *drm = nouveau_drm(dev);
  450. if (nouveau_pmops_runtime()) {
  451. pm_runtime_get_sync(dev->dev);
  452. pm_runtime_forbid(dev->dev);
  453. }
  454. nouveau_led_fini(dev);
  455. nouveau_fbcon_fini(dev);
  456. nouveau_accel_fini(drm);
  457. nouveau_hwmon_fini(dev);
  458. nouveau_debugfs_fini(drm);
  459. if (dev->mode_config.num_crtc)
  460. nouveau_display_fini(dev, false);
  461. nouveau_display_destroy(dev);
  462. nouveau_bios_takedown(dev);
  463. nouveau_ttm_fini(drm);
  464. nouveau_vga_fini(drm);
  465. if (drm->hdmi_device)
  466. pci_dev_put(drm->hdmi_device);
  467. nouveau_cli_fini(&drm->client);
  468. kfree(drm);
  469. }
  470. void
  471. nouveau_drm_device_remove(struct drm_device *dev)
  472. {
  473. struct nouveau_drm *drm = nouveau_drm(dev);
  474. struct nvkm_client *client;
  475. struct nvkm_device *device;
  476. dev->irq_enabled = false;
  477. client = nvxx_client(&drm->client.base);
  478. device = nvkm_device_find(client->device);
  479. drm_put_dev(dev);
  480. nvkm_device_del(&device);
  481. }
  482. static void
  483. nouveau_drm_remove(struct pci_dev *pdev)
  484. {
  485. struct drm_device *dev = pci_get_drvdata(pdev);
  486. nouveau_drm_device_remove(dev);
  487. }
  488. static int
  489. nouveau_do_suspend(struct drm_device *dev, bool runtime)
  490. {
  491. struct nouveau_drm *drm = nouveau_drm(dev);
  492. int ret;
  493. nouveau_led_suspend(dev);
  494. if (dev->mode_config.num_crtc) {
  495. NV_INFO(drm, "suspending console...\n");
  496. nouveau_fbcon_set_suspend(dev, 1);
  497. NV_INFO(drm, "suspending display...\n");
  498. ret = nouveau_display_suspend(dev, runtime);
  499. if (ret)
  500. return ret;
  501. }
  502. NV_INFO(drm, "evicting buffers...\n");
  503. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  504. NV_INFO(drm, "waiting for kernel channels to go idle...\n");
  505. if (drm->cechan) {
  506. ret = nouveau_channel_idle(drm->cechan);
  507. if (ret)
  508. goto fail_display;
  509. }
  510. if (drm->channel) {
  511. ret = nouveau_channel_idle(drm->channel);
  512. if (ret)
  513. goto fail_display;
  514. }
  515. NV_INFO(drm, "suspending fence...\n");
  516. if (drm->fence && nouveau_fence(drm)->suspend) {
  517. if (!nouveau_fence(drm)->suspend(drm)) {
  518. ret = -ENOMEM;
  519. goto fail_display;
  520. }
  521. }
  522. NV_INFO(drm, "suspending object tree...\n");
  523. ret = nvif_client_suspend(&drm->client.base);
  524. if (ret)
  525. goto fail_client;
  526. return 0;
  527. fail_client:
  528. if (drm->fence && nouveau_fence(drm)->resume)
  529. nouveau_fence(drm)->resume(drm);
  530. fail_display:
  531. if (dev->mode_config.num_crtc) {
  532. NV_INFO(drm, "resuming display...\n");
  533. nouveau_display_resume(dev, runtime);
  534. }
  535. return ret;
  536. }
  537. static int
  538. nouveau_do_resume(struct drm_device *dev, bool runtime)
  539. {
  540. struct nouveau_drm *drm = nouveau_drm(dev);
  541. NV_INFO(drm, "resuming object tree...\n");
  542. nvif_client_resume(&drm->client.base);
  543. NV_INFO(drm, "resuming fence...\n");
  544. if (drm->fence && nouveau_fence(drm)->resume)
  545. nouveau_fence(drm)->resume(drm);
  546. nouveau_run_vbios_init(dev);
  547. if (dev->mode_config.num_crtc) {
  548. NV_INFO(drm, "resuming display...\n");
  549. nouveau_display_resume(dev, runtime);
  550. NV_INFO(drm, "resuming console...\n");
  551. nouveau_fbcon_set_suspend(dev, 0);
  552. }
  553. nouveau_led_resume(dev);
  554. return 0;
  555. }
  556. int
  557. nouveau_pmops_suspend(struct device *dev)
  558. {
  559. struct pci_dev *pdev = to_pci_dev(dev);
  560. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  561. int ret;
  562. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  563. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  564. return 0;
  565. ret = nouveau_do_suspend(drm_dev, false);
  566. if (ret)
  567. return ret;
  568. pci_save_state(pdev);
  569. pci_disable_device(pdev);
  570. pci_set_power_state(pdev, PCI_D3hot);
  571. udelay(200);
  572. return 0;
  573. }
  574. int
  575. nouveau_pmops_resume(struct device *dev)
  576. {
  577. struct pci_dev *pdev = to_pci_dev(dev);
  578. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  579. int ret;
  580. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  581. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  582. return 0;
  583. pci_set_power_state(pdev, PCI_D0);
  584. pci_restore_state(pdev);
  585. ret = pci_enable_device(pdev);
  586. if (ret)
  587. return ret;
  588. pci_set_master(pdev);
  589. ret = nouveau_do_resume(drm_dev, false);
  590. /* Monitors may have been connected / disconnected during suspend */
  591. schedule_work(&nouveau_drm(drm_dev)->hpd_work);
  592. return ret;
  593. }
  594. static int
  595. nouveau_pmops_freeze(struct device *dev)
  596. {
  597. struct pci_dev *pdev = to_pci_dev(dev);
  598. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  599. return nouveau_do_suspend(drm_dev, false);
  600. }
  601. static int
  602. nouveau_pmops_thaw(struct device *dev)
  603. {
  604. struct pci_dev *pdev = to_pci_dev(dev);
  605. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  606. return nouveau_do_resume(drm_dev, false);
  607. }
  608. bool
  609. nouveau_pmops_runtime()
  610. {
  611. if (nouveau_runtime_pm == -1)
  612. return nouveau_is_optimus() || nouveau_is_v1_dsm();
  613. return nouveau_runtime_pm == 1;
  614. }
  615. static int
  616. nouveau_pmops_runtime_suspend(struct device *dev)
  617. {
  618. struct pci_dev *pdev = to_pci_dev(dev);
  619. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  620. int ret;
  621. if (!nouveau_pmops_runtime()) {
  622. pm_runtime_forbid(dev);
  623. return -EBUSY;
  624. }
  625. drm_kms_helper_poll_disable(drm_dev);
  626. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
  627. nouveau_switcheroo_optimus_dsm();
  628. ret = nouveau_do_suspend(drm_dev, true);
  629. pci_save_state(pdev);
  630. pci_disable_device(pdev);
  631. pci_ignore_hotplug(pdev);
  632. pci_set_power_state(pdev, PCI_D3cold);
  633. drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
  634. return ret;
  635. }
  636. static int
  637. nouveau_pmops_runtime_resume(struct device *dev)
  638. {
  639. struct pci_dev *pdev = to_pci_dev(dev);
  640. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  641. struct nvif_device *device = &nouveau_drm(drm_dev)->client.device;
  642. int ret;
  643. if (!nouveau_pmops_runtime()) {
  644. pm_runtime_forbid(dev);
  645. return -EBUSY;
  646. }
  647. pci_set_power_state(pdev, PCI_D0);
  648. pci_restore_state(pdev);
  649. ret = pci_enable_device(pdev);
  650. if (ret)
  651. return ret;
  652. pci_set_master(pdev);
  653. ret = nouveau_do_resume(drm_dev, true);
  654. /* do magic */
  655. nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
  656. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
  657. drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
  658. /* Monitors may have been connected / disconnected during suspend */
  659. schedule_work(&nouveau_drm(drm_dev)->hpd_work);
  660. return ret;
  661. }
  662. static int
  663. nouveau_pmops_runtime_idle(struct device *dev)
  664. {
  665. struct pci_dev *pdev = to_pci_dev(dev);
  666. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  667. struct nouveau_drm *drm = nouveau_drm(drm_dev);
  668. struct drm_crtc *crtc;
  669. if (!nouveau_pmops_runtime()) {
  670. pm_runtime_forbid(dev);
  671. return -EBUSY;
  672. }
  673. /* if we have a hdmi audio device - make sure it has a driver loaded */
  674. if (drm->hdmi_device) {
  675. if (!drm->hdmi_device->driver) {
  676. DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
  677. pm_runtime_mark_last_busy(dev);
  678. return -EBUSY;
  679. }
  680. }
  681. list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
  682. if (crtc->enabled) {
  683. DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
  684. return -EBUSY;
  685. }
  686. }
  687. pm_runtime_mark_last_busy(dev);
  688. pm_runtime_autosuspend(dev);
  689. /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
  690. return 1;
  691. }
  692. static int
  693. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  694. {
  695. struct nouveau_drm *drm = nouveau_drm(dev);
  696. struct nouveau_cli *cli;
  697. char name[32], tmpname[TASK_COMM_LEN];
  698. int ret;
  699. /* need to bring up power immediately if opening device */
  700. ret = pm_runtime_get_sync(dev->dev);
  701. if (ret < 0 && ret != -EACCES)
  702. return ret;
  703. get_task_comm(tmpname, current);
  704. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  705. if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL)))
  706. return ret;
  707. ret = nouveau_cli_init(drm, name, cli);
  708. if (ret)
  709. goto done;
  710. cli->base.super = false;
  711. if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
  712. ret = nvkm_vm_new(nvxx_device(&drm->client.device), 0,
  713. (1ULL << 40), 0x1000, NULL, &cli->vm);
  714. if (ret)
  715. goto done;
  716. nvxx_client(&cli->base)->vm = cli->vm;
  717. }
  718. fpriv->driver_priv = cli;
  719. mutex_lock(&drm->client.mutex);
  720. list_add(&cli->head, &drm->clients);
  721. mutex_unlock(&drm->client.mutex);
  722. done:
  723. if (ret && cli) {
  724. nouveau_cli_fini(cli);
  725. kfree(cli);
  726. }
  727. pm_runtime_mark_last_busy(dev->dev);
  728. pm_runtime_put_autosuspend(dev->dev);
  729. return ret;
  730. }
  731. static void
  732. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  733. {
  734. struct nouveau_cli *cli = nouveau_cli(fpriv);
  735. struct nouveau_drm *drm = nouveau_drm(dev);
  736. pm_runtime_get_sync(dev->dev);
  737. mutex_lock(&cli->mutex);
  738. if (cli->abi16)
  739. nouveau_abi16_fini(cli->abi16);
  740. mutex_unlock(&cli->mutex);
  741. mutex_lock(&drm->client.mutex);
  742. list_del(&cli->head);
  743. mutex_unlock(&drm->client.mutex);
  744. }
  745. static void
  746. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  747. {
  748. struct nouveau_cli *cli = nouveau_cli(fpriv);
  749. nouveau_cli_fini(cli);
  750. kfree(cli);
  751. pm_runtime_mark_last_busy(dev->dev);
  752. pm_runtime_put_autosuspend(dev->dev);
  753. }
  754. static const struct drm_ioctl_desc
  755. nouveau_ioctls[] = {
  756. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
  757. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  758. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
  759. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
  760. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
  761. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
  762. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
  763. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
  764. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
  765. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
  766. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
  767. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
  768. };
  769. long
  770. nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  771. {
  772. struct drm_file *filp = file->private_data;
  773. struct drm_device *dev = filp->minor->dev;
  774. long ret;
  775. ret = pm_runtime_get_sync(dev->dev);
  776. if (ret < 0 && ret != -EACCES)
  777. return ret;
  778. switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
  779. case DRM_NOUVEAU_NVIF:
  780. ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
  781. break;
  782. default:
  783. ret = drm_ioctl(file, cmd, arg);
  784. break;
  785. }
  786. pm_runtime_mark_last_busy(dev->dev);
  787. pm_runtime_put_autosuspend(dev->dev);
  788. return ret;
  789. }
  790. static const struct file_operations
  791. nouveau_driver_fops = {
  792. .owner = THIS_MODULE,
  793. .open = drm_open,
  794. .release = drm_release,
  795. .unlocked_ioctl = nouveau_drm_ioctl,
  796. .mmap = nouveau_ttm_mmap,
  797. .poll = drm_poll,
  798. .read = drm_read,
  799. #if defined(CONFIG_COMPAT)
  800. .compat_ioctl = nouveau_compat_ioctl,
  801. #endif
  802. .llseek = noop_llseek,
  803. };
  804. static struct drm_driver
  805. driver_stub = {
  806. .driver_features =
  807. DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
  808. DRIVER_KMS_LEGACY_CONTEXT,
  809. .load = nouveau_drm_load,
  810. .unload = nouveau_drm_unload,
  811. .open = nouveau_drm_open,
  812. .preclose = nouveau_drm_preclose,
  813. .postclose = nouveau_drm_postclose,
  814. .lastclose = nouveau_vga_lastclose,
  815. #if defined(CONFIG_DEBUG_FS)
  816. .debugfs_init = nouveau_drm_debugfs_init,
  817. #endif
  818. .enable_vblank = nouveau_display_vblank_enable,
  819. .disable_vblank = nouveau_display_vblank_disable,
  820. .get_scanout_position = nouveau_display_scanoutpos,
  821. .get_vblank_timestamp = nouveau_display_vblstamp,
  822. .ioctls = nouveau_ioctls,
  823. .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
  824. .fops = &nouveau_driver_fops,
  825. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  826. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  827. .gem_prime_export = drm_gem_prime_export,
  828. .gem_prime_import = drm_gem_prime_import,
  829. .gem_prime_pin = nouveau_gem_prime_pin,
  830. .gem_prime_res_obj = nouveau_gem_prime_res_obj,
  831. .gem_prime_unpin = nouveau_gem_prime_unpin,
  832. .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
  833. .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
  834. .gem_prime_vmap = nouveau_gem_prime_vmap,
  835. .gem_prime_vunmap = nouveau_gem_prime_vunmap,
  836. .gem_free_object_unlocked = nouveau_gem_object_del,
  837. .gem_open_object = nouveau_gem_object_open,
  838. .gem_close_object = nouveau_gem_object_close,
  839. .dumb_create = nouveau_display_dumb_create,
  840. .dumb_map_offset = nouveau_display_dumb_map_offset,
  841. .dumb_destroy = drm_gem_dumb_destroy,
  842. .name = DRIVER_NAME,
  843. .desc = DRIVER_DESC,
  844. #ifdef GIT_REVISION
  845. .date = GIT_REVISION,
  846. #else
  847. .date = DRIVER_DATE,
  848. #endif
  849. .major = DRIVER_MAJOR,
  850. .minor = DRIVER_MINOR,
  851. .patchlevel = DRIVER_PATCHLEVEL,
  852. };
  853. static struct pci_device_id
  854. nouveau_drm_pci_table[] = {
  855. {
  856. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  857. .class = PCI_BASE_CLASS_DISPLAY << 16,
  858. .class_mask = 0xff << 16,
  859. },
  860. {
  861. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  862. .class = PCI_BASE_CLASS_DISPLAY << 16,
  863. .class_mask = 0xff << 16,
  864. },
  865. {}
  866. };
  867. static void nouveau_display_options(void)
  868. {
  869. DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
  870. DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
  871. DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
  872. DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
  873. DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
  874. DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
  875. DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
  876. DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
  877. DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
  878. DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
  879. DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
  880. DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
  881. }
  882. static const struct dev_pm_ops nouveau_pm_ops = {
  883. .suspend = nouveau_pmops_suspend,
  884. .resume = nouveau_pmops_resume,
  885. .freeze = nouveau_pmops_freeze,
  886. .thaw = nouveau_pmops_thaw,
  887. .poweroff = nouveau_pmops_freeze,
  888. .restore = nouveau_pmops_resume,
  889. .runtime_suspend = nouveau_pmops_runtime_suspend,
  890. .runtime_resume = nouveau_pmops_runtime_resume,
  891. .runtime_idle = nouveau_pmops_runtime_idle,
  892. };
  893. static struct pci_driver
  894. nouveau_drm_pci_driver = {
  895. .name = "nouveau",
  896. .id_table = nouveau_drm_pci_table,
  897. .probe = nouveau_drm_probe,
  898. .remove = nouveau_drm_remove,
  899. .driver.pm = &nouveau_pm_ops,
  900. };
  901. struct drm_device *
  902. nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
  903. struct platform_device *pdev,
  904. struct nvkm_device **pdevice)
  905. {
  906. struct drm_device *drm;
  907. int err;
  908. err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
  909. true, true, ~0ULL, pdevice);
  910. if (err)
  911. goto err_free;
  912. drm = drm_dev_alloc(&driver_platform, &pdev->dev);
  913. if (IS_ERR(drm)) {
  914. err = PTR_ERR(drm);
  915. goto err_free;
  916. }
  917. platform_set_drvdata(pdev, drm);
  918. return drm;
  919. err_free:
  920. nvkm_device_del(pdevice);
  921. return ERR_PTR(err);
  922. }
  923. static int __init
  924. nouveau_drm_init(void)
  925. {
  926. driver_pci = driver_stub;
  927. driver_pci.set_busid = drm_pci_set_busid;
  928. driver_platform = driver_stub;
  929. nouveau_display_options();
  930. if (nouveau_modeset == -1) {
  931. if (vgacon_text_force())
  932. nouveau_modeset = 0;
  933. }
  934. if (!nouveau_modeset)
  935. return 0;
  936. #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
  937. platform_driver_register(&nouveau_platform_driver);
  938. #endif
  939. nouveau_register_dsm_handler();
  940. nouveau_backlight_ctor();
  941. return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
  942. }
  943. static void __exit
  944. nouveau_drm_exit(void)
  945. {
  946. if (!nouveau_modeset)
  947. return;
  948. drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
  949. nouveau_backlight_dtor();
  950. nouveau_unregister_dsm_handler();
  951. #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
  952. platform_driver_unregister(&nouveau_platform_driver);
  953. #endif
  954. }
  955. module_init(nouveau_drm_init);
  956. module_exit(nouveau_drm_exit);
  957. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  958. MODULE_AUTHOR(DRIVER_AUTHOR);
  959. MODULE_DESCRIPTION(DRIVER_DESC);
  960. MODULE_LICENSE("GPL and additional rights");