i915_gem_object.c 15 KB

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  1. /*
  2. * Copyright © 2016 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. */
  24. #include "../i915_selftest.h"
  25. #include "mock_gem_device.h"
  26. #include "huge_gem_object.h"
  27. static int igt_gem_object(void *arg)
  28. {
  29. struct drm_i915_private *i915 = arg;
  30. struct drm_i915_gem_object *obj;
  31. int err = -ENOMEM;
  32. /* Basic test to ensure we can create an object */
  33. obj = i915_gem_object_create(i915, PAGE_SIZE);
  34. if (IS_ERR(obj)) {
  35. err = PTR_ERR(obj);
  36. pr_err("i915_gem_object_create failed, err=%d\n", err);
  37. goto out;
  38. }
  39. err = 0;
  40. i915_gem_object_put(obj);
  41. out:
  42. return err;
  43. }
  44. static int igt_phys_object(void *arg)
  45. {
  46. struct drm_i915_private *i915 = arg;
  47. struct drm_i915_gem_object *obj;
  48. int err;
  49. /* Create an object and bind it to a contiguous set of physical pages,
  50. * i.e. exercise the i915_gem_object_phys API.
  51. */
  52. obj = i915_gem_object_create(i915, PAGE_SIZE);
  53. if (IS_ERR(obj)) {
  54. err = PTR_ERR(obj);
  55. pr_err("i915_gem_object_create failed, err=%d\n", err);
  56. goto out;
  57. }
  58. mutex_lock(&i915->drm.struct_mutex);
  59. err = i915_gem_object_attach_phys(obj, PAGE_SIZE);
  60. mutex_unlock(&i915->drm.struct_mutex);
  61. if (err) {
  62. pr_err("i915_gem_object_attach_phys failed, err=%d\n", err);
  63. goto out_obj;
  64. }
  65. if (obj->ops != &i915_gem_phys_ops) {
  66. pr_err("i915_gem_object_attach_phys did not create a phys object\n");
  67. err = -EINVAL;
  68. goto out_obj;
  69. }
  70. if (!atomic_read(&obj->mm.pages_pin_count)) {
  71. pr_err("i915_gem_object_attach_phys did not pin its phys pages\n");
  72. err = -EINVAL;
  73. goto out_obj;
  74. }
  75. /* Make the object dirty so that put_pages must do copy back the data */
  76. mutex_lock(&i915->drm.struct_mutex);
  77. err = i915_gem_object_set_to_gtt_domain(obj, true);
  78. mutex_unlock(&i915->drm.struct_mutex);
  79. if (err) {
  80. pr_err("i915_gem_object_set_to_gtt_domain failed with err=%d\n",
  81. err);
  82. goto out_obj;
  83. }
  84. out_obj:
  85. i915_gem_object_put(obj);
  86. out:
  87. return err;
  88. }
  89. static int igt_gem_huge(void *arg)
  90. {
  91. const unsigned int nreal = 509; /* just to be awkward */
  92. struct drm_i915_private *i915 = arg;
  93. struct drm_i915_gem_object *obj;
  94. unsigned int n;
  95. int err;
  96. /* Basic sanitycheck of our huge fake object allocation */
  97. obj = huge_gem_object(i915,
  98. nreal * PAGE_SIZE,
  99. i915->ggtt.base.total + PAGE_SIZE);
  100. if (IS_ERR(obj))
  101. return PTR_ERR(obj);
  102. err = i915_gem_object_pin_pages(obj);
  103. if (err) {
  104. pr_err("Failed to allocate %u pages (%lu total), err=%d\n",
  105. nreal, obj->base.size / PAGE_SIZE, err);
  106. goto out;
  107. }
  108. for (n = 0; n < obj->base.size / PAGE_SIZE; n++) {
  109. if (i915_gem_object_get_page(obj, n) !=
  110. i915_gem_object_get_page(obj, n % nreal)) {
  111. pr_err("Page lookup mismatch at index %u [%u]\n",
  112. n, n % nreal);
  113. err = -EINVAL;
  114. goto out_unpin;
  115. }
  116. }
  117. out_unpin:
  118. i915_gem_object_unpin_pages(obj);
  119. out:
  120. i915_gem_object_put(obj);
  121. return err;
  122. }
  123. struct tile {
  124. unsigned int width;
  125. unsigned int height;
  126. unsigned int stride;
  127. unsigned int size;
  128. unsigned int tiling;
  129. unsigned int swizzle;
  130. };
  131. static u64 swizzle_bit(unsigned int bit, u64 offset)
  132. {
  133. return (offset & BIT_ULL(bit)) >> (bit - 6);
  134. }
  135. static u64 tiled_offset(const struct tile *tile, u64 v)
  136. {
  137. u64 x, y;
  138. if (tile->tiling == I915_TILING_NONE)
  139. return v;
  140. y = div64_u64_rem(v, tile->stride, &x);
  141. v = div64_u64_rem(y, tile->height, &y) * tile->stride * tile->height;
  142. if (tile->tiling == I915_TILING_X) {
  143. v += y * tile->width;
  144. v += div64_u64_rem(x, tile->width, &x) << tile->size;
  145. v += x;
  146. } else {
  147. const unsigned int ytile_span = 16;
  148. const unsigned int ytile_height = 32 * ytile_span;
  149. v += y * ytile_span;
  150. v += div64_u64_rem(x, ytile_span, &x) * ytile_height;
  151. v += x;
  152. }
  153. switch (tile->swizzle) {
  154. case I915_BIT_6_SWIZZLE_9:
  155. v ^= swizzle_bit(9, v);
  156. break;
  157. case I915_BIT_6_SWIZZLE_9_10:
  158. v ^= swizzle_bit(9, v) ^ swizzle_bit(10, v);
  159. break;
  160. case I915_BIT_6_SWIZZLE_9_11:
  161. v ^= swizzle_bit(9, v) ^ swizzle_bit(11, v);
  162. break;
  163. case I915_BIT_6_SWIZZLE_9_10_11:
  164. v ^= swizzle_bit(9, v) ^ swizzle_bit(10, v) ^ swizzle_bit(11, v);
  165. break;
  166. }
  167. return v;
  168. }
  169. static int check_partial_mapping(struct drm_i915_gem_object *obj,
  170. const struct tile *tile,
  171. unsigned long end_time)
  172. {
  173. const unsigned int nreal = obj->scratch / PAGE_SIZE;
  174. const unsigned long npages = obj->base.size / PAGE_SIZE;
  175. struct i915_vma *vma;
  176. unsigned long page;
  177. int err;
  178. if (igt_timeout(end_time,
  179. "%s: timed out before tiling=%d stride=%d\n",
  180. __func__, tile->tiling, tile->stride))
  181. return -EINTR;
  182. err = i915_gem_object_set_tiling(obj, tile->tiling, tile->stride);
  183. if (err)
  184. return err;
  185. GEM_BUG_ON(i915_gem_object_get_tiling(obj) != tile->tiling);
  186. GEM_BUG_ON(i915_gem_object_get_stride(obj) != tile->stride);
  187. for_each_prime_number_from(page, 1, npages) {
  188. struct i915_ggtt_view view =
  189. compute_partial_view(obj, page, MIN_CHUNK_PAGES);
  190. u32 __iomem *io;
  191. struct page *p;
  192. unsigned int n;
  193. u64 offset;
  194. u32 *cpu;
  195. GEM_BUG_ON(view.partial.size > nreal);
  196. err = i915_gem_object_set_to_gtt_domain(obj, true);
  197. if (err)
  198. return err;
  199. vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, PIN_MAPPABLE);
  200. if (IS_ERR(vma)) {
  201. pr_err("Failed to pin partial view: offset=%lu\n",
  202. page);
  203. return PTR_ERR(vma);
  204. }
  205. n = page - view.partial.offset;
  206. GEM_BUG_ON(n >= view.partial.size);
  207. io = i915_vma_pin_iomap(vma);
  208. i915_vma_unpin(vma);
  209. if (IS_ERR(io)) {
  210. pr_err("Failed to iomap partial view: offset=%lu\n",
  211. page);
  212. return PTR_ERR(io);
  213. }
  214. err = i915_vma_get_fence(vma);
  215. if (err) {
  216. pr_err("Failed to get fence for partial view: offset=%lu\n",
  217. page);
  218. i915_vma_unpin_iomap(vma);
  219. return err;
  220. }
  221. iowrite32(page, io + n * PAGE_SIZE/sizeof(*io));
  222. i915_vma_unpin_iomap(vma);
  223. offset = tiled_offset(tile, page << PAGE_SHIFT);
  224. if (offset >= obj->base.size)
  225. continue;
  226. i915_gem_object_flush_gtt_write_domain(obj);
  227. p = i915_gem_object_get_page(obj, offset >> PAGE_SHIFT);
  228. cpu = kmap(p) + offset_in_page(offset);
  229. drm_clflush_virt_range(cpu, sizeof(*cpu));
  230. if (*cpu != (u32)page) {
  231. pr_err("Partial view for %lu [%u] (offset=%llu, size=%u [%llu, row size %u], fence=%d, tiling=%d, stride=%d) misalignment, expected write to page (%llu + %u [0x%llx]) of 0x%x, found 0x%x\n",
  232. page, n,
  233. view.partial.offset,
  234. view.partial.size,
  235. vma->size >> PAGE_SHIFT,
  236. tile_row_pages(obj),
  237. vma->fence ? vma->fence->id : -1, tile->tiling, tile->stride,
  238. offset >> PAGE_SHIFT,
  239. (unsigned int)offset_in_page(offset),
  240. offset,
  241. (u32)page, *cpu);
  242. err = -EINVAL;
  243. }
  244. *cpu = 0;
  245. drm_clflush_virt_range(cpu, sizeof(*cpu));
  246. kunmap(p);
  247. if (err)
  248. return err;
  249. }
  250. return 0;
  251. }
  252. static int igt_partial_tiling(void *arg)
  253. {
  254. const unsigned int nreal = 1 << 12; /* largest tile row x2 */
  255. struct drm_i915_private *i915 = arg;
  256. struct drm_i915_gem_object *obj;
  257. int tiling;
  258. int err;
  259. /* We want to check the page mapping and fencing of a large object
  260. * mmapped through the GTT. The object we create is larger than can
  261. * possibly be mmaped as a whole, and so we must use partial GGTT vma.
  262. * We then check that a write through each partial GGTT vma ends up
  263. * in the right set of pages within the object, and with the expected
  264. * tiling, which we verify by manual swizzling.
  265. */
  266. obj = huge_gem_object(i915,
  267. nreal << PAGE_SHIFT,
  268. (1 + next_prime_number(i915->ggtt.base.total >> PAGE_SHIFT)) << PAGE_SHIFT);
  269. if (IS_ERR(obj))
  270. return PTR_ERR(obj);
  271. err = i915_gem_object_pin_pages(obj);
  272. if (err) {
  273. pr_err("Failed to allocate %u pages (%lu total), err=%d\n",
  274. nreal, obj->base.size / PAGE_SIZE, err);
  275. goto out;
  276. }
  277. mutex_lock(&i915->drm.struct_mutex);
  278. if (1) {
  279. IGT_TIMEOUT(end);
  280. struct tile tile;
  281. tile.height = 1;
  282. tile.width = 1;
  283. tile.size = 0;
  284. tile.stride = 0;
  285. tile.swizzle = I915_BIT_6_SWIZZLE_NONE;
  286. tile.tiling = I915_TILING_NONE;
  287. err = check_partial_mapping(obj, &tile, end);
  288. if (err && err != -EINTR)
  289. goto out_unlock;
  290. }
  291. for (tiling = I915_TILING_X; tiling <= I915_TILING_Y; tiling++) {
  292. IGT_TIMEOUT(end);
  293. unsigned int max_pitch;
  294. unsigned int pitch;
  295. struct tile tile;
  296. tile.tiling = tiling;
  297. switch (tiling) {
  298. case I915_TILING_X:
  299. tile.swizzle = i915->mm.bit_6_swizzle_x;
  300. break;
  301. case I915_TILING_Y:
  302. tile.swizzle = i915->mm.bit_6_swizzle_y;
  303. break;
  304. }
  305. if (tile.swizzle == I915_BIT_6_SWIZZLE_UNKNOWN ||
  306. tile.swizzle == I915_BIT_6_SWIZZLE_9_10_17)
  307. continue;
  308. if (INTEL_GEN(i915) <= 2) {
  309. tile.height = 16;
  310. tile.width = 128;
  311. tile.size = 11;
  312. } else if (tile.tiling == I915_TILING_Y &&
  313. HAS_128_BYTE_Y_TILING(i915)) {
  314. tile.height = 32;
  315. tile.width = 128;
  316. tile.size = 12;
  317. } else {
  318. tile.height = 8;
  319. tile.width = 512;
  320. tile.size = 12;
  321. }
  322. if (INTEL_GEN(i915) < 4)
  323. max_pitch = 8192 / tile.width;
  324. else if (INTEL_GEN(i915) < 7)
  325. max_pitch = 128 * I965_FENCE_MAX_PITCH_VAL / tile.width;
  326. else
  327. max_pitch = 128 * GEN7_FENCE_MAX_PITCH_VAL / tile.width;
  328. for (pitch = max_pitch; pitch; pitch >>= 1) {
  329. tile.stride = tile.width * pitch;
  330. err = check_partial_mapping(obj, &tile, end);
  331. if (err == -EINTR)
  332. goto next_tiling;
  333. if (err)
  334. goto out_unlock;
  335. if (pitch > 2 && INTEL_GEN(i915) >= 4) {
  336. tile.stride = tile.width * (pitch - 1);
  337. err = check_partial_mapping(obj, &tile, end);
  338. if (err == -EINTR)
  339. goto next_tiling;
  340. if (err)
  341. goto out_unlock;
  342. }
  343. if (pitch < max_pitch && INTEL_GEN(i915) >= 4) {
  344. tile.stride = tile.width * (pitch + 1);
  345. err = check_partial_mapping(obj, &tile, end);
  346. if (err == -EINTR)
  347. goto next_tiling;
  348. if (err)
  349. goto out_unlock;
  350. }
  351. }
  352. if (INTEL_GEN(i915) >= 4) {
  353. for_each_prime_number(pitch, max_pitch) {
  354. tile.stride = tile.width * pitch;
  355. err = check_partial_mapping(obj, &tile, end);
  356. if (err == -EINTR)
  357. goto next_tiling;
  358. if (err)
  359. goto out_unlock;
  360. }
  361. }
  362. next_tiling: ;
  363. }
  364. out_unlock:
  365. mutex_unlock(&i915->drm.struct_mutex);
  366. i915_gem_object_unpin_pages(obj);
  367. out:
  368. i915_gem_object_put(obj);
  369. return err;
  370. }
  371. static int make_obj_busy(struct drm_i915_gem_object *obj)
  372. {
  373. struct drm_i915_private *i915 = to_i915(obj->base.dev);
  374. struct drm_i915_gem_request *rq;
  375. struct i915_vma *vma;
  376. int err;
  377. vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
  378. if (IS_ERR(vma))
  379. return PTR_ERR(vma);
  380. err = i915_vma_pin(vma, 0, 0, PIN_USER);
  381. if (err)
  382. return err;
  383. rq = i915_gem_request_alloc(i915->engine[RCS], i915->kernel_context);
  384. if (IS_ERR(rq)) {
  385. i915_vma_unpin(vma);
  386. return PTR_ERR(rq);
  387. }
  388. i915_vma_move_to_active(vma, rq, 0);
  389. i915_add_request(rq);
  390. i915_gem_object_set_active_reference(obj);
  391. i915_vma_unpin(vma);
  392. return 0;
  393. }
  394. static bool assert_mmap_offset(struct drm_i915_private *i915,
  395. unsigned long size,
  396. int expected)
  397. {
  398. struct drm_i915_gem_object *obj;
  399. int err;
  400. obj = i915_gem_object_create_internal(i915, size);
  401. if (IS_ERR(obj))
  402. return PTR_ERR(obj);
  403. err = i915_gem_object_create_mmap_offset(obj);
  404. i915_gem_object_put(obj);
  405. return err == expected;
  406. }
  407. static int igt_mmap_offset_exhaustion(void *arg)
  408. {
  409. struct drm_i915_private *i915 = arg;
  410. struct drm_mm *mm = &i915->drm.vma_offset_manager->vm_addr_space_mm;
  411. struct drm_i915_gem_object *obj;
  412. struct drm_mm_node resv, *hole;
  413. u64 hole_start, hole_end;
  414. int loop, err;
  415. /* Trim the device mmap space to only a page */
  416. memset(&resv, 0, sizeof(resv));
  417. drm_mm_for_each_hole(hole, mm, hole_start, hole_end) {
  418. resv.start = hole_start;
  419. resv.size = hole_end - hole_start - 1; /* PAGE_SIZE units */
  420. err = drm_mm_reserve_node(mm, &resv);
  421. if (err) {
  422. pr_err("Failed to trim VMA manager, err=%d\n", err);
  423. return err;
  424. }
  425. break;
  426. }
  427. /* Just fits! */
  428. if (!assert_mmap_offset(i915, PAGE_SIZE, 0)) {
  429. pr_err("Unable to insert object into single page hole\n");
  430. err = -EINVAL;
  431. goto out;
  432. }
  433. /* Too large */
  434. if (!assert_mmap_offset(i915, 2*PAGE_SIZE, -ENOSPC)) {
  435. pr_err("Unexpectedly succeeded in inserting too large object into single page hole\n");
  436. err = -EINVAL;
  437. goto out;
  438. }
  439. /* Fill the hole, further allocation attempts should then fail */
  440. obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
  441. if (IS_ERR(obj)) {
  442. err = PTR_ERR(obj);
  443. goto out;
  444. }
  445. err = i915_gem_object_create_mmap_offset(obj);
  446. if (err) {
  447. pr_err("Unable to insert object into reclaimed hole\n");
  448. goto err_obj;
  449. }
  450. if (!assert_mmap_offset(i915, PAGE_SIZE, -ENOSPC)) {
  451. pr_err("Unexpectedly succeeded in inserting object into no holes!\n");
  452. err = -EINVAL;
  453. goto err_obj;
  454. }
  455. i915_gem_object_put(obj);
  456. /* Now fill with busy dead objects that we expect to reap */
  457. for (loop = 0; loop < 3; loop++) {
  458. obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
  459. if (IS_ERR(obj)) {
  460. err = PTR_ERR(obj);
  461. goto out;
  462. }
  463. mutex_lock(&i915->drm.struct_mutex);
  464. err = make_obj_busy(obj);
  465. mutex_unlock(&i915->drm.struct_mutex);
  466. if (err) {
  467. pr_err("[loop %d] Failed to busy the object\n", loop);
  468. goto err_obj;
  469. }
  470. GEM_BUG_ON(!i915_gem_object_is_active(obj));
  471. err = i915_gem_object_create_mmap_offset(obj);
  472. if (err) {
  473. pr_err("[loop %d] i915_gem_object_create_mmap_offset failed with err=%d\n",
  474. loop, err);
  475. goto out;
  476. }
  477. }
  478. out:
  479. drm_mm_remove_node(&resv);
  480. return err;
  481. err_obj:
  482. i915_gem_object_put(obj);
  483. goto out;
  484. }
  485. int i915_gem_object_mock_selftests(void)
  486. {
  487. static const struct i915_subtest tests[] = {
  488. SUBTEST(igt_gem_object),
  489. SUBTEST(igt_phys_object),
  490. };
  491. struct drm_i915_private *i915;
  492. int err;
  493. i915 = mock_gem_device();
  494. if (!i915)
  495. return -ENOMEM;
  496. err = i915_subtests(tests, i915);
  497. drm_dev_unref(&i915->drm);
  498. return err;
  499. }
  500. int i915_gem_object_live_selftests(struct drm_i915_private *i915)
  501. {
  502. static const struct i915_subtest tests[] = {
  503. SUBTEST(igt_gem_huge),
  504. SUBTEST(igt_partial_tiling),
  505. SUBTEST(igt_mmap_offset_exhaustion),
  506. };
  507. return i915_subtests(tests, i915);
  508. }