tpm_crb.c 16 KB

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  1. /*
  2. * Copyright (C) 2014 Intel Corporation
  3. *
  4. * Authors:
  5. * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
  6. *
  7. * Maintained by: <tpmdd-devel@lists.sourceforge.net>
  8. *
  9. * This device driver implements the TPM interface as defined in
  10. * the TCG CRB 2.0 TPM specification.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License
  14. * as published by the Free Software Foundation; version 2
  15. * of the License.
  16. */
  17. #include <linux/acpi.h>
  18. #include <linux/highmem.h>
  19. #include <linux/rculist.h>
  20. #include <linux/module.h>
  21. #include <linux/pm_runtime.h>
  22. #ifdef CONFIG_ARM64
  23. #include <linux/arm-smccc.h>
  24. #endif
  25. #include "tpm.h"
  26. #define ACPI_SIG_TPM2 "TPM2"
  27. static const guid_t crb_acpi_start_guid =
  28. GUID_INIT(0x6BBF6CAB, 0x5463, 0x4714,
  29. 0xB7, 0xCD, 0xF0, 0x20, 0x3C, 0x03, 0x68, 0xD4);
  30. enum crb_defaults {
  31. CRB_ACPI_START_REVISION_ID = 1,
  32. CRB_ACPI_START_INDEX = 1,
  33. };
  34. enum crb_loc_ctrl {
  35. CRB_LOC_CTRL_REQUEST_ACCESS = BIT(0),
  36. CRB_LOC_CTRL_RELINQUISH = BIT(1),
  37. };
  38. enum crb_loc_state {
  39. CRB_LOC_STATE_LOC_ASSIGNED = BIT(1),
  40. CRB_LOC_STATE_TPM_REG_VALID_STS = BIT(7),
  41. };
  42. enum crb_ctrl_req {
  43. CRB_CTRL_REQ_CMD_READY = BIT(0),
  44. CRB_CTRL_REQ_GO_IDLE = BIT(1),
  45. };
  46. enum crb_ctrl_sts {
  47. CRB_CTRL_STS_ERROR = BIT(0),
  48. CRB_CTRL_STS_TPM_IDLE = BIT(1),
  49. };
  50. enum crb_start {
  51. CRB_START_INVOKE = BIT(0),
  52. };
  53. enum crb_cancel {
  54. CRB_CANCEL_INVOKE = BIT(0),
  55. };
  56. struct crb_regs_head {
  57. u32 loc_state;
  58. u32 reserved1;
  59. u32 loc_ctrl;
  60. u32 loc_sts;
  61. u8 reserved2[32];
  62. u64 intf_id;
  63. u64 ctrl_ext;
  64. } __packed;
  65. struct crb_regs_tail {
  66. u32 ctrl_req;
  67. u32 ctrl_sts;
  68. u32 ctrl_cancel;
  69. u32 ctrl_start;
  70. u32 ctrl_int_enable;
  71. u32 ctrl_int_sts;
  72. u32 ctrl_cmd_size;
  73. u32 ctrl_cmd_pa_low;
  74. u32 ctrl_cmd_pa_high;
  75. u32 ctrl_rsp_size;
  76. u64 ctrl_rsp_pa;
  77. } __packed;
  78. enum crb_status {
  79. CRB_DRV_STS_COMPLETE = BIT(0),
  80. };
  81. enum crb_flags {
  82. CRB_FL_ACPI_START = BIT(0),
  83. CRB_FL_CRB_START = BIT(1),
  84. CRB_FL_CRB_SMC_START = BIT(2),
  85. };
  86. struct crb_priv {
  87. unsigned int flags;
  88. void __iomem *iobase;
  89. struct crb_regs_head __iomem *regs_h;
  90. struct crb_regs_tail __iomem *regs_t;
  91. u8 __iomem *cmd;
  92. u8 __iomem *rsp;
  93. u32 cmd_size;
  94. u32 smc_func_id;
  95. };
  96. struct tpm2_crb_smc {
  97. u32 interrupt;
  98. u8 interrupt_flags;
  99. u8 op_flags;
  100. u16 reserved2;
  101. u32 smc_func_id;
  102. };
  103. /**
  104. * crb_go_idle - request tpm crb device to go the idle state
  105. *
  106. * @dev: crb device
  107. * @priv: crb private data
  108. *
  109. * Write CRB_CTRL_REQ_GO_IDLE to TPM_CRB_CTRL_REQ
  110. * The device should respond within TIMEOUT_C by clearing the bit.
  111. * Anyhow, we do not wait here as a consequent CMD_READY request
  112. * will be handled correctly even if idle was not completed.
  113. *
  114. * The function does nothing for devices with ACPI-start method.
  115. *
  116. * Return: 0 always
  117. */
  118. static int __maybe_unused crb_go_idle(struct device *dev, struct crb_priv *priv)
  119. {
  120. if ((priv->flags & CRB_FL_ACPI_START) ||
  121. (priv->flags & CRB_FL_CRB_SMC_START))
  122. return 0;
  123. iowrite32(CRB_CTRL_REQ_GO_IDLE, &priv->regs_t->ctrl_req);
  124. /* we don't really care when this settles */
  125. return 0;
  126. }
  127. static bool crb_wait_for_reg_32(u32 __iomem *reg, u32 mask, u32 value,
  128. unsigned long timeout)
  129. {
  130. ktime_t start;
  131. ktime_t stop;
  132. start = ktime_get();
  133. stop = ktime_add(start, ms_to_ktime(timeout));
  134. do {
  135. if ((ioread32(reg) & mask) == value)
  136. return true;
  137. usleep_range(50, 100);
  138. } while (ktime_before(ktime_get(), stop));
  139. return false;
  140. }
  141. /**
  142. * crb_cmd_ready - request tpm crb device to enter ready state
  143. *
  144. * @dev: crb device
  145. * @priv: crb private data
  146. *
  147. * Write CRB_CTRL_REQ_CMD_READY to TPM_CRB_CTRL_REQ
  148. * and poll till the device acknowledge it by clearing the bit.
  149. * The device should respond within TIMEOUT_C.
  150. *
  151. * The function does nothing for devices with ACPI-start method
  152. *
  153. * Return: 0 on success -ETIME on timeout;
  154. */
  155. static int __maybe_unused crb_cmd_ready(struct device *dev,
  156. struct crb_priv *priv)
  157. {
  158. if ((priv->flags & CRB_FL_ACPI_START) ||
  159. (priv->flags & CRB_FL_CRB_SMC_START))
  160. return 0;
  161. iowrite32(CRB_CTRL_REQ_CMD_READY, &priv->regs_t->ctrl_req);
  162. if (!crb_wait_for_reg_32(&priv->regs_t->ctrl_req,
  163. CRB_CTRL_REQ_CMD_READY /* mask */,
  164. 0, /* value */
  165. TPM2_TIMEOUT_C)) {
  166. dev_warn(dev, "cmdReady timed out\n");
  167. return -ETIME;
  168. }
  169. return 0;
  170. }
  171. static int crb_request_locality(struct tpm_chip *chip, int loc)
  172. {
  173. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  174. u32 value = CRB_LOC_STATE_LOC_ASSIGNED |
  175. CRB_LOC_STATE_TPM_REG_VALID_STS;
  176. if (!priv->regs_h)
  177. return 0;
  178. iowrite32(CRB_LOC_CTRL_REQUEST_ACCESS, &priv->regs_h->loc_ctrl);
  179. if (!crb_wait_for_reg_32(&priv->regs_h->loc_state, value, value,
  180. TPM2_TIMEOUT_C)) {
  181. dev_warn(&chip->dev, "TPM_LOC_STATE_x.requestAccess timed out\n");
  182. return -ETIME;
  183. }
  184. return 0;
  185. }
  186. static void crb_relinquish_locality(struct tpm_chip *chip, int loc)
  187. {
  188. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  189. if (!priv->regs_h)
  190. return;
  191. iowrite32(CRB_LOC_CTRL_RELINQUISH, &priv->regs_h->loc_ctrl);
  192. }
  193. static u8 crb_status(struct tpm_chip *chip)
  194. {
  195. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  196. u8 sts = 0;
  197. if ((ioread32(&priv->regs_t->ctrl_start) & CRB_START_INVOKE) !=
  198. CRB_START_INVOKE)
  199. sts |= CRB_DRV_STS_COMPLETE;
  200. return sts;
  201. }
  202. static int crb_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  203. {
  204. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  205. unsigned int expected;
  206. /* sanity check */
  207. if (count < 6)
  208. return -EIO;
  209. if (ioread32(&priv->regs_t->ctrl_sts) & CRB_CTRL_STS_ERROR)
  210. return -EIO;
  211. memcpy_fromio(buf, priv->rsp, 6);
  212. expected = be32_to_cpup((__be32 *) &buf[2]);
  213. if (expected > count || expected < 6)
  214. return -EIO;
  215. memcpy_fromio(&buf[6], &priv->rsp[6], expected - 6);
  216. return expected;
  217. }
  218. static int crb_do_acpi_start(struct tpm_chip *chip)
  219. {
  220. union acpi_object *obj;
  221. int rc;
  222. obj = acpi_evaluate_dsm(chip->acpi_dev_handle,
  223. &crb_acpi_start_guid,
  224. CRB_ACPI_START_REVISION_ID,
  225. CRB_ACPI_START_INDEX,
  226. NULL);
  227. if (!obj)
  228. return -ENXIO;
  229. rc = obj->integer.value == 0 ? 0 : -ENXIO;
  230. ACPI_FREE(obj);
  231. return rc;
  232. }
  233. #ifdef CONFIG_ARM64
  234. /*
  235. * This is a TPM Command Response Buffer start method that invokes a
  236. * Secure Monitor Call to requrest the firmware to execute or cancel
  237. * a TPM 2.0 command.
  238. */
  239. static int tpm_crb_smc_start(struct device *dev, unsigned long func_id)
  240. {
  241. struct arm_smccc_res res;
  242. arm_smccc_smc(func_id, 0, 0, 0, 0, 0, 0, 0, &res);
  243. if (res.a0 != 0) {
  244. dev_err(dev,
  245. FW_BUG "tpm_crb_smc_start() returns res.a0 = 0x%lx\n",
  246. res.a0);
  247. return -EIO;
  248. }
  249. return 0;
  250. }
  251. #else
  252. static int tpm_crb_smc_start(struct device *dev, unsigned long func_id)
  253. {
  254. dev_err(dev, FW_BUG "tpm_crb: incorrect start method\n");
  255. return -EINVAL;
  256. }
  257. #endif
  258. static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len)
  259. {
  260. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  261. int rc = 0;
  262. /* Zero the cancel register so that the next command will not get
  263. * canceled.
  264. */
  265. iowrite32(0, &priv->regs_t->ctrl_cancel);
  266. if (len > priv->cmd_size) {
  267. dev_err(&chip->dev, "invalid command count value %zd %d\n",
  268. len, priv->cmd_size);
  269. return -E2BIG;
  270. }
  271. memcpy_toio(priv->cmd, buf, len);
  272. /* Make sure that cmd is populated before issuing start. */
  273. wmb();
  274. if (priv->flags & CRB_FL_CRB_START)
  275. iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start);
  276. if (priv->flags & CRB_FL_ACPI_START)
  277. rc = crb_do_acpi_start(chip);
  278. if (priv->flags & CRB_FL_CRB_SMC_START) {
  279. iowrite32(CRB_START_INVOKE, &priv->regs_t->ctrl_start);
  280. rc = tpm_crb_smc_start(&chip->dev, priv->smc_func_id);
  281. }
  282. return rc;
  283. }
  284. static void crb_cancel(struct tpm_chip *chip)
  285. {
  286. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  287. iowrite32(CRB_CANCEL_INVOKE, &priv->regs_t->ctrl_cancel);
  288. if ((priv->flags & CRB_FL_ACPI_START) && crb_do_acpi_start(chip))
  289. dev_err(&chip->dev, "ACPI Start failed\n");
  290. }
  291. static bool crb_req_canceled(struct tpm_chip *chip, u8 status)
  292. {
  293. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  294. u32 cancel = ioread32(&priv->regs_t->ctrl_cancel);
  295. return (cancel & CRB_CANCEL_INVOKE) == CRB_CANCEL_INVOKE;
  296. }
  297. static const struct tpm_class_ops tpm_crb = {
  298. .flags = TPM_OPS_AUTO_STARTUP,
  299. .status = crb_status,
  300. .recv = crb_recv,
  301. .send = crb_send,
  302. .cancel = crb_cancel,
  303. .req_canceled = crb_req_canceled,
  304. .request_locality = crb_request_locality,
  305. .relinquish_locality = crb_relinquish_locality,
  306. .req_complete_mask = CRB_DRV_STS_COMPLETE,
  307. .req_complete_val = CRB_DRV_STS_COMPLETE,
  308. };
  309. static int crb_check_resource(struct acpi_resource *ares, void *data)
  310. {
  311. struct resource *io_res = data;
  312. struct resource_win win;
  313. struct resource *res = &(win.res);
  314. if (acpi_dev_resource_memory(ares, res) ||
  315. acpi_dev_resource_address_space(ares, &win)) {
  316. *io_res = *res;
  317. io_res->name = NULL;
  318. }
  319. return 1;
  320. }
  321. static void __iomem *crb_map_res(struct device *dev, struct crb_priv *priv,
  322. struct resource *io_res, u64 start, u32 size)
  323. {
  324. struct resource new_res = {
  325. .start = start,
  326. .end = start + size - 1,
  327. .flags = IORESOURCE_MEM,
  328. };
  329. /* Detect a 64 bit address on a 32 bit system */
  330. if (start != new_res.start)
  331. return (void __iomem *) ERR_PTR(-EINVAL);
  332. if (!resource_contains(io_res, &new_res))
  333. return devm_ioremap_resource(dev, &new_res);
  334. return priv->iobase + (new_res.start - io_res->start);
  335. }
  336. /*
  337. * Work around broken BIOSs that return inconsistent values from the ACPI
  338. * region vs the registers. Trust the ACPI region. Such broken systems
  339. * probably cannot send large TPM commands since the buffer will be truncated.
  340. */
  341. static u64 crb_fixup_cmd_size(struct device *dev, struct resource *io_res,
  342. u64 start, u64 size)
  343. {
  344. if (io_res->start > start || io_res->end < start)
  345. return size;
  346. if (start + size - 1 <= io_res->end)
  347. return size;
  348. dev_err(dev,
  349. FW_BUG "ACPI region does not cover the entire command/response buffer. %pr vs %llx %llx\n",
  350. io_res, start, size);
  351. return io_res->end - start + 1;
  352. }
  353. static int crb_map_io(struct acpi_device *device, struct crb_priv *priv,
  354. struct acpi_table_tpm2 *buf)
  355. {
  356. struct list_head resources;
  357. struct resource io_res;
  358. struct device *dev = &device->dev;
  359. u32 pa_high, pa_low;
  360. u64 cmd_pa;
  361. u32 cmd_size;
  362. u64 rsp_pa;
  363. u32 rsp_size;
  364. int ret;
  365. INIT_LIST_HEAD(&resources);
  366. ret = acpi_dev_get_resources(device, &resources, crb_check_resource,
  367. &io_res);
  368. if (ret < 0)
  369. return ret;
  370. acpi_dev_free_resource_list(&resources);
  371. if (resource_type(&io_res) != IORESOURCE_MEM) {
  372. dev_err(dev, FW_BUG "TPM2 ACPI table does not define a memory resource\n");
  373. return -EINVAL;
  374. }
  375. priv->iobase = devm_ioremap_resource(dev, &io_res);
  376. if (IS_ERR(priv->iobase))
  377. return PTR_ERR(priv->iobase);
  378. /* The ACPI IO region starts at the head area and continues to include
  379. * the control area, as one nice sane region except for some older
  380. * stuff that puts the control area outside the ACPI IO region.
  381. */
  382. if (!(priv->flags & CRB_FL_ACPI_START)) {
  383. if (buf->control_address == io_res.start +
  384. sizeof(*priv->regs_h))
  385. priv->regs_h = priv->iobase;
  386. else
  387. dev_warn(dev, FW_BUG "Bad ACPI memory layout");
  388. }
  389. priv->regs_t = crb_map_res(dev, priv, &io_res, buf->control_address,
  390. sizeof(struct crb_regs_tail));
  391. if (IS_ERR(priv->regs_t))
  392. return PTR_ERR(priv->regs_t);
  393. /*
  394. * PTT HW bug w/a: wake up the device to access
  395. * possibly not retained registers.
  396. */
  397. ret = crb_cmd_ready(dev, priv);
  398. if (ret)
  399. return ret;
  400. pa_high = ioread32(&priv->regs_t->ctrl_cmd_pa_high);
  401. pa_low = ioread32(&priv->regs_t->ctrl_cmd_pa_low);
  402. cmd_pa = ((u64)pa_high << 32) | pa_low;
  403. cmd_size = crb_fixup_cmd_size(dev, &io_res, cmd_pa,
  404. ioread32(&priv->regs_t->ctrl_cmd_size));
  405. dev_dbg(dev, "cmd_hi = %X cmd_low = %X cmd_size %X\n",
  406. pa_high, pa_low, cmd_size);
  407. priv->cmd = crb_map_res(dev, priv, &io_res, cmd_pa, cmd_size);
  408. if (IS_ERR(priv->cmd)) {
  409. ret = PTR_ERR(priv->cmd);
  410. goto out;
  411. }
  412. memcpy_fromio(&rsp_pa, &priv->regs_t->ctrl_rsp_pa, 8);
  413. rsp_pa = le64_to_cpu(rsp_pa);
  414. rsp_size = crb_fixup_cmd_size(dev, &io_res, rsp_pa,
  415. ioread32(&priv->regs_t->ctrl_rsp_size));
  416. if (cmd_pa != rsp_pa) {
  417. priv->rsp = crb_map_res(dev, priv, &io_res, rsp_pa, rsp_size);
  418. ret = PTR_ERR_OR_ZERO(priv->rsp);
  419. goto out;
  420. }
  421. /* According to the PTP specification, overlapping command and response
  422. * buffer sizes must be identical.
  423. */
  424. if (cmd_size != rsp_size) {
  425. dev_err(dev, FW_BUG "overlapping command and response buffer sizes are not identical");
  426. ret = -EINVAL;
  427. goto out;
  428. }
  429. priv->cmd_size = cmd_size;
  430. priv->rsp = priv->cmd;
  431. out:
  432. crb_go_idle(dev, priv);
  433. return ret;
  434. }
  435. static int crb_acpi_add(struct acpi_device *device)
  436. {
  437. struct acpi_table_tpm2 *buf;
  438. struct crb_priv *priv;
  439. struct tpm_chip *chip;
  440. struct device *dev = &device->dev;
  441. struct tpm2_crb_smc *crb_smc;
  442. acpi_status status;
  443. u32 sm;
  444. int rc;
  445. status = acpi_get_table(ACPI_SIG_TPM2, 1,
  446. (struct acpi_table_header **) &buf);
  447. if (ACPI_FAILURE(status) || buf->header.length < sizeof(*buf)) {
  448. dev_err(dev, FW_BUG "failed to get TPM2 ACPI table\n");
  449. return -EINVAL;
  450. }
  451. /* Should the FIFO driver handle this? */
  452. sm = buf->start_method;
  453. if (sm == ACPI_TPM2_MEMORY_MAPPED)
  454. return -ENODEV;
  455. priv = devm_kzalloc(dev, sizeof(struct crb_priv), GFP_KERNEL);
  456. if (!priv)
  457. return -ENOMEM;
  458. /* The reason for the extra quirk is that the PTT in 4th Gen Core CPUs
  459. * report only ACPI start but in practice seems to require both
  460. * ACPI start and CRB start.
  461. */
  462. if (sm == ACPI_TPM2_COMMAND_BUFFER || sm == ACPI_TPM2_MEMORY_MAPPED ||
  463. !strcmp(acpi_device_hid(device), "MSFT0101"))
  464. priv->flags |= CRB_FL_CRB_START;
  465. if (sm == ACPI_TPM2_START_METHOD ||
  466. sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD)
  467. priv->flags |= CRB_FL_ACPI_START;
  468. if (sm == ACPI_TPM2_COMMAND_BUFFER_WITH_SMC) {
  469. if (buf->header.length < (sizeof(*buf) + sizeof(*crb_smc))) {
  470. dev_err(dev,
  471. FW_BUG "TPM2 ACPI table has wrong size %u for start method type %d\n",
  472. buf->header.length,
  473. ACPI_TPM2_COMMAND_BUFFER_WITH_SMC);
  474. return -EINVAL;
  475. }
  476. crb_smc = ACPI_ADD_PTR(struct tpm2_crb_smc, buf, sizeof(*buf));
  477. priv->smc_func_id = crb_smc->smc_func_id;
  478. priv->flags |= CRB_FL_CRB_SMC_START;
  479. }
  480. rc = crb_map_io(device, priv, buf);
  481. if (rc)
  482. return rc;
  483. chip = tpmm_chip_alloc(dev, &tpm_crb);
  484. if (IS_ERR(chip))
  485. return PTR_ERR(chip);
  486. dev_set_drvdata(&chip->dev, priv);
  487. chip->acpi_dev_handle = device->handle;
  488. chip->flags = TPM_CHIP_FLAG_TPM2;
  489. rc = crb_cmd_ready(dev, priv);
  490. if (rc)
  491. return rc;
  492. pm_runtime_get_noresume(dev);
  493. pm_runtime_set_active(dev);
  494. pm_runtime_enable(dev);
  495. rc = tpm_chip_register(chip);
  496. if (rc) {
  497. crb_go_idle(dev, priv);
  498. pm_runtime_put_noidle(dev);
  499. pm_runtime_disable(dev);
  500. return rc;
  501. }
  502. pm_runtime_put(dev);
  503. return 0;
  504. }
  505. static int crb_acpi_remove(struct acpi_device *device)
  506. {
  507. struct device *dev = &device->dev;
  508. struct tpm_chip *chip = dev_get_drvdata(dev);
  509. tpm_chip_unregister(chip);
  510. pm_runtime_disable(dev);
  511. return 0;
  512. }
  513. static int __maybe_unused crb_pm_runtime_suspend(struct device *dev)
  514. {
  515. struct tpm_chip *chip = dev_get_drvdata(dev);
  516. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  517. return crb_go_idle(dev, priv);
  518. }
  519. static int __maybe_unused crb_pm_runtime_resume(struct device *dev)
  520. {
  521. struct tpm_chip *chip = dev_get_drvdata(dev);
  522. struct crb_priv *priv = dev_get_drvdata(&chip->dev);
  523. return crb_cmd_ready(dev, priv);
  524. }
  525. static int __maybe_unused crb_pm_suspend(struct device *dev)
  526. {
  527. int ret;
  528. ret = tpm_pm_suspend(dev);
  529. if (ret)
  530. return ret;
  531. return crb_pm_runtime_suspend(dev);
  532. }
  533. static int __maybe_unused crb_pm_resume(struct device *dev)
  534. {
  535. int ret;
  536. ret = crb_pm_runtime_resume(dev);
  537. if (ret)
  538. return ret;
  539. return tpm_pm_resume(dev);
  540. }
  541. static const struct dev_pm_ops crb_pm = {
  542. SET_SYSTEM_SLEEP_PM_OPS(crb_pm_suspend, crb_pm_resume)
  543. SET_RUNTIME_PM_OPS(crb_pm_runtime_suspend, crb_pm_runtime_resume, NULL)
  544. };
  545. static struct acpi_device_id crb_device_ids[] = {
  546. {"MSFT0101", 0},
  547. {"", 0},
  548. };
  549. MODULE_DEVICE_TABLE(acpi, crb_device_ids);
  550. static struct acpi_driver crb_acpi_driver = {
  551. .name = "tpm_crb",
  552. .ids = crb_device_ids,
  553. .ops = {
  554. .add = crb_acpi_add,
  555. .remove = crb_acpi_remove,
  556. },
  557. .drv = {
  558. .pm = &crb_pm,
  559. },
  560. };
  561. module_acpi_driver(crb_acpi_driver);
  562. MODULE_AUTHOR("Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>");
  563. MODULE_DESCRIPTION("TPM2 Driver");
  564. MODULE_VERSION("0.1");
  565. MODULE_LICENSE("GPL");