bitops.h 8.5 KB

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  1. /*
  2. * PowerPC atomic bit operations.
  3. *
  4. * Merged version by David Gibson <david@gibson.dropbear.id.au>.
  5. * Based on ppc64 versions by: Dave Engebretsen, Todd Inglett, Don
  6. * Reed, Pat McCarthy, Peter Bergner, Anton Blanchard. They
  7. * originally took it from the ppc32 code.
  8. *
  9. * Within a word, bits are numbered LSB first. Lot's of places make
  10. * this assumption by directly testing bits with (val & (1<<nr)).
  11. * This can cause confusion for large (> 1 word) bitmaps on a
  12. * big-endian system because, unlike little endian, the number of each
  13. * bit depends on the word size.
  14. *
  15. * The bitop functions are defined to work on unsigned longs, so for a
  16. * ppc64 system the bits end up numbered:
  17. * |63..............0|127............64|191...........128|255...........192|
  18. * and on ppc32:
  19. * |31.....0|63....32|95....64|127...96|159..128|191..160|223..192|255..224|
  20. *
  21. * There are a few little-endian macros used mostly for filesystem
  22. * bitmaps, these work on similar bit arrays layouts, but
  23. * byte-oriented:
  24. * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56|
  25. *
  26. * The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit
  27. * number field needs to be reversed compared to the big-endian bit
  28. * fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b).
  29. *
  30. * This program is free software; you can redistribute it and/or
  31. * modify it under the terms of the GNU General Public License
  32. * as published by the Free Software Foundation; either version
  33. * 2 of the License, or (at your option) any later version.
  34. */
  35. #ifndef _ASM_POWERPC_BITOPS_H
  36. #define _ASM_POWERPC_BITOPS_H
  37. #ifdef __KERNEL__
  38. #ifndef _LINUX_BITOPS_H
  39. #error only <linux/bitops.h> can be included directly
  40. #endif
  41. #include <linux/compiler.h>
  42. #include <asm/asm-compat.h>
  43. #include <asm/synch.h>
  44. /* PPC bit number conversion */
  45. #define PPC_BITLSHIFT(be) (BITS_PER_LONG - 1 - (be))
  46. #define PPC_BIT(bit) (1UL << PPC_BITLSHIFT(bit))
  47. #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
  48. #include <asm/barrier.h>
  49. /* Macro for generating the ***_bits() functions */
  50. #define DEFINE_BITOP(fn, op, prefix) \
  51. static __inline__ void fn(unsigned long mask, \
  52. volatile unsigned long *_p) \
  53. { \
  54. unsigned long old; \
  55. unsigned long *p = (unsigned long *)_p; \
  56. __asm__ __volatile__ ( \
  57. prefix \
  58. "1:" PPC_LLARX(%0,0,%3,0) "\n" \
  59. stringify_in_c(op) "%0,%0,%2\n" \
  60. PPC405_ERR77(0,%3) \
  61. PPC_STLCX "%0,0,%3\n" \
  62. "bne- 1b\n" \
  63. : "=&r" (old), "+m" (*p) \
  64. : "r" (mask), "r" (p) \
  65. : "cc", "memory"); \
  66. }
  67. DEFINE_BITOP(set_bits, or, "")
  68. DEFINE_BITOP(clear_bits, andc, "")
  69. DEFINE_BITOP(clear_bits_unlock, andc, PPC_RELEASE_BARRIER)
  70. DEFINE_BITOP(change_bits, xor, "")
  71. static __inline__ void set_bit(int nr, volatile unsigned long *addr)
  72. {
  73. set_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
  74. }
  75. static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
  76. {
  77. clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
  78. }
  79. static __inline__ void clear_bit_unlock(int nr, volatile unsigned long *addr)
  80. {
  81. clear_bits_unlock(BIT_MASK(nr), addr + BIT_WORD(nr));
  82. }
  83. static __inline__ void change_bit(int nr, volatile unsigned long *addr)
  84. {
  85. change_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
  86. }
  87. /* Like DEFINE_BITOP(), with changes to the arguments to 'op' and the output
  88. * operands. */
  89. #define DEFINE_TESTOP(fn, op, prefix, postfix, eh) \
  90. static __inline__ unsigned long fn( \
  91. unsigned long mask, \
  92. volatile unsigned long *_p) \
  93. { \
  94. unsigned long old, t; \
  95. unsigned long *p = (unsigned long *)_p; \
  96. __asm__ __volatile__ ( \
  97. prefix \
  98. "1:" PPC_LLARX(%0,0,%3,eh) "\n" \
  99. stringify_in_c(op) "%1,%0,%2\n" \
  100. PPC405_ERR77(0,%3) \
  101. PPC_STLCX "%1,0,%3\n" \
  102. "bne- 1b\n" \
  103. postfix \
  104. : "=&r" (old), "=&r" (t) \
  105. : "r" (mask), "r" (p) \
  106. : "cc", "memory"); \
  107. return (old & mask); \
  108. }
  109. DEFINE_TESTOP(test_and_set_bits, or, PPC_ATOMIC_ENTRY_BARRIER,
  110. PPC_ATOMIC_EXIT_BARRIER, 0)
  111. DEFINE_TESTOP(test_and_set_bits_lock, or, "",
  112. PPC_ACQUIRE_BARRIER, 1)
  113. DEFINE_TESTOP(test_and_clear_bits, andc, PPC_ATOMIC_ENTRY_BARRIER,
  114. PPC_ATOMIC_EXIT_BARRIER, 0)
  115. DEFINE_TESTOP(test_and_change_bits, xor, PPC_ATOMIC_ENTRY_BARRIER,
  116. PPC_ATOMIC_EXIT_BARRIER, 0)
  117. static __inline__ int test_and_set_bit(unsigned long nr,
  118. volatile unsigned long *addr)
  119. {
  120. return test_and_set_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
  121. }
  122. static __inline__ int test_and_set_bit_lock(unsigned long nr,
  123. volatile unsigned long *addr)
  124. {
  125. return test_and_set_bits_lock(BIT_MASK(nr),
  126. addr + BIT_WORD(nr)) != 0;
  127. }
  128. static __inline__ int test_and_clear_bit(unsigned long nr,
  129. volatile unsigned long *addr)
  130. {
  131. return test_and_clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
  132. }
  133. static __inline__ int test_and_change_bit(unsigned long nr,
  134. volatile unsigned long *addr)
  135. {
  136. return test_and_change_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
  137. }
  138. #ifdef CONFIG_PPC64
  139. static __inline__ unsigned long clear_bit_unlock_return_word(int nr,
  140. volatile unsigned long *addr)
  141. {
  142. unsigned long old, t;
  143. unsigned long *p = (unsigned long *)addr + BIT_WORD(nr);
  144. unsigned long mask = BIT_MASK(nr);
  145. __asm__ __volatile__ (
  146. PPC_RELEASE_BARRIER
  147. "1:" PPC_LLARX(%0,0,%3,0) "\n"
  148. "andc %1,%0,%2\n"
  149. PPC405_ERR77(0,%3)
  150. PPC_STLCX "%1,0,%3\n"
  151. "bne- 1b\n"
  152. : "=&r" (old), "=&r" (t)
  153. : "r" (mask), "r" (p)
  154. : "cc", "memory");
  155. return old;
  156. }
  157. /* This is a special function for mm/filemap.c */
  158. #define clear_bit_unlock_is_negative_byte(nr, addr) \
  159. (clear_bit_unlock_return_word(nr, addr) & BIT_MASK(PG_waiters))
  160. #endif /* CONFIG_PPC64 */
  161. #include <asm-generic/bitops/non-atomic.h>
  162. static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr)
  163. {
  164. __asm__ __volatile__(PPC_RELEASE_BARRIER "" ::: "memory");
  165. __clear_bit(nr, addr);
  166. }
  167. /*
  168. * Return the zero-based bit position (LE, not IBM bit numbering) of
  169. * the most significant 1-bit in a double word.
  170. */
  171. static __inline__ __attribute__((const))
  172. int __ilog2(unsigned long x)
  173. {
  174. int lz;
  175. asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (x));
  176. return BITS_PER_LONG - 1 - lz;
  177. }
  178. static inline __attribute__((const))
  179. int __ilog2_u32(u32 n)
  180. {
  181. int bit;
  182. asm ("cntlzw %0,%1" : "=r" (bit) : "r" (n));
  183. return 31 - bit;
  184. }
  185. #ifdef __powerpc64__
  186. static inline __attribute__((const))
  187. int __ilog2_u64(u64 n)
  188. {
  189. int bit;
  190. asm ("cntlzd %0,%1" : "=r" (bit) : "r" (n));
  191. return 63 - bit;
  192. }
  193. #endif
  194. /*
  195. * Determines the bit position of the least significant 0 bit in the
  196. * specified double word. The returned bit position will be
  197. * zero-based, starting from the right side (63/31 - 0).
  198. */
  199. static __inline__ unsigned long ffz(unsigned long x)
  200. {
  201. /* no zero exists anywhere in the 8 byte area. */
  202. if ((x = ~x) == 0)
  203. return BITS_PER_LONG;
  204. /*
  205. * Calculate the bit position of the least significant '1' bit in x
  206. * (since x has been changed this will actually be the least significant
  207. * '0' bit in * the original x). Note: (x & -x) gives us a mask that
  208. * is the least significant * (RIGHT-most) 1-bit of the value in x.
  209. */
  210. return __ilog2(x & -x);
  211. }
  212. static __inline__ unsigned long __ffs(unsigned long x)
  213. {
  214. return __ilog2(x & -x);
  215. }
  216. /*
  217. * ffs: find first bit set. This is defined the same way as
  218. * the libc and compiler builtin ffs routines, therefore
  219. * differs in spirit from the above ffz (man ffs).
  220. */
  221. static __inline__ int ffs(int x)
  222. {
  223. unsigned long i = (unsigned long)x;
  224. return __ilog2(i & -i) + 1;
  225. }
  226. /*
  227. * fls: find last (most-significant) bit set.
  228. * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
  229. */
  230. static __inline__ int fls(unsigned int x)
  231. {
  232. int lz;
  233. asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
  234. return 32 - lz;
  235. }
  236. static __inline__ unsigned long __fls(unsigned long x)
  237. {
  238. return __ilog2(x);
  239. }
  240. /*
  241. * 64-bit can do this using one cntlzd (count leading zeroes doubleword)
  242. * instruction; for 32-bit we use the generic version, which does two
  243. * 32-bit fls calls.
  244. */
  245. #ifdef __powerpc64__
  246. static __inline__ int fls64(__u64 x)
  247. {
  248. int lz;
  249. asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x));
  250. return 64 - lz;
  251. }
  252. #else
  253. #include <asm-generic/bitops/fls64.h>
  254. #endif /* __powerpc64__ */
  255. #ifdef CONFIG_PPC64
  256. unsigned int __arch_hweight8(unsigned int w);
  257. unsigned int __arch_hweight16(unsigned int w);
  258. unsigned int __arch_hweight32(unsigned int w);
  259. unsigned long __arch_hweight64(__u64 w);
  260. #include <asm-generic/bitops/const_hweight.h>
  261. #else
  262. #include <asm-generic/bitops/hweight.h>
  263. #endif
  264. #include <asm-generic/bitops/find.h>
  265. /* Little-endian versions */
  266. #include <asm-generic/bitops/le.h>
  267. /* Bitmap functions for the ext2 filesystem */
  268. #include <asm-generic/bitops/ext2-atomic-setbit.h>
  269. #include <asm-generic/bitops/sched.h>
  270. #endif /* __KERNEL__ */
  271. #endif /* _ASM_POWERPC_BITOPS_H */