board-ap4evb.c 33 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477
  1. /*
  2. * AP4EVB board support
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2008 Yoshihiro Shimoda
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/clk.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/irq.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/delay.h>
  27. #include <linux/mfd/tmio.h>
  28. #include <linux/mmc/host.h>
  29. #include <linux/mmc/sh_mobile_sdhi.h>
  30. #include <linux/mtd/mtd.h>
  31. #include <linux/mtd/partitions.h>
  32. #include <linux/mtd/physmap.h>
  33. #include <linux/mmc/sh_mmcif.h>
  34. #include <linux/i2c.h>
  35. #include <linux/i2c/tsc2007.h>
  36. #include <linux/io.h>
  37. #include <linux/smsc911x.h>
  38. #include <linux/sh_intc.h>
  39. #include <linux/sh_clk.h>
  40. #include <linux/gpio.h>
  41. #include <linux/input.h>
  42. #include <linux/leds.h>
  43. #include <linux/input/sh_keysc.h>
  44. #include <linux/usb/r8a66597.h>
  45. #include <linux/pm_clock.h>
  46. #include <linux/dma-mapping.h>
  47. #include <media/sh_mobile_ceu.h>
  48. #include <media/sh_mobile_csi2.h>
  49. #include <media/soc_camera.h>
  50. #include <sound/sh_fsi.h>
  51. #include <video/sh_mobile_hdmi.h>
  52. #include <video/sh_mobile_lcdc.h>
  53. #include <video/sh_mipi_dsi.h>
  54. #include <mach/common.h>
  55. #include <mach/irqs.h>
  56. #include <mach/sh7372.h>
  57. #include <asm/mach-types.h>
  58. #include <asm/mach/arch.h>
  59. #include <asm/mach/map.h>
  60. #include <asm/mach/time.h>
  61. #include <asm/setup.h>
  62. /*
  63. * Address Interface BusWidth note
  64. * ------------------------------------------------------------------
  65. * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
  66. * 0x0800_0000 user area -
  67. * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
  68. * 0x1400_0000 Ether (LAN9220) 16bit
  69. * 0x1600_0000 user area - cannot use with NAND
  70. * 0x1800_0000 user area -
  71. * 0x1A00_0000 -
  72. * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
  73. */
  74. /*
  75. * NOR Flash ROM
  76. *
  77. * SW1 | SW2 | SW7 | NOR Flash ROM
  78. * bit1 | bit1 bit2 | bit1 | Memory allocation
  79. * ------+------------+------+------------------
  80. * OFF | ON OFF | ON | Area 0
  81. * OFF | ON OFF | OFF | Area 4
  82. */
  83. /*
  84. * NAND Flash ROM
  85. *
  86. * SW1 | SW2 | SW7 | NAND Flash ROM
  87. * bit1 | bit1 bit2 | bit2 | Memory allocation
  88. * ------+------------+------+------------------
  89. * OFF | ON OFF | ON | FCE 0
  90. * OFF | ON OFF | OFF | FCE 1
  91. */
  92. /*
  93. * SMSC 9220
  94. *
  95. * SW1 SMSC 9220
  96. * -----------------------
  97. * ON access disable
  98. * OFF access enable
  99. */
  100. /*
  101. * LCD / IRQ / KEYSC / IrDA
  102. *
  103. * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
  104. * LCD = 2nd LCDC (WVGA)
  105. *
  106. * | SW43 |
  107. * SW3 | ON | OFF |
  108. * -------------+-----------------------+---------------+
  109. * ON | KEY / IrDA | LCD |
  110. * OFF | KEY / IrDA / IRQ | IRQ |
  111. *
  112. *
  113. * QHD / WVGA display
  114. *
  115. * You can choice display type on menuconfig.
  116. * Then, check above dip-switch.
  117. */
  118. /*
  119. * USB
  120. *
  121. * J7 : 1-2 MAX3355E VBUS
  122. * 2-3 DC 5.0V
  123. *
  124. * S39: bit2: off
  125. */
  126. /*
  127. * FSI/FSMI
  128. *
  129. * SW41 : ON : SH-Mobile AP4 Audio Mode
  130. * : OFF : Bluetooth Audio Mode
  131. */
  132. /*
  133. * MMC0/SDHI1 (CN7)
  134. *
  135. * J22 : select card voltage
  136. * 1-2 pin : 1.8v
  137. * 2-3 pin : 3.3v
  138. *
  139. * SW1 | SW33
  140. * | bit1 | bit2 | bit3 | bit4
  141. * ------------+------+------+------+-------
  142. * MMC0 OFF | OFF | ON | ON | X
  143. * SDHI1 OFF | ON | X | OFF | ON
  144. *
  145. * voltage lebel
  146. * CN7 : 1.8v
  147. * CN12: 3.3v
  148. */
  149. /* MTD */
  150. static struct mtd_partition nor_flash_partitions[] = {
  151. {
  152. .name = "loader",
  153. .offset = 0x00000000,
  154. .size = 512 * 1024,
  155. .mask_flags = MTD_WRITEABLE,
  156. },
  157. {
  158. .name = "bootenv",
  159. .offset = MTDPART_OFS_APPEND,
  160. .size = 512 * 1024,
  161. .mask_flags = MTD_WRITEABLE,
  162. },
  163. {
  164. .name = "kernel_ro",
  165. .offset = MTDPART_OFS_APPEND,
  166. .size = 8 * 1024 * 1024,
  167. .mask_flags = MTD_WRITEABLE,
  168. },
  169. {
  170. .name = "kernel",
  171. .offset = MTDPART_OFS_APPEND,
  172. .size = 8 * 1024 * 1024,
  173. },
  174. {
  175. .name = "data",
  176. .offset = MTDPART_OFS_APPEND,
  177. .size = MTDPART_SIZ_FULL,
  178. },
  179. };
  180. static struct physmap_flash_data nor_flash_data = {
  181. .width = 2,
  182. .parts = nor_flash_partitions,
  183. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  184. };
  185. static struct resource nor_flash_resources[] = {
  186. [0] = {
  187. .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
  188. .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
  189. .flags = IORESOURCE_MEM,
  190. }
  191. };
  192. static struct platform_device nor_flash_device = {
  193. .name = "physmap-flash",
  194. .dev = {
  195. .platform_data = &nor_flash_data,
  196. },
  197. .num_resources = ARRAY_SIZE(nor_flash_resources),
  198. .resource = nor_flash_resources,
  199. };
  200. /* SMSC 9220 */
  201. static struct resource smc911x_resources[] = {
  202. {
  203. .start = 0x14000000,
  204. .end = 0x16000000 - 1,
  205. .flags = IORESOURCE_MEM,
  206. }, {
  207. .start = evt2irq(0x02c0) /* IRQ6A */,
  208. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  209. },
  210. };
  211. static struct smsc911x_platform_config smsc911x_info = {
  212. .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
  213. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  214. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  215. };
  216. static struct platform_device smc911x_device = {
  217. .name = "smsc911x",
  218. .id = -1,
  219. .num_resources = ARRAY_SIZE(smc911x_resources),
  220. .resource = smc911x_resources,
  221. .dev = {
  222. .platform_data = &smsc911x_info,
  223. },
  224. };
  225. /*
  226. * The card detect pin of the top SD/MMC slot (CN7) is active low and is
  227. * connected to GPIO A22 of SH7372 (GPIO_PORT41).
  228. */
  229. static int slot_cn7_get_cd(struct platform_device *pdev)
  230. {
  231. return !gpio_get_value(GPIO_PORT41);
  232. }
  233. /* MERAM */
  234. static struct sh_mobile_meram_info meram_info = {
  235. .addr_mode = SH_MOBILE_MERAM_MODE1,
  236. };
  237. static struct resource meram_resources[] = {
  238. [0] = {
  239. .name = "MERAM",
  240. .start = 0xe8000000,
  241. .end = 0xe81fffff,
  242. .flags = IORESOURCE_MEM,
  243. },
  244. };
  245. static struct platform_device meram_device = {
  246. .name = "sh_mobile_meram",
  247. .id = 0,
  248. .num_resources = ARRAY_SIZE(meram_resources),
  249. .resource = meram_resources,
  250. .dev = {
  251. .platform_data = &meram_info,
  252. },
  253. };
  254. /* SH_MMCIF */
  255. static struct resource sh_mmcif_resources[] = {
  256. [0] = {
  257. .name = "MMCIF",
  258. .start = 0xE6BD0000,
  259. .end = 0xE6BD00FF,
  260. .flags = IORESOURCE_MEM,
  261. },
  262. [1] = {
  263. /* MMC ERR */
  264. .start = evt2irq(0x1ac0),
  265. .flags = IORESOURCE_IRQ,
  266. },
  267. [2] = {
  268. /* MMC NOR */
  269. .start = evt2irq(0x1ae0),
  270. .flags = IORESOURCE_IRQ,
  271. },
  272. };
  273. static struct sh_mmcif_dma sh_mmcif_dma = {
  274. .chan_priv_rx = {
  275. .slave_id = SHDMA_SLAVE_MMCIF_RX,
  276. },
  277. .chan_priv_tx = {
  278. .slave_id = SHDMA_SLAVE_MMCIF_TX,
  279. },
  280. };
  281. static struct sh_mmcif_plat_data sh_mmcif_plat = {
  282. .sup_pclk = 0,
  283. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  284. .caps = MMC_CAP_4_BIT_DATA |
  285. MMC_CAP_8_BIT_DATA |
  286. MMC_CAP_NEEDS_POLL,
  287. .get_cd = slot_cn7_get_cd,
  288. .dma = &sh_mmcif_dma,
  289. };
  290. static struct platform_device sh_mmcif_device = {
  291. .name = "sh_mmcif",
  292. .id = 0,
  293. .dev = {
  294. .dma_mask = NULL,
  295. .coherent_dma_mask = 0xffffffff,
  296. .platform_data = &sh_mmcif_plat,
  297. },
  298. .num_resources = ARRAY_SIZE(sh_mmcif_resources),
  299. .resource = sh_mmcif_resources,
  300. };
  301. /* SDHI0 */
  302. static struct sh_mobile_sdhi_info sdhi0_info = {
  303. .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
  304. .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
  305. .tmio_caps = MMC_CAP_SDIO_IRQ,
  306. };
  307. static struct resource sdhi0_resources[] = {
  308. [0] = {
  309. .name = "SDHI0",
  310. .start = 0xe6850000,
  311. .end = 0xe68500ff,
  312. .flags = IORESOURCE_MEM,
  313. },
  314. [1] = {
  315. .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
  316. .flags = IORESOURCE_IRQ,
  317. },
  318. [2] = {
  319. .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
  320. .flags = IORESOURCE_IRQ,
  321. },
  322. [3] = {
  323. .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
  324. .flags = IORESOURCE_IRQ,
  325. },
  326. };
  327. static struct platform_device sdhi0_device = {
  328. .name = "sh_mobile_sdhi",
  329. .num_resources = ARRAY_SIZE(sdhi0_resources),
  330. .resource = sdhi0_resources,
  331. .id = 0,
  332. .dev = {
  333. .platform_data = &sdhi0_info,
  334. },
  335. };
  336. /* SDHI1 */
  337. static struct sh_mobile_sdhi_info sdhi1_info = {
  338. .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
  339. .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
  340. .tmio_ocr_mask = MMC_VDD_165_195,
  341. .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
  342. .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
  343. .get_cd = slot_cn7_get_cd,
  344. };
  345. static struct resource sdhi1_resources[] = {
  346. [0] = {
  347. .name = "SDHI1",
  348. .start = 0xe6860000,
  349. .end = 0xe68600ff,
  350. .flags = IORESOURCE_MEM,
  351. },
  352. [1] = {
  353. .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
  354. .flags = IORESOURCE_IRQ,
  355. },
  356. [2] = {
  357. .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
  358. .flags = IORESOURCE_IRQ,
  359. },
  360. [3] = {
  361. .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
  362. .flags = IORESOURCE_IRQ,
  363. },
  364. };
  365. static struct platform_device sdhi1_device = {
  366. .name = "sh_mobile_sdhi",
  367. .num_resources = ARRAY_SIZE(sdhi1_resources),
  368. .resource = sdhi1_resources,
  369. .id = 1,
  370. .dev = {
  371. .platform_data = &sdhi1_info,
  372. },
  373. };
  374. /* USB1 */
  375. static void usb1_host_port_power(int port, int power)
  376. {
  377. if (!power) /* only power-on supported for now */
  378. return;
  379. /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
  380. __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
  381. }
  382. static struct r8a66597_platdata usb1_host_data = {
  383. .on_chip = 1,
  384. .port_power = usb1_host_port_power,
  385. };
  386. static struct resource usb1_host_resources[] = {
  387. [0] = {
  388. .name = "USBHS",
  389. .start = 0xE68B0000,
  390. .end = 0xE68B00E6 - 1,
  391. .flags = IORESOURCE_MEM,
  392. },
  393. [1] = {
  394. .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
  395. .flags = IORESOURCE_IRQ,
  396. },
  397. };
  398. static struct platform_device usb1_host_device = {
  399. .name = "r8a66597_hcd",
  400. .id = 1,
  401. .dev = {
  402. .dma_mask = NULL, /* not use dma */
  403. .coherent_dma_mask = 0xffffffff,
  404. .platform_data = &usb1_host_data,
  405. },
  406. .num_resources = ARRAY_SIZE(usb1_host_resources),
  407. .resource = usb1_host_resources,
  408. };
  409. static const struct fb_videomode ap4evb_lcdc_modes[] = {
  410. {
  411. #ifdef CONFIG_AP4EVB_QHD
  412. .name = "R63302(QHD)",
  413. .xres = 544,
  414. .yres = 961,
  415. .left_margin = 72,
  416. .right_margin = 600,
  417. .hsync_len = 16,
  418. .upper_margin = 8,
  419. .lower_margin = 8,
  420. .vsync_len = 2,
  421. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  422. #else
  423. .name = "WVGA Panel",
  424. .xres = 800,
  425. .yres = 480,
  426. .left_margin = 220,
  427. .right_margin = 110,
  428. .hsync_len = 70,
  429. .upper_margin = 20,
  430. .lower_margin = 5,
  431. .vsync_len = 5,
  432. .sync = 0,
  433. #endif
  434. },
  435. };
  436. static struct sh_mobile_meram_cfg lcd_meram_cfg = {
  437. .icb[0] = {
  438. .marker_icb = 28,
  439. .cache_icb = 24,
  440. .meram_offset = 0x0,
  441. .meram_size = 0x40,
  442. },
  443. .icb[1] = {
  444. .marker_icb = 29,
  445. .cache_icb = 25,
  446. .meram_offset = 0x40,
  447. .meram_size = 0x40,
  448. },
  449. };
  450. static struct sh_mobile_lcdc_info lcdc_info = {
  451. .meram_dev = &meram_info,
  452. .ch[0] = {
  453. .chan = LCDC_CHAN_MAINLCD,
  454. .fourcc = V4L2_PIX_FMT_RGB565,
  455. .lcd_cfg = ap4evb_lcdc_modes,
  456. .num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes),
  457. .meram_cfg = &lcd_meram_cfg,
  458. }
  459. };
  460. static struct resource lcdc_resources[] = {
  461. [0] = {
  462. .name = "LCDC",
  463. .start = 0xfe940000, /* P4-only space */
  464. .end = 0xfe943fff,
  465. .flags = IORESOURCE_MEM,
  466. },
  467. [1] = {
  468. .start = intcs_evt2irq(0x580),
  469. .flags = IORESOURCE_IRQ,
  470. },
  471. };
  472. static struct platform_device lcdc_device = {
  473. .name = "sh_mobile_lcdc_fb",
  474. .num_resources = ARRAY_SIZE(lcdc_resources),
  475. .resource = lcdc_resources,
  476. .dev = {
  477. .platform_data = &lcdc_info,
  478. .coherent_dma_mask = ~0,
  479. },
  480. };
  481. /*
  482. * QHD display
  483. */
  484. #ifdef CONFIG_AP4EVB_QHD
  485. /* KEYSC (Needs SW43 set to ON) */
  486. static struct sh_keysc_info keysc_info = {
  487. .mode = SH_KEYSC_MODE_1,
  488. .scan_timing = 3,
  489. .delay = 2500,
  490. .keycodes = {
  491. KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
  492. KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
  493. KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
  494. KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
  495. KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
  496. },
  497. };
  498. static struct resource keysc_resources[] = {
  499. [0] = {
  500. .name = "KEYSC",
  501. .start = 0xe61b0000,
  502. .end = 0xe61b0063,
  503. .flags = IORESOURCE_MEM,
  504. },
  505. [1] = {
  506. .start = evt2irq(0x0be0), /* KEYSC_KEY */
  507. .flags = IORESOURCE_IRQ,
  508. },
  509. };
  510. static struct platform_device keysc_device = {
  511. .name = "sh_keysc",
  512. .id = 0, /* "keysc0" clock */
  513. .num_resources = ARRAY_SIZE(keysc_resources),
  514. .resource = keysc_resources,
  515. .dev = {
  516. .platform_data = &keysc_info,
  517. },
  518. };
  519. /* MIPI-DSI */
  520. #define PHYCTRL 0x0070
  521. static int sh_mipi_set_dot_clock(struct platform_device *pdev,
  522. void __iomem *base,
  523. int enable)
  524. {
  525. struct clk *pck = clk_get(&pdev->dev, "dsip_clk");
  526. void __iomem *phy = base + PHYCTRL;
  527. if (IS_ERR(pck))
  528. return PTR_ERR(pck);
  529. if (enable) {
  530. clk_set_rate(pck, clk_round_rate(pck, 24000000));
  531. iowrite32(ioread32(phy) | (0xb << 8), phy);
  532. clk_enable(pck);
  533. } else {
  534. clk_disable(pck);
  535. }
  536. clk_put(pck);
  537. return 0;
  538. }
  539. static struct resource mipidsi0_resources[] = {
  540. [0] = {
  541. .start = 0xffc60000,
  542. .end = 0xffc63073,
  543. .flags = IORESOURCE_MEM,
  544. },
  545. [1] = {
  546. .start = 0xffc68000,
  547. .end = 0xffc680ef,
  548. .flags = IORESOURCE_MEM,
  549. },
  550. };
  551. static struct sh_mipi_dsi_info mipidsi0_info = {
  552. .data_format = MIPI_RGB888,
  553. .lcd_chan = &lcdc_info.ch[0],
  554. .lane = 2,
  555. .vsynw_offset = 17,
  556. .flags = SH_MIPI_DSI_SYNC_PULSES_MODE |
  557. SH_MIPI_DSI_HSbyteCLK,
  558. .set_dot_clock = sh_mipi_set_dot_clock,
  559. };
  560. static struct platform_device mipidsi0_device = {
  561. .name = "sh-mipi-dsi",
  562. .num_resources = ARRAY_SIZE(mipidsi0_resources),
  563. .resource = mipidsi0_resources,
  564. .id = 0,
  565. .dev = {
  566. .platform_data = &mipidsi0_info,
  567. },
  568. };
  569. static struct platform_device *qhd_devices[] __initdata = {
  570. &mipidsi0_device,
  571. &keysc_device,
  572. };
  573. #endif /* CONFIG_AP4EVB_QHD */
  574. /* FSI */
  575. #define IRQ_FSI evt2irq(0x1840)
  576. static int __fsi_set_rate(struct clk *clk, long rate, int enable)
  577. {
  578. int ret = 0;
  579. if (rate <= 0)
  580. return ret;
  581. if (enable) {
  582. ret = clk_set_rate(clk, rate);
  583. if (0 == ret)
  584. ret = clk_enable(clk);
  585. } else {
  586. clk_disable(clk);
  587. }
  588. return ret;
  589. }
  590. static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
  591. {
  592. return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
  593. }
  594. static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
  595. {
  596. struct clk *fsia_ick;
  597. struct clk *fsiack;
  598. int ret = -EIO;
  599. fsia_ick = clk_get(dev, "icka");
  600. if (IS_ERR(fsia_ick))
  601. return PTR_ERR(fsia_ick);
  602. /*
  603. * FSIACK is connected to AK4642,
  604. * and use external clock pin from it.
  605. * it is parent of fsia_ick now.
  606. */
  607. fsiack = clk_get_parent(fsia_ick);
  608. if (!fsiack)
  609. goto fsia_ick_out;
  610. /*
  611. * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
  612. *
  613. ** FIXME **
  614. * Because the freq_table of external clk (fsiack) are all 0,
  615. * the return value of clk_round_rate became 0.
  616. * So, it use __fsi_set_rate here.
  617. */
  618. ret = __fsi_set_rate(fsiack, rate, enable);
  619. if (ret < 0)
  620. goto fsiack_out;
  621. ret = __fsi_set_round_rate(fsia_ick, rate, enable);
  622. if ((ret < 0) && enable)
  623. __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
  624. fsiack_out:
  625. clk_put(fsiack);
  626. fsia_ick_out:
  627. clk_put(fsia_ick);
  628. return 0;
  629. }
  630. static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
  631. {
  632. struct clk *fsib_clk;
  633. struct clk *fdiv_clk = &sh7372_fsidivb_clk;
  634. long fsib_rate = 0;
  635. long fdiv_rate = 0;
  636. int ackmd_bpfmd;
  637. int ret;
  638. switch (rate) {
  639. case 44100:
  640. fsib_rate = rate * 256;
  641. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  642. break;
  643. case 48000:
  644. fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
  645. fdiv_rate = rate * 256;
  646. ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
  647. break;
  648. default:
  649. pr_err("unsupported rate in FSI2 port B\n");
  650. return -EINVAL;
  651. }
  652. /* FSI B setting */
  653. fsib_clk = clk_get(dev, "ickb");
  654. if (IS_ERR(fsib_clk))
  655. return -EIO;
  656. ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
  657. if (ret < 0)
  658. goto fsi_set_rate_end;
  659. /* FSI DIV setting */
  660. ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
  661. if (ret < 0) {
  662. /* disable FSI B */
  663. if (enable)
  664. __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
  665. goto fsi_set_rate_end;
  666. }
  667. ret = ackmd_bpfmd;
  668. fsi_set_rate_end:
  669. clk_put(fsib_clk);
  670. return ret;
  671. }
  672. static struct sh_fsi_platform_info fsi_info = {
  673. .port_a = {
  674. .flags = SH_FSI_BRS_INV,
  675. .set_rate = fsi_ak4642_set_rate,
  676. },
  677. .port_b = {
  678. .flags = SH_FSI_BRS_INV |
  679. SH_FSI_BRM_INV |
  680. SH_FSI_LRS_INV |
  681. SH_FSI_FMT_SPDIF,
  682. .set_rate = fsi_hdmi_set_rate,
  683. },
  684. };
  685. static struct resource fsi_resources[] = {
  686. [0] = {
  687. .name = "FSI",
  688. .start = 0xFE3C0000,
  689. .end = 0xFE3C0400 - 1,
  690. .flags = IORESOURCE_MEM,
  691. },
  692. [1] = {
  693. .start = IRQ_FSI,
  694. .flags = IORESOURCE_IRQ,
  695. },
  696. };
  697. static struct platform_device fsi_device = {
  698. .name = "sh_fsi2",
  699. .id = -1,
  700. .num_resources = ARRAY_SIZE(fsi_resources),
  701. .resource = fsi_resources,
  702. .dev = {
  703. .platform_data = &fsi_info,
  704. },
  705. };
  706. static struct fsi_ak4642_info fsi2_ak4643_info = {
  707. .name = "AK4643",
  708. .card = "FSI2A-AK4643",
  709. .cpu_dai = "fsia-dai",
  710. .codec = "ak4642-codec.0-0013",
  711. .platform = "sh_fsi2",
  712. .id = FSI_PORT_A,
  713. };
  714. static struct platform_device fsi_ak4643_device = {
  715. .name = "fsi-ak4642-audio",
  716. .dev = {
  717. .platform_data = &fsi_info,
  718. },
  719. };
  720. static struct sh_mobile_meram_cfg hdmi_meram_cfg = {
  721. .icb[0] = {
  722. .marker_icb = 30,
  723. .cache_icb = 26,
  724. .meram_offset = 0x80,
  725. .meram_size = 0x100,
  726. },
  727. .icb[1] = {
  728. .marker_icb = 31,
  729. .cache_icb = 27,
  730. .meram_offset = 0x180,
  731. .meram_size = 0x100,
  732. },
  733. };
  734. static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
  735. .clock_source = LCDC_CLK_EXTERNAL,
  736. .meram_dev = &meram_info,
  737. .ch[0] = {
  738. .chan = LCDC_CHAN_MAINLCD,
  739. .fourcc = V4L2_PIX_FMT_RGB565,
  740. .interface_type = RGB24,
  741. .clock_divider = 1,
  742. .flags = LCDC_FLAGS_DWPOL,
  743. .meram_cfg = &hdmi_meram_cfg,
  744. }
  745. };
  746. static struct resource lcdc1_resources[] = {
  747. [0] = {
  748. .name = "LCDC1",
  749. .start = 0xfe944000,
  750. .end = 0xfe947fff,
  751. .flags = IORESOURCE_MEM,
  752. },
  753. [1] = {
  754. .start = intcs_evt2irq(0x1780),
  755. .flags = IORESOURCE_IRQ,
  756. },
  757. };
  758. static struct platform_device lcdc1_device = {
  759. .name = "sh_mobile_lcdc_fb",
  760. .num_resources = ARRAY_SIZE(lcdc1_resources),
  761. .resource = lcdc1_resources,
  762. .id = 1,
  763. .dev = {
  764. .platform_data = &sh_mobile_lcdc1_info,
  765. .coherent_dma_mask = ~0,
  766. },
  767. };
  768. static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
  769. unsigned long *parent_freq);
  770. static struct sh_mobile_hdmi_info hdmi_info = {
  771. .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
  772. .lcd_dev = &lcdc1_device.dev,
  773. .flags = HDMI_SND_SRC_SPDIF,
  774. .clk_optimize_parent = ap4evb_clk_optimize,
  775. };
  776. static struct resource hdmi_resources[] = {
  777. [0] = {
  778. .name = "HDMI",
  779. .start = 0xe6be0000,
  780. .end = 0xe6be00ff,
  781. .flags = IORESOURCE_MEM,
  782. },
  783. [1] = {
  784. /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
  785. .start = evt2irq(0x17e0),
  786. .flags = IORESOURCE_IRQ,
  787. },
  788. };
  789. static struct platform_device hdmi_device = {
  790. .name = "sh-mobile-hdmi",
  791. .num_resources = ARRAY_SIZE(hdmi_resources),
  792. .resource = hdmi_resources,
  793. .id = -1,
  794. .dev = {
  795. .platform_data = &hdmi_info,
  796. },
  797. };
  798. static struct platform_device fsi_hdmi_device = {
  799. .name = "sh_fsi2_b_hdmi",
  800. };
  801. static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
  802. unsigned long *parent_freq)
  803. {
  804. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  805. long error;
  806. if (IS_ERR(hdmi_ick)) {
  807. int ret = PTR_ERR(hdmi_ick);
  808. pr_err("Cannot get HDMI ICK: %d\n", ret);
  809. return ret;
  810. }
  811. error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
  812. clk_put(hdmi_ick);
  813. return error;
  814. }
  815. static struct gpio_led ap4evb_leds[] = {
  816. {
  817. .name = "led4",
  818. .gpio = GPIO_PORT185,
  819. .default_state = LEDS_GPIO_DEFSTATE_ON,
  820. },
  821. {
  822. .name = "led2",
  823. .gpio = GPIO_PORT186,
  824. .default_state = LEDS_GPIO_DEFSTATE_ON,
  825. },
  826. {
  827. .name = "led3",
  828. .gpio = GPIO_PORT187,
  829. .default_state = LEDS_GPIO_DEFSTATE_ON,
  830. },
  831. {
  832. .name = "led1",
  833. .gpio = GPIO_PORT188,
  834. .default_state = LEDS_GPIO_DEFSTATE_ON,
  835. }
  836. };
  837. static struct gpio_led_platform_data ap4evb_leds_pdata = {
  838. .num_leds = ARRAY_SIZE(ap4evb_leds),
  839. .leds = ap4evb_leds,
  840. };
  841. static struct platform_device leds_device = {
  842. .name = "leds-gpio",
  843. .id = 0,
  844. .dev = {
  845. .platform_data = &ap4evb_leds_pdata,
  846. },
  847. };
  848. static struct i2c_board_info imx074_info = {
  849. I2C_BOARD_INFO("imx074", 0x1a),
  850. };
  851. static struct soc_camera_link imx074_link = {
  852. .bus_id = 0,
  853. .board_info = &imx074_info,
  854. .i2c_adapter_id = 0,
  855. .module_name = "imx074",
  856. };
  857. static struct platform_device ap4evb_camera = {
  858. .name = "soc-camera-pdrv",
  859. .id = 0,
  860. .dev = {
  861. .platform_data = &imx074_link,
  862. },
  863. };
  864. static struct sh_csi2_client_config csi2_clients[] = {
  865. {
  866. .phy = SH_CSI2_PHY_MAIN,
  867. .lanes = 0, /* default: 2 lanes */
  868. .channel = 0,
  869. .pdev = &ap4evb_camera,
  870. },
  871. };
  872. static struct sh_csi2_pdata csi2_info = {
  873. .type = SH_CSI2C,
  874. .clients = csi2_clients,
  875. .num_clients = ARRAY_SIZE(csi2_clients),
  876. .flags = SH_CSI2_ECC | SH_CSI2_CRC,
  877. };
  878. static struct resource csi2_resources[] = {
  879. [0] = {
  880. .name = "CSI2",
  881. .start = 0xffc90000,
  882. .end = 0xffc90fff,
  883. .flags = IORESOURCE_MEM,
  884. },
  885. [1] = {
  886. .start = intcs_evt2irq(0x17a0),
  887. .flags = IORESOURCE_IRQ,
  888. },
  889. };
  890. static struct sh_mobile_ceu_companion csi2 = {
  891. .id = 0,
  892. .num_resources = ARRAY_SIZE(csi2_resources),
  893. .resource = csi2_resources,
  894. .platform_data = &csi2_info,
  895. };
  896. static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  897. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  898. .csi2 = &csi2,
  899. };
  900. static struct resource ceu_resources[] = {
  901. [0] = {
  902. .name = "CEU",
  903. .start = 0xfe910000,
  904. .end = 0xfe91009f,
  905. .flags = IORESOURCE_MEM,
  906. },
  907. [1] = {
  908. .start = intcs_evt2irq(0x880),
  909. .flags = IORESOURCE_IRQ,
  910. },
  911. [2] = {
  912. /* place holder for contiguous memory */
  913. },
  914. };
  915. static struct platform_device ceu_device = {
  916. .name = "sh_mobile_ceu",
  917. .id = 0, /* "ceu0" clock */
  918. .num_resources = ARRAY_SIZE(ceu_resources),
  919. .resource = ceu_resources,
  920. .dev = {
  921. .platform_data = &sh_mobile_ceu_info,
  922. .coherent_dma_mask = 0xffffffff,
  923. },
  924. };
  925. static struct platform_device *ap4evb_devices[] __initdata = {
  926. &leds_device,
  927. &nor_flash_device,
  928. &smc911x_device,
  929. &sdhi0_device,
  930. &sdhi1_device,
  931. &usb1_host_device,
  932. &fsi_device,
  933. &fsi_ak4643_device,
  934. &fsi_hdmi_device,
  935. &sh_mmcif_device,
  936. &lcdc1_device,
  937. &lcdc_device,
  938. &hdmi_device,
  939. &ceu_device,
  940. &ap4evb_camera,
  941. &meram_device,
  942. };
  943. static void __init hdmi_init_pm_clock(void)
  944. {
  945. struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
  946. int ret;
  947. long rate;
  948. if (IS_ERR(hdmi_ick)) {
  949. ret = PTR_ERR(hdmi_ick);
  950. pr_err("Cannot get HDMI ICK: %d\n", ret);
  951. goto out;
  952. }
  953. ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
  954. if (ret < 0) {
  955. pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
  956. goto out;
  957. }
  958. pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
  959. rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
  960. if (rate < 0) {
  961. pr_err("Cannot get suitable rate: %ld\n", rate);
  962. ret = rate;
  963. goto out;
  964. }
  965. ret = clk_set_rate(&sh7372_pllc2_clk, rate);
  966. if (ret < 0) {
  967. pr_err("Cannot set rate %ld: %d\n", rate, ret);
  968. goto out;
  969. }
  970. pr_debug("PLLC2 set frequency %lu\n", rate);
  971. ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
  972. if (ret < 0)
  973. pr_err("Cannot set HDMI parent: %d\n", ret);
  974. out:
  975. if (!IS_ERR(hdmi_ick))
  976. clk_put(hdmi_ick);
  977. }
  978. static void __init fsi_init_pm_clock(void)
  979. {
  980. struct clk *fsia_ick;
  981. int ret;
  982. fsia_ick = clk_get(&fsi_device.dev, "icka");
  983. if (IS_ERR(fsia_ick)) {
  984. ret = PTR_ERR(fsia_ick);
  985. pr_err("Cannot get FSI ICK: %d\n", ret);
  986. return;
  987. }
  988. ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
  989. if (ret < 0)
  990. pr_err("Cannot set FSI-A parent: %d\n", ret);
  991. clk_put(fsia_ick);
  992. }
  993. /*
  994. * FIXME !!
  995. *
  996. * gpio_no_direction
  997. * are quick_hack.
  998. *
  999. * current gpio frame work doesn't have
  1000. * the method to control only pull up/down/free.
  1001. * this function should be replaced by correct gpio function
  1002. */
  1003. static void __init gpio_no_direction(u32 addr)
  1004. {
  1005. __raw_writeb(0x00, addr);
  1006. }
  1007. /* TouchScreen */
  1008. #ifdef CONFIG_AP4EVB_QHD
  1009. # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
  1010. # define GPIO_TSC_PORT GPIO_PORT123
  1011. #else /* WVGA */
  1012. # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
  1013. # define GPIO_TSC_PORT GPIO_PORT40
  1014. #endif
  1015. #define IRQ28 evt2irq(0x3380) /* IRQ28A */
  1016. #define IRQ7 evt2irq(0x02e0) /* IRQ7A */
  1017. static int ts_get_pendown_state(void)
  1018. {
  1019. int val;
  1020. gpio_free(GPIO_TSC_IRQ);
  1021. gpio_request(GPIO_TSC_PORT, NULL);
  1022. gpio_direction_input(GPIO_TSC_PORT);
  1023. val = gpio_get_value(GPIO_TSC_PORT);
  1024. gpio_request(GPIO_TSC_IRQ, NULL);
  1025. return !val;
  1026. }
  1027. static int ts_init(void)
  1028. {
  1029. gpio_request(GPIO_TSC_IRQ, NULL);
  1030. return 0;
  1031. }
  1032. static struct tsc2007_platform_data tsc2007_info = {
  1033. .model = 2007,
  1034. .x_plate_ohms = 180,
  1035. .get_pendown_state = ts_get_pendown_state,
  1036. .init_platform_hw = ts_init,
  1037. };
  1038. static struct i2c_board_info tsc_device = {
  1039. I2C_BOARD_INFO("tsc2007", 0x48),
  1040. .type = "tsc2007",
  1041. .platform_data = &tsc2007_info,
  1042. /*.irq is selected on ap4evb_init */
  1043. };
  1044. /* I2C */
  1045. static struct i2c_board_info i2c0_devices[] = {
  1046. {
  1047. I2C_BOARD_INFO("ak4643", 0x13),
  1048. },
  1049. };
  1050. static struct i2c_board_info i2c1_devices[] = {
  1051. {
  1052. I2C_BOARD_INFO("r2025sd", 0x32),
  1053. },
  1054. };
  1055. static struct map_desc ap4evb_io_desc[] __initdata = {
  1056. /* create a 1:1 entity map for 0xe6xxxxxx
  1057. * used by CPGA, INTC and PFC.
  1058. */
  1059. {
  1060. .virtual = 0xe6000000,
  1061. .pfn = __phys_to_pfn(0xe6000000),
  1062. .length = 256 << 20,
  1063. .type = MT_DEVICE_NONSHARED
  1064. },
  1065. };
  1066. static void __init ap4evb_map_io(void)
  1067. {
  1068. iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
  1069. /* setup early devices and console here as well */
  1070. sh7372_add_early_devices();
  1071. shmobile_setup_console();
  1072. }
  1073. #define GPIO_PORT9CR 0xE6051009
  1074. #define GPIO_PORT10CR 0xE605100A
  1075. #define USCCR1 0xE6058144
  1076. static void __init ap4evb_init(void)
  1077. {
  1078. u32 srcr4;
  1079. struct clk *clk;
  1080. sh7372_pinmux_init();
  1081. /* enable SCIFA0 */
  1082. gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
  1083. gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
  1084. /* enable SMSC911X */
  1085. gpio_request(GPIO_FN_CS5A, NULL);
  1086. gpio_request(GPIO_FN_IRQ6_39, NULL);
  1087. /* enable Debug switch (S6) */
  1088. gpio_request(GPIO_PORT32, NULL);
  1089. gpio_request(GPIO_PORT33, NULL);
  1090. gpio_request(GPIO_PORT34, NULL);
  1091. gpio_request(GPIO_PORT35, NULL);
  1092. gpio_direction_input(GPIO_PORT32);
  1093. gpio_direction_input(GPIO_PORT33);
  1094. gpio_direction_input(GPIO_PORT34);
  1095. gpio_direction_input(GPIO_PORT35);
  1096. gpio_export(GPIO_PORT32, 0);
  1097. gpio_export(GPIO_PORT33, 0);
  1098. gpio_export(GPIO_PORT34, 0);
  1099. gpio_export(GPIO_PORT35, 0);
  1100. /* SDHI0 */
  1101. gpio_request(GPIO_FN_SDHICD0, NULL);
  1102. gpio_request(GPIO_FN_SDHIWP0, NULL);
  1103. gpio_request(GPIO_FN_SDHICMD0, NULL);
  1104. gpio_request(GPIO_FN_SDHICLK0, NULL);
  1105. gpio_request(GPIO_FN_SDHID0_3, NULL);
  1106. gpio_request(GPIO_FN_SDHID0_2, NULL);
  1107. gpio_request(GPIO_FN_SDHID0_1, NULL);
  1108. gpio_request(GPIO_FN_SDHID0_0, NULL);
  1109. /* SDHI1 */
  1110. gpio_request(GPIO_FN_SDHICMD1, NULL);
  1111. gpio_request(GPIO_FN_SDHICLK1, NULL);
  1112. gpio_request(GPIO_FN_SDHID1_3, NULL);
  1113. gpio_request(GPIO_FN_SDHID1_2, NULL);
  1114. gpio_request(GPIO_FN_SDHID1_1, NULL);
  1115. gpio_request(GPIO_FN_SDHID1_0, NULL);
  1116. /* MMCIF */
  1117. gpio_request(GPIO_FN_MMCD0_0, NULL);
  1118. gpio_request(GPIO_FN_MMCD0_1, NULL);
  1119. gpio_request(GPIO_FN_MMCD0_2, NULL);
  1120. gpio_request(GPIO_FN_MMCD0_3, NULL);
  1121. gpio_request(GPIO_FN_MMCD0_4, NULL);
  1122. gpio_request(GPIO_FN_MMCD0_5, NULL);
  1123. gpio_request(GPIO_FN_MMCD0_6, NULL);
  1124. gpio_request(GPIO_FN_MMCD0_7, NULL);
  1125. gpio_request(GPIO_FN_MMCCMD0, NULL);
  1126. gpio_request(GPIO_FN_MMCCLK0, NULL);
  1127. /* USB enable */
  1128. gpio_request(GPIO_FN_VBUS0_1, NULL);
  1129. gpio_request(GPIO_FN_IDIN_1_18, NULL);
  1130. gpio_request(GPIO_FN_PWEN_1_115, NULL);
  1131. gpio_request(GPIO_FN_OVCN_1_114, NULL);
  1132. gpio_request(GPIO_FN_EXTLP_1, NULL);
  1133. gpio_request(GPIO_FN_OVCN2_1, NULL);
  1134. /* setup USB phy */
  1135. __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */
  1136. /* enable FSI2 port A (ak4643) */
  1137. gpio_request(GPIO_FN_FSIAIBT, NULL);
  1138. gpio_request(GPIO_FN_FSIAILR, NULL);
  1139. gpio_request(GPIO_FN_FSIAISLD, NULL);
  1140. gpio_request(GPIO_FN_FSIAOSLD, NULL);
  1141. gpio_request(GPIO_PORT161, NULL);
  1142. gpio_direction_output(GPIO_PORT161, 0); /* slave */
  1143. gpio_request(GPIO_PORT9, NULL);
  1144. gpio_request(GPIO_PORT10, NULL);
  1145. gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
  1146. gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
  1147. /* card detect pin for MMC slot (CN7) */
  1148. gpio_request(GPIO_PORT41, NULL);
  1149. gpio_direction_input(GPIO_PORT41);
  1150. /* setup FSI2 port B (HDMI) */
  1151. gpio_request(GPIO_FN_FSIBCK, NULL);
  1152. __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
  1153. /* set SPU2 clock to 119.6 MHz */
  1154. clk = clk_get(NULL, "spu_clk");
  1155. if (!IS_ERR(clk)) {
  1156. clk_set_rate(clk, clk_round_rate(clk, 119600000));
  1157. clk_put(clk);
  1158. }
  1159. /*
  1160. * set irq priority, to avoid sound chopping
  1161. * when NFS rootfs is used
  1162. * FSI(3) > SMSC911X(2)
  1163. */
  1164. intc_set_priority(IRQ_FSI, 3);
  1165. i2c_register_board_info(0, i2c0_devices,
  1166. ARRAY_SIZE(i2c0_devices));
  1167. i2c_register_board_info(1, i2c1_devices,
  1168. ARRAY_SIZE(i2c1_devices));
  1169. #ifdef CONFIG_AP4EVB_QHD
  1170. /*
  1171. * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
  1172. * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
  1173. */
  1174. /* enable KEYSC */
  1175. gpio_request(GPIO_FN_KEYOUT0, NULL);
  1176. gpio_request(GPIO_FN_KEYOUT1, NULL);
  1177. gpio_request(GPIO_FN_KEYOUT2, NULL);
  1178. gpio_request(GPIO_FN_KEYOUT3, NULL);
  1179. gpio_request(GPIO_FN_KEYOUT4, NULL);
  1180. gpio_request(GPIO_FN_KEYIN0_136, NULL);
  1181. gpio_request(GPIO_FN_KEYIN1_135, NULL);
  1182. gpio_request(GPIO_FN_KEYIN2_134, NULL);
  1183. gpio_request(GPIO_FN_KEYIN3_133, NULL);
  1184. gpio_request(GPIO_FN_KEYIN4, NULL);
  1185. /* enable TouchScreen */
  1186. irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
  1187. tsc_device.irq = IRQ28;
  1188. i2c_register_board_info(1, &tsc_device, 1);
  1189. /* LCDC0 */
  1190. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  1191. lcdc_info.ch[0].interface_type = RGB24;
  1192. lcdc_info.ch[0].clock_divider = 1;
  1193. lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
  1194. lcdc_info.ch[0].lcd_size_cfg.width = 44;
  1195. lcdc_info.ch[0].lcd_size_cfg.height = 79;
  1196. platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
  1197. #else
  1198. /*
  1199. * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
  1200. * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
  1201. */
  1202. gpio_request(GPIO_FN_LCDD17, NULL);
  1203. gpio_request(GPIO_FN_LCDD16, NULL);
  1204. gpio_request(GPIO_FN_LCDD15, NULL);
  1205. gpio_request(GPIO_FN_LCDD14, NULL);
  1206. gpio_request(GPIO_FN_LCDD13, NULL);
  1207. gpio_request(GPIO_FN_LCDD12, NULL);
  1208. gpio_request(GPIO_FN_LCDD11, NULL);
  1209. gpio_request(GPIO_FN_LCDD10, NULL);
  1210. gpio_request(GPIO_FN_LCDD9, NULL);
  1211. gpio_request(GPIO_FN_LCDD8, NULL);
  1212. gpio_request(GPIO_FN_LCDD7, NULL);
  1213. gpio_request(GPIO_FN_LCDD6, NULL);
  1214. gpio_request(GPIO_FN_LCDD5, NULL);
  1215. gpio_request(GPIO_FN_LCDD4, NULL);
  1216. gpio_request(GPIO_FN_LCDD3, NULL);
  1217. gpio_request(GPIO_FN_LCDD2, NULL);
  1218. gpio_request(GPIO_FN_LCDD1, NULL);
  1219. gpio_request(GPIO_FN_LCDD0, NULL);
  1220. gpio_request(GPIO_FN_LCDDISP, NULL);
  1221. gpio_request(GPIO_FN_LCDDCK, NULL);
  1222. gpio_request(GPIO_PORT189, NULL); /* backlight */
  1223. gpio_direction_output(GPIO_PORT189, 1);
  1224. gpio_request(GPIO_PORT151, NULL); /* LCDDON */
  1225. gpio_direction_output(GPIO_PORT151, 1);
  1226. lcdc_info.clock_source = LCDC_CLK_BUS;
  1227. lcdc_info.ch[0].interface_type = RGB18;
  1228. lcdc_info.ch[0].clock_divider = 3;
  1229. lcdc_info.ch[0].flags = 0;
  1230. lcdc_info.ch[0].lcd_size_cfg.width = 152;
  1231. lcdc_info.ch[0].lcd_size_cfg.height = 91;
  1232. /* enable TouchScreen */
  1233. irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
  1234. tsc_device.irq = IRQ7;
  1235. i2c_register_board_info(0, &tsc_device, 1);
  1236. #endif /* CONFIG_AP4EVB_QHD */
  1237. /* CEU */
  1238. /*
  1239. * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
  1240. * becomes available
  1241. */
  1242. /* MIPI-CSI stuff */
  1243. gpio_request(GPIO_FN_VIO_CKO, NULL);
  1244. clk = clk_get(NULL, "vck1_clk");
  1245. if (!IS_ERR(clk)) {
  1246. clk_set_rate(clk, clk_round_rate(clk, 13000000));
  1247. clk_enable(clk);
  1248. clk_put(clk);
  1249. }
  1250. sh7372_add_standard_devices();
  1251. /* HDMI */
  1252. gpio_request(GPIO_FN_HDMI_HPD, NULL);
  1253. gpio_request(GPIO_FN_HDMI_CEC, NULL);
  1254. /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
  1255. #define SRCR4 0xe61580bc
  1256. srcr4 = __raw_readl(SRCR4);
  1257. __raw_writel(srcr4 | (1 << 13), SRCR4);
  1258. udelay(50);
  1259. __raw_writel(srcr4 & ~(1 << 13), SRCR4);
  1260. platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
  1261. sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc1_device);
  1262. sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
  1263. sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
  1264. sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
  1265. sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
  1266. sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
  1267. sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
  1268. hdmi_init_pm_clock();
  1269. fsi_init_pm_clock();
  1270. sh7372_pm_init();
  1271. pm_clk_add(&fsi_device.dev, "spu2");
  1272. pm_clk_add(&lcdc1_device.dev, "hdmi");
  1273. }
  1274. static void __init ap4evb_timer_init(void)
  1275. {
  1276. sh7372_clock_init();
  1277. shmobile_timer.init();
  1278. /* External clock source */
  1279. clk_set_rate(&sh7372_dv_clki_clk, 27000000);
  1280. }
  1281. static struct sys_timer ap4evb_timer = {
  1282. .init = ap4evb_timer_init,
  1283. };
  1284. MACHINE_START(AP4EVB, "ap4evb")
  1285. .map_io = ap4evb_map_io,
  1286. .init_irq = sh7372_init_irq,
  1287. .handle_irq = shmobile_handle_irq_intc,
  1288. .init_machine = ap4evb_init,
  1289. .timer = &ap4evb_timer,
  1290. MACHINE_END