amdgpu_fb.c 11 KB

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  1. /*
  2. * Copyright © 2007 David Airlie
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * David Airlie
  25. */
  26. #include <linux/module.h>
  27. #include <linux/slab.h>
  28. #include <drm/drmP.h>
  29. #include <drm/drm_crtc.h>
  30. #include <drm/drm_crtc_helper.h>
  31. #include <drm/amdgpu_drm.h>
  32. #include "amdgpu.h"
  33. #include "cikd.h"
  34. #include <drm/drm_fb_helper.h>
  35. #include <linux/vga_switcheroo.h>
  36. /* object hierarchy -
  37. this contains a helper + a amdgpu fb
  38. the helper contains a pointer to amdgpu framebuffer baseclass.
  39. */
  40. struct amdgpu_fbdev {
  41. struct drm_fb_helper helper;
  42. struct amdgpu_framebuffer rfb;
  43. struct amdgpu_device *adev;
  44. };
  45. static struct fb_ops amdgpufb_ops = {
  46. .owner = THIS_MODULE,
  47. .fb_check_var = drm_fb_helper_check_var,
  48. .fb_set_par = drm_fb_helper_set_par,
  49. .fb_fillrect = drm_fb_helper_cfb_fillrect,
  50. .fb_copyarea = drm_fb_helper_cfb_copyarea,
  51. .fb_imageblit = drm_fb_helper_cfb_imageblit,
  52. .fb_pan_display = drm_fb_helper_pan_display,
  53. .fb_blank = drm_fb_helper_blank,
  54. .fb_setcmap = drm_fb_helper_setcmap,
  55. .fb_debug_enter = drm_fb_helper_debug_enter,
  56. .fb_debug_leave = drm_fb_helper_debug_leave,
  57. };
  58. int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int bpp, bool tiled)
  59. {
  60. int aligned = width;
  61. int pitch_mask = 0;
  62. switch (bpp / 8) {
  63. case 1:
  64. pitch_mask = 255;
  65. break;
  66. case 2:
  67. pitch_mask = 127;
  68. break;
  69. case 3:
  70. case 4:
  71. pitch_mask = 63;
  72. break;
  73. }
  74. aligned += pitch_mask;
  75. aligned &= ~pitch_mask;
  76. return aligned;
  77. }
  78. static void amdgpufb_destroy_pinned_object(struct drm_gem_object *gobj)
  79. {
  80. struct amdgpu_bo *rbo = gem_to_amdgpu_bo(gobj);
  81. int ret;
  82. ret = amdgpu_bo_reserve(rbo, false);
  83. if (likely(ret == 0)) {
  84. amdgpu_bo_kunmap(rbo);
  85. amdgpu_bo_unpin(rbo);
  86. amdgpu_bo_unreserve(rbo);
  87. }
  88. drm_gem_object_unreference_unlocked(gobj);
  89. }
  90. static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
  91. struct drm_mode_fb_cmd2 *mode_cmd,
  92. struct drm_gem_object **gobj_p)
  93. {
  94. struct amdgpu_device *adev = rfbdev->adev;
  95. struct drm_gem_object *gobj = NULL;
  96. struct amdgpu_bo *rbo = NULL;
  97. bool fb_tiled = false; /* useful for testing */
  98. u32 tiling_flags = 0;
  99. int ret;
  100. int aligned_size, size;
  101. int height = mode_cmd->height;
  102. u32 bpp, depth;
  103. drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp);
  104. /* need to align pitch with crtc limits */
  105. mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, bpp,
  106. fb_tiled) * ((bpp + 1) / 8);
  107. height = ALIGN(mode_cmd->height, 8);
  108. size = mode_cmd->pitches[0] * height;
  109. aligned_size = ALIGN(size, PAGE_SIZE);
  110. ret = amdgpu_gem_object_create(adev, aligned_size, 0,
  111. AMDGPU_GEM_DOMAIN_VRAM,
  112. AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
  113. true, &gobj);
  114. if (ret) {
  115. printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
  116. aligned_size);
  117. return -ENOMEM;
  118. }
  119. rbo = gem_to_amdgpu_bo(gobj);
  120. if (fb_tiled)
  121. tiling_flags = AMDGPU_TILING_SET(ARRAY_MODE, GRPH_ARRAY_2D_TILED_THIN1);
  122. ret = amdgpu_bo_reserve(rbo, false);
  123. if (unlikely(ret != 0))
  124. goto out_unref;
  125. if (tiling_flags) {
  126. ret = amdgpu_bo_set_tiling_flags(rbo,
  127. tiling_flags);
  128. if (ret)
  129. dev_err(adev->dev, "FB failed to set tiling flags\n");
  130. }
  131. ret = amdgpu_bo_pin_restricted(rbo, AMDGPU_GEM_DOMAIN_VRAM, 0, 0, NULL);
  132. if (ret) {
  133. amdgpu_bo_unreserve(rbo);
  134. goto out_unref;
  135. }
  136. ret = amdgpu_bo_kmap(rbo, NULL);
  137. amdgpu_bo_unreserve(rbo);
  138. if (ret) {
  139. goto out_unref;
  140. }
  141. *gobj_p = gobj;
  142. return 0;
  143. out_unref:
  144. amdgpufb_destroy_pinned_object(gobj);
  145. *gobj_p = NULL;
  146. return ret;
  147. }
  148. static int amdgpufb_create(struct drm_fb_helper *helper,
  149. struct drm_fb_helper_surface_size *sizes)
  150. {
  151. struct amdgpu_fbdev *rfbdev = (struct amdgpu_fbdev *)helper;
  152. struct amdgpu_device *adev = rfbdev->adev;
  153. struct fb_info *info;
  154. struct drm_framebuffer *fb = NULL;
  155. struct drm_mode_fb_cmd2 mode_cmd;
  156. struct drm_gem_object *gobj = NULL;
  157. struct amdgpu_bo *rbo = NULL;
  158. int ret;
  159. unsigned long tmp;
  160. mode_cmd.width = sizes->surface_width;
  161. mode_cmd.height = sizes->surface_height;
  162. if (sizes->surface_bpp == 24)
  163. sizes->surface_bpp = 32;
  164. mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
  165. sizes->surface_depth);
  166. ret = amdgpufb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
  167. if (ret) {
  168. DRM_ERROR("failed to create fbcon object %d\n", ret);
  169. return ret;
  170. }
  171. rbo = gem_to_amdgpu_bo(gobj);
  172. /* okay we have an object now allocate the framebuffer */
  173. info = drm_fb_helper_alloc_fbi(helper);
  174. if (IS_ERR(info)) {
  175. ret = PTR_ERR(info);
  176. goto out_unref;
  177. }
  178. info->par = rfbdev;
  179. info->skip_vt_switch = true;
  180. ret = amdgpu_framebuffer_init(adev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
  181. if (ret) {
  182. DRM_ERROR("failed to initialize framebuffer %d\n", ret);
  183. goto out_destroy_fbi;
  184. }
  185. fb = &rfbdev->rfb.base;
  186. /* setup helper */
  187. rfbdev->helper.fb = fb;
  188. memset_io(rbo->kptr, 0x0, amdgpu_bo_size(rbo));
  189. strcpy(info->fix.id, "amdgpudrmfb");
  190. drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
  191. info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
  192. info->fbops = &amdgpufb_ops;
  193. tmp = amdgpu_bo_gpu_offset(rbo) - adev->mc.vram_start;
  194. info->fix.smem_start = adev->mc.aper_base + tmp;
  195. info->fix.smem_len = amdgpu_bo_size(rbo);
  196. info->screen_base = rbo->kptr;
  197. info->screen_size = amdgpu_bo_size(rbo);
  198. drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
  199. /* setup aperture base/size for vesafb takeover */
  200. info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base;
  201. info->apertures->ranges[0].size = adev->mc.aper_size;
  202. /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */
  203. if (info->screen_base == NULL) {
  204. ret = -ENOSPC;
  205. goto out_destroy_fbi;
  206. }
  207. DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
  208. DRM_INFO("vram apper at 0x%lX\n", (unsigned long)adev->mc.aper_base);
  209. DRM_INFO("size %lu\n", (unsigned long)amdgpu_bo_size(rbo));
  210. DRM_INFO("fb depth is %d\n", fb->depth);
  211. DRM_INFO(" pitch is %d\n", fb->pitches[0]);
  212. vga_switcheroo_client_fb_set(adev->ddev->pdev, info);
  213. return 0;
  214. out_destroy_fbi:
  215. drm_fb_helper_release_fbi(helper);
  216. out_unref:
  217. if (rbo) {
  218. }
  219. if (fb && ret) {
  220. drm_gem_object_unreference_unlocked(gobj);
  221. drm_framebuffer_unregister_private(fb);
  222. drm_framebuffer_cleanup(fb);
  223. kfree(fb);
  224. }
  225. return ret;
  226. }
  227. void amdgpu_fb_output_poll_changed(struct amdgpu_device *adev)
  228. {
  229. if (adev->mode_info.rfbdev)
  230. drm_fb_helper_hotplug_event(&adev->mode_info.rfbdev->helper);
  231. }
  232. static int amdgpu_fbdev_destroy(struct drm_device *dev, struct amdgpu_fbdev *rfbdev)
  233. {
  234. struct amdgpu_framebuffer *rfb = &rfbdev->rfb;
  235. drm_fb_helper_unregister_fbi(&rfbdev->helper);
  236. drm_fb_helper_release_fbi(&rfbdev->helper);
  237. if (rfb->obj) {
  238. amdgpufb_destroy_pinned_object(rfb->obj);
  239. rfb->obj = NULL;
  240. }
  241. drm_fb_helper_fini(&rfbdev->helper);
  242. drm_framebuffer_unregister_private(&rfb->base);
  243. drm_framebuffer_cleanup(&rfb->base);
  244. return 0;
  245. }
  246. /** Sets the color ramps on behalf of fbcon */
  247. static void amdgpu_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
  248. u16 blue, int regno)
  249. {
  250. struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
  251. amdgpu_crtc->lut_r[regno] = red >> 6;
  252. amdgpu_crtc->lut_g[regno] = green >> 6;
  253. amdgpu_crtc->lut_b[regno] = blue >> 6;
  254. }
  255. /** Gets the color ramps on behalf of fbcon */
  256. static void amdgpu_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
  257. u16 *blue, int regno)
  258. {
  259. struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
  260. *red = amdgpu_crtc->lut_r[regno] << 6;
  261. *green = amdgpu_crtc->lut_g[regno] << 6;
  262. *blue = amdgpu_crtc->lut_b[regno] << 6;
  263. }
  264. static const struct drm_fb_helper_funcs amdgpu_fb_helper_funcs = {
  265. .gamma_set = amdgpu_crtc_fb_gamma_set,
  266. .gamma_get = amdgpu_crtc_fb_gamma_get,
  267. .fb_probe = amdgpufb_create,
  268. };
  269. int amdgpu_fbdev_init(struct amdgpu_device *adev)
  270. {
  271. struct amdgpu_fbdev *rfbdev;
  272. int bpp_sel = 32;
  273. int ret;
  274. /* don't init fbdev on hw without DCE */
  275. if (!adev->mode_info.mode_config_initialized)
  276. return 0;
  277. /* don't init fbdev if there are no connectors */
  278. if (list_empty(&adev->ddev->mode_config.connector_list))
  279. return 0;
  280. /* select 8 bpp console on low vram cards */
  281. if (adev->mc.real_vram_size <= (32*1024*1024))
  282. bpp_sel = 8;
  283. rfbdev = kzalloc(sizeof(struct amdgpu_fbdev), GFP_KERNEL);
  284. if (!rfbdev)
  285. return -ENOMEM;
  286. rfbdev->adev = adev;
  287. adev->mode_info.rfbdev = rfbdev;
  288. drm_fb_helper_prepare(adev->ddev, &rfbdev->helper,
  289. &amdgpu_fb_helper_funcs);
  290. ret = drm_fb_helper_init(adev->ddev, &rfbdev->helper,
  291. adev->mode_info.num_crtc,
  292. AMDGPUFB_CONN_LIMIT);
  293. if (ret) {
  294. kfree(rfbdev);
  295. return ret;
  296. }
  297. drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
  298. /* disable all the possible outputs/crtcs before entering KMS mode */
  299. drm_helper_disable_unused_functions(adev->ddev);
  300. drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
  301. return 0;
  302. }
  303. void amdgpu_fbdev_fini(struct amdgpu_device *adev)
  304. {
  305. if (!adev->mode_info.rfbdev)
  306. return;
  307. amdgpu_fbdev_destroy(adev->ddev, adev->mode_info.rfbdev);
  308. kfree(adev->mode_info.rfbdev);
  309. adev->mode_info.rfbdev = NULL;
  310. }
  311. void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state)
  312. {
  313. if (adev->mode_info.rfbdev)
  314. drm_fb_helper_set_suspend(&adev->mode_info.rfbdev->helper,
  315. state);
  316. }
  317. int amdgpu_fbdev_total_size(struct amdgpu_device *adev)
  318. {
  319. struct amdgpu_bo *robj;
  320. int size = 0;
  321. if (!adev->mode_info.rfbdev)
  322. return 0;
  323. robj = gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.obj);
  324. size += amdgpu_bo_size(robj);
  325. return size;
  326. }
  327. bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj)
  328. {
  329. if (!adev->mode_info.rfbdev)
  330. return false;
  331. if (robj == gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.obj))
  332. return true;
  333. return false;
  334. }
  335. void amdgpu_fbdev_restore_mode(struct amdgpu_device *adev)
  336. {
  337. struct amdgpu_fbdev *afbdev = adev->mode_info.rfbdev;
  338. struct drm_fb_helper *fb_helper;
  339. int ret;
  340. if (!afbdev)
  341. return;
  342. fb_helper = &afbdev->helper;
  343. ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper);
  344. if (ret)
  345. DRM_DEBUG("failed to restore crtc mode\n");
  346. }