pm.c 3.9 KB

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  1. /* linux/arch/arm/plat-s3c24xx/pm.c
  2. *
  3. * Copyright (c) 2004-2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C24XX Power Manager (Suspend-To-RAM) support
  7. *
  8. * See Documentation/arm/Samsung-S3C24XX/Suspend.txt for more information
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. *
  24. * Parts based on arch/arm/mach-pxa/pm.c
  25. *
  26. * Thanks to Dimitry Andric for debugging
  27. */
  28. #include <linux/init.h>
  29. #include <linux/suspend.h>
  30. #include <linux/errno.h>
  31. #include <linux/time.h>
  32. #include <linux/gpio.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/serial_core.h>
  35. #include <linux/io.h>
  36. #include <plat/regs-serial.h>
  37. #include <mach/regs-clock.h>
  38. #include <mach/regs-gpio.h>
  39. #include <mach/regs-irq.h>
  40. #include <mach/gpio-samsung.h>
  41. #include <asm/mach/time.h>
  42. #include <plat/gpio-cfg.h>
  43. #include <plat/pm.h>
  44. #include "regs-mem.h"
  45. #define PFX "s3c24xx-pm: "
  46. static struct sleep_save core_save[] = {
  47. SAVE_ITEM(S3C2410_LOCKTIME),
  48. SAVE_ITEM(S3C2410_CLKCON),
  49. /* we restore the timings here, with the proviso that the board
  50. * brings the system up in an slower, or equal frequency setting
  51. * to the original system.
  52. *
  53. * if we cannot guarantee this, then things are going to go very
  54. * wrong here, as we modify the refresh and both pll settings.
  55. */
  56. SAVE_ITEM(S3C2410_BWSCON),
  57. SAVE_ITEM(S3C2410_BANKCON0),
  58. SAVE_ITEM(S3C2410_BANKCON1),
  59. SAVE_ITEM(S3C2410_BANKCON2),
  60. SAVE_ITEM(S3C2410_BANKCON3),
  61. SAVE_ITEM(S3C2410_BANKCON4),
  62. SAVE_ITEM(S3C2410_BANKCON5),
  63. #ifndef CONFIG_CPU_FREQ
  64. SAVE_ITEM(S3C2410_CLKDIVN),
  65. SAVE_ITEM(S3C2410_MPLLCON),
  66. SAVE_ITEM(S3C2410_REFRESH),
  67. #endif
  68. SAVE_ITEM(S3C2410_UPLLCON),
  69. SAVE_ITEM(S3C2410_CLKSLOW),
  70. };
  71. static struct sleep_save misc_save[] = {
  72. SAVE_ITEM(S3C2410_DCLKCON),
  73. };
  74. /* s3c_pm_check_resume_pin
  75. *
  76. * check to see if the pin is configured correctly for sleep mode, and
  77. * make any necessary adjustments if it is not
  78. */
  79. static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs)
  80. {
  81. unsigned long irqstate;
  82. unsigned long pinstate;
  83. int irq = gpio_to_irq(pin);
  84. if (irqoffs < 4)
  85. irqstate = s3c_irqwake_intmask & (1L<<irqoffs);
  86. else
  87. irqstate = s3c_irqwake_eintmask & (1L<<irqoffs);
  88. pinstate = s3c_gpio_getcfg(pin);
  89. if (!irqstate) {
  90. if (pinstate == S3C2410_GPIO_IRQ)
  91. S3C_PMDBG("Leaving IRQ %d (pin %d) as is\n", irq, pin);
  92. } else {
  93. if (pinstate == S3C2410_GPIO_IRQ) {
  94. S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin);
  95. s3c_gpio_cfgpin(pin, S3C2410_GPIO_INPUT);
  96. }
  97. }
  98. }
  99. /* s3c_pm_configure_extint
  100. *
  101. * configure all external interrupt pins
  102. */
  103. void s3c_pm_configure_extint(void)
  104. {
  105. int pin;
  106. /* for each of the external interrupts (EINT0..EINT15) we
  107. * need to check whether it is an external interrupt source,
  108. * and then configure it as an input if it is not
  109. */
  110. for (pin = S3C2410_GPF(0); pin <= S3C2410_GPF(7); pin++) {
  111. s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF(0));
  112. }
  113. for (pin = S3C2410_GPG(0); pin <= S3C2410_GPG(7); pin++) {
  114. s3c_pm_check_resume_pin(pin, (pin - S3C2410_GPG(0))+8);
  115. }
  116. }
  117. void s3c_pm_restore_core(void)
  118. {
  119. s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save));
  120. s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save));
  121. }
  122. void s3c_pm_save_core(void)
  123. {
  124. s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save));
  125. s3c_pm_do_save(core_save, ARRAY_SIZE(core_save));
  126. }