iwl-nvm-parse.c 27 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  10. * Copyright(c) 2016 Intel Deutschland GmbH
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of version 2 of the GNU General Public License as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  24. * USA
  25. *
  26. * The full GNU General Public License is included in this distribution
  27. * in the file called COPYING.
  28. *
  29. * Contact Information:
  30. * Intel Linux Wireless <linuxwifi@intel.com>
  31. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  32. *
  33. * BSD LICENSE
  34. *
  35. * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
  36. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  37. * All rights reserved.
  38. *
  39. * Redistribution and use in source and binary forms, with or without
  40. * modification, are permitted provided that the following conditions
  41. * are met:
  42. *
  43. * * Redistributions of source code must retain the above copyright
  44. * notice, this list of conditions and the following disclaimer.
  45. * * Redistributions in binary form must reproduce the above copyright
  46. * notice, this list of conditions and the following disclaimer in
  47. * the documentation and/or other materials provided with the
  48. * distribution.
  49. * * Neither the name Intel Corporation nor the names of its
  50. * contributors may be used to endorse or promote products derived
  51. * from this software without specific prior written permission.
  52. *
  53. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  56. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  57. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  58. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  59. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  60. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  61. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  62. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  63. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  64. *****************************************************************************/
  65. #include <linux/types.h>
  66. #include <linux/slab.h>
  67. #include <linux/export.h>
  68. #include <linux/etherdevice.h>
  69. #include <linux/pci.h>
  70. #include "iwl-drv.h"
  71. #include "iwl-modparams.h"
  72. #include "iwl-nvm-parse.h"
  73. #include "iwl-prph.h"
  74. /* NVM offsets (in words) definitions */
  75. enum wkp_nvm_offsets {
  76. /* NVM HW-Section offset (in words) definitions */
  77. HW_ADDR = 0x15,
  78. /* NVM SW-Section offset (in words) definitions */
  79. NVM_SW_SECTION = 0x1C0,
  80. NVM_VERSION = 0,
  81. RADIO_CFG = 1,
  82. SKU = 2,
  83. N_HW_ADDRS = 3,
  84. NVM_CHANNELS = 0x1E0 - NVM_SW_SECTION,
  85. /* NVM calibration section offset (in words) definitions */
  86. NVM_CALIB_SECTION = 0x2B8,
  87. XTAL_CALIB = 0x316 - NVM_CALIB_SECTION
  88. };
  89. enum family_8000_nvm_offsets {
  90. /* NVM HW-Section offset (in words) definitions */
  91. HW_ADDR0_WFPM_FAMILY_8000 = 0x12,
  92. HW_ADDR1_WFPM_FAMILY_8000 = 0x16,
  93. HW_ADDR0_PCIE_FAMILY_8000 = 0x8A,
  94. HW_ADDR1_PCIE_FAMILY_8000 = 0x8E,
  95. MAC_ADDRESS_OVERRIDE_FAMILY_8000 = 1,
  96. /* NVM SW-Section offset (in words) definitions */
  97. NVM_SW_SECTION_FAMILY_8000 = 0x1C0,
  98. NVM_VERSION_FAMILY_8000 = 0,
  99. RADIO_CFG_FAMILY_8000 = 0,
  100. SKU_FAMILY_8000 = 2,
  101. N_HW_ADDRS_FAMILY_8000 = 3,
  102. /* NVM REGULATORY -Section offset (in words) definitions */
  103. NVM_CHANNELS_FAMILY_8000 = 0,
  104. NVM_LAR_OFFSET_FAMILY_8000_OLD = 0x4C7,
  105. NVM_LAR_OFFSET_FAMILY_8000 = 0x507,
  106. NVM_LAR_ENABLED_FAMILY_8000 = 0x7,
  107. /* NVM calibration section offset (in words) definitions */
  108. NVM_CALIB_SECTION_FAMILY_8000 = 0x2B8,
  109. XTAL_CALIB_FAMILY_8000 = 0x316 - NVM_CALIB_SECTION_FAMILY_8000
  110. };
  111. /* SKU Capabilities (actual values from NVM definition) */
  112. enum nvm_sku_bits {
  113. NVM_SKU_CAP_BAND_24GHZ = BIT(0),
  114. NVM_SKU_CAP_BAND_52GHZ = BIT(1),
  115. NVM_SKU_CAP_11N_ENABLE = BIT(2),
  116. NVM_SKU_CAP_11AC_ENABLE = BIT(3),
  117. NVM_SKU_CAP_MIMO_DISABLE = BIT(5),
  118. };
  119. /*
  120. * These are the channel numbers in the order that they are stored in the NVM
  121. */
  122. static const u8 iwl_nvm_channels[] = {
  123. /* 2.4 GHz */
  124. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
  125. /* 5 GHz */
  126. 36, 40, 44 , 48, 52, 56, 60, 64,
  127. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
  128. 149, 153, 157, 161, 165
  129. };
  130. static const u8 iwl_nvm_channels_family_8000[] = {
  131. /* 2.4 GHz */
  132. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,
  133. /* 5 GHz */
  134. 36, 40, 44, 48, 52, 56, 60, 64, 68, 72, 76, 80, 84, 88, 92,
  135. 96, 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140, 144,
  136. 149, 153, 157, 161, 165, 169, 173, 177, 181
  137. };
  138. #define IWL_NUM_CHANNELS ARRAY_SIZE(iwl_nvm_channels)
  139. #define IWL_NUM_CHANNELS_FAMILY_8000 ARRAY_SIZE(iwl_nvm_channels_family_8000)
  140. #define NUM_2GHZ_CHANNELS 14
  141. #define NUM_2GHZ_CHANNELS_FAMILY_8000 14
  142. #define FIRST_2GHZ_HT_MINUS 5
  143. #define LAST_2GHZ_HT_PLUS 9
  144. #define LAST_5GHZ_HT 165
  145. #define LAST_5GHZ_HT_FAMILY_8000 181
  146. #define N_HW_ADDR_MASK 0xF
  147. /* rate data (static) */
  148. static struct ieee80211_rate iwl_cfg80211_rates[] = {
  149. { .bitrate = 1 * 10, .hw_value = 0, .hw_value_short = 0, },
  150. { .bitrate = 2 * 10, .hw_value = 1, .hw_value_short = 1,
  151. .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
  152. { .bitrate = 5.5 * 10, .hw_value = 2, .hw_value_short = 2,
  153. .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
  154. { .bitrate = 11 * 10, .hw_value = 3, .hw_value_short = 3,
  155. .flags = IEEE80211_RATE_SHORT_PREAMBLE, },
  156. { .bitrate = 6 * 10, .hw_value = 4, .hw_value_short = 4, },
  157. { .bitrate = 9 * 10, .hw_value = 5, .hw_value_short = 5, },
  158. { .bitrate = 12 * 10, .hw_value = 6, .hw_value_short = 6, },
  159. { .bitrate = 18 * 10, .hw_value = 7, .hw_value_short = 7, },
  160. { .bitrate = 24 * 10, .hw_value = 8, .hw_value_short = 8, },
  161. { .bitrate = 36 * 10, .hw_value = 9, .hw_value_short = 9, },
  162. { .bitrate = 48 * 10, .hw_value = 10, .hw_value_short = 10, },
  163. { .bitrate = 54 * 10, .hw_value = 11, .hw_value_short = 11, },
  164. };
  165. #define RATES_24_OFFS 0
  166. #define N_RATES_24 ARRAY_SIZE(iwl_cfg80211_rates)
  167. #define RATES_52_OFFS 4
  168. #define N_RATES_52 (N_RATES_24 - RATES_52_OFFS)
  169. /**
  170. * enum iwl_nvm_channel_flags - channel flags in NVM
  171. * @NVM_CHANNEL_VALID: channel is usable for this SKU/geo
  172. * @NVM_CHANNEL_IBSS: usable as an IBSS channel
  173. * @NVM_CHANNEL_ACTIVE: active scanning allowed
  174. * @NVM_CHANNEL_RADAR: radar detection required
  175. * @NVM_CHANNEL_INDOOR_ONLY: only indoor use is allowed
  176. * @NVM_CHANNEL_GO_CONCURRENT: GO operation is allowed when connected to BSS
  177. * on same channel on 2.4 or same UNII band on 5.2
  178. * @NVM_CHANNEL_WIDE: 20 MHz channel okay (?)
  179. * @NVM_CHANNEL_40MHZ: 40 MHz channel okay (?)
  180. * @NVM_CHANNEL_80MHZ: 80 MHz channel okay (?)
  181. * @NVM_CHANNEL_160MHZ: 160 MHz channel okay (?)
  182. */
  183. enum iwl_nvm_channel_flags {
  184. NVM_CHANNEL_VALID = BIT(0),
  185. NVM_CHANNEL_IBSS = BIT(1),
  186. NVM_CHANNEL_ACTIVE = BIT(3),
  187. NVM_CHANNEL_RADAR = BIT(4),
  188. NVM_CHANNEL_INDOOR_ONLY = BIT(5),
  189. NVM_CHANNEL_GO_CONCURRENT = BIT(6),
  190. NVM_CHANNEL_WIDE = BIT(8),
  191. NVM_CHANNEL_40MHZ = BIT(9),
  192. NVM_CHANNEL_80MHZ = BIT(10),
  193. NVM_CHANNEL_160MHZ = BIT(11),
  194. };
  195. #define CHECK_AND_PRINT_I(x) \
  196. ((ch_flags & NVM_CHANNEL_##x) ? # x " " : "")
  197. static u32 iwl_get_channel_flags(u8 ch_num, int ch_idx, bool is_5ghz,
  198. u16 nvm_flags, const struct iwl_cfg *cfg)
  199. {
  200. u32 flags = IEEE80211_CHAN_NO_HT40;
  201. u32 last_5ghz_ht = LAST_5GHZ_HT;
  202. if (cfg->device_family == IWL_DEVICE_FAMILY_8000)
  203. last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
  204. if (!is_5ghz && (nvm_flags & NVM_CHANNEL_40MHZ)) {
  205. if (ch_num <= LAST_2GHZ_HT_PLUS)
  206. flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
  207. if (ch_num >= FIRST_2GHZ_HT_MINUS)
  208. flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
  209. } else if (ch_num <= last_5ghz_ht && (nvm_flags & NVM_CHANNEL_40MHZ)) {
  210. if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
  211. flags &= ~IEEE80211_CHAN_NO_HT40PLUS;
  212. else
  213. flags &= ~IEEE80211_CHAN_NO_HT40MINUS;
  214. }
  215. if (!(nvm_flags & NVM_CHANNEL_80MHZ))
  216. flags |= IEEE80211_CHAN_NO_80MHZ;
  217. if (!(nvm_flags & NVM_CHANNEL_160MHZ))
  218. flags |= IEEE80211_CHAN_NO_160MHZ;
  219. if (!(nvm_flags & NVM_CHANNEL_IBSS))
  220. flags |= IEEE80211_CHAN_NO_IR;
  221. if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
  222. flags |= IEEE80211_CHAN_NO_IR;
  223. if (nvm_flags & NVM_CHANNEL_RADAR)
  224. flags |= IEEE80211_CHAN_RADAR;
  225. if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
  226. flags |= IEEE80211_CHAN_INDOOR_ONLY;
  227. /* Set the GO concurrent flag only in case that NO_IR is set.
  228. * Otherwise it is meaningless
  229. */
  230. if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
  231. (flags & IEEE80211_CHAN_NO_IR))
  232. flags |= IEEE80211_CHAN_IR_CONCURRENT;
  233. return flags;
  234. }
  235. static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg,
  236. struct iwl_nvm_data *data,
  237. const __le16 * const nvm_ch_flags,
  238. bool lar_supported)
  239. {
  240. int ch_idx;
  241. int n_channels = 0;
  242. struct ieee80211_channel *channel;
  243. u16 ch_flags;
  244. bool is_5ghz;
  245. int num_of_ch, num_2ghz_channels;
  246. const u8 *nvm_chan;
  247. if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
  248. num_of_ch = IWL_NUM_CHANNELS;
  249. nvm_chan = &iwl_nvm_channels[0];
  250. num_2ghz_channels = NUM_2GHZ_CHANNELS;
  251. } else {
  252. num_of_ch = IWL_NUM_CHANNELS_FAMILY_8000;
  253. nvm_chan = &iwl_nvm_channels_family_8000[0];
  254. num_2ghz_channels = NUM_2GHZ_CHANNELS_FAMILY_8000;
  255. }
  256. for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
  257. ch_flags = __le16_to_cpup(nvm_ch_flags + ch_idx);
  258. if (ch_idx >= num_2ghz_channels &&
  259. !data->sku_cap_band_52GHz_enable)
  260. continue;
  261. if (!lar_supported && !(ch_flags & NVM_CHANNEL_VALID)) {
  262. /*
  263. * Channels might become valid later if lar is
  264. * supported, hence we still want to add them to
  265. * the list of supported channels to cfg80211.
  266. */
  267. IWL_DEBUG_EEPROM(dev,
  268. "Ch. %d Flags %x [%sGHz] - No traffic\n",
  269. nvm_chan[ch_idx],
  270. ch_flags,
  271. (ch_idx >= num_2ghz_channels) ?
  272. "5.2" : "2.4");
  273. continue;
  274. }
  275. channel = &data->channels[n_channels];
  276. n_channels++;
  277. channel->hw_value = nvm_chan[ch_idx];
  278. channel->band = (ch_idx < num_2ghz_channels) ?
  279. IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  280. channel->center_freq =
  281. ieee80211_channel_to_frequency(
  282. channel->hw_value, channel->band);
  283. /* Initialize regulatory-based run-time data */
  284. /*
  285. * Default value - highest tx power value. max_power
  286. * is not used in mvm, and is used for backwards compatibility
  287. */
  288. channel->max_power = IWL_DEFAULT_MAX_TX_POWER;
  289. is_5ghz = channel->band == IEEE80211_BAND_5GHZ;
  290. /* don't put limitations in case we're using LAR */
  291. if (!lar_supported)
  292. channel->flags = iwl_get_channel_flags(nvm_chan[ch_idx],
  293. ch_idx, is_5ghz,
  294. ch_flags, cfg);
  295. else
  296. channel->flags = 0;
  297. IWL_DEBUG_EEPROM(dev,
  298. "Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x %ddBm): Ad-Hoc %ssupported\n",
  299. channel->hw_value,
  300. is_5ghz ? "5.2" : "2.4",
  301. CHECK_AND_PRINT_I(VALID),
  302. CHECK_AND_PRINT_I(IBSS),
  303. CHECK_AND_PRINT_I(ACTIVE),
  304. CHECK_AND_PRINT_I(RADAR),
  305. CHECK_AND_PRINT_I(WIDE),
  306. CHECK_AND_PRINT_I(INDOOR_ONLY),
  307. CHECK_AND_PRINT_I(GO_CONCURRENT),
  308. ch_flags,
  309. channel->max_power,
  310. ((ch_flags & NVM_CHANNEL_IBSS) &&
  311. !(ch_flags & NVM_CHANNEL_RADAR))
  312. ? "" : "not ");
  313. }
  314. return n_channels;
  315. }
  316. static void iwl_init_vht_hw_capab(const struct iwl_cfg *cfg,
  317. struct iwl_nvm_data *data,
  318. struct ieee80211_sta_vht_cap *vht_cap,
  319. u8 tx_chains, u8 rx_chains)
  320. {
  321. int num_rx_ants = num_of_ant(rx_chains);
  322. int num_tx_ants = num_of_ant(tx_chains);
  323. unsigned int max_ampdu_exponent = (cfg->max_vht_ampdu_exponent ?:
  324. IEEE80211_VHT_MAX_AMPDU_1024K);
  325. vht_cap->vht_supported = true;
  326. vht_cap->cap = IEEE80211_VHT_CAP_SHORT_GI_80 |
  327. IEEE80211_VHT_CAP_RXSTBC_1 |
  328. IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE |
  329. 3 << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT |
  330. max_ampdu_exponent <<
  331. IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_SHIFT;
  332. if (cfg->vht_mu_mimo_supported)
  333. vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE;
  334. if (cfg->ht_params->ldpc)
  335. vht_cap->cap |= IEEE80211_VHT_CAP_RXLDPC;
  336. if (data->sku_cap_mimo_disabled) {
  337. num_rx_ants = 1;
  338. num_tx_ants = 1;
  339. }
  340. if (num_tx_ants > 1)
  341. vht_cap->cap |= IEEE80211_VHT_CAP_TXSTBC;
  342. else
  343. vht_cap->cap |= IEEE80211_VHT_CAP_TX_ANTENNA_PATTERN;
  344. switch (iwlwifi_mod_params.amsdu_size) {
  345. case IWL_AMSDU_4K:
  346. vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895;
  347. break;
  348. case IWL_AMSDU_8K:
  349. vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991;
  350. break;
  351. case IWL_AMSDU_12K:
  352. vht_cap->cap |= IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454;
  353. break;
  354. default:
  355. break;
  356. }
  357. vht_cap->vht_mcs.rx_mcs_map =
  358. cpu_to_le16(IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
  359. IEEE80211_VHT_MCS_SUPPORT_0_9 << 2 |
  360. IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
  361. IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
  362. IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
  363. IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
  364. IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
  365. IEEE80211_VHT_MCS_NOT_SUPPORTED << 14);
  366. if (num_rx_ants == 1 || cfg->rx_with_siso_diversity) {
  367. vht_cap->cap |= IEEE80211_VHT_CAP_RX_ANTENNA_PATTERN;
  368. /* this works because NOT_SUPPORTED == 3 */
  369. vht_cap->vht_mcs.rx_mcs_map |=
  370. cpu_to_le16(IEEE80211_VHT_MCS_NOT_SUPPORTED << 2);
  371. }
  372. vht_cap->vht_mcs.tx_mcs_map = vht_cap->vht_mcs.rx_mcs_map;
  373. }
  374. static void iwl_init_sbands(struct device *dev, const struct iwl_cfg *cfg,
  375. struct iwl_nvm_data *data,
  376. const __le16 *ch_section,
  377. u8 tx_chains, u8 rx_chains, bool lar_supported)
  378. {
  379. int n_channels;
  380. int n_used = 0;
  381. struct ieee80211_supported_band *sband;
  382. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  383. n_channels = iwl_init_channel_map(
  384. dev, cfg, data,
  385. &ch_section[NVM_CHANNELS], lar_supported);
  386. else
  387. n_channels = iwl_init_channel_map(
  388. dev, cfg, data,
  389. &ch_section[NVM_CHANNELS_FAMILY_8000],
  390. lar_supported);
  391. sband = &data->bands[IEEE80211_BAND_2GHZ];
  392. sband->band = IEEE80211_BAND_2GHZ;
  393. sband->bitrates = &iwl_cfg80211_rates[RATES_24_OFFS];
  394. sband->n_bitrates = N_RATES_24;
  395. n_used += iwl_init_sband_channels(data, sband, n_channels,
  396. IEEE80211_BAND_2GHZ);
  397. iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_2GHZ,
  398. tx_chains, rx_chains);
  399. sband = &data->bands[IEEE80211_BAND_5GHZ];
  400. sband->band = IEEE80211_BAND_5GHZ;
  401. sband->bitrates = &iwl_cfg80211_rates[RATES_52_OFFS];
  402. sband->n_bitrates = N_RATES_52;
  403. n_used += iwl_init_sband_channels(data, sband, n_channels,
  404. IEEE80211_BAND_5GHZ);
  405. iwl_init_ht_hw_capab(cfg, data, &sband->ht_cap, IEEE80211_BAND_5GHZ,
  406. tx_chains, rx_chains);
  407. if (data->sku_cap_11ac_enable && !iwlwifi_mod_params.disable_11ac)
  408. iwl_init_vht_hw_capab(cfg, data, &sband->vht_cap,
  409. tx_chains, rx_chains);
  410. if (n_channels != n_used)
  411. IWL_ERR_DEV(dev, "NVM: used only %d of %d channels\n",
  412. n_used, n_channels);
  413. }
  414. static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
  415. const __le16 *phy_sku)
  416. {
  417. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  418. return le16_to_cpup(nvm_sw + SKU);
  419. return le32_to_cpup((__le32 *)(phy_sku + SKU_FAMILY_8000));
  420. }
  421. static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
  422. {
  423. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  424. return le16_to_cpup(nvm_sw + NVM_VERSION);
  425. else
  426. return le32_to_cpup((__le32 *)(nvm_sw +
  427. NVM_VERSION_FAMILY_8000));
  428. }
  429. static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw,
  430. const __le16 *phy_sku)
  431. {
  432. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  433. return le16_to_cpup(nvm_sw + RADIO_CFG);
  434. return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_8000));
  435. }
  436. static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw)
  437. {
  438. int n_hw_addr;
  439. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  440. return le16_to_cpup(nvm_sw + N_HW_ADDRS);
  441. n_hw_addr = le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000));
  442. return n_hw_addr & N_HW_ADDR_MASK;
  443. }
  444. static void iwl_set_radio_cfg(const struct iwl_cfg *cfg,
  445. struct iwl_nvm_data *data,
  446. u32 radio_cfg)
  447. {
  448. if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
  449. data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK(radio_cfg);
  450. data->radio_cfg_step = NVM_RF_CFG_STEP_MSK(radio_cfg);
  451. data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK(radio_cfg);
  452. data->radio_cfg_pnum = NVM_RF_CFG_PNUM_MSK(radio_cfg);
  453. return;
  454. }
  455. /* set the radio configuration for family 8000 */
  456. data->radio_cfg_type = NVM_RF_CFG_TYPE_MSK_FAMILY_8000(radio_cfg);
  457. data->radio_cfg_step = NVM_RF_CFG_STEP_MSK_FAMILY_8000(radio_cfg);
  458. data->radio_cfg_dash = NVM_RF_CFG_DASH_MSK_FAMILY_8000(radio_cfg);
  459. data->radio_cfg_pnum = NVM_RF_CFG_FLAVOR_MSK_FAMILY_8000(radio_cfg);
  460. data->valid_tx_ant = NVM_RF_CFG_TX_ANT_MSK_FAMILY_8000(radio_cfg);
  461. data->valid_rx_ant = NVM_RF_CFG_RX_ANT_MSK_FAMILY_8000(radio_cfg);
  462. }
  463. static void iwl_set_hw_address_family_8000(struct iwl_trans *trans,
  464. const struct iwl_cfg *cfg,
  465. struct iwl_nvm_data *data,
  466. const __le16 *mac_override,
  467. const __le16 *nvm_hw)
  468. {
  469. const u8 *hw_addr;
  470. if (mac_override) {
  471. static const u8 reserved_mac[] = {
  472. 0x02, 0xcc, 0xaa, 0xff, 0xee, 0x00
  473. };
  474. hw_addr = (const u8 *)(mac_override +
  475. MAC_ADDRESS_OVERRIDE_FAMILY_8000);
  476. /*
  477. * Store the MAC address from MAO section.
  478. * No byte swapping is required in MAO section
  479. */
  480. memcpy(data->hw_addr, hw_addr, ETH_ALEN);
  481. /*
  482. * Force the use of the OTP MAC address in case of reserved MAC
  483. * address in the NVM, or if address is given but invalid.
  484. */
  485. if (is_valid_ether_addr(data->hw_addr) &&
  486. memcmp(reserved_mac, hw_addr, ETH_ALEN) != 0)
  487. return;
  488. IWL_ERR(trans,
  489. "mac address from nvm override section is not valid\n");
  490. }
  491. if (nvm_hw) {
  492. /* read the mac address from WFMP registers */
  493. __le32 mac_addr0 = cpu_to_le32(iwl_trans_read_prph(trans,
  494. WFMP_MAC_ADDR_0));
  495. __le32 mac_addr1 = cpu_to_le32(iwl_trans_read_prph(trans,
  496. WFMP_MAC_ADDR_1));
  497. /* read the MAC address from HW resisters */
  498. hw_addr = (const u8 *)&mac_addr0;
  499. data->hw_addr[0] = hw_addr[3];
  500. data->hw_addr[1] = hw_addr[2];
  501. data->hw_addr[2] = hw_addr[1];
  502. data->hw_addr[3] = hw_addr[0];
  503. hw_addr = (const u8 *)&mac_addr1;
  504. data->hw_addr[4] = hw_addr[1];
  505. data->hw_addr[5] = hw_addr[0];
  506. if (!is_valid_ether_addr(data->hw_addr))
  507. IWL_ERR(trans,
  508. "mac address (%pM) from hw section is not valid\n",
  509. data->hw_addr);
  510. return;
  511. }
  512. IWL_ERR(trans, "mac address is not found\n");
  513. }
  514. static void iwl_set_hw_address(struct iwl_trans *trans,
  515. const struct iwl_cfg *cfg,
  516. struct iwl_nvm_data *data, const __le16 *nvm_hw,
  517. const __le16 *mac_override)
  518. {
  519. if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
  520. const u8 *hw_addr = (const u8 *)(nvm_hw + HW_ADDR);
  521. /* The byte order is little endian 16 bit, meaning 214365 */
  522. data->hw_addr[0] = hw_addr[1];
  523. data->hw_addr[1] = hw_addr[0];
  524. data->hw_addr[2] = hw_addr[3];
  525. data->hw_addr[3] = hw_addr[2];
  526. data->hw_addr[4] = hw_addr[5];
  527. data->hw_addr[5] = hw_addr[4];
  528. } else {
  529. iwl_set_hw_address_family_8000(trans, cfg, data,
  530. mac_override, nvm_hw);
  531. }
  532. }
  533. struct iwl_nvm_data *
  534. iwl_parse_nvm_data(struct iwl_trans *trans, const struct iwl_cfg *cfg,
  535. const __le16 *nvm_hw, const __le16 *nvm_sw,
  536. const __le16 *nvm_calib, const __le16 *regulatory,
  537. const __le16 *mac_override, const __le16 *phy_sku,
  538. u8 tx_chains, u8 rx_chains, bool lar_fw_supported)
  539. {
  540. struct device *dev = trans->dev;
  541. struct iwl_nvm_data *data;
  542. bool lar_enabled;
  543. u32 sku, radio_cfg;
  544. u16 lar_config;
  545. const __le16 *ch_section;
  546. if (cfg->device_family != IWL_DEVICE_FAMILY_8000)
  547. data = kzalloc(sizeof(*data) +
  548. sizeof(struct ieee80211_channel) *
  549. IWL_NUM_CHANNELS,
  550. GFP_KERNEL);
  551. else
  552. data = kzalloc(sizeof(*data) +
  553. sizeof(struct ieee80211_channel) *
  554. IWL_NUM_CHANNELS_FAMILY_8000,
  555. GFP_KERNEL);
  556. if (!data)
  557. return NULL;
  558. data->nvm_version = iwl_get_nvm_version(cfg, nvm_sw);
  559. radio_cfg = iwl_get_radio_cfg(cfg, nvm_sw, phy_sku);
  560. iwl_set_radio_cfg(cfg, data, radio_cfg);
  561. if (data->valid_tx_ant)
  562. tx_chains &= data->valid_tx_ant;
  563. if (data->valid_rx_ant)
  564. rx_chains &= data->valid_rx_ant;
  565. sku = iwl_get_sku(cfg, nvm_sw, phy_sku);
  566. data->sku_cap_band_24GHz_enable = sku & NVM_SKU_CAP_BAND_24GHZ;
  567. data->sku_cap_band_52GHz_enable = sku & NVM_SKU_CAP_BAND_52GHZ;
  568. data->sku_cap_11n_enable = sku & NVM_SKU_CAP_11N_ENABLE;
  569. if (iwlwifi_mod_params.disable_11n & IWL_DISABLE_HT_ALL)
  570. data->sku_cap_11n_enable = false;
  571. data->sku_cap_11ac_enable = data->sku_cap_11n_enable &&
  572. (sku & NVM_SKU_CAP_11AC_ENABLE);
  573. data->sku_cap_mimo_disabled = sku & NVM_SKU_CAP_MIMO_DISABLE;
  574. data->n_hw_addrs = iwl_get_n_hw_addrs(cfg, nvm_sw);
  575. if (cfg->device_family != IWL_DEVICE_FAMILY_8000) {
  576. /* Checking for required sections */
  577. if (!nvm_calib) {
  578. IWL_ERR(trans,
  579. "Can't parse empty Calib NVM sections\n");
  580. kfree(data);
  581. return NULL;
  582. }
  583. /* in family 8000 Xtal calibration values moved to OTP */
  584. data->xtal_calib[0] = *(nvm_calib + XTAL_CALIB);
  585. data->xtal_calib[1] = *(nvm_calib + XTAL_CALIB + 1);
  586. lar_enabled = true;
  587. ch_section = nvm_sw;
  588. } else {
  589. u16 lar_offset = data->nvm_version < 0xE39 ?
  590. NVM_LAR_OFFSET_FAMILY_8000_OLD :
  591. NVM_LAR_OFFSET_FAMILY_8000;
  592. lar_config = le16_to_cpup(regulatory + lar_offset);
  593. data->lar_enabled = !!(lar_config &
  594. NVM_LAR_ENABLED_FAMILY_8000);
  595. lar_enabled = data->lar_enabled;
  596. ch_section = regulatory;
  597. }
  598. iwl_set_hw_address(trans, cfg, data, nvm_hw, mac_override);
  599. iwl_init_sbands(dev, cfg, data, ch_section, tx_chains, rx_chains,
  600. lar_fw_supported && lar_enabled);
  601. data->calib_version = 255;
  602. return data;
  603. }
  604. IWL_EXPORT_SYMBOL(iwl_parse_nvm_data);
  605. static u32 iwl_nvm_get_regdom_bw_flags(const u8 *nvm_chan,
  606. int ch_idx, u16 nvm_flags,
  607. const struct iwl_cfg *cfg)
  608. {
  609. u32 flags = NL80211_RRF_NO_HT40;
  610. u32 last_5ghz_ht = LAST_5GHZ_HT;
  611. if (cfg->device_family == IWL_DEVICE_FAMILY_8000)
  612. last_5ghz_ht = LAST_5GHZ_HT_FAMILY_8000;
  613. if (ch_idx < NUM_2GHZ_CHANNELS &&
  614. (nvm_flags & NVM_CHANNEL_40MHZ)) {
  615. if (nvm_chan[ch_idx] <= LAST_2GHZ_HT_PLUS)
  616. flags &= ~NL80211_RRF_NO_HT40PLUS;
  617. if (nvm_chan[ch_idx] >= FIRST_2GHZ_HT_MINUS)
  618. flags &= ~NL80211_RRF_NO_HT40MINUS;
  619. } else if (nvm_chan[ch_idx] <= last_5ghz_ht &&
  620. (nvm_flags & NVM_CHANNEL_40MHZ)) {
  621. if ((ch_idx - NUM_2GHZ_CHANNELS) % 2 == 0)
  622. flags &= ~NL80211_RRF_NO_HT40PLUS;
  623. else
  624. flags &= ~NL80211_RRF_NO_HT40MINUS;
  625. }
  626. if (!(nvm_flags & NVM_CHANNEL_80MHZ))
  627. flags |= NL80211_RRF_NO_80MHZ;
  628. if (!(nvm_flags & NVM_CHANNEL_160MHZ))
  629. flags |= NL80211_RRF_NO_160MHZ;
  630. if (!(nvm_flags & NVM_CHANNEL_ACTIVE))
  631. flags |= NL80211_RRF_NO_IR;
  632. if (nvm_flags & NVM_CHANNEL_RADAR)
  633. flags |= NL80211_RRF_DFS;
  634. if (nvm_flags & NVM_CHANNEL_INDOOR_ONLY)
  635. flags |= NL80211_RRF_NO_OUTDOOR;
  636. /* Set the GO concurrent flag only in case that NO_IR is set.
  637. * Otherwise it is meaningless
  638. */
  639. if ((nvm_flags & NVM_CHANNEL_GO_CONCURRENT) &&
  640. (flags & NL80211_RRF_NO_IR))
  641. flags |= NL80211_RRF_GO_CONCURRENT;
  642. return flags;
  643. }
  644. struct ieee80211_regdomain *
  645. iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg,
  646. int num_of_ch, __le32 *channels, u16 fw_mcc)
  647. {
  648. int ch_idx;
  649. u16 ch_flags, prev_ch_flags = 0;
  650. const u8 *nvm_chan = cfg->device_family == IWL_DEVICE_FAMILY_8000 ?
  651. iwl_nvm_channels_family_8000 : iwl_nvm_channels;
  652. struct ieee80211_regdomain *regd;
  653. int size_of_regd;
  654. struct ieee80211_reg_rule *rule;
  655. enum ieee80211_band band;
  656. int center_freq, prev_center_freq = 0;
  657. int valid_rules = 0;
  658. bool new_rule;
  659. int max_num_ch = cfg->device_family == IWL_DEVICE_FAMILY_8000 ?
  660. IWL_NUM_CHANNELS_FAMILY_8000 : IWL_NUM_CHANNELS;
  661. if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES))
  662. return ERR_PTR(-EINVAL);
  663. if (WARN_ON(num_of_ch > max_num_ch))
  664. num_of_ch = max_num_ch;
  665. IWL_DEBUG_DEV(dev, IWL_DL_LAR, "building regdom for %d channels\n",
  666. num_of_ch);
  667. /* build a regdomain rule for every valid channel */
  668. size_of_regd =
  669. sizeof(struct ieee80211_regdomain) +
  670. num_of_ch * sizeof(struct ieee80211_reg_rule);
  671. regd = kzalloc(size_of_regd, GFP_KERNEL);
  672. if (!regd)
  673. return ERR_PTR(-ENOMEM);
  674. for (ch_idx = 0; ch_idx < num_of_ch; ch_idx++) {
  675. ch_flags = (u16)__le32_to_cpup(channels + ch_idx);
  676. band = (ch_idx < NUM_2GHZ_CHANNELS) ?
  677. IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  678. center_freq = ieee80211_channel_to_frequency(nvm_chan[ch_idx],
  679. band);
  680. new_rule = false;
  681. if (!(ch_flags & NVM_CHANNEL_VALID)) {
  682. IWL_DEBUG_DEV(dev, IWL_DL_LAR,
  683. "Ch. %d Flags %x [%sGHz] - No traffic\n",
  684. nvm_chan[ch_idx],
  685. ch_flags,
  686. (ch_idx >= NUM_2GHZ_CHANNELS) ?
  687. "5.2" : "2.4");
  688. continue;
  689. }
  690. /* we can't continue the same rule */
  691. if (ch_idx == 0 || prev_ch_flags != ch_flags ||
  692. center_freq - prev_center_freq > 20) {
  693. valid_rules++;
  694. new_rule = true;
  695. }
  696. rule = &regd->reg_rules[valid_rules - 1];
  697. if (new_rule)
  698. rule->freq_range.start_freq_khz =
  699. MHZ_TO_KHZ(center_freq - 10);
  700. rule->freq_range.end_freq_khz = MHZ_TO_KHZ(center_freq + 10);
  701. /* this doesn't matter - not used by FW */
  702. rule->power_rule.max_antenna_gain = DBI_TO_MBI(6);
  703. rule->power_rule.max_eirp =
  704. DBM_TO_MBM(IWL_DEFAULT_MAX_TX_POWER);
  705. rule->flags = iwl_nvm_get_regdom_bw_flags(nvm_chan, ch_idx,
  706. ch_flags, cfg);
  707. /* rely on auto-calculation to merge BW of contiguous chans */
  708. rule->flags |= NL80211_RRF_AUTO_BW;
  709. rule->freq_range.max_bandwidth_khz = 0;
  710. prev_ch_flags = ch_flags;
  711. prev_center_freq = center_freq;
  712. IWL_DEBUG_DEV(dev, IWL_DL_LAR,
  713. "Ch. %d [%sGHz] %s%s%s%s%s%s%s%s%s(0x%02x): Ad-Hoc %ssupported\n",
  714. center_freq,
  715. band == IEEE80211_BAND_5GHZ ? "5.2" : "2.4",
  716. CHECK_AND_PRINT_I(VALID),
  717. CHECK_AND_PRINT_I(ACTIVE),
  718. CHECK_AND_PRINT_I(RADAR),
  719. CHECK_AND_PRINT_I(WIDE),
  720. CHECK_AND_PRINT_I(40MHZ),
  721. CHECK_AND_PRINT_I(80MHZ),
  722. CHECK_AND_PRINT_I(160MHZ),
  723. CHECK_AND_PRINT_I(INDOOR_ONLY),
  724. CHECK_AND_PRINT_I(GO_CONCURRENT),
  725. ch_flags,
  726. ((ch_flags & NVM_CHANNEL_ACTIVE) &&
  727. !(ch_flags & NVM_CHANNEL_RADAR))
  728. ? "" : "not ");
  729. }
  730. regd->n_reg_rules = valid_rules;
  731. /* set alpha2 from FW. */
  732. regd->alpha2[0] = fw_mcc >> 8;
  733. regd->alpha2[1] = fw_mcc & 0xff;
  734. return regd;
  735. }
  736. IWL_EXPORT_SYMBOL(iwl_parse_nvm_mcc_info);