wmi.c 256 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/skbuff.h>
  18. #include <linux/ctype.h>
  19. #include "core.h"
  20. #include "htc.h"
  21. #include "debug.h"
  22. #include "wmi.h"
  23. #include "wmi-tlv.h"
  24. #include "mac.h"
  25. #include "testmode.h"
  26. #include "wmi-ops.h"
  27. #include "p2p.h"
  28. #include "hw.h"
  29. /* MAIN WMI cmd track */
  30. static struct wmi_cmd_map wmi_cmd_map = {
  31. .init_cmdid = WMI_INIT_CMDID,
  32. .start_scan_cmdid = WMI_START_SCAN_CMDID,
  33. .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
  34. .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
  35. .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
  36. .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
  37. .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
  38. .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
  39. .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
  40. .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
  41. .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
  42. .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
  43. .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
  44. .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
  45. .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
  46. .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  47. .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
  48. .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
  49. .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
  50. .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
  51. .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
  52. .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
  53. .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
  54. .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
  55. .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
  56. .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
  57. .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
  58. .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
  59. .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
  60. .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
  61. .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
  62. .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
  63. .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
  64. .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
  65. .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
  66. .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
  67. .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
  68. .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
  69. .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
  70. .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
  71. .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
  72. .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
  73. .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
  74. .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
  75. .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
  76. .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
  77. .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
  78. .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
  79. .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
  80. .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
  81. .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
  82. .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
  83. .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
  84. .roam_scan_mode = WMI_ROAM_SCAN_MODE,
  85. .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
  86. .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
  87. .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  88. .roam_ap_profile = WMI_ROAM_AP_PROFILE,
  89. .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
  90. .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
  91. .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
  92. .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
  93. .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
  94. .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
  95. .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
  96. .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
  97. .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
  98. .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
  99. .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
  100. .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
  101. .wlan_profile_set_hist_intvl_cmdid =
  102. WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  103. .wlan_profile_get_profile_data_cmdid =
  104. WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  105. .wlan_profile_enable_profile_id_cmdid =
  106. WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  107. .wlan_profile_list_profile_id_cmdid =
  108. WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  109. .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
  110. .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
  111. .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
  112. .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
  113. .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
  114. .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
  115. .wow_enable_disable_wake_event_cmdid =
  116. WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  117. .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
  118. .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  119. .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
  120. .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
  121. .vdev_spectral_scan_configure_cmdid =
  122. WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  123. .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  124. .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
  125. .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
  126. .network_list_offload_config_cmdid =
  127. WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
  128. .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
  129. .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
  130. .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
  131. .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
  132. .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
  133. .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
  134. .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
  135. .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
  136. .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
  137. .echo_cmdid = WMI_ECHO_CMDID,
  138. .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
  139. .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
  140. .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
  141. .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
  142. .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
  143. .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
  144. .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
  145. .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
  146. .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
  147. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  148. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  149. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  150. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  151. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  152. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  153. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  154. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  155. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  156. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  157. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  158. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  159. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  160. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  161. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  162. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  163. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  164. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  165. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  166. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  167. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  168. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  169. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  170. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  171. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  172. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  173. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  174. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  175. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  176. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  177. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  178. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  179. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  180. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  181. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  182. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  183. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  184. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  185. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  186. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  187. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  188. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  189. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  190. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  191. };
  192. /* 10.X WMI cmd track */
  193. static struct wmi_cmd_map wmi_10x_cmd_map = {
  194. .init_cmdid = WMI_10X_INIT_CMDID,
  195. .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
  196. .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
  197. .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
  198. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  199. .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
  200. .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
  201. .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
  202. .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
  203. .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
  204. .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
  205. .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
  206. .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
  207. .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
  208. .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
  209. .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  210. .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
  211. .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
  212. .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
  213. .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
  214. .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
  215. .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
  216. .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
  217. .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
  218. .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
  219. .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
  220. .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
  221. .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
  222. .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
  223. .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
  224. .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
  225. .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
  226. .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
  227. .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
  228. .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
  229. .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
  230. .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
  231. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  232. .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
  233. .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
  234. .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
  235. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  236. .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
  237. .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
  238. .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
  239. .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
  240. .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
  241. .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
  242. .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
  243. .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
  244. .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
  245. .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
  246. .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
  247. .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
  248. .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
  249. .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
  250. .roam_scan_rssi_change_threshold =
  251. WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  252. .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
  253. .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
  254. .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
  255. .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
  256. .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
  257. .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
  258. .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
  259. .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
  260. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  261. .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
  262. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  263. .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
  264. .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
  265. .wlan_profile_set_hist_intvl_cmdid =
  266. WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  267. .wlan_profile_get_profile_data_cmdid =
  268. WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  269. .wlan_profile_enable_profile_id_cmdid =
  270. WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  271. .wlan_profile_list_profile_id_cmdid =
  272. WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  273. .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
  274. .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
  275. .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
  276. .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
  277. .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
  278. .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
  279. .wow_enable_disable_wake_event_cmdid =
  280. WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  281. .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
  282. .wow_hostwakeup_from_sleep_cmdid =
  283. WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  284. .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
  285. .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
  286. .vdev_spectral_scan_configure_cmdid =
  287. WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  288. .vdev_spectral_scan_enable_cmdid =
  289. WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  290. .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
  291. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  292. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  293. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  294. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  295. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  296. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  297. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  298. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  299. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  300. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  301. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  302. .echo_cmdid = WMI_10X_ECHO_CMDID,
  303. .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
  304. .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
  305. .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
  306. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  307. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  308. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  309. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  310. .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
  311. .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
  312. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  313. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  314. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  315. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  316. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  317. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  318. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  319. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  320. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  321. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  322. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  323. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  324. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  325. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  326. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  327. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  328. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  329. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  330. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  331. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  332. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  333. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  334. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  335. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  336. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  337. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  338. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  339. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  340. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  341. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  342. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  343. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  344. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  345. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  346. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  347. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  348. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  349. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  350. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  351. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  352. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  353. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  354. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  355. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  356. };
  357. /* 10.2.4 WMI cmd track */
  358. static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
  359. .init_cmdid = WMI_10_2_INIT_CMDID,
  360. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  361. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  362. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  363. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  364. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  365. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  366. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  367. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  368. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  369. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  370. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  371. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  372. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  373. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  374. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  375. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  376. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  377. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  378. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  379. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  380. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  381. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  382. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  383. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  384. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  385. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  386. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  387. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  388. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  389. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  390. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  391. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  392. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  393. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  394. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  395. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  396. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  397. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  398. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  399. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  400. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  401. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  402. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  403. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  404. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  405. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  406. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  407. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  408. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  409. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  410. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  411. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  412. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  413. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  414. .roam_scan_rssi_change_threshold =
  415. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  416. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  417. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  418. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  419. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  420. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  421. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  422. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  423. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  424. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  425. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  426. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  427. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  428. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  429. .wlan_profile_set_hist_intvl_cmdid =
  430. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  431. .wlan_profile_get_profile_data_cmdid =
  432. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  433. .wlan_profile_enable_profile_id_cmdid =
  434. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  435. .wlan_profile_list_profile_id_cmdid =
  436. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  437. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  438. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  439. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  440. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  441. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  442. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  443. .wow_enable_disable_wake_event_cmdid =
  444. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  445. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  446. .wow_hostwakeup_from_sleep_cmdid =
  447. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  448. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  449. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  450. .vdev_spectral_scan_configure_cmdid =
  451. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  452. .vdev_spectral_scan_enable_cmdid =
  453. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  454. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  455. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  456. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  457. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  458. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  459. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  460. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  461. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  462. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  463. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  464. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  465. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  466. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  467. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  468. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  469. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  470. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  471. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  472. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  473. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  474. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  475. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  476. .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
  477. .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
  478. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  479. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  480. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  481. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  482. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  483. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  484. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  485. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  486. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  487. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  488. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  489. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  490. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  491. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  492. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  493. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  494. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  495. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  496. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  497. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  498. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  499. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  500. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  501. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  502. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  503. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  504. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  505. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  506. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  507. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  508. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  509. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  510. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  511. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  512. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  513. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  514. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  515. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  516. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  517. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  518. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  519. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  520. };
  521. /* 10.4 WMI cmd track */
  522. static struct wmi_cmd_map wmi_10_4_cmd_map = {
  523. .init_cmdid = WMI_10_4_INIT_CMDID,
  524. .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
  525. .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
  526. .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
  527. .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
  528. .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
  529. .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
  530. .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
  531. .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
  532. .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
  533. .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
  534. .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
  535. .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
  536. .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
  537. .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
  538. .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  539. .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
  540. .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
  541. .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
  542. .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
  543. .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
  544. .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
  545. .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
  546. .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
  547. .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
  548. .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
  549. .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
  550. .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
  551. .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
  552. .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
  553. .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
  554. .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
  555. .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
  556. .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
  557. .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
  558. .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
  559. .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
  560. .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
  561. .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
  562. .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
  563. .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
  564. .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
  565. .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
  566. .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
  567. .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
  568. .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
  569. .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
  570. .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
  571. .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
  572. .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
  573. .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
  574. .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
  575. .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
  576. .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
  577. .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
  578. .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
  579. .roam_scan_rssi_change_threshold =
  580. WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  581. .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
  582. .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
  583. .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
  584. .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
  585. .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
  586. .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
  587. .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
  588. .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
  589. .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
  590. .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
  591. .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
  592. .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
  593. .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
  594. .wlan_profile_set_hist_intvl_cmdid =
  595. WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  596. .wlan_profile_get_profile_data_cmdid =
  597. WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  598. .wlan_profile_enable_profile_id_cmdid =
  599. WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  600. .wlan_profile_list_profile_id_cmdid =
  601. WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  602. .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
  603. .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
  604. .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
  605. .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
  606. .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
  607. .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
  608. .wow_enable_disable_wake_event_cmdid =
  609. WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  610. .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
  611. .wow_hostwakeup_from_sleep_cmdid =
  612. WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  613. .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
  614. .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
  615. .vdev_spectral_scan_configure_cmdid =
  616. WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  617. .vdev_spectral_scan_enable_cmdid =
  618. WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  619. .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
  620. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  621. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  622. .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
  623. .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
  624. .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
  625. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  626. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  627. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  628. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  629. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  630. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  631. .echo_cmdid = WMI_10_4_ECHO_CMDID,
  632. .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
  633. .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
  634. .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
  635. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  636. .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
  637. .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
  638. .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
  639. .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
  640. .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
  641. .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
  642. .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
  643. .tdls_set_state_cmdid = WMI_CMD_UNSUPPORTED,
  644. .tdls_peer_update_cmdid = WMI_CMD_UNSUPPORTED,
  645. .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
  646. .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
  647. .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
  648. .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
  649. .wlan_peer_caching_add_peer_cmdid =
  650. WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
  651. .wlan_peer_caching_evict_peer_cmdid =
  652. WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
  653. .wlan_peer_caching_restore_peer_cmdid =
  654. WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
  655. .wlan_peer_caching_print_all_peers_info_cmdid =
  656. WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
  657. .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
  658. .peer_add_proxy_sta_entry_cmdid =
  659. WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
  660. .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
  661. .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
  662. .nan_cmdid = WMI_10_4_NAN_CMDID,
  663. .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
  664. .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
  665. .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
  666. .pdev_smart_ant_set_rx_antenna_cmdid =
  667. WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
  668. .peer_smart_ant_set_tx_antenna_cmdid =
  669. WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
  670. .peer_smart_ant_set_train_info_cmdid =
  671. WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
  672. .peer_smart_ant_set_node_config_ops_cmdid =
  673. WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
  674. .pdev_set_antenna_switch_table_cmdid =
  675. WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
  676. .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
  677. .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
  678. .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
  679. .pdev_ratepwr_chainmsk_table_cmdid =
  680. WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
  681. .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
  682. .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
  683. .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
  684. .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
  685. .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
  686. .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
  687. .pdev_get_ani_ofdm_config_cmdid =
  688. WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
  689. .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
  690. .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
  691. .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
  692. .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
  693. .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
  694. .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
  695. .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
  696. .vdev_filter_neighbor_rx_packets_cmdid =
  697. WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
  698. .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
  699. .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
  700. .pdev_bss_chan_info_request_cmdid =
  701. WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  702. };
  703. /* MAIN WMI VDEV param map */
  704. static struct wmi_vdev_param_map wmi_vdev_param_map = {
  705. .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
  706. .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  707. .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
  708. .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
  709. .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
  710. .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
  711. .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
  712. .preamble = WMI_VDEV_PARAM_PREAMBLE,
  713. .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
  714. .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
  715. .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
  716. .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
  717. .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
  718. .wmi_vdev_oc_scheduler_air_time_limit =
  719. WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  720. .wds = WMI_VDEV_PARAM_WDS,
  721. .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
  722. .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
  723. .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
  724. .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
  725. .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
  726. .chwidth = WMI_VDEV_PARAM_CHWIDTH,
  727. .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
  728. .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
  729. .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
  730. .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
  731. .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
  732. .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
  733. .sgi = WMI_VDEV_PARAM_SGI,
  734. .ldpc = WMI_VDEV_PARAM_LDPC,
  735. .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
  736. .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
  737. .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
  738. .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
  739. .nss = WMI_VDEV_PARAM_NSS,
  740. .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
  741. .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
  742. .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
  743. .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
  744. .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  745. .ap_keepalive_min_idle_inactive_time_secs =
  746. WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  747. .ap_keepalive_max_idle_inactive_time_secs =
  748. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  749. .ap_keepalive_max_unresponsive_time_secs =
  750. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  751. .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
  752. .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
  753. .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
  754. .txbf = WMI_VDEV_PARAM_TXBF,
  755. .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
  756. .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
  757. .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
  758. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  759. WMI_VDEV_PARAM_UNSUPPORTED,
  760. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  761. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  762. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  763. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  764. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  765. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  766. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  767. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  768. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  769. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  770. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  771. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  772. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  773. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  774. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  775. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  776. };
  777. /* 10.X WMI VDEV param map */
  778. static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
  779. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  780. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  781. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  782. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  783. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  784. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  785. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  786. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  787. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  788. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  789. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  790. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  791. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  792. .wmi_vdev_oc_scheduler_air_time_limit =
  793. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  794. .wds = WMI_10X_VDEV_PARAM_WDS,
  795. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  796. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  797. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  798. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  799. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  800. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  801. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  802. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  803. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  804. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  805. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  806. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  807. .sgi = WMI_10X_VDEV_PARAM_SGI,
  808. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  809. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  810. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  811. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  812. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  813. .nss = WMI_10X_VDEV_PARAM_NSS,
  814. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  815. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  816. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  817. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  818. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  819. .ap_keepalive_min_idle_inactive_time_secs =
  820. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  821. .ap_keepalive_max_idle_inactive_time_secs =
  822. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  823. .ap_keepalive_max_unresponsive_time_secs =
  824. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  825. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  826. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  827. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  828. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  829. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  830. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  831. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  832. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  833. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  834. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  835. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  836. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  837. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  838. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  839. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  840. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  841. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  842. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  843. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  844. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  845. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  846. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  847. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  848. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  849. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  850. };
  851. static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
  852. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  853. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  854. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  855. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  856. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  857. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  858. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  859. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  860. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  861. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  862. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  863. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  864. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  865. .wmi_vdev_oc_scheduler_air_time_limit =
  866. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  867. .wds = WMI_10X_VDEV_PARAM_WDS,
  868. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  869. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  870. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  871. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  872. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  873. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  874. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  875. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  876. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  877. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  878. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  879. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  880. .sgi = WMI_10X_VDEV_PARAM_SGI,
  881. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  882. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  883. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  884. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  885. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  886. .nss = WMI_10X_VDEV_PARAM_NSS,
  887. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  888. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  889. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  890. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  891. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  892. .ap_keepalive_min_idle_inactive_time_secs =
  893. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  894. .ap_keepalive_max_idle_inactive_time_secs =
  895. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  896. .ap_keepalive_max_unresponsive_time_secs =
  897. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  898. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  899. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  900. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  901. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  902. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  903. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  904. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  905. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  906. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  907. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  908. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  909. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  910. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  911. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  912. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  913. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  914. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  915. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  916. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  917. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  918. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  919. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  920. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  921. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  922. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  923. };
  924. static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
  925. .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
  926. .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  927. .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
  928. .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
  929. .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
  930. .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
  931. .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
  932. .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
  933. .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
  934. .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
  935. .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
  936. .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
  937. .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
  938. .wmi_vdev_oc_scheduler_air_time_limit =
  939. WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  940. .wds = WMI_10_4_VDEV_PARAM_WDS,
  941. .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
  942. .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
  943. .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
  944. .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
  945. .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
  946. .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
  947. .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
  948. .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
  949. .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
  950. .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
  951. .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
  952. .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
  953. .sgi = WMI_10_4_VDEV_PARAM_SGI,
  954. .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
  955. .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
  956. .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
  957. .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
  958. .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
  959. .nss = WMI_10_4_VDEV_PARAM_NSS,
  960. .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
  961. .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
  962. .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
  963. .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
  964. .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  965. .ap_keepalive_min_idle_inactive_time_secs =
  966. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  967. .ap_keepalive_max_idle_inactive_time_secs =
  968. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  969. .ap_keepalive_max_unresponsive_time_secs =
  970. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  971. .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
  972. .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
  973. .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
  974. .txbf = WMI_10_4_VDEV_PARAM_TXBF,
  975. .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
  976. .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
  977. .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
  978. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  979. WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  980. .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
  981. .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
  982. .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
  983. .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
  984. .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
  985. .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
  986. .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
  987. .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
  988. .early_rx_bmiss_sample_cycle =
  989. WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
  990. .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
  991. .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
  992. .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
  993. .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
  994. .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
  995. .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
  996. .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
  997. };
  998. static struct wmi_pdev_param_map wmi_pdev_param_map = {
  999. .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
  1000. .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
  1001. .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
  1002. .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
  1003. .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
  1004. .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
  1005. .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
  1006. .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1007. .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
  1008. .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
  1009. .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1010. .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
  1011. .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
  1012. .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1013. .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
  1014. .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1015. .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1016. .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1017. .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1018. .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1019. .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1020. .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
  1021. .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1022. .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
  1023. .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
  1024. .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1025. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1026. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1027. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1028. .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1029. .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1030. .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1031. .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1032. .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
  1033. .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
  1034. .dcs = WMI_PDEV_PARAM_DCS,
  1035. .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
  1036. .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
  1037. .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1038. .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
  1039. .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
  1040. .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
  1041. .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
  1042. .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
  1043. .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
  1044. .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1045. .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
  1046. .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1047. .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
  1048. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1049. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1050. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1051. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1052. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1053. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1054. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1055. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1056. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1057. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1058. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1059. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1060. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1061. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1062. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1063. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1064. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1065. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1066. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1067. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1068. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1069. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1070. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1071. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1072. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1073. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1074. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1075. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1076. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1077. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1078. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1079. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1080. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1081. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1082. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1083. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1084. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1085. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1086. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1087. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1088. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1089. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1090. };
  1091. static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
  1092. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1093. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1094. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1095. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1096. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1097. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1098. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1099. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1100. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1101. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1102. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1103. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1104. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1105. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1106. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1107. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1108. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1109. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1110. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1111. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1112. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1113. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1114. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1115. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1116. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1117. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1118. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1119. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1120. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1121. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1122. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1123. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1124. .bcnflt_stats_update_period =
  1125. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1126. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1127. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1128. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1129. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1130. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1131. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1132. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1133. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1134. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1135. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1136. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1137. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1138. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1139. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1140. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1141. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1142. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1143. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1144. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1145. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1146. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1147. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1148. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1149. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1150. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1151. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1152. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1153. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1154. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1155. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1156. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1157. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1158. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1159. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1160. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1161. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1162. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1163. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1164. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1165. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1166. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1167. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1168. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1169. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1170. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1171. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1172. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1173. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1174. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1175. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1176. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1177. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1178. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1179. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1180. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1181. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1182. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1183. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1184. };
  1185. static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
  1186. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1187. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1188. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1189. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1190. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1191. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1192. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1193. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1194. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1195. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1196. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1197. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1198. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1199. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1200. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1201. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1202. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1203. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1204. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1205. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1206. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1207. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1208. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1209. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1210. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1211. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1212. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1213. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1214. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1215. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1216. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1217. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1218. .bcnflt_stats_update_period =
  1219. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1220. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1221. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1222. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1223. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1224. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1225. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1226. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1227. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1228. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1229. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1230. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1231. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1232. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1233. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1234. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1235. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1236. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1237. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1238. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1239. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1240. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1241. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1242. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1243. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1244. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1245. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1246. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1247. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1248. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1249. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1250. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1251. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1252. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1253. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1254. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1255. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1256. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1257. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1258. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1259. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1260. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1261. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1262. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1263. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1264. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1265. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1266. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1267. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1268. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1269. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1270. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1271. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1272. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1273. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1274. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1275. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1276. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1277. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1278. };
  1279. /* firmware 10.2 specific mappings */
  1280. static struct wmi_cmd_map wmi_10_2_cmd_map = {
  1281. .init_cmdid = WMI_10_2_INIT_CMDID,
  1282. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  1283. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  1284. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  1285. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  1286. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  1287. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  1288. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  1289. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  1290. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  1291. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  1292. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  1293. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  1294. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  1295. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  1296. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  1297. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  1298. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  1299. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  1300. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  1301. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  1302. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  1303. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  1304. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  1305. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  1306. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  1307. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  1308. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  1309. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  1310. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  1311. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  1312. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  1313. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  1314. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  1315. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  1316. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  1317. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1318. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  1319. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  1320. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  1321. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1322. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  1323. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  1324. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  1325. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  1326. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  1327. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  1328. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  1329. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  1330. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  1331. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  1332. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  1333. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  1334. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  1335. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  1336. .roam_scan_rssi_change_threshold =
  1337. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  1338. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  1339. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  1340. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  1341. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  1342. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  1343. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  1344. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  1345. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  1346. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  1347. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  1348. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  1349. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  1350. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  1351. .wlan_profile_set_hist_intvl_cmdid =
  1352. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  1353. .wlan_profile_get_profile_data_cmdid =
  1354. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  1355. .wlan_profile_enable_profile_id_cmdid =
  1356. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  1357. .wlan_profile_list_profile_id_cmdid =
  1358. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  1359. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  1360. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  1361. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  1362. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  1363. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  1364. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  1365. .wow_enable_disable_wake_event_cmdid =
  1366. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  1367. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  1368. .wow_hostwakeup_from_sleep_cmdid =
  1369. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  1370. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  1371. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  1372. .vdev_spectral_scan_configure_cmdid =
  1373. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  1374. .vdev_spectral_scan_enable_cmdid =
  1375. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  1376. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  1377. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1378. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  1379. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1380. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1381. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  1382. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  1383. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  1384. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  1385. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  1386. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  1387. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  1388. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  1389. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  1390. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  1391. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  1392. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  1393. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1394. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1395. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  1396. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  1397. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  1398. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  1399. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  1400. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  1401. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  1402. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  1403. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1404. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1405. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1406. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  1407. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1408. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1409. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1410. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  1411. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  1412. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  1413. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  1414. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1415. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1416. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1417. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  1418. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  1419. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  1420. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  1421. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  1422. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  1423. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  1424. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  1425. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  1426. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  1427. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1428. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1429. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  1430. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  1431. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1432. };
  1433. static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
  1434. .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
  1435. .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
  1436. .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
  1437. .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
  1438. .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
  1439. .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
  1440. .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
  1441. .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1442. .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
  1443. .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
  1444. .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1445. .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
  1446. .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
  1447. .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1448. .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
  1449. .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1450. .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1451. .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1452. .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1453. .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1454. .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1455. .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
  1456. .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1457. .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
  1458. .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
  1459. .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1460. .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
  1461. .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1462. .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1463. .pdev_stats_update_period =
  1464. WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1465. .vdev_stats_update_period =
  1466. WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1467. .peer_stats_update_period =
  1468. WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1469. .bcnflt_stats_update_period =
  1470. WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1471. .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
  1472. .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
  1473. .dcs = WMI_10_4_PDEV_PARAM_DCS,
  1474. .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
  1475. .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
  1476. .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1477. .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
  1478. .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
  1479. .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
  1480. .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
  1481. .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
  1482. .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
  1483. .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
  1484. .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
  1485. .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
  1486. .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
  1487. .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
  1488. .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
  1489. .smart_antenna_default_antenna =
  1490. WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
  1491. .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
  1492. .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
  1493. .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
  1494. .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
  1495. .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
  1496. .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
  1497. .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
  1498. .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
  1499. .remove_mcast2ucast_buffer =
  1500. WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
  1501. .peer_sta_ps_statechg_enable =
  1502. WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
  1503. .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
  1504. .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
  1505. .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
  1506. .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
  1507. .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
  1508. .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
  1509. .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
  1510. .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
  1511. .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
  1512. .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
  1513. .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
  1514. .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
  1515. .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
  1516. .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
  1517. .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
  1518. .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
  1519. .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
  1520. .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
  1521. .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
  1522. .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
  1523. .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
  1524. .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
  1525. .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
  1526. .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
  1527. .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
  1528. .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
  1529. .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
  1530. .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
  1531. .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
  1532. };
  1533. static const struct wmi_peer_flags_map wmi_peer_flags_map = {
  1534. .auth = WMI_PEER_AUTH,
  1535. .qos = WMI_PEER_QOS,
  1536. .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
  1537. .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
  1538. .apsd = WMI_PEER_APSD,
  1539. .ht = WMI_PEER_HT,
  1540. .bw40 = WMI_PEER_40MHZ,
  1541. .stbc = WMI_PEER_STBC,
  1542. .ldbc = WMI_PEER_LDPC,
  1543. .dyn_mimops = WMI_PEER_DYN_MIMOPS,
  1544. .static_mimops = WMI_PEER_STATIC_MIMOPS,
  1545. .spatial_mux = WMI_PEER_SPATIAL_MUX,
  1546. .vht = WMI_PEER_VHT,
  1547. .bw80 = WMI_PEER_80MHZ,
  1548. .vht_2g = WMI_PEER_VHT_2G,
  1549. .pmf = WMI_PEER_PMF,
  1550. };
  1551. static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
  1552. .auth = WMI_10X_PEER_AUTH,
  1553. .qos = WMI_10X_PEER_QOS,
  1554. .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
  1555. .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
  1556. .apsd = WMI_10X_PEER_APSD,
  1557. .ht = WMI_10X_PEER_HT,
  1558. .bw40 = WMI_10X_PEER_40MHZ,
  1559. .stbc = WMI_10X_PEER_STBC,
  1560. .ldbc = WMI_10X_PEER_LDPC,
  1561. .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
  1562. .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
  1563. .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
  1564. .vht = WMI_10X_PEER_VHT,
  1565. .bw80 = WMI_10X_PEER_80MHZ,
  1566. };
  1567. static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
  1568. .auth = WMI_10_2_PEER_AUTH,
  1569. .qos = WMI_10_2_PEER_QOS,
  1570. .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
  1571. .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
  1572. .apsd = WMI_10_2_PEER_APSD,
  1573. .ht = WMI_10_2_PEER_HT,
  1574. .bw40 = WMI_10_2_PEER_40MHZ,
  1575. .stbc = WMI_10_2_PEER_STBC,
  1576. .ldbc = WMI_10_2_PEER_LDPC,
  1577. .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
  1578. .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
  1579. .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
  1580. .vht = WMI_10_2_PEER_VHT,
  1581. .bw80 = WMI_10_2_PEER_80MHZ,
  1582. .vht_2g = WMI_10_2_PEER_VHT_2G,
  1583. .pmf = WMI_10_2_PEER_PMF,
  1584. };
  1585. void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
  1586. const struct wmi_channel_arg *arg)
  1587. {
  1588. u32 flags = 0;
  1589. memset(ch, 0, sizeof(*ch));
  1590. if (arg->passive)
  1591. flags |= WMI_CHAN_FLAG_PASSIVE;
  1592. if (arg->allow_ibss)
  1593. flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
  1594. if (arg->allow_ht)
  1595. flags |= WMI_CHAN_FLAG_ALLOW_HT;
  1596. if (arg->allow_vht)
  1597. flags |= WMI_CHAN_FLAG_ALLOW_VHT;
  1598. if (arg->ht40plus)
  1599. flags |= WMI_CHAN_FLAG_HT40_PLUS;
  1600. if (arg->chan_radar)
  1601. flags |= WMI_CHAN_FLAG_DFS;
  1602. ch->mhz = __cpu_to_le32(arg->freq);
  1603. ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
  1604. ch->band_center_freq2 = 0;
  1605. ch->min_power = arg->min_power;
  1606. ch->max_power = arg->max_power;
  1607. ch->reg_power = arg->max_reg_power;
  1608. ch->antenna_max = arg->max_antenna_gain;
  1609. /* mode & flags share storage */
  1610. ch->mode = arg->mode;
  1611. ch->flags |= __cpu_to_le32(flags);
  1612. }
  1613. int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
  1614. {
  1615. unsigned long time_left;
  1616. time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
  1617. WMI_SERVICE_READY_TIMEOUT_HZ);
  1618. if (!time_left)
  1619. return -ETIMEDOUT;
  1620. return 0;
  1621. }
  1622. int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
  1623. {
  1624. unsigned long time_left;
  1625. time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
  1626. WMI_UNIFIED_READY_TIMEOUT_HZ);
  1627. if (!time_left)
  1628. return -ETIMEDOUT;
  1629. return 0;
  1630. }
  1631. struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
  1632. {
  1633. struct sk_buff *skb;
  1634. u32 round_len = roundup(len, 4);
  1635. skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
  1636. if (!skb)
  1637. return NULL;
  1638. skb_reserve(skb, WMI_SKB_HEADROOM);
  1639. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1640. ath10k_warn(ar, "Unaligned WMI skb\n");
  1641. skb_put(skb, round_len);
  1642. memset(skb->data, 0, round_len);
  1643. return skb;
  1644. }
  1645. static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  1646. {
  1647. dev_kfree_skb(skb);
  1648. }
  1649. int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
  1650. u32 cmd_id)
  1651. {
  1652. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
  1653. struct wmi_cmd_hdr *cmd_hdr;
  1654. int ret;
  1655. u32 cmd = 0;
  1656. if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  1657. return -ENOMEM;
  1658. cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
  1659. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  1660. cmd_hdr->cmd_id = __cpu_to_le32(cmd);
  1661. memset(skb_cb, 0, sizeof(*skb_cb));
  1662. ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
  1663. trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
  1664. if (ret)
  1665. goto err_pull;
  1666. return 0;
  1667. err_pull:
  1668. skb_pull(skb, sizeof(struct wmi_cmd_hdr));
  1669. return ret;
  1670. }
  1671. static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
  1672. {
  1673. struct ath10k *ar = arvif->ar;
  1674. struct ath10k_skb_cb *cb;
  1675. struct sk_buff *bcn;
  1676. bool dtim_zero;
  1677. bool deliver_cab;
  1678. int ret;
  1679. spin_lock_bh(&ar->data_lock);
  1680. bcn = arvif->beacon;
  1681. if (!bcn)
  1682. goto unlock;
  1683. cb = ATH10K_SKB_CB(bcn);
  1684. switch (arvif->beacon_state) {
  1685. case ATH10K_BEACON_SENDING:
  1686. case ATH10K_BEACON_SENT:
  1687. break;
  1688. case ATH10K_BEACON_SCHEDULED:
  1689. arvif->beacon_state = ATH10K_BEACON_SENDING;
  1690. spin_unlock_bh(&ar->data_lock);
  1691. dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
  1692. deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
  1693. ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
  1694. arvif->vdev_id,
  1695. bcn->data, bcn->len,
  1696. cb->paddr,
  1697. dtim_zero,
  1698. deliver_cab);
  1699. spin_lock_bh(&ar->data_lock);
  1700. if (ret == 0)
  1701. arvif->beacon_state = ATH10K_BEACON_SENT;
  1702. else
  1703. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  1704. }
  1705. unlock:
  1706. spin_unlock_bh(&ar->data_lock);
  1707. }
  1708. static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
  1709. struct ieee80211_vif *vif)
  1710. {
  1711. struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
  1712. ath10k_wmi_tx_beacon_nowait(arvif);
  1713. }
  1714. static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
  1715. {
  1716. ieee80211_iterate_active_interfaces_atomic(ar->hw,
  1717. IEEE80211_IFACE_ITER_NORMAL,
  1718. ath10k_wmi_tx_beacons_iter,
  1719. NULL);
  1720. }
  1721. static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
  1722. {
  1723. /* try to send pending beacons first. they take priority */
  1724. ath10k_wmi_tx_beacons_nowait(ar);
  1725. wake_up(&ar->wmi.tx_credits_wq);
  1726. }
  1727. int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
  1728. {
  1729. int ret = -EOPNOTSUPP;
  1730. might_sleep();
  1731. if (cmd_id == WMI_CMD_UNSUPPORTED) {
  1732. ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
  1733. cmd_id);
  1734. return ret;
  1735. }
  1736. wait_event_timeout(ar->wmi.tx_credits_wq, ({
  1737. /* try to send pending beacons first. they take priority */
  1738. ath10k_wmi_tx_beacons_nowait(ar);
  1739. ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
  1740. if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
  1741. ret = -ESHUTDOWN;
  1742. (ret != -EAGAIN);
  1743. }), 3*HZ);
  1744. if (ret)
  1745. dev_kfree_skb_any(skb);
  1746. return ret;
  1747. }
  1748. static struct sk_buff *
  1749. ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
  1750. {
  1751. struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
  1752. struct ath10k_vif *arvif = (void *)cb->vif->drv_priv;
  1753. struct wmi_mgmt_tx_cmd *cmd;
  1754. struct ieee80211_hdr *hdr;
  1755. struct sk_buff *skb;
  1756. int len;
  1757. u32 vdev_id;
  1758. u32 buf_len = msdu->len;
  1759. u16 fc;
  1760. hdr = (struct ieee80211_hdr *)msdu->data;
  1761. fc = le16_to_cpu(hdr->frame_control);
  1762. if (cb->vif)
  1763. vdev_id = arvif->vdev_id;
  1764. else
  1765. vdev_id = 0;
  1766. if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
  1767. return ERR_PTR(-EINVAL);
  1768. len = sizeof(cmd->hdr) + msdu->len;
  1769. if ((ieee80211_is_action(hdr->frame_control) ||
  1770. ieee80211_is_deauth(hdr->frame_control) ||
  1771. ieee80211_is_disassoc(hdr->frame_control)) &&
  1772. ieee80211_has_protected(hdr->frame_control)) {
  1773. len += IEEE80211_CCMP_MIC_LEN;
  1774. buf_len += IEEE80211_CCMP_MIC_LEN;
  1775. }
  1776. len = round_up(len, 4);
  1777. skb = ath10k_wmi_alloc_skb(ar, len);
  1778. if (!skb)
  1779. return ERR_PTR(-ENOMEM);
  1780. cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
  1781. cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
  1782. cmd->hdr.tx_rate = 0;
  1783. cmd->hdr.tx_power = 0;
  1784. cmd->hdr.buf_len = __cpu_to_le32(buf_len);
  1785. ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
  1786. memcpy(cmd->buf, msdu->data, msdu->len);
  1787. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
  1788. msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
  1789. fc & IEEE80211_FCTL_STYPE);
  1790. trace_ath10k_tx_hdr(ar, skb->data, skb->len);
  1791. trace_ath10k_tx_payload(ar, skb->data, skb->len);
  1792. return skb;
  1793. }
  1794. static void ath10k_wmi_event_scan_started(struct ath10k *ar)
  1795. {
  1796. lockdep_assert_held(&ar->data_lock);
  1797. switch (ar->scan.state) {
  1798. case ATH10K_SCAN_IDLE:
  1799. case ATH10K_SCAN_RUNNING:
  1800. case ATH10K_SCAN_ABORTING:
  1801. ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
  1802. ath10k_scan_state_str(ar->scan.state),
  1803. ar->scan.state);
  1804. break;
  1805. case ATH10K_SCAN_STARTING:
  1806. ar->scan.state = ATH10K_SCAN_RUNNING;
  1807. if (ar->scan.is_roc)
  1808. ieee80211_ready_on_channel(ar->hw);
  1809. complete(&ar->scan.started);
  1810. break;
  1811. }
  1812. }
  1813. static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
  1814. {
  1815. lockdep_assert_held(&ar->data_lock);
  1816. switch (ar->scan.state) {
  1817. case ATH10K_SCAN_IDLE:
  1818. case ATH10K_SCAN_RUNNING:
  1819. case ATH10K_SCAN_ABORTING:
  1820. ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
  1821. ath10k_scan_state_str(ar->scan.state),
  1822. ar->scan.state);
  1823. break;
  1824. case ATH10K_SCAN_STARTING:
  1825. complete(&ar->scan.started);
  1826. __ath10k_scan_finish(ar);
  1827. break;
  1828. }
  1829. }
  1830. static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
  1831. {
  1832. lockdep_assert_held(&ar->data_lock);
  1833. switch (ar->scan.state) {
  1834. case ATH10K_SCAN_IDLE:
  1835. case ATH10K_SCAN_STARTING:
  1836. /* One suspected reason scan can be completed while starting is
  1837. * if firmware fails to deliver all scan events to the host,
  1838. * e.g. when transport pipe is full. This has been observed
  1839. * with spectral scan phyerr events starving wmi transport
  1840. * pipe. In such case the "scan completed" event should be (and
  1841. * is) ignored by the host as it may be just firmware's scan
  1842. * state machine recovering.
  1843. */
  1844. ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
  1845. ath10k_scan_state_str(ar->scan.state),
  1846. ar->scan.state);
  1847. break;
  1848. case ATH10K_SCAN_RUNNING:
  1849. case ATH10K_SCAN_ABORTING:
  1850. __ath10k_scan_finish(ar);
  1851. break;
  1852. }
  1853. }
  1854. static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
  1855. {
  1856. lockdep_assert_held(&ar->data_lock);
  1857. switch (ar->scan.state) {
  1858. case ATH10K_SCAN_IDLE:
  1859. case ATH10K_SCAN_STARTING:
  1860. ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
  1861. ath10k_scan_state_str(ar->scan.state),
  1862. ar->scan.state);
  1863. break;
  1864. case ATH10K_SCAN_RUNNING:
  1865. case ATH10K_SCAN_ABORTING:
  1866. ar->scan_channel = NULL;
  1867. break;
  1868. }
  1869. }
  1870. static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
  1871. {
  1872. lockdep_assert_held(&ar->data_lock);
  1873. switch (ar->scan.state) {
  1874. case ATH10K_SCAN_IDLE:
  1875. case ATH10K_SCAN_STARTING:
  1876. ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
  1877. ath10k_scan_state_str(ar->scan.state),
  1878. ar->scan.state);
  1879. break;
  1880. case ATH10K_SCAN_RUNNING:
  1881. case ATH10K_SCAN_ABORTING:
  1882. ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
  1883. if (ar->scan.is_roc && ar->scan.roc_freq == freq)
  1884. complete(&ar->scan.on_channel);
  1885. break;
  1886. }
  1887. }
  1888. static const char *
  1889. ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
  1890. enum wmi_scan_completion_reason reason)
  1891. {
  1892. switch (type) {
  1893. case WMI_SCAN_EVENT_STARTED:
  1894. return "started";
  1895. case WMI_SCAN_EVENT_COMPLETED:
  1896. switch (reason) {
  1897. case WMI_SCAN_REASON_COMPLETED:
  1898. return "completed";
  1899. case WMI_SCAN_REASON_CANCELLED:
  1900. return "completed [cancelled]";
  1901. case WMI_SCAN_REASON_PREEMPTED:
  1902. return "completed [preempted]";
  1903. case WMI_SCAN_REASON_TIMEDOUT:
  1904. return "completed [timedout]";
  1905. case WMI_SCAN_REASON_INTERNAL_FAILURE:
  1906. return "completed [internal err]";
  1907. case WMI_SCAN_REASON_MAX:
  1908. break;
  1909. }
  1910. return "completed [unknown]";
  1911. case WMI_SCAN_EVENT_BSS_CHANNEL:
  1912. return "bss channel";
  1913. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  1914. return "foreign channel";
  1915. case WMI_SCAN_EVENT_DEQUEUED:
  1916. return "dequeued";
  1917. case WMI_SCAN_EVENT_PREEMPTED:
  1918. return "preempted";
  1919. case WMI_SCAN_EVENT_START_FAILED:
  1920. return "start failed";
  1921. case WMI_SCAN_EVENT_RESTARTED:
  1922. return "restarted";
  1923. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  1924. return "foreign channel exit";
  1925. default:
  1926. return "unknown";
  1927. }
  1928. }
  1929. static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
  1930. struct wmi_scan_ev_arg *arg)
  1931. {
  1932. struct wmi_scan_event *ev = (void *)skb->data;
  1933. if (skb->len < sizeof(*ev))
  1934. return -EPROTO;
  1935. skb_pull(skb, sizeof(*ev));
  1936. arg->event_type = ev->event_type;
  1937. arg->reason = ev->reason;
  1938. arg->channel_freq = ev->channel_freq;
  1939. arg->scan_req_id = ev->scan_req_id;
  1940. arg->scan_id = ev->scan_id;
  1941. arg->vdev_id = ev->vdev_id;
  1942. return 0;
  1943. }
  1944. int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
  1945. {
  1946. struct wmi_scan_ev_arg arg = {};
  1947. enum wmi_scan_event_type event_type;
  1948. enum wmi_scan_completion_reason reason;
  1949. u32 freq;
  1950. u32 req_id;
  1951. u32 scan_id;
  1952. u32 vdev_id;
  1953. int ret;
  1954. ret = ath10k_wmi_pull_scan(ar, skb, &arg);
  1955. if (ret) {
  1956. ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
  1957. return ret;
  1958. }
  1959. event_type = __le32_to_cpu(arg.event_type);
  1960. reason = __le32_to_cpu(arg.reason);
  1961. freq = __le32_to_cpu(arg.channel_freq);
  1962. req_id = __le32_to_cpu(arg.scan_req_id);
  1963. scan_id = __le32_to_cpu(arg.scan_id);
  1964. vdev_id = __le32_to_cpu(arg.vdev_id);
  1965. spin_lock_bh(&ar->data_lock);
  1966. ath10k_dbg(ar, ATH10K_DBG_WMI,
  1967. "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
  1968. ath10k_wmi_event_scan_type_str(event_type, reason),
  1969. event_type, reason, freq, req_id, scan_id, vdev_id,
  1970. ath10k_scan_state_str(ar->scan.state), ar->scan.state);
  1971. switch (event_type) {
  1972. case WMI_SCAN_EVENT_STARTED:
  1973. ath10k_wmi_event_scan_started(ar);
  1974. break;
  1975. case WMI_SCAN_EVENT_COMPLETED:
  1976. ath10k_wmi_event_scan_completed(ar);
  1977. break;
  1978. case WMI_SCAN_EVENT_BSS_CHANNEL:
  1979. ath10k_wmi_event_scan_bss_chan(ar);
  1980. break;
  1981. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  1982. ath10k_wmi_event_scan_foreign_chan(ar, freq);
  1983. break;
  1984. case WMI_SCAN_EVENT_START_FAILED:
  1985. ath10k_warn(ar, "received scan start failure event\n");
  1986. ath10k_wmi_event_scan_start_failed(ar);
  1987. break;
  1988. case WMI_SCAN_EVENT_DEQUEUED:
  1989. case WMI_SCAN_EVENT_PREEMPTED:
  1990. case WMI_SCAN_EVENT_RESTARTED:
  1991. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  1992. default:
  1993. break;
  1994. }
  1995. spin_unlock_bh(&ar->data_lock);
  1996. return 0;
  1997. }
  1998. static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
  1999. {
  2000. enum ieee80211_band band;
  2001. switch (phy_mode) {
  2002. case MODE_11A:
  2003. case MODE_11NA_HT20:
  2004. case MODE_11NA_HT40:
  2005. case MODE_11AC_VHT20:
  2006. case MODE_11AC_VHT40:
  2007. case MODE_11AC_VHT80:
  2008. band = IEEE80211_BAND_5GHZ;
  2009. break;
  2010. case MODE_11G:
  2011. case MODE_11B:
  2012. case MODE_11GONLY:
  2013. case MODE_11NG_HT20:
  2014. case MODE_11NG_HT40:
  2015. case MODE_11AC_VHT20_2G:
  2016. case MODE_11AC_VHT40_2G:
  2017. case MODE_11AC_VHT80_2G:
  2018. default:
  2019. band = IEEE80211_BAND_2GHZ;
  2020. }
  2021. return band;
  2022. }
  2023. /* If keys are configured, HW decrypts all frames
  2024. * with protected bit set. Mark such frames as decrypted.
  2025. */
  2026. static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
  2027. struct sk_buff *skb,
  2028. struct ieee80211_rx_status *status)
  2029. {
  2030. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2031. unsigned int hdrlen;
  2032. bool peer_key;
  2033. u8 *addr, keyidx;
  2034. if (!ieee80211_is_auth(hdr->frame_control) ||
  2035. !ieee80211_has_protected(hdr->frame_control))
  2036. return;
  2037. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  2038. if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
  2039. return;
  2040. keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
  2041. addr = ieee80211_get_SA(hdr);
  2042. spin_lock_bh(&ar->data_lock);
  2043. peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
  2044. spin_unlock_bh(&ar->data_lock);
  2045. if (peer_key) {
  2046. ath10k_dbg(ar, ATH10K_DBG_MAC,
  2047. "mac wep key present for peer %pM\n", addr);
  2048. status->flag |= RX_FLAG_DECRYPTED;
  2049. }
  2050. }
  2051. static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
  2052. struct wmi_mgmt_rx_ev_arg *arg)
  2053. {
  2054. struct wmi_mgmt_rx_event_v1 *ev_v1;
  2055. struct wmi_mgmt_rx_event_v2 *ev_v2;
  2056. struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
  2057. size_t pull_len;
  2058. u32 msdu_len;
  2059. if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
  2060. ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
  2061. ev_hdr = &ev_v2->hdr.v1;
  2062. pull_len = sizeof(*ev_v2);
  2063. } else {
  2064. ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
  2065. ev_hdr = &ev_v1->hdr;
  2066. pull_len = sizeof(*ev_v1);
  2067. }
  2068. if (skb->len < pull_len)
  2069. return -EPROTO;
  2070. skb_pull(skb, pull_len);
  2071. arg->channel = ev_hdr->channel;
  2072. arg->buf_len = ev_hdr->buf_len;
  2073. arg->status = ev_hdr->status;
  2074. arg->snr = ev_hdr->snr;
  2075. arg->phy_mode = ev_hdr->phy_mode;
  2076. arg->rate = ev_hdr->rate;
  2077. msdu_len = __le32_to_cpu(arg->buf_len);
  2078. if (skb->len < msdu_len)
  2079. return -EPROTO;
  2080. /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
  2081. * trailer with credit update. Trim the excess garbage.
  2082. */
  2083. skb_trim(skb, msdu_len);
  2084. return 0;
  2085. }
  2086. static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
  2087. struct sk_buff *skb,
  2088. struct wmi_mgmt_rx_ev_arg *arg)
  2089. {
  2090. struct wmi_10_4_mgmt_rx_event *ev;
  2091. struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
  2092. size_t pull_len;
  2093. u32 msdu_len;
  2094. ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
  2095. ev_hdr = &ev->hdr;
  2096. pull_len = sizeof(*ev);
  2097. if (skb->len < pull_len)
  2098. return -EPROTO;
  2099. skb_pull(skb, pull_len);
  2100. arg->channel = ev_hdr->channel;
  2101. arg->buf_len = ev_hdr->buf_len;
  2102. arg->status = ev_hdr->status;
  2103. arg->snr = ev_hdr->snr;
  2104. arg->phy_mode = ev_hdr->phy_mode;
  2105. arg->rate = ev_hdr->rate;
  2106. msdu_len = __le32_to_cpu(arg->buf_len);
  2107. if (skb->len < msdu_len)
  2108. return -EPROTO;
  2109. /* Make sure bytes added for padding are removed. */
  2110. skb_trim(skb, msdu_len);
  2111. return 0;
  2112. }
  2113. int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
  2114. {
  2115. struct wmi_mgmt_rx_ev_arg arg = {};
  2116. struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  2117. struct ieee80211_hdr *hdr;
  2118. struct ieee80211_supported_band *sband;
  2119. u32 rx_status;
  2120. u32 channel;
  2121. u32 phy_mode;
  2122. u32 snr;
  2123. u32 rate;
  2124. u32 buf_len;
  2125. u16 fc;
  2126. int ret;
  2127. ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
  2128. if (ret) {
  2129. ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
  2130. dev_kfree_skb(skb);
  2131. return ret;
  2132. }
  2133. channel = __le32_to_cpu(arg.channel);
  2134. buf_len = __le32_to_cpu(arg.buf_len);
  2135. rx_status = __le32_to_cpu(arg.status);
  2136. snr = __le32_to_cpu(arg.snr);
  2137. phy_mode = __le32_to_cpu(arg.phy_mode);
  2138. rate = __le32_to_cpu(arg.rate);
  2139. memset(status, 0, sizeof(*status));
  2140. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2141. "event mgmt rx status %08x\n", rx_status);
  2142. if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
  2143. (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
  2144. WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
  2145. dev_kfree_skb(skb);
  2146. return 0;
  2147. }
  2148. if (rx_status & WMI_RX_STATUS_ERR_MIC)
  2149. status->flag |= RX_FLAG_MMIC_ERROR;
  2150. /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
  2151. * MODE_11B. This means phy_mode is not a reliable source for the band
  2152. * of mgmt rx.
  2153. */
  2154. if (channel >= 1 && channel <= 14) {
  2155. status->band = IEEE80211_BAND_2GHZ;
  2156. } else if (channel >= 36 && channel <= 165) {
  2157. status->band = IEEE80211_BAND_5GHZ;
  2158. } else {
  2159. /* Shouldn't happen unless list of advertised channels to
  2160. * mac80211 has been changed.
  2161. */
  2162. WARN_ON_ONCE(1);
  2163. dev_kfree_skb(skb);
  2164. return 0;
  2165. }
  2166. if (phy_mode == MODE_11B && status->band == IEEE80211_BAND_5GHZ)
  2167. ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
  2168. sband = &ar->mac.sbands[status->band];
  2169. status->freq = ieee80211_channel_to_frequency(channel, status->band);
  2170. status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
  2171. status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
  2172. hdr = (struct ieee80211_hdr *)skb->data;
  2173. fc = le16_to_cpu(hdr->frame_control);
  2174. ath10k_wmi_handle_wep_reauth(ar, skb, status);
  2175. /* FW delivers WEP Shared Auth frame with Protected Bit set and
  2176. * encrypted payload. However in case of PMF it delivers decrypted
  2177. * frames with Protected Bit set. */
  2178. if (ieee80211_has_protected(hdr->frame_control) &&
  2179. !ieee80211_is_auth(hdr->frame_control)) {
  2180. status->flag |= RX_FLAG_DECRYPTED;
  2181. if (!ieee80211_is_action(hdr->frame_control) &&
  2182. !ieee80211_is_deauth(hdr->frame_control) &&
  2183. !ieee80211_is_disassoc(hdr->frame_control)) {
  2184. status->flag |= RX_FLAG_IV_STRIPPED |
  2185. RX_FLAG_MMIC_STRIPPED;
  2186. hdr->frame_control = __cpu_to_le16(fc &
  2187. ~IEEE80211_FCTL_PROTECTED);
  2188. }
  2189. }
  2190. if (ieee80211_is_beacon(hdr->frame_control))
  2191. ath10k_mac_handle_beacon(ar, skb);
  2192. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2193. "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
  2194. skb, skb->len,
  2195. fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
  2196. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2197. "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
  2198. status->freq, status->band, status->signal,
  2199. status->rate_idx);
  2200. ieee80211_rx(ar->hw, skb);
  2201. return 0;
  2202. }
  2203. static int freq_to_idx(struct ath10k *ar, int freq)
  2204. {
  2205. struct ieee80211_supported_band *sband;
  2206. int band, ch, idx = 0;
  2207. for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
  2208. sband = ar->hw->wiphy->bands[band];
  2209. if (!sband)
  2210. continue;
  2211. for (ch = 0; ch < sband->n_channels; ch++, idx++)
  2212. if (sband->channels[ch].center_freq == freq)
  2213. goto exit;
  2214. }
  2215. exit:
  2216. return idx;
  2217. }
  2218. static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
  2219. struct wmi_ch_info_ev_arg *arg)
  2220. {
  2221. struct wmi_chan_info_event *ev = (void *)skb->data;
  2222. if (skb->len < sizeof(*ev))
  2223. return -EPROTO;
  2224. skb_pull(skb, sizeof(*ev));
  2225. arg->err_code = ev->err_code;
  2226. arg->freq = ev->freq;
  2227. arg->cmd_flags = ev->cmd_flags;
  2228. arg->noise_floor = ev->noise_floor;
  2229. arg->rx_clear_count = ev->rx_clear_count;
  2230. arg->cycle_count = ev->cycle_count;
  2231. return 0;
  2232. }
  2233. static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
  2234. struct sk_buff *skb,
  2235. struct wmi_ch_info_ev_arg *arg)
  2236. {
  2237. struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
  2238. if (skb->len < sizeof(*ev))
  2239. return -EPROTO;
  2240. skb_pull(skb, sizeof(*ev));
  2241. arg->err_code = ev->err_code;
  2242. arg->freq = ev->freq;
  2243. arg->cmd_flags = ev->cmd_flags;
  2244. arg->noise_floor = ev->noise_floor;
  2245. arg->rx_clear_count = ev->rx_clear_count;
  2246. arg->cycle_count = ev->cycle_count;
  2247. arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
  2248. arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
  2249. arg->rx_frame_count = ev->rx_frame_count;
  2250. return 0;
  2251. }
  2252. void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
  2253. {
  2254. struct wmi_ch_info_ev_arg arg = {};
  2255. struct survey_info *survey;
  2256. u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
  2257. int idx, ret;
  2258. ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
  2259. if (ret) {
  2260. ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
  2261. return;
  2262. }
  2263. err_code = __le32_to_cpu(arg.err_code);
  2264. freq = __le32_to_cpu(arg.freq);
  2265. cmd_flags = __le32_to_cpu(arg.cmd_flags);
  2266. noise_floor = __le32_to_cpu(arg.noise_floor);
  2267. rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
  2268. cycle_count = __le32_to_cpu(arg.cycle_count);
  2269. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2270. "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
  2271. err_code, freq, cmd_flags, noise_floor, rx_clear_count,
  2272. cycle_count);
  2273. spin_lock_bh(&ar->data_lock);
  2274. switch (ar->scan.state) {
  2275. case ATH10K_SCAN_IDLE:
  2276. case ATH10K_SCAN_STARTING:
  2277. ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
  2278. goto exit;
  2279. case ATH10K_SCAN_RUNNING:
  2280. case ATH10K_SCAN_ABORTING:
  2281. break;
  2282. }
  2283. idx = freq_to_idx(ar, freq);
  2284. if (idx >= ARRAY_SIZE(ar->survey)) {
  2285. ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
  2286. freq, idx);
  2287. goto exit;
  2288. }
  2289. if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
  2290. if (ar->ch_info_can_report_survey) {
  2291. survey = &ar->survey[idx];
  2292. survey->noise = noise_floor;
  2293. survey->filled = SURVEY_INFO_NOISE_DBM;
  2294. ath10k_hw_fill_survey_time(ar,
  2295. survey,
  2296. cycle_count,
  2297. rx_clear_count,
  2298. ar->survey_last_cycle_count,
  2299. ar->survey_last_rx_clear_count);
  2300. }
  2301. ar->ch_info_can_report_survey = false;
  2302. } else {
  2303. ar->ch_info_can_report_survey = true;
  2304. }
  2305. if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
  2306. ar->survey_last_rx_clear_count = rx_clear_count;
  2307. ar->survey_last_cycle_count = cycle_count;
  2308. }
  2309. exit:
  2310. spin_unlock_bh(&ar->data_lock);
  2311. }
  2312. void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
  2313. {
  2314. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
  2315. }
  2316. int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
  2317. {
  2318. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
  2319. skb->len);
  2320. trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
  2321. return 0;
  2322. }
  2323. void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
  2324. struct ath10k_fw_stats_pdev *dst)
  2325. {
  2326. dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
  2327. dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
  2328. dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
  2329. dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
  2330. dst->cycle_count = __le32_to_cpu(src->cycle_count);
  2331. dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
  2332. dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
  2333. }
  2334. void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
  2335. struct ath10k_fw_stats_pdev *dst)
  2336. {
  2337. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2338. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2339. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2340. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2341. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2342. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2343. dst->local_freed = __le32_to_cpu(src->local_freed);
  2344. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2345. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2346. dst->underrun = __le32_to_cpu(src->underrun);
  2347. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2348. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2349. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2350. dst->data_rc = __le32_to_cpu(src->data_rc);
  2351. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2352. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2353. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2354. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2355. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2356. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2357. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2358. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2359. }
  2360. static void
  2361. ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
  2362. struct ath10k_fw_stats_pdev *dst)
  2363. {
  2364. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2365. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2366. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2367. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2368. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2369. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2370. dst->local_freed = __le32_to_cpu(src->local_freed);
  2371. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2372. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2373. dst->underrun = __le32_to_cpu(src->underrun);
  2374. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2375. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2376. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2377. dst->data_rc = __le32_to_cpu(src->data_rc);
  2378. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2379. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2380. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2381. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2382. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2383. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2384. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2385. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2386. dst->hw_paused = __le32_to_cpu(src->hw_paused);
  2387. dst->seq_posted = __le32_to_cpu(src->seq_posted);
  2388. dst->seq_failed_queueing =
  2389. __le32_to_cpu(src->seq_failed_queueing);
  2390. dst->seq_completed = __le32_to_cpu(src->seq_completed);
  2391. dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
  2392. dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
  2393. dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
  2394. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2395. dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
  2396. dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
  2397. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2398. dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
  2399. }
  2400. void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
  2401. struct ath10k_fw_stats_pdev *dst)
  2402. {
  2403. dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
  2404. dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
  2405. dst->r0_frags = __le32_to_cpu(src->r0_frags);
  2406. dst->r1_frags = __le32_to_cpu(src->r1_frags);
  2407. dst->r2_frags = __le32_to_cpu(src->r2_frags);
  2408. dst->r3_frags = __le32_to_cpu(src->r3_frags);
  2409. dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
  2410. dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
  2411. dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
  2412. dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
  2413. dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
  2414. dst->phy_errs = __le32_to_cpu(src->phy_errs);
  2415. dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
  2416. dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
  2417. }
  2418. void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
  2419. struct ath10k_fw_stats_pdev *dst)
  2420. {
  2421. dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
  2422. dst->rts_bad = __le32_to_cpu(src->rts_bad);
  2423. dst->rts_good = __le32_to_cpu(src->rts_good);
  2424. dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
  2425. dst->no_beacons = __le32_to_cpu(src->no_beacons);
  2426. dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
  2427. }
  2428. void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
  2429. struct ath10k_fw_stats_peer *dst)
  2430. {
  2431. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2432. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2433. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2434. }
  2435. static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
  2436. struct sk_buff *skb,
  2437. struct ath10k_fw_stats *stats)
  2438. {
  2439. const struct wmi_stats_event *ev = (void *)skb->data;
  2440. u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
  2441. int i;
  2442. if (!skb_pull(skb, sizeof(*ev)))
  2443. return -EPROTO;
  2444. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2445. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2446. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2447. for (i = 0; i < num_pdev_stats; i++) {
  2448. const struct wmi_pdev_stats *src;
  2449. struct ath10k_fw_stats_pdev *dst;
  2450. src = (void *)skb->data;
  2451. if (!skb_pull(skb, sizeof(*src)))
  2452. return -EPROTO;
  2453. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2454. if (!dst)
  2455. continue;
  2456. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2457. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2458. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2459. list_add_tail(&dst->list, &stats->pdevs);
  2460. }
  2461. /* fw doesn't implement vdev stats */
  2462. for (i = 0; i < num_peer_stats; i++) {
  2463. const struct wmi_peer_stats *src;
  2464. struct ath10k_fw_stats_peer *dst;
  2465. src = (void *)skb->data;
  2466. if (!skb_pull(skb, sizeof(*src)))
  2467. return -EPROTO;
  2468. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2469. if (!dst)
  2470. continue;
  2471. ath10k_wmi_pull_peer_stats(src, dst);
  2472. list_add_tail(&dst->list, &stats->peers);
  2473. }
  2474. return 0;
  2475. }
  2476. static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
  2477. struct sk_buff *skb,
  2478. struct ath10k_fw_stats *stats)
  2479. {
  2480. const struct wmi_stats_event *ev = (void *)skb->data;
  2481. u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
  2482. int i;
  2483. if (!skb_pull(skb, sizeof(*ev)))
  2484. return -EPROTO;
  2485. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2486. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2487. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2488. for (i = 0; i < num_pdev_stats; i++) {
  2489. const struct wmi_10x_pdev_stats *src;
  2490. struct ath10k_fw_stats_pdev *dst;
  2491. src = (void *)skb->data;
  2492. if (!skb_pull(skb, sizeof(*src)))
  2493. return -EPROTO;
  2494. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2495. if (!dst)
  2496. continue;
  2497. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2498. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2499. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2500. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2501. list_add_tail(&dst->list, &stats->pdevs);
  2502. }
  2503. /* fw doesn't implement vdev stats */
  2504. for (i = 0; i < num_peer_stats; i++) {
  2505. const struct wmi_10x_peer_stats *src;
  2506. struct ath10k_fw_stats_peer *dst;
  2507. src = (void *)skb->data;
  2508. if (!skb_pull(skb, sizeof(*src)))
  2509. return -EPROTO;
  2510. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2511. if (!dst)
  2512. continue;
  2513. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2514. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2515. list_add_tail(&dst->list, &stats->peers);
  2516. }
  2517. return 0;
  2518. }
  2519. static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
  2520. struct sk_buff *skb,
  2521. struct ath10k_fw_stats *stats)
  2522. {
  2523. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2524. u32 num_pdev_stats;
  2525. u32 num_pdev_ext_stats;
  2526. u32 num_vdev_stats;
  2527. u32 num_peer_stats;
  2528. int i;
  2529. if (!skb_pull(skb, sizeof(*ev)))
  2530. return -EPROTO;
  2531. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2532. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2533. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2534. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2535. for (i = 0; i < num_pdev_stats; i++) {
  2536. const struct wmi_10_2_pdev_stats *src;
  2537. struct ath10k_fw_stats_pdev *dst;
  2538. src = (void *)skb->data;
  2539. if (!skb_pull(skb, sizeof(*src)))
  2540. return -EPROTO;
  2541. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2542. if (!dst)
  2543. continue;
  2544. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2545. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2546. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2547. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2548. /* FIXME: expose 10.2 specific values */
  2549. list_add_tail(&dst->list, &stats->pdevs);
  2550. }
  2551. for (i = 0; i < num_pdev_ext_stats; i++) {
  2552. const struct wmi_10_2_pdev_ext_stats *src;
  2553. src = (void *)skb->data;
  2554. if (!skb_pull(skb, sizeof(*src)))
  2555. return -EPROTO;
  2556. /* FIXME: expose values to userspace
  2557. *
  2558. * Note: Even though this loop seems to do nothing it is
  2559. * required to parse following sub-structures properly.
  2560. */
  2561. }
  2562. /* fw doesn't implement vdev stats */
  2563. for (i = 0; i < num_peer_stats; i++) {
  2564. const struct wmi_10_2_peer_stats *src;
  2565. struct ath10k_fw_stats_peer *dst;
  2566. src = (void *)skb->data;
  2567. if (!skb_pull(skb, sizeof(*src)))
  2568. return -EPROTO;
  2569. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2570. if (!dst)
  2571. continue;
  2572. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2573. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2574. /* FIXME: expose 10.2 specific values */
  2575. list_add_tail(&dst->list, &stats->peers);
  2576. }
  2577. return 0;
  2578. }
  2579. static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
  2580. struct sk_buff *skb,
  2581. struct ath10k_fw_stats *stats)
  2582. {
  2583. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2584. u32 num_pdev_stats;
  2585. u32 num_pdev_ext_stats;
  2586. u32 num_vdev_stats;
  2587. u32 num_peer_stats;
  2588. int i;
  2589. if (!skb_pull(skb, sizeof(*ev)))
  2590. return -EPROTO;
  2591. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2592. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2593. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2594. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2595. for (i = 0; i < num_pdev_stats; i++) {
  2596. const struct wmi_10_2_pdev_stats *src;
  2597. struct ath10k_fw_stats_pdev *dst;
  2598. src = (void *)skb->data;
  2599. if (!skb_pull(skb, sizeof(*src)))
  2600. return -EPROTO;
  2601. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2602. if (!dst)
  2603. continue;
  2604. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2605. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2606. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2607. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2608. /* FIXME: expose 10.2 specific values */
  2609. list_add_tail(&dst->list, &stats->pdevs);
  2610. }
  2611. for (i = 0; i < num_pdev_ext_stats; i++) {
  2612. const struct wmi_10_2_pdev_ext_stats *src;
  2613. src = (void *)skb->data;
  2614. if (!skb_pull(skb, sizeof(*src)))
  2615. return -EPROTO;
  2616. /* FIXME: expose values to userspace
  2617. *
  2618. * Note: Even though this loop seems to do nothing it is
  2619. * required to parse following sub-structures properly.
  2620. */
  2621. }
  2622. /* fw doesn't implement vdev stats */
  2623. for (i = 0; i < num_peer_stats; i++) {
  2624. const struct wmi_10_2_4_peer_stats *src;
  2625. struct ath10k_fw_stats_peer *dst;
  2626. src = (void *)skb->data;
  2627. if (!skb_pull(skb, sizeof(*src)))
  2628. return -EPROTO;
  2629. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2630. if (!dst)
  2631. continue;
  2632. ath10k_wmi_pull_peer_stats(&src->common.old, dst);
  2633. dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
  2634. /* FIXME: expose 10.2 specific values */
  2635. list_add_tail(&dst->list, &stats->peers);
  2636. }
  2637. return 0;
  2638. }
  2639. static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
  2640. struct sk_buff *skb,
  2641. struct ath10k_fw_stats *stats)
  2642. {
  2643. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2644. u32 num_pdev_stats;
  2645. u32 num_pdev_ext_stats;
  2646. u32 num_vdev_stats;
  2647. u32 num_peer_stats;
  2648. int i;
  2649. if (!skb_pull(skb, sizeof(*ev)))
  2650. return -EPROTO;
  2651. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2652. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2653. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2654. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2655. for (i = 0; i < num_pdev_stats; i++) {
  2656. const struct wmi_10_4_pdev_stats *src;
  2657. struct ath10k_fw_stats_pdev *dst;
  2658. src = (void *)skb->data;
  2659. if (!skb_pull(skb, sizeof(*src)))
  2660. return -EPROTO;
  2661. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2662. if (!dst)
  2663. continue;
  2664. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2665. ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
  2666. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2667. dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
  2668. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2669. list_add_tail(&dst->list, &stats->pdevs);
  2670. }
  2671. for (i = 0; i < num_pdev_ext_stats; i++) {
  2672. const struct wmi_10_2_pdev_ext_stats *src;
  2673. src = (void *)skb->data;
  2674. if (!skb_pull(skb, sizeof(*src)))
  2675. return -EPROTO;
  2676. /* FIXME: expose values to userspace
  2677. *
  2678. * Note: Even though this loop seems to do nothing it is
  2679. * required to parse following sub-structures properly.
  2680. */
  2681. }
  2682. /* fw doesn't implement vdev stats */
  2683. for (i = 0; i < num_peer_stats; i++) {
  2684. const struct wmi_10_4_peer_stats *src;
  2685. struct ath10k_fw_stats_peer *dst;
  2686. src = (void *)skb->data;
  2687. if (!skb_pull(skb, sizeof(*src)))
  2688. return -EPROTO;
  2689. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2690. if (!dst)
  2691. continue;
  2692. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2693. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2694. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2695. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2696. /* FIXME: expose 10.4 specific values */
  2697. list_add_tail(&dst->list, &stats->peers);
  2698. }
  2699. return 0;
  2700. }
  2701. void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
  2702. {
  2703. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
  2704. ath10k_debug_fw_stats_process(ar, skb);
  2705. }
  2706. static int
  2707. ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
  2708. struct wmi_vdev_start_ev_arg *arg)
  2709. {
  2710. struct wmi_vdev_start_response_event *ev = (void *)skb->data;
  2711. if (skb->len < sizeof(*ev))
  2712. return -EPROTO;
  2713. skb_pull(skb, sizeof(*ev));
  2714. arg->vdev_id = ev->vdev_id;
  2715. arg->req_id = ev->req_id;
  2716. arg->resp_type = ev->resp_type;
  2717. arg->status = ev->status;
  2718. return 0;
  2719. }
  2720. void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
  2721. {
  2722. struct wmi_vdev_start_ev_arg arg = {};
  2723. int ret;
  2724. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
  2725. ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
  2726. if (ret) {
  2727. ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
  2728. return;
  2729. }
  2730. if (WARN_ON(__le32_to_cpu(arg.status)))
  2731. return;
  2732. complete(&ar->vdev_setup_done);
  2733. }
  2734. void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
  2735. {
  2736. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
  2737. complete(&ar->vdev_setup_done);
  2738. }
  2739. static int
  2740. ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
  2741. struct wmi_peer_kick_ev_arg *arg)
  2742. {
  2743. struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
  2744. if (skb->len < sizeof(*ev))
  2745. return -EPROTO;
  2746. skb_pull(skb, sizeof(*ev));
  2747. arg->mac_addr = ev->peer_macaddr.addr;
  2748. return 0;
  2749. }
  2750. void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
  2751. {
  2752. struct wmi_peer_kick_ev_arg arg = {};
  2753. struct ieee80211_sta *sta;
  2754. int ret;
  2755. ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
  2756. if (ret) {
  2757. ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
  2758. ret);
  2759. return;
  2760. }
  2761. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
  2762. arg.mac_addr);
  2763. rcu_read_lock();
  2764. sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
  2765. if (!sta) {
  2766. ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
  2767. arg.mac_addr);
  2768. goto exit;
  2769. }
  2770. ieee80211_report_low_ack(sta, 10);
  2771. exit:
  2772. rcu_read_unlock();
  2773. }
  2774. /*
  2775. * FIXME
  2776. *
  2777. * We don't report to mac80211 sleep state of connected
  2778. * stations. Due to this mac80211 can't fill in TIM IE
  2779. * correctly.
  2780. *
  2781. * I know of no way of getting nullfunc frames that contain
  2782. * sleep transition from connected stations - these do not
  2783. * seem to be sent from the target to the host. There also
  2784. * doesn't seem to be a dedicated event for that. So the
  2785. * only way left to do this would be to read tim_bitmap
  2786. * during SWBA.
  2787. *
  2788. * We could probably try using tim_bitmap from SWBA to tell
  2789. * mac80211 which stations are asleep and which are not. The
  2790. * problem here is calling mac80211 functions so many times
  2791. * could take too long and make us miss the time to submit
  2792. * the beacon to the target.
  2793. *
  2794. * So as a workaround we try to extend the TIM IE if there
  2795. * is unicast buffered for stations with aid > 7 and fill it
  2796. * in ourselves.
  2797. */
  2798. static void ath10k_wmi_update_tim(struct ath10k *ar,
  2799. struct ath10k_vif *arvif,
  2800. struct sk_buff *bcn,
  2801. const struct wmi_tim_info_arg *tim_info)
  2802. {
  2803. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
  2804. struct ieee80211_tim_ie *tim;
  2805. u8 *ies, *ie;
  2806. u8 ie_len, pvm_len;
  2807. __le32 t;
  2808. u32 v, tim_len;
  2809. /* When FW reports 0 in tim_len, ensure atleast first byte
  2810. * in tim_bitmap is considered for pvm calculation.
  2811. */
  2812. tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
  2813. /* if next SWBA has no tim_changed the tim_bitmap is garbage.
  2814. * we must copy the bitmap upon change and reuse it later */
  2815. if (__le32_to_cpu(tim_info->tim_changed)) {
  2816. int i;
  2817. if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
  2818. ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
  2819. tim_len, sizeof(arvif->u.ap.tim_bitmap));
  2820. tim_len = sizeof(arvif->u.ap.tim_bitmap);
  2821. }
  2822. for (i = 0; i < tim_len; i++) {
  2823. t = tim_info->tim_bitmap[i / 4];
  2824. v = __le32_to_cpu(t);
  2825. arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
  2826. }
  2827. /* FW reports either length 0 or length based on max supported
  2828. * station. so we calculate this on our own
  2829. */
  2830. arvif->u.ap.tim_len = 0;
  2831. for (i = 0; i < tim_len; i++)
  2832. if (arvif->u.ap.tim_bitmap[i])
  2833. arvif->u.ap.tim_len = i;
  2834. arvif->u.ap.tim_len++;
  2835. }
  2836. ies = bcn->data;
  2837. ies += ieee80211_hdrlen(hdr->frame_control);
  2838. ies += 12; /* fixed parameters */
  2839. ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
  2840. (u8 *)skb_tail_pointer(bcn) - ies);
  2841. if (!ie) {
  2842. if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
  2843. ath10k_warn(ar, "no tim ie found;\n");
  2844. return;
  2845. }
  2846. tim = (void *)ie + 2;
  2847. ie_len = ie[1];
  2848. pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
  2849. if (pvm_len < arvif->u.ap.tim_len) {
  2850. int expand_size = tim_len - pvm_len;
  2851. int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
  2852. void *next_ie = ie + 2 + ie_len;
  2853. if (skb_put(bcn, expand_size)) {
  2854. memmove(next_ie + expand_size, next_ie, move_size);
  2855. ie[1] += expand_size;
  2856. ie_len += expand_size;
  2857. pvm_len += expand_size;
  2858. } else {
  2859. ath10k_warn(ar, "tim expansion failed\n");
  2860. }
  2861. }
  2862. if (pvm_len > tim_len) {
  2863. ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
  2864. return;
  2865. }
  2866. tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
  2867. memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
  2868. if (tim->dtim_count == 0) {
  2869. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
  2870. if (__le32_to_cpu(tim_info->tim_mcast) == 1)
  2871. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
  2872. }
  2873. ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
  2874. tim->dtim_count, tim->dtim_period,
  2875. tim->bitmap_ctrl, pvm_len);
  2876. }
  2877. static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
  2878. struct sk_buff *bcn,
  2879. const struct wmi_p2p_noa_info *noa)
  2880. {
  2881. if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
  2882. return;
  2883. ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
  2884. if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
  2885. ath10k_p2p_noa_update(arvif, noa);
  2886. if (arvif->u.ap.noa_data)
  2887. if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
  2888. memcpy(skb_put(bcn, arvif->u.ap.noa_len),
  2889. arvif->u.ap.noa_data,
  2890. arvif->u.ap.noa_len);
  2891. }
  2892. static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
  2893. struct wmi_swba_ev_arg *arg)
  2894. {
  2895. struct wmi_host_swba_event *ev = (void *)skb->data;
  2896. u32 map;
  2897. size_t i;
  2898. if (skb->len < sizeof(*ev))
  2899. return -EPROTO;
  2900. skb_pull(skb, sizeof(*ev));
  2901. arg->vdev_map = ev->vdev_map;
  2902. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  2903. if (!(map & BIT(0)))
  2904. continue;
  2905. /* If this happens there were some changes in firmware and
  2906. * ath10k should update the max size of tim_info array.
  2907. */
  2908. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  2909. break;
  2910. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  2911. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  2912. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  2913. return -EPROTO;
  2914. }
  2915. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  2916. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  2917. arg->tim_info[i].tim_bitmap =
  2918. ev->bcn_info[i].tim_info.tim_bitmap;
  2919. arg->tim_info[i].tim_changed =
  2920. ev->bcn_info[i].tim_info.tim_changed;
  2921. arg->tim_info[i].tim_num_ps_pending =
  2922. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  2923. arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
  2924. i++;
  2925. }
  2926. return 0;
  2927. }
  2928. static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
  2929. struct sk_buff *skb,
  2930. struct wmi_swba_ev_arg *arg)
  2931. {
  2932. struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
  2933. u32 map, tim_len;
  2934. size_t i;
  2935. if (skb->len < sizeof(*ev))
  2936. return -EPROTO;
  2937. skb_pull(skb, sizeof(*ev));
  2938. arg->vdev_map = ev->vdev_map;
  2939. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  2940. if (!(map & BIT(0)))
  2941. continue;
  2942. /* If this happens there were some changes in firmware and
  2943. * ath10k should update the max size of tim_info array.
  2944. */
  2945. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  2946. break;
  2947. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  2948. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  2949. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  2950. return -EPROTO;
  2951. }
  2952. tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
  2953. if (tim_len) {
  2954. /* Exclude 4 byte guard length */
  2955. tim_len -= 4;
  2956. arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
  2957. } else {
  2958. arg->tim_info[i].tim_len = 0;
  2959. }
  2960. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  2961. arg->tim_info[i].tim_bitmap =
  2962. ev->bcn_info[i].tim_info.tim_bitmap;
  2963. arg->tim_info[i].tim_changed =
  2964. ev->bcn_info[i].tim_info.tim_changed;
  2965. arg->tim_info[i].tim_num_ps_pending =
  2966. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  2967. /* 10.4 firmware doesn't have p2p support. notice of absence
  2968. * info can be ignored for now.
  2969. */
  2970. i++;
  2971. }
  2972. return 0;
  2973. }
  2974. static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
  2975. {
  2976. return WMI_TXBF_CONF_BEFORE_ASSOC;
  2977. }
  2978. void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
  2979. {
  2980. struct wmi_swba_ev_arg arg = {};
  2981. u32 map;
  2982. int i = -1;
  2983. const struct wmi_tim_info_arg *tim_info;
  2984. const struct wmi_p2p_noa_info *noa_info;
  2985. struct ath10k_vif *arvif;
  2986. struct sk_buff *bcn;
  2987. dma_addr_t paddr;
  2988. int ret, vdev_id = 0;
  2989. ret = ath10k_wmi_pull_swba(ar, skb, &arg);
  2990. if (ret) {
  2991. ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
  2992. return;
  2993. }
  2994. map = __le32_to_cpu(arg.vdev_map);
  2995. ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
  2996. map);
  2997. for (; map; map >>= 1, vdev_id++) {
  2998. if (!(map & 0x1))
  2999. continue;
  3000. i++;
  3001. if (i >= WMI_MAX_AP_VDEV) {
  3002. ath10k_warn(ar, "swba has corrupted vdev map\n");
  3003. break;
  3004. }
  3005. tim_info = &arg.tim_info[i];
  3006. noa_info = arg.noa_info[i];
  3007. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  3008. "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
  3009. i,
  3010. __le32_to_cpu(tim_info->tim_len),
  3011. __le32_to_cpu(tim_info->tim_mcast),
  3012. __le32_to_cpu(tim_info->tim_changed),
  3013. __le32_to_cpu(tim_info->tim_num_ps_pending),
  3014. __le32_to_cpu(tim_info->tim_bitmap[3]),
  3015. __le32_to_cpu(tim_info->tim_bitmap[2]),
  3016. __le32_to_cpu(tim_info->tim_bitmap[1]),
  3017. __le32_to_cpu(tim_info->tim_bitmap[0]));
  3018. /* TODO: Only first 4 word from tim_bitmap is dumped.
  3019. * Extend debug code to dump full tim_bitmap.
  3020. */
  3021. arvif = ath10k_get_arvif(ar, vdev_id);
  3022. if (arvif == NULL) {
  3023. ath10k_warn(ar, "no vif for vdev_id %d found\n",
  3024. vdev_id);
  3025. continue;
  3026. }
  3027. /* There are no completions for beacons so wait for next SWBA
  3028. * before telling mac80211 to decrement CSA counter
  3029. *
  3030. * Once CSA counter is completed stop sending beacons until
  3031. * actual channel switch is done */
  3032. if (arvif->vif->csa_active &&
  3033. ieee80211_csa_is_complete(arvif->vif)) {
  3034. ieee80211_csa_finish(arvif->vif);
  3035. continue;
  3036. }
  3037. bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
  3038. if (!bcn) {
  3039. ath10k_warn(ar, "could not get mac80211 beacon\n");
  3040. continue;
  3041. }
  3042. ath10k_tx_h_seq_no(arvif->vif, bcn);
  3043. ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
  3044. ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
  3045. spin_lock_bh(&ar->data_lock);
  3046. if (arvif->beacon) {
  3047. switch (arvif->beacon_state) {
  3048. case ATH10K_BEACON_SENT:
  3049. break;
  3050. case ATH10K_BEACON_SCHEDULED:
  3051. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
  3052. arvif->vdev_id);
  3053. break;
  3054. case ATH10K_BEACON_SENDING:
  3055. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
  3056. arvif->vdev_id);
  3057. dev_kfree_skb(bcn);
  3058. goto skip;
  3059. }
  3060. ath10k_mac_vif_beacon_free(arvif);
  3061. }
  3062. if (!arvif->beacon_buf) {
  3063. paddr = dma_map_single(arvif->ar->dev, bcn->data,
  3064. bcn->len, DMA_TO_DEVICE);
  3065. ret = dma_mapping_error(arvif->ar->dev, paddr);
  3066. if (ret) {
  3067. ath10k_warn(ar, "failed to map beacon: %d\n",
  3068. ret);
  3069. dev_kfree_skb_any(bcn);
  3070. ret = -EIO;
  3071. goto skip;
  3072. }
  3073. ATH10K_SKB_CB(bcn)->paddr = paddr;
  3074. } else {
  3075. if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
  3076. ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
  3077. bcn->len, IEEE80211_MAX_FRAME_LEN);
  3078. skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
  3079. }
  3080. memcpy(arvif->beacon_buf, bcn->data, bcn->len);
  3081. ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
  3082. }
  3083. arvif->beacon = bcn;
  3084. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  3085. trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
  3086. trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
  3087. skip:
  3088. spin_unlock_bh(&ar->data_lock);
  3089. }
  3090. ath10k_wmi_tx_beacons_nowait(ar);
  3091. }
  3092. void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
  3093. {
  3094. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
  3095. }
  3096. static void ath10k_dfs_radar_report(struct ath10k *ar,
  3097. struct wmi_phyerr_ev_arg *phyerr,
  3098. const struct phyerr_radar_report *rr,
  3099. u64 tsf)
  3100. {
  3101. u32 reg0, reg1, tsf32l;
  3102. struct ieee80211_channel *ch;
  3103. struct pulse_event pe;
  3104. u64 tsf64;
  3105. u8 rssi, width;
  3106. reg0 = __le32_to_cpu(rr->reg0);
  3107. reg1 = __le32_to_cpu(rr->reg1);
  3108. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3109. "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
  3110. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
  3111. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
  3112. MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
  3113. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
  3114. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3115. "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
  3116. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
  3117. MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
  3118. MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
  3119. MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
  3120. MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
  3121. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3122. "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
  3123. MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
  3124. MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
  3125. if (!ar->dfs_detector)
  3126. return;
  3127. spin_lock_bh(&ar->data_lock);
  3128. ch = ar->rx_channel;
  3129. spin_unlock_bh(&ar->data_lock);
  3130. if (!ch) {
  3131. ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
  3132. goto radar_detected;
  3133. }
  3134. /* report event to DFS pattern detector */
  3135. tsf32l = phyerr->tsf_timestamp;
  3136. tsf64 = tsf & (~0xFFFFFFFFULL);
  3137. tsf64 |= tsf32l;
  3138. width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
  3139. rssi = phyerr->rssi_combined;
  3140. /* hardware store this as 8 bit signed value,
  3141. * set to zero if negative number
  3142. */
  3143. if (rssi & 0x80)
  3144. rssi = 0;
  3145. pe.ts = tsf64;
  3146. pe.freq = ch->center_freq;
  3147. pe.width = width;
  3148. pe.rssi = rssi;
  3149. pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
  3150. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3151. "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
  3152. pe.freq, pe.width, pe.rssi, pe.ts);
  3153. ATH10K_DFS_STAT_INC(ar, pulses_detected);
  3154. if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
  3155. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3156. "dfs no pulse pattern detected, yet\n");
  3157. return;
  3158. }
  3159. radar_detected:
  3160. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
  3161. ATH10K_DFS_STAT_INC(ar, radar_detected);
  3162. /* Control radar events reporting in debugfs file
  3163. dfs_block_radar_events */
  3164. if (ar->dfs_block_radar_events) {
  3165. ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
  3166. return;
  3167. }
  3168. ieee80211_radar_detected(ar->hw);
  3169. }
  3170. static int ath10k_dfs_fft_report(struct ath10k *ar,
  3171. struct wmi_phyerr_ev_arg *phyerr,
  3172. const struct phyerr_fft_report *fftr,
  3173. u64 tsf)
  3174. {
  3175. u32 reg0, reg1;
  3176. u8 rssi, peak_mag;
  3177. reg0 = __le32_to_cpu(fftr->reg0);
  3178. reg1 = __le32_to_cpu(fftr->reg1);
  3179. rssi = phyerr->rssi_combined;
  3180. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3181. "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
  3182. MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
  3183. MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
  3184. MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
  3185. MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
  3186. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3187. "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
  3188. MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
  3189. MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
  3190. MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
  3191. MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
  3192. peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
  3193. /* false event detection */
  3194. if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
  3195. peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
  3196. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
  3197. ATH10K_DFS_STAT_INC(ar, pulses_discarded);
  3198. return -EINVAL;
  3199. }
  3200. return 0;
  3201. }
  3202. void ath10k_wmi_event_dfs(struct ath10k *ar,
  3203. struct wmi_phyerr_ev_arg *phyerr,
  3204. u64 tsf)
  3205. {
  3206. int buf_len, tlv_len, res, i = 0;
  3207. const struct phyerr_tlv *tlv;
  3208. const struct phyerr_radar_report *rr;
  3209. const struct phyerr_fft_report *fftr;
  3210. const u8 *tlv_buf;
  3211. buf_len = phyerr->buf_len;
  3212. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3213. "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
  3214. phyerr->phy_err_code, phyerr->rssi_combined,
  3215. phyerr->tsf_timestamp, tsf, buf_len);
  3216. /* Skip event if DFS disabled */
  3217. if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
  3218. return;
  3219. ATH10K_DFS_STAT_INC(ar, pulses_total);
  3220. while (i < buf_len) {
  3221. if (i + sizeof(*tlv) > buf_len) {
  3222. ath10k_warn(ar, "too short buf for tlv header (%d)\n",
  3223. i);
  3224. return;
  3225. }
  3226. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3227. tlv_len = __le16_to_cpu(tlv->len);
  3228. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3229. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3230. "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
  3231. tlv_len, tlv->tag, tlv->sig);
  3232. switch (tlv->tag) {
  3233. case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
  3234. if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
  3235. ath10k_warn(ar, "too short radar pulse summary (%d)\n",
  3236. i);
  3237. return;
  3238. }
  3239. rr = (struct phyerr_radar_report *)tlv_buf;
  3240. ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
  3241. break;
  3242. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3243. if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
  3244. ath10k_warn(ar, "too short fft report (%d)\n",
  3245. i);
  3246. return;
  3247. }
  3248. fftr = (struct phyerr_fft_report *)tlv_buf;
  3249. res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
  3250. if (res)
  3251. return;
  3252. break;
  3253. }
  3254. i += sizeof(*tlv) + tlv_len;
  3255. }
  3256. }
  3257. void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
  3258. struct wmi_phyerr_ev_arg *phyerr,
  3259. u64 tsf)
  3260. {
  3261. int buf_len, tlv_len, res, i = 0;
  3262. struct phyerr_tlv *tlv;
  3263. const void *tlv_buf;
  3264. const struct phyerr_fft_report *fftr;
  3265. size_t fftr_len;
  3266. buf_len = phyerr->buf_len;
  3267. while (i < buf_len) {
  3268. if (i + sizeof(*tlv) > buf_len) {
  3269. ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
  3270. i);
  3271. return;
  3272. }
  3273. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3274. tlv_len = __le16_to_cpu(tlv->len);
  3275. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3276. if (i + sizeof(*tlv) + tlv_len > buf_len) {
  3277. ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
  3278. i);
  3279. return;
  3280. }
  3281. switch (tlv->tag) {
  3282. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3283. if (sizeof(*fftr) > tlv_len) {
  3284. ath10k_warn(ar, "failed to parse fft report at byte %d\n",
  3285. i);
  3286. return;
  3287. }
  3288. fftr_len = tlv_len - sizeof(*fftr);
  3289. fftr = tlv_buf;
  3290. res = ath10k_spectral_process_fft(ar, phyerr,
  3291. fftr, fftr_len,
  3292. tsf);
  3293. if (res < 0) {
  3294. ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
  3295. res);
  3296. return;
  3297. }
  3298. break;
  3299. }
  3300. i += sizeof(*tlv) + tlv_len;
  3301. }
  3302. }
  3303. static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3304. struct sk_buff *skb,
  3305. struct wmi_phyerr_hdr_arg *arg)
  3306. {
  3307. struct wmi_phyerr_event *ev = (void *)skb->data;
  3308. if (skb->len < sizeof(*ev))
  3309. return -EPROTO;
  3310. arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
  3311. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3312. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3313. arg->buf_len = skb->len - sizeof(*ev);
  3314. arg->phyerrs = ev->phyerrs;
  3315. return 0;
  3316. }
  3317. static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3318. struct sk_buff *skb,
  3319. struct wmi_phyerr_hdr_arg *arg)
  3320. {
  3321. struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
  3322. if (skb->len < sizeof(*ev))
  3323. return -EPROTO;
  3324. /* 10.4 firmware always reports only one phyerr */
  3325. arg->num_phyerrs = 1;
  3326. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3327. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3328. arg->buf_len = skb->len;
  3329. arg->phyerrs = skb->data;
  3330. return 0;
  3331. }
  3332. int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
  3333. const void *phyerr_buf,
  3334. int left_len,
  3335. struct wmi_phyerr_ev_arg *arg)
  3336. {
  3337. const struct wmi_phyerr *phyerr = phyerr_buf;
  3338. int i;
  3339. if (left_len < sizeof(*phyerr)) {
  3340. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3341. left_len, sizeof(*phyerr));
  3342. return -EINVAL;
  3343. }
  3344. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3345. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3346. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3347. arg->rssi_combined = phyerr->rssi_combined;
  3348. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3349. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3350. arg->buf = phyerr->buf;
  3351. arg->hdr_len = sizeof(*phyerr);
  3352. for (i = 0; i < 4; i++)
  3353. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3354. switch (phyerr->phy_err_code) {
  3355. case PHY_ERROR_GEN_SPECTRAL_SCAN:
  3356. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3357. break;
  3358. case PHY_ERROR_GEN_FALSE_RADAR_EXT:
  3359. arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
  3360. break;
  3361. case PHY_ERROR_GEN_RADAR:
  3362. arg->phy_err_code = PHY_ERROR_RADAR;
  3363. break;
  3364. default:
  3365. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3366. break;
  3367. }
  3368. return 0;
  3369. }
  3370. static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
  3371. const void *phyerr_buf,
  3372. int left_len,
  3373. struct wmi_phyerr_ev_arg *arg)
  3374. {
  3375. const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
  3376. u32 phy_err_mask;
  3377. int i;
  3378. if (left_len < sizeof(*phyerr)) {
  3379. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3380. left_len, sizeof(*phyerr));
  3381. return -EINVAL;
  3382. }
  3383. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3384. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3385. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3386. arg->rssi_combined = phyerr->rssi_combined;
  3387. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3388. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3389. arg->buf = phyerr->buf;
  3390. arg->hdr_len = sizeof(*phyerr);
  3391. for (i = 0; i < 4; i++)
  3392. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3393. phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
  3394. if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
  3395. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3396. else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
  3397. arg->phy_err_code = PHY_ERROR_RADAR;
  3398. else
  3399. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3400. return 0;
  3401. }
  3402. void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
  3403. {
  3404. struct wmi_phyerr_hdr_arg hdr_arg = {};
  3405. struct wmi_phyerr_ev_arg phyerr_arg = {};
  3406. const void *phyerr;
  3407. u32 count, i, buf_len, phy_err_code;
  3408. u64 tsf;
  3409. int left_len, ret;
  3410. ATH10K_DFS_STAT_INC(ar, phy_errors);
  3411. ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
  3412. if (ret) {
  3413. ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
  3414. return;
  3415. }
  3416. /* Check number of included events */
  3417. count = hdr_arg.num_phyerrs;
  3418. left_len = hdr_arg.buf_len;
  3419. tsf = hdr_arg.tsf_u32;
  3420. tsf <<= 32;
  3421. tsf |= hdr_arg.tsf_l32;
  3422. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3423. "wmi event phyerr count %d tsf64 0x%llX\n",
  3424. count, tsf);
  3425. phyerr = hdr_arg.phyerrs;
  3426. for (i = 0; i < count; i++) {
  3427. ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
  3428. if (ret) {
  3429. ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
  3430. i);
  3431. return;
  3432. }
  3433. left_len -= phyerr_arg.hdr_len;
  3434. buf_len = phyerr_arg.buf_len;
  3435. phy_err_code = phyerr_arg.phy_err_code;
  3436. if (left_len < buf_len) {
  3437. ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
  3438. return;
  3439. }
  3440. left_len -= buf_len;
  3441. switch (phy_err_code) {
  3442. case PHY_ERROR_RADAR:
  3443. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3444. break;
  3445. case PHY_ERROR_SPECTRAL_SCAN:
  3446. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3447. break;
  3448. case PHY_ERROR_FALSE_RADAR_EXT:
  3449. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3450. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3451. break;
  3452. default:
  3453. break;
  3454. }
  3455. phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
  3456. }
  3457. }
  3458. void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
  3459. {
  3460. struct wmi_roam_ev_arg arg = {};
  3461. int ret;
  3462. u32 vdev_id;
  3463. u32 reason;
  3464. s32 rssi;
  3465. ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
  3466. if (ret) {
  3467. ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
  3468. return;
  3469. }
  3470. vdev_id = __le32_to_cpu(arg.vdev_id);
  3471. reason = __le32_to_cpu(arg.reason);
  3472. rssi = __le32_to_cpu(arg.rssi);
  3473. rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
  3474. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3475. "wmi roam event vdev %u reason 0x%08x rssi %d\n",
  3476. vdev_id, reason, rssi);
  3477. if (reason >= WMI_ROAM_REASON_MAX)
  3478. ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
  3479. reason, vdev_id);
  3480. switch (reason) {
  3481. case WMI_ROAM_REASON_BEACON_MISS:
  3482. ath10k_mac_handle_beacon_miss(ar, vdev_id);
  3483. break;
  3484. case WMI_ROAM_REASON_BETTER_AP:
  3485. case WMI_ROAM_REASON_LOW_RSSI:
  3486. case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
  3487. case WMI_ROAM_REASON_HO_FAILED:
  3488. ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
  3489. reason, vdev_id);
  3490. break;
  3491. }
  3492. }
  3493. void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
  3494. {
  3495. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
  3496. }
  3497. void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
  3498. {
  3499. char buf[101], c;
  3500. int i;
  3501. for (i = 0; i < sizeof(buf) - 1; i++) {
  3502. if (i >= skb->len)
  3503. break;
  3504. c = skb->data[i];
  3505. if (c == '\0')
  3506. break;
  3507. if (isascii(c) && isprint(c))
  3508. buf[i] = c;
  3509. else
  3510. buf[i] = '.';
  3511. }
  3512. if (i == sizeof(buf) - 1)
  3513. ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
  3514. /* for some reason the debug prints end with \n, remove that */
  3515. if (skb->data[i - 1] == '\n')
  3516. i--;
  3517. /* the last byte is always reserved for the null character */
  3518. buf[i] = '\0';
  3519. ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
  3520. }
  3521. void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
  3522. {
  3523. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
  3524. }
  3525. void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
  3526. {
  3527. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
  3528. }
  3529. void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
  3530. struct sk_buff *skb)
  3531. {
  3532. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
  3533. }
  3534. void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
  3535. struct sk_buff *skb)
  3536. {
  3537. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
  3538. }
  3539. void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
  3540. {
  3541. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
  3542. }
  3543. void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
  3544. {
  3545. struct wmi_wow_ev_arg ev = {};
  3546. int ret;
  3547. complete(&ar->wow.wakeup_completed);
  3548. ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
  3549. if (ret) {
  3550. ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
  3551. return;
  3552. }
  3553. ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
  3554. wow_reason(ev.wake_reason));
  3555. }
  3556. void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
  3557. {
  3558. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
  3559. }
  3560. static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
  3561. struct wmi_pdev_tpc_config_event *ev,
  3562. u32 rate_idx, u32 num_chains,
  3563. u32 rate_code, u8 type)
  3564. {
  3565. u8 tpc, num_streams, preamble, ch, stm_idx;
  3566. num_streams = ATH10K_HW_NSS(rate_code);
  3567. preamble = ATH10K_HW_PREAMBLE(rate_code);
  3568. ch = num_chains - 1;
  3569. tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
  3570. if (__le32_to_cpu(ev->num_tx_chain) <= 1)
  3571. goto out;
  3572. if (preamble == WMI_RATE_PREAMBLE_CCK)
  3573. goto out;
  3574. stm_idx = num_streams - 1;
  3575. if (num_chains <= num_streams)
  3576. goto out;
  3577. switch (type) {
  3578. case WMI_TPC_TABLE_TYPE_STBC:
  3579. tpc = min_t(u8, tpc,
  3580. ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
  3581. break;
  3582. case WMI_TPC_TABLE_TYPE_TXBF:
  3583. tpc = min_t(u8, tpc,
  3584. ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
  3585. break;
  3586. case WMI_TPC_TABLE_TYPE_CDD:
  3587. tpc = min_t(u8, tpc,
  3588. ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
  3589. break;
  3590. default:
  3591. ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
  3592. tpc = 0;
  3593. break;
  3594. }
  3595. out:
  3596. return tpc;
  3597. }
  3598. static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
  3599. struct wmi_pdev_tpc_config_event *ev,
  3600. struct ath10k_tpc_stats *tpc_stats,
  3601. u8 *rate_code, u16 *pream_table, u8 type)
  3602. {
  3603. u32 i, j, pream_idx, flags;
  3604. u8 tpc[WMI_TPC_TX_N_CHAIN];
  3605. char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  3606. char buff[WMI_TPC_BUF_SIZE];
  3607. flags = __le32_to_cpu(ev->flags);
  3608. switch (type) {
  3609. case WMI_TPC_TABLE_TYPE_CDD:
  3610. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
  3611. ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
  3612. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3613. return;
  3614. }
  3615. break;
  3616. case WMI_TPC_TABLE_TYPE_STBC:
  3617. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
  3618. ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
  3619. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3620. return;
  3621. }
  3622. break;
  3623. case WMI_TPC_TABLE_TYPE_TXBF:
  3624. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
  3625. ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
  3626. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3627. return;
  3628. }
  3629. break;
  3630. default:
  3631. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3632. "invalid table type in wmi tpc event: %d\n", type);
  3633. return;
  3634. }
  3635. pream_idx = 0;
  3636. for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
  3637. memset(tpc_value, 0, sizeof(tpc_value));
  3638. memset(buff, 0, sizeof(buff));
  3639. if (i == pream_table[pream_idx])
  3640. pream_idx++;
  3641. for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
  3642. if (j >= __le32_to_cpu(ev->num_tx_chain))
  3643. break;
  3644. tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
  3645. rate_code[i],
  3646. type);
  3647. snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
  3648. strncat(tpc_value, buff, strlen(buff));
  3649. }
  3650. tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
  3651. tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
  3652. memcpy(tpc_stats->tpc_table[type].tpc_value[i],
  3653. tpc_value, sizeof(tpc_value));
  3654. }
  3655. }
  3656. void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
  3657. {
  3658. u32 i, j, pream_idx, num_tx_chain;
  3659. u8 rate_code[WMI_TPC_RATE_MAX], rate_idx;
  3660. u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
  3661. struct wmi_pdev_tpc_config_event *ev;
  3662. struct ath10k_tpc_stats *tpc_stats;
  3663. ev = (struct wmi_pdev_tpc_config_event *)skb->data;
  3664. tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
  3665. if (!tpc_stats)
  3666. return;
  3667. /* Create the rate code table based on the chains supported */
  3668. rate_idx = 0;
  3669. pream_idx = 0;
  3670. /* Fill CCK rate code */
  3671. for (i = 0; i < 4; i++) {
  3672. rate_code[rate_idx] =
  3673. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
  3674. rate_idx++;
  3675. }
  3676. pream_table[pream_idx] = rate_idx;
  3677. pream_idx++;
  3678. /* Fill OFDM rate code */
  3679. for (i = 0; i < 8; i++) {
  3680. rate_code[rate_idx] =
  3681. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
  3682. rate_idx++;
  3683. }
  3684. pream_table[pream_idx] = rate_idx;
  3685. pream_idx++;
  3686. num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  3687. /* Fill HT20 rate code */
  3688. for (i = 0; i < num_tx_chain; i++) {
  3689. for (j = 0; j < 8; j++) {
  3690. rate_code[rate_idx] =
  3691. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  3692. rate_idx++;
  3693. }
  3694. }
  3695. pream_table[pream_idx] = rate_idx;
  3696. pream_idx++;
  3697. /* Fill HT40 rate code */
  3698. for (i = 0; i < num_tx_chain; i++) {
  3699. for (j = 0; j < 8; j++) {
  3700. rate_code[rate_idx] =
  3701. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  3702. rate_idx++;
  3703. }
  3704. }
  3705. pream_table[pream_idx] = rate_idx;
  3706. pream_idx++;
  3707. /* Fill VHT20 rate code */
  3708. for (i = 0; i < __le32_to_cpu(ev->num_tx_chain); i++) {
  3709. for (j = 0; j < 10; j++) {
  3710. rate_code[rate_idx] =
  3711. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3712. rate_idx++;
  3713. }
  3714. }
  3715. pream_table[pream_idx] = rate_idx;
  3716. pream_idx++;
  3717. /* Fill VHT40 rate code */
  3718. for (i = 0; i < num_tx_chain; i++) {
  3719. for (j = 0; j < 10; j++) {
  3720. rate_code[rate_idx] =
  3721. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3722. rate_idx++;
  3723. }
  3724. }
  3725. pream_table[pream_idx] = rate_idx;
  3726. pream_idx++;
  3727. /* Fill VHT80 rate code */
  3728. for (i = 0; i < num_tx_chain; i++) {
  3729. for (j = 0; j < 10; j++) {
  3730. rate_code[rate_idx] =
  3731. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3732. rate_idx++;
  3733. }
  3734. }
  3735. pream_table[pream_idx] = rate_idx;
  3736. pream_idx++;
  3737. rate_code[rate_idx++] =
  3738. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  3739. rate_code[rate_idx++] =
  3740. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3741. rate_code[rate_idx++] =
  3742. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  3743. rate_code[rate_idx++] =
  3744. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3745. rate_code[rate_idx++] =
  3746. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3747. pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
  3748. tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
  3749. tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
  3750. tpc_stats->ctl = __le32_to_cpu(ev->ctl);
  3751. tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
  3752. tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
  3753. tpc_stats->twice_antenna_reduction =
  3754. __le32_to_cpu(ev->twice_antenna_reduction);
  3755. tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
  3756. tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
  3757. tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  3758. tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
  3759. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3760. rate_code, pream_table,
  3761. WMI_TPC_TABLE_TYPE_CDD);
  3762. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3763. rate_code, pream_table,
  3764. WMI_TPC_TABLE_TYPE_STBC);
  3765. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3766. rate_code, pream_table,
  3767. WMI_TPC_TABLE_TYPE_TXBF);
  3768. ath10k_debug_tpc_stats_process(ar, tpc_stats);
  3769. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3770. "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
  3771. __le32_to_cpu(ev->chan_freq),
  3772. __le32_to_cpu(ev->phy_mode),
  3773. __le32_to_cpu(ev->ctl),
  3774. __le32_to_cpu(ev->reg_domain),
  3775. a_sle32_to_cpu(ev->twice_antenna_gain),
  3776. __le32_to_cpu(ev->twice_antenna_reduction),
  3777. __le32_to_cpu(ev->power_limit),
  3778. __le32_to_cpu(ev->twice_max_rd_power) / 2,
  3779. __le32_to_cpu(ev->num_tx_chain),
  3780. __le32_to_cpu(ev->rate_max));
  3781. }
  3782. void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
  3783. {
  3784. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
  3785. }
  3786. void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
  3787. {
  3788. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
  3789. }
  3790. void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
  3791. {
  3792. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
  3793. }
  3794. void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
  3795. {
  3796. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
  3797. }
  3798. void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
  3799. {
  3800. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
  3801. }
  3802. void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
  3803. struct sk_buff *skb)
  3804. {
  3805. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
  3806. }
  3807. void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
  3808. {
  3809. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
  3810. }
  3811. void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
  3812. {
  3813. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
  3814. }
  3815. void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
  3816. {
  3817. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
  3818. }
  3819. static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
  3820. u32 num_units, u32 unit_len)
  3821. {
  3822. dma_addr_t paddr;
  3823. u32 pool_size = 0;
  3824. int idx = ar->wmi.num_mem_chunks;
  3825. void *vaddr = NULL;
  3826. if (ar->wmi.num_mem_chunks == ARRAY_SIZE(ar->wmi.mem_chunks))
  3827. return -ENOMEM;
  3828. while (!vaddr && num_units) {
  3829. pool_size = num_units * round_up(unit_len, 4);
  3830. if (!pool_size)
  3831. return -EINVAL;
  3832. vaddr = kzalloc(pool_size, GFP_KERNEL | __GFP_NOWARN);
  3833. if (!vaddr)
  3834. num_units /= 2;
  3835. }
  3836. if (!num_units)
  3837. return -ENOMEM;
  3838. paddr = dma_map_single(ar->dev, vaddr, pool_size, DMA_TO_DEVICE);
  3839. if (dma_mapping_error(ar->dev, paddr)) {
  3840. kfree(vaddr);
  3841. return -ENOMEM;
  3842. }
  3843. ar->wmi.mem_chunks[idx].vaddr = vaddr;
  3844. ar->wmi.mem_chunks[idx].paddr = paddr;
  3845. ar->wmi.mem_chunks[idx].len = pool_size;
  3846. ar->wmi.mem_chunks[idx].req_id = req_id;
  3847. ar->wmi.num_mem_chunks++;
  3848. return num_units;
  3849. }
  3850. static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
  3851. u32 num_units, u32 unit_len)
  3852. {
  3853. int ret;
  3854. while (num_units) {
  3855. ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
  3856. if (ret < 0)
  3857. return ret;
  3858. num_units -= ret;
  3859. }
  3860. return 0;
  3861. }
  3862. static bool
  3863. ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
  3864. const struct wlan_host_mem_req **mem_reqs,
  3865. u32 num_mem_reqs)
  3866. {
  3867. u32 req_id, num_units, unit_size, num_unit_info;
  3868. u32 pool_size;
  3869. int i, j;
  3870. bool found;
  3871. if (ar->wmi.num_mem_chunks != num_mem_reqs)
  3872. return false;
  3873. for (i = 0; i < num_mem_reqs; ++i) {
  3874. req_id = __le32_to_cpu(mem_reqs[i]->req_id);
  3875. num_units = __le32_to_cpu(mem_reqs[i]->num_units);
  3876. unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
  3877. num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
  3878. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  3879. if (ar->num_active_peers)
  3880. num_units = ar->num_active_peers + 1;
  3881. else
  3882. num_units = ar->max_num_peers + 1;
  3883. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  3884. num_units = ar->max_num_peers + 1;
  3885. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  3886. num_units = ar->max_num_vdevs + 1;
  3887. }
  3888. found = false;
  3889. for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
  3890. if (ar->wmi.mem_chunks[j].req_id == req_id) {
  3891. pool_size = num_units * round_up(unit_size, 4);
  3892. if (ar->wmi.mem_chunks[j].len == pool_size) {
  3893. found = true;
  3894. break;
  3895. }
  3896. }
  3897. }
  3898. if (!found)
  3899. return false;
  3900. }
  3901. return true;
  3902. }
  3903. static int
  3904. ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  3905. struct wmi_svc_rdy_ev_arg *arg)
  3906. {
  3907. struct wmi_service_ready_event *ev;
  3908. size_t i, n;
  3909. if (skb->len < sizeof(*ev))
  3910. return -EPROTO;
  3911. ev = (void *)skb->data;
  3912. skb_pull(skb, sizeof(*ev));
  3913. arg->min_tx_power = ev->hw_min_tx_power;
  3914. arg->max_tx_power = ev->hw_max_tx_power;
  3915. arg->ht_cap = ev->ht_cap_info;
  3916. arg->vht_cap = ev->vht_cap_info;
  3917. arg->sw_ver0 = ev->sw_version;
  3918. arg->sw_ver1 = ev->sw_version_1;
  3919. arg->phy_capab = ev->phy_capability;
  3920. arg->num_rf_chains = ev->num_rf_chains;
  3921. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  3922. arg->num_mem_reqs = ev->num_mem_reqs;
  3923. arg->service_map = ev->wmi_service_bitmap;
  3924. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  3925. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  3926. ARRAY_SIZE(arg->mem_reqs));
  3927. for (i = 0; i < n; i++)
  3928. arg->mem_reqs[i] = &ev->mem_reqs[i];
  3929. if (skb->len <
  3930. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  3931. return -EPROTO;
  3932. return 0;
  3933. }
  3934. static int
  3935. ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  3936. struct wmi_svc_rdy_ev_arg *arg)
  3937. {
  3938. struct wmi_10x_service_ready_event *ev;
  3939. int i, n;
  3940. if (skb->len < sizeof(*ev))
  3941. return -EPROTO;
  3942. ev = (void *)skb->data;
  3943. skb_pull(skb, sizeof(*ev));
  3944. arg->min_tx_power = ev->hw_min_tx_power;
  3945. arg->max_tx_power = ev->hw_max_tx_power;
  3946. arg->ht_cap = ev->ht_cap_info;
  3947. arg->vht_cap = ev->vht_cap_info;
  3948. arg->sw_ver0 = ev->sw_version;
  3949. arg->phy_capab = ev->phy_capability;
  3950. arg->num_rf_chains = ev->num_rf_chains;
  3951. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  3952. arg->num_mem_reqs = ev->num_mem_reqs;
  3953. arg->service_map = ev->wmi_service_bitmap;
  3954. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  3955. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  3956. ARRAY_SIZE(arg->mem_reqs));
  3957. for (i = 0; i < n; i++)
  3958. arg->mem_reqs[i] = &ev->mem_reqs[i];
  3959. if (skb->len <
  3960. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  3961. return -EPROTO;
  3962. return 0;
  3963. }
  3964. static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
  3965. {
  3966. struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
  3967. struct sk_buff *skb = ar->svc_rdy_skb;
  3968. struct wmi_svc_rdy_ev_arg arg = {};
  3969. u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
  3970. int ret;
  3971. bool allocated;
  3972. if (!skb) {
  3973. ath10k_warn(ar, "invalid service ready event skb\n");
  3974. return;
  3975. }
  3976. ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
  3977. if (ret) {
  3978. ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
  3979. return;
  3980. }
  3981. memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
  3982. ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
  3983. arg.service_map_len);
  3984. ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
  3985. ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
  3986. ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
  3987. ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
  3988. ar->fw_version_major =
  3989. (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
  3990. ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
  3991. ar->fw_version_release =
  3992. (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
  3993. ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
  3994. ar->phy_capability = __le32_to_cpu(arg.phy_capab);
  3995. ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
  3996. ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd);
  3997. ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
  3998. arg.service_map, arg.service_map_len);
  3999. /* only manually set fw features when not using FW IE format */
  4000. if (ar->fw_api == 1 && ar->fw_version_build > 636)
  4001. set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
  4002. if (ar->num_rf_chains > ar->max_spatial_stream) {
  4003. ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
  4004. ar->num_rf_chains, ar->max_spatial_stream);
  4005. ar->num_rf_chains = ar->max_spatial_stream;
  4006. }
  4007. if (!ar->cfg_tx_chainmask) {
  4008. ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
  4009. ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
  4010. }
  4011. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  4012. snprintf(ar->hw->wiphy->fw_version,
  4013. sizeof(ar->hw->wiphy->fw_version),
  4014. "%u.%u.%u.%u",
  4015. ar->fw_version_major,
  4016. ar->fw_version_minor,
  4017. ar->fw_version_release,
  4018. ar->fw_version_build);
  4019. }
  4020. num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
  4021. if (num_mem_reqs > WMI_MAX_MEM_REQS) {
  4022. ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
  4023. num_mem_reqs);
  4024. return;
  4025. }
  4026. if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
  4027. ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
  4028. TARGET_10_4_NUM_VDEVS;
  4029. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
  4030. TARGET_10_4_NUM_VDEVS;
  4031. ar->num_tids = ar->num_active_peers * 2;
  4032. ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
  4033. }
  4034. /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
  4035. * and WMI_SERVICE_IRAM_TIDS, etc.
  4036. */
  4037. allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
  4038. num_mem_reqs);
  4039. if (allocated)
  4040. goto skip_mem_alloc;
  4041. /* Either this event is received during boot time or there is a change
  4042. * in memory requirement from firmware when compared to last request.
  4043. * Free any old memory and do a fresh allocation based on the current
  4044. * memory requirement.
  4045. */
  4046. ath10k_wmi_free_host_mem(ar);
  4047. for (i = 0; i < num_mem_reqs; ++i) {
  4048. req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
  4049. num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
  4050. unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
  4051. num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
  4052. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4053. if (ar->num_active_peers)
  4054. num_units = ar->num_active_peers + 1;
  4055. else
  4056. num_units = ar->max_num_peers + 1;
  4057. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4058. /* number of units to allocate is number of
  4059. * peers, 1 extra for self peer on target */
  4060. /* this needs to be tied, host and target
  4061. * can get out of sync */
  4062. num_units = ar->max_num_peers + 1;
  4063. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4064. num_units = ar->max_num_vdevs + 1;
  4065. }
  4066. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4067. "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
  4068. req_id,
  4069. __le32_to_cpu(arg.mem_reqs[i]->num_units),
  4070. num_unit_info,
  4071. unit_size,
  4072. num_units);
  4073. ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
  4074. unit_size);
  4075. if (ret)
  4076. return;
  4077. }
  4078. skip_mem_alloc:
  4079. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4080. "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
  4081. __le32_to_cpu(arg.min_tx_power),
  4082. __le32_to_cpu(arg.max_tx_power),
  4083. __le32_to_cpu(arg.ht_cap),
  4084. __le32_to_cpu(arg.vht_cap),
  4085. __le32_to_cpu(arg.sw_ver0),
  4086. __le32_to_cpu(arg.sw_ver1),
  4087. __le32_to_cpu(arg.fw_build),
  4088. __le32_to_cpu(arg.phy_capab),
  4089. __le32_to_cpu(arg.num_rf_chains),
  4090. __le32_to_cpu(arg.eeprom_rd),
  4091. __le32_to_cpu(arg.num_mem_reqs));
  4092. dev_kfree_skb(skb);
  4093. ar->svc_rdy_skb = NULL;
  4094. complete(&ar->wmi.service_ready);
  4095. }
  4096. void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
  4097. {
  4098. ar->svc_rdy_skb = skb;
  4099. queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
  4100. }
  4101. static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4102. struct wmi_rdy_ev_arg *arg)
  4103. {
  4104. struct wmi_ready_event *ev = (void *)skb->data;
  4105. if (skb->len < sizeof(*ev))
  4106. return -EPROTO;
  4107. skb_pull(skb, sizeof(*ev));
  4108. arg->sw_version = ev->sw_version;
  4109. arg->abi_version = ev->abi_version;
  4110. arg->status = ev->status;
  4111. arg->mac_addr = ev->mac_addr.addr;
  4112. return 0;
  4113. }
  4114. static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
  4115. struct wmi_roam_ev_arg *arg)
  4116. {
  4117. struct wmi_roam_ev *ev = (void *)skb->data;
  4118. if (skb->len < sizeof(*ev))
  4119. return -EPROTO;
  4120. skb_pull(skb, sizeof(*ev));
  4121. arg->vdev_id = ev->vdev_id;
  4122. arg->reason = ev->reason;
  4123. return 0;
  4124. }
  4125. int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
  4126. {
  4127. struct wmi_rdy_ev_arg arg = {};
  4128. int ret;
  4129. ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
  4130. if (ret) {
  4131. ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
  4132. return ret;
  4133. }
  4134. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4135. "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
  4136. __le32_to_cpu(arg.sw_version),
  4137. __le32_to_cpu(arg.abi_version),
  4138. arg.mac_addr,
  4139. __le32_to_cpu(arg.status));
  4140. ether_addr_copy(ar->mac_addr, arg.mac_addr);
  4141. complete(&ar->wmi.unified_ready);
  4142. return 0;
  4143. }
  4144. static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
  4145. {
  4146. const struct wmi_pdev_temperature_event *ev;
  4147. ev = (struct wmi_pdev_temperature_event *)skb->data;
  4148. if (WARN_ON(skb->len < sizeof(*ev)))
  4149. return -EPROTO;
  4150. ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
  4151. return 0;
  4152. }
  4153. static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4154. {
  4155. struct wmi_cmd_hdr *cmd_hdr;
  4156. enum wmi_event_id id;
  4157. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4158. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4159. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4160. goto out;
  4161. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4162. switch (id) {
  4163. case WMI_MGMT_RX_EVENTID:
  4164. ath10k_wmi_event_mgmt_rx(ar, skb);
  4165. /* mgmt_rx() owns the skb now! */
  4166. return;
  4167. case WMI_SCAN_EVENTID:
  4168. ath10k_wmi_event_scan(ar, skb);
  4169. break;
  4170. case WMI_CHAN_INFO_EVENTID:
  4171. ath10k_wmi_event_chan_info(ar, skb);
  4172. break;
  4173. case WMI_ECHO_EVENTID:
  4174. ath10k_wmi_event_echo(ar, skb);
  4175. break;
  4176. case WMI_DEBUG_MESG_EVENTID:
  4177. ath10k_wmi_event_debug_mesg(ar, skb);
  4178. break;
  4179. case WMI_UPDATE_STATS_EVENTID:
  4180. ath10k_wmi_event_update_stats(ar, skb);
  4181. break;
  4182. case WMI_VDEV_START_RESP_EVENTID:
  4183. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4184. break;
  4185. case WMI_VDEV_STOPPED_EVENTID:
  4186. ath10k_wmi_event_vdev_stopped(ar, skb);
  4187. break;
  4188. case WMI_PEER_STA_KICKOUT_EVENTID:
  4189. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4190. break;
  4191. case WMI_HOST_SWBA_EVENTID:
  4192. ath10k_wmi_event_host_swba(ar, skb);
  4193. break;
  4194. case WMI_TBTTOFFSET_UPDATE_EVENTID:
  4195. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4196. break;
  4197. case WMI_PHYERR_EVENTID:
  4198. ath10k_wmi_event_phyerr(ar, skb);
  4199. break;
  4200. case WMI_ROAM_EVENTID:
  4201. ath10k_wmi_event_roam(ar, skb);
  4202. break;
  4203. case WMI_PROFILE_MATCH:
  4204. ath10k_wmi_event_profile_match(ar, skb);
  4205. break;
  4206. case WMI_DEBUG_PRINT_EVENTID:
  4207. ath10k_wmi_event_debug_print(ar, skb);
  4208. break;
  4209. case WMI_PDEV_QVIT_EVENTID:
  4210. ath10k_wmi_event_pdev_qvit(ar, skb);
  4211. break;
  4212. case WMI_WLAN_PROFILE_DATA_EVENTID:
  4213. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4214. break;
  4215. case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
  4216. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4217. break;
  4218. case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
  4219. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4220. break;
  4221. case WMI_RTT_ERROR_REPORT_EVENTID:
  4222. ath10k_wmi_event_rtt_error_report(ar, skb);
  4223. break;
  4224. case WMI_WOW_WAKEUP_HOST_EVENTID:
  4225. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4226. break;
  4227. case WMI_DCS_INTERFERENCE_EVENTID:
  4228. ath10k_wmi_event_dcs_interference(ar, skb);
  4229. break;
  4230. case WMI_PDEV_TPC_CONFIG_EVENTID:
  4231. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4232. break;
  4233. case WMI_PDEV_FTM_INTG_EVENTID:
  4234. ath10k_wmi_event_pdev_ftm_intg(ar, skb);
  4235. break;
  4236. case WMI_GTK_OFFLOAD_STATUS_EVENTID:
  4237. ath10k_wmi_event_gtk_offload_status(ar, skb);
  4238. break;
  4239. case WMI_GTK_REKEY_FAIL_EVENTID:
  4240. ath10k_wmi_event_gtk_rekey_fail(ar, skb);
  4241. break;
  4242. case WMI_TX_DELBA_COMPLETE_EVENTID:
  4243. ath10k_wmi_event_delba_complete(ar, skb);
  4244. break;
  4245. case WMI_TX_ADDBA_COMPLETE_EVENTID:
  4246. ath10k_wmi_event_addba_complete(ar, skb);
  4247. break;
  4248. case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
  4249. ath10k_wmi_event_vdev_install_key_complete(ar, skb);
  4250. break;
  4251. case WMI_SERVICE_READY_EVENTID:
  4252. ath10k_wmi_event_service_ready(ar, skb);
  4253. return;
  4254. case WMI_READY_EVENTID:
  4255. ath10k_wmi_event_ready(ar, skb);
  4256. break;
  4257. default:
  4258. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4259. break;
  4260. }
  4261. out:
  4262. dev_kfree_skb(skb);
  4263. }
  4264. static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4265. {
  4266. struct wmi_cmd_hdr *cmd_hdr;
  4267. enum wmi_10x_event_id id;
  4268. bool consumed;
  4269. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4270. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4271. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4272. goto out;
  4273. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4274. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4275. /* Ready event must be handled normally also in UTF mode so that we
  4276. * know the UTF firmware has booted, others we are just bypass WMI
  4277. * events to testmode.
  4278. */
  4279. if (consumed && id != WMI_10X_READY_EVENTID) {
  4280. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4281. "wmi testmode consumed 0x%x\n", id);
  4282. goto out;
  4283. }
  4284. switch (id) {
  4285. case WMI_10X_MGMT_RX_EVENTID:
  4286. ath10k_wmi_event_mgmt_rx(ar, skb);
  4287. /* mgmt_rx() owns the skb now! */
  4288. return;
  4289. case WMI_10X_SCAN_EVENTID:
  4290. ath10k_wmi_event_scan(ar, skb);
  4291. break;
  4292. case WMI_10X_CHAN_INFO_EVENTID:
  4293. ath10k_wmi_event_chan_info(ar, skb);
  4294. break;
  4295. case WMI_10X_ECHO_EVENTID:
  4296. ath10k_wmi_event_echo(ar, skb);
  4297. break;
  4298. case WMI_10X_DEBUG_MESG_EVENTID:
  4299. ath10k_wmi_event_debug_mesg(ar, skb);
  4300. break;
  4301. case WMI_10X_UPDATE_STATS_EVENTID:
  4302. ath10k_wmi_event_update_stats(ar, skb);
  4303. break;
  4304. case WMI_10X_VDEV_START_RESP_EVENTID:
  4305. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4306. break;
  4307. case WMI_10X_VDEV_STOPPED_EVENTID:
  4308. ath10k_wmi_event_vdev_stopped(ar, skb);
  4309. break;
  4310. case WMI_10X_PEER_STA_KICKOUT_EVENTID:
  4311. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4312. break;
  4313. case WMI_10X_HOST_SWBA_EVENTID:
  4314. ath10k_wmi_event_host_swba(ar, skb);
  4315. break;
  4316. case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
  4317. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4318. break;
  4319. case WMI_10X_PHYERR_EVENTID:
  4320. ath10k_wmi_event_phyerr(ar, skb);
  4321. break;
  4322. case WMI_10X_ROAM_EVENTID:
  4323. ath10k_wmi_event_roam(ar, skb);
  4324. break;
  4325. case WMI_10X_PROFILE_MATCH:
  4326. ath10k_wmi_event_profile_match(ar, skb);
  4327. break;
  4328. case WMI_10X_DEBUG_PRINT_EVENTID:
  4329. ath10k_wmi_event_debug_print(ar, skb);
  4330. break;
  4331. case WMI_10X_PDEV_QVIT_EVENTID:
  4332. ath10k_wmi_event_pdev_qvit(ar, skb);
  4333. break;
  4334. case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
  4335. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4336. break;
  4337. case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
  4338. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4339. break;
  4340. case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
  4341. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4342. break;
  4343. case WMI_10X_RTT_ERROR_REPORT_EVENTID:
  4344. ath10k_wmi_event_rtt_error_report(ar, skb);
  4345. break;
  4346. case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
  4347. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4348. break;
  4349. case WMI_10X_DCS_INTERFERENCE_EVENTID:
  4350. ath10k_wmi_event_dcs_interference(ar, skb);
  4351. break;
  4352. case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
  4353. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4354. break;
  4355. case WMI_10X_INST_RSSI_STATS_EVENTID:
  4356. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  4357. break;
  4358. case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
  4359. ath10k_wmi_event_vdev_standby_req(ar, skb);
  4360. break;
  4361. case WMI_10X_VDEV_RESUME_REQ_EVENTID:
  4362. ath10k_wmi_event_vdev_resume_req(ar, skb);
  4363. break;
  4364. case WMI_10X_SERVICE_READY_EVENTID:
  4365. ath10k_wmi_event_service_ready(ar, skb);
  4366. return;
  4367. case WMI_10X_READY_EVENTID:
  4368. ath10k_wmi_event_ready(ar, skb);
  4369. break;
  4370. case WMI_10X_PDEV_UTF_EVENTID:
  4371. /* ignore utf events */
  4372. break;
  4373. default:
  4374. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4375. break;
  4376. }
  4377. out:
  4378. dev_kfree_skb(skb);
  4379. }
  4380. static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4381. {
  4382. struct wmi_cmd_hdr *cmd_hdr;
  4383. enum wmi_10_2_event_id id;
  4384. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4385. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4386. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4387. goto out;
  4388. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4389. switch (id) {
  4390. case WMI_10_2_MGMT_RX_EVENTID:
  4391. ath10k_wmi_event_mgmt_rx(ar, skb);
  4392. /* mgmt_rx() owns the skb now! */
  4393. return;
  4394. case WMI_10_2_SCAN_EVENTID:
  4395. ath10k_wmi_event_scan(ar, skb);
  4396. break;
  4397. case WMI_10_2_CHAN_INFO_EVENTID:
  4398. ath10k_wmi_event_chan_info(ar, skb);
  4399. break;
  4400. case WMI_10_2_ECHO_EVENTID:
  4401. ath10k_wmi_event_echo(ar, skb);
  4402. break;
  4403. case WMI_10_2_DEBUG_MESG_EVENTID:
  4404. ath10k_wmi_event_debug_mesg(ar, skb);
  4405. break;
  4406. case WMI_10_2_UPDATE_STATS_EVENTID:
  4407. ath10k_wmi_event_update_stats(ar, skb);
  4408. break;
  4409. case WMI_10_2_VDEV_START_RESP_EVENTID:
  4410. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4411. break;
  4412. case WMI_10_2_VDEV_STOPPED_EVENTID:
  4413. ath10k_wmi_event_vdev_stopped(ar, skb);
  4414. break;
  4415. case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
  4416. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4417. break;
  4418. case WMI_10_2_HOST_SWBA_EVENTID:
  4419. ath10k_wmi_event_host_swba(ar, skb);
  4420. break;
  4421. case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
  4422. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4423. break;
  4424. case WMI_10_2_PHYERR_EVENTID:
  4425. ath10k_wmi_event_phyerr(ar, skb);
  4426. break;
  4427. case WMI_10_2_ROAM_EVENTID:
  4428. ath10k_wmi_event_roam(ar, skb);
  4429. break;
  4430. case WMI_10_2_PROFILE_MATCH:
  4431. ath10k_wmi_event_profile_match(ar, skb);
  4432. break;
  4433. case WMI_10_2_DEBUG_PRINT_EVENTID:
  4434. ath10k_wmi_event_debug_print(ar, skb);
  4435. break;
  4436. case WMI_10_2_PDEV_QVIT_EVENTID:
  4437. ath10k_wmi_event_pdev_qvit(ar, skb);
  4438. break;
  4439. case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
  4440. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4441. break;
  4442. case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
  4443. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4444. break;
  4445. case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
  4446. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4447. break;
  4448. case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
  4449. ath10k_wmi_event_rtt_error_report(ar, skb);
  4450. break;
  4451. case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
  4452. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4453. break;
  4454. case WMI_10_2_DCS_INTERFERENCE_EVENTID:
  4455. ath10k_wmi_event_dcs_interference(ar, skb);
  4456. break;
  4457. case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
  4458. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4459. break;
  4460. case WMI_10_2_INST_RSSI_STATS_EVENTID:
  4461. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  4462. break;
  4463. case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
  4464. ath10k_wmi_event_vdev_standby_req(ar, skb);
  4465. break;
  4466. case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
  4467. ath10k_wmi_event_vdev_resume_req(ar, skb);
  4468. break;
  4469. case WMI_10_2_SERVICE_READY_EVENTID:
  4470. ath10k_wmi_event_service_ready(ar, skb);
  4471. return;
  4472. case WMI_10_2_READY_EVENTID:
  4473. ath10k_wmi_event_ready(ar, skb);
  4474. break;
  4475. case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
  4476. ath10k_wmi_event_temperature(ar, skb);
  4477. break;
  4478. case WMI_10_2_RTT_KEEPALIVE_EVENTID:
  4479. case WMI_10_2_GPIO_INPUT_EVENTID:
  4480. case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
  4481. case WMI_10_2_GENERIC_BUFFER_EVENTID:
  4482. case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
  4483. case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
  4484. case WMI_10_2_WDS_PEER_EVENTID:
  4485. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4486. "received event id %d not implemented\n", id);
  4487. break;
  4488. default:
  4489. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4490. break;
  4491. }
  4492. out:
  4493. dev_kfree_skb(skb);
  4494. }
  4495. static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4496. {
  4497. struct wmi_cmd_hdr *cmd_hdr;
  4498. enum wmi_10_4_event_id id;
  4499. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4500. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4501. if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
  4502. goto out;
  4503. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4504. switch (id) {
  4505. case WMI_10_4_MGMT_RX_EVENTID:
  4506. ath10k_wmi_event_mgmt_rx(ar, skb);
  4507. /* mgmt_rx() owns the skb now! */
  4508. return;
  4509. case WMI_10_4_ECHO_EVENTID:
  4510. ath10k_wmi_event_echo(ar, skb);
  4511. break;
  4512. case WMI_10_4_DEBUG_MESG_EVENTID:
  4513. ath10k_wmi_event_debug_mesg(ar, skb);
  4514. break;
  4515. case WMI_10_4_SERVICE_READY_EVENTID:
  4516. ath10k_wmi_event_service_ready(ar, skb);
  4517. return;
  4518. case WMI_10_4_SCAN_EVENTID:
  4519. ath10k_wmi_event_scan(ar, skb);
  4520. break;
  4521. case WMI_10_4_CHAN_INFO_EVENTID:
  4522. ath10k_wmi_event_chan_info(ar, skb);
  4523. break;
  4524. case WMI_10_4_PHYERR_EVENTID:
  4525. ath10k_wmi_event_phyerr(ar, skb);
  4526. break;
  4527. case WMI_10_4_READY_EVENTID:
  4528. ath10k_wmi_event_ready(ar, skb);
  4529. break;
  4530. case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
  4531. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4532. break;
  4533. case WMI_10_4_HOST_SWBA_EVENTID:
  4534. ath10k_wmi_event_host_swba(ar, skb);
  4535. break;
  4536. case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
  4537. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4538. break;
  4539. case WMI_10_4_DEBUG_PRINT_EVENTID:
  4540. ath10k_wmi_event_debug_print(ar, skb);
  4541. break;
  4542. case WMI_10_4_VDEV_START_RESP_EVENTID:
  4543. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4544. break;
  4545. case WMI_10_4_VDEV_STOPPED_EVENTID:
  4546. ath10k_wmi_event_vdev_stopped(ar, skb);
  4547. break;
  4548. case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
  4549. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4550. "received event id %d not implemented\n", id);
  4551. break;
  4552. case WMI_10_4_UPDATE_STATS_EVENTID:
  4553. ath10k_wmi_event_update_stats(ar, skb);
  4554. break;
  4555. case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
  4556. ath10k_wmi_event_temperature(ar, skb);
  4557. break;
  4558. default:
  4559. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4560. break;
  4561. }
  4562. out:
  4563. dev_kfree_skb(skb);
  4564. }
  4565. static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
  4566. {
  4567. int ret;
  4568. ret = ath10k_wmi_rx(ar, skb);
  4569. if (ret)
  4570. ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
  4571. }
  4572. int ath10k_wmi_connect(struct ath10k *ar)
  4573. {
  4574. int status;
  4575. struct ath10k_htc_svc_conn_req conn_req;
  4576. struct ath10k_htc_svc_conn_resp conn_resp;
  4577. memset(&conn_req, 0, sizeof(conn_req));
  4578. memset(&conn_resp, 0, sizeof(conn_resp));
  4579. /* these fields are the same for all service endpoints */
  4580. conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
  4581. conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
  4582. conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
  4583. /* connect to control service */
  4584. conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
  4585. status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
  4586. if (status) {
  4587. ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
  4588. status);
  4589. return status;
  4590. }
  4591. ar->wmi.eid = conn_resp.eid;
  4592. return 0;
  4593. }
  4594. static struct sk_buff *
  4595. ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
  4596. u16 ctl2g, u16 ctl5g,
  4597. enum wmi_dfs_region dfs_reg)
  4598. {
  4599. struct wmi_pdev_set_regdomain_cmd *cmd;
  4600. struct sk_buff *skb;
  4601. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4602. if (!skb)
  4603. return ERR_PTR(-ENOMEM);
  4604. cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
  4605. cmd->reg_domain = __cpu_to_le32(rd);
  4606. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  4607. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  4608. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  4609. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  4610. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4611. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
  4612. rd, rd2g, rd5g, ctl2g, ctl5g);
  4613. return skb;
  4614. }
  4615. static struct sk_buff *
  4616. ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
  4617. rd5g, u16 ctl2g, u16 ctl5g,
  4618. enum wmi_dfs_region dfs_reg)
  4619. {
  4620. struct wmi_pdev_set_regdomain_cmd_10x *cmd;
  4621. struct sk_buff *skb;
  4622. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4623. if (!skb)
  4624. return ERR_PTR(-ENOMEM);
  4625. cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
  4626. cmd->reg_domain = __cpu_to_le32(rd);
  4627. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  4628. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  4629. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  4630. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  4631. cmd->dfs_domain = __cpu_to_le32(dfs_reg);
  4632. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4633. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
  4634. rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
  4635. return skb;
  4636. }
  4637. static struct sk_buff *
  4638. ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
  4639. {
  4640. struct wmi_pdev_suspend_cmd *cmd;
  4641. struct sk_buff *skb;
  4642. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4643. if (!skb)
  4644. return ERR_PTR(-ENOMEM);
  4645. cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
  4646. cmd->suspend_opt = __cpu_to_le32(suspend_opt);
  4647. return skb;
  4648. }
  4649. static struct sk_buff *
  4650. ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
  4651. {
  4652. struct sk_buff *skb;
  4653. skb = ath10k_wmi_alloc_skb(ar, 0);
  4654. if (!skb)
  4655. return ERR_PTR(-ENOMEM);
  4656. return skb;
  4657. }
  4658. static struct sk_buff *
  4659. ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
  4660. {
  4661. struct wmi_pdev_set_param_cmd *cmd;
  4662. struct sk_buff *skb;
  4663. if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
  4664. ath10k_warn(ar, "pdev param %d not supported by firmware\n",
  4665. id);
  4666. return ERR_PTR(-EOPNOTSUPP);
  4667. }
  4668. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4669. if (!skb)
  4670. return ERR_PTR(-ENOMEM);
  4671. cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
  4672. cmd->param_id = __cpu_to_le32(id);
  4673. cmd->param_value = __cpu_to_le32(value);
  4674. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
  4675. id, value);
  4676. return skb;
  4677. }
  4678. void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
  4679. struct wmi_host_mem_chunks *chunks)
  4680. {
  4681. struct host_memory_chunk *chunk;
  4682. int i;
  4683. chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
  4684. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  4685. chunk = &chunks->items[i];
  4686. chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
  4687. chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
  4688. chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
  4689. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4690. "wmi chunk %d len %d requested, addr 0x%llx\n",
  4691. i,
  4692. ar->wmi.mem_chunks[i].len,
  4693. (unsigned long long)ar->wmi.mem_chunks[i].paddr);
  4694. }
  4695. }
  4696. static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
  4697. {
  4698. struct wmi_init_cmd *cmd;
  4699. struct sk_buff *buf;
  4700. struct wmi_resource_config config = {};
  4701. u32 len, val;
  4702. config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
  4703. config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
  4704. config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
  4705. config.num_offload_reorder_bufs =
  4706. __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
  4707. config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
  4708. config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
  4709. config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
  4710. config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
  4711. config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
  4712. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  4713. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  4714. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  4715. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
  4716. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  4717. config.scan_max_pending_reqs =
  4718. __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
  4719. config.bmiss_offload_max_vdev =
  4720. __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
  4721. config.roam_offload_max_vdev =
  4722. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
  4723. config.roam_offload_max_ap_profiles =
  4724. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
  4725. config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
  4726. config.num_mcast_table_elems =
  4727. __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
  4728. config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
  4729. config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
  4730. config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
  4731. config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
  4732. config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
  4733. val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  4734. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  4735. config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
  4736. config.gtk_offload_max_vdev =
  4737. __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
  4738. config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
  4739. config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
  4740. len = sizeof(*cmd) +
  4741. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  4742. buf = ath10k_wmi_alloc_skb(ar, len);
  4743. if (!buf)
  4744. return ERR_PTR(-ENOMEM);
  4745. cmd = (struct wmi_init_cmd *)buf->data;
  4746. memcpy(&cmd->resource_config, &config, sizeof(config));
  4747. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  4748. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
  4749. return buf;
  4750. }
  4751. static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
  4752. {
  4753. struct wmi_init_cmd_10x *cmd;
  4754. struct sk_buff *buf;
  4755. struct wmi_resource_config_10x config = {};
  4756. u32 len, val;
  4757. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  4758. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  4759. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  4760. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  4761. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  4762. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  4763. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  4764. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  4765. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  4766. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  4767. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  4768. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  4769. config.scan_max_pending_reqs =
  4770. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  4771. config.bmiss_offload_max_vdev =
  4772. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  4773. config.roam_offload_max_vdev =
  4774. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  4775. config.roam_offload_max_ap_profiles =
  4776. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  4777. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  4778. config.num_mcast_table_elems =
  4779. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  4780. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  4781. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  4782. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  4783. config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
  4784. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  4785. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  4786. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  4787. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  4788. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  4789. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  4790. len = sizeof(*cmd) +
  4791. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  4792. buf = ath10k_wmi_alloc_skb(ar, len);
  4793. if (!buf)
  4794. return ERR_PTR(-ENOMEM);
  4795. cmd = (struct wmi_init_cmd_10x *)buf->data;
  4796. memcpy(&cmd->resource_config, &config, sizeof(config));
  4797. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  4798. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
  4799. return buf;
  4800. }
  4801. static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
  4802. {
  4803. struct wmi_init_cmd_10_2 *cmd;
  4804. struct sk_buff *buf;
  4805. struct wmi_resource_config_10x config = {};
  4806. u32 len, val, features;
  4807. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  4808. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  4809. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  4810. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  4811. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  4812. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  4813. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  4814. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  4815. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  4816. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  4817. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  4818. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  4819. config.scan_max_pending_reqs =
  4820. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  4821. config.bmiss_offload_max_vdev =
  4822. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  4823. config.roam_offload_max_vdev =
  4824. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  4825. config.roam_offload_max_ap_profiles =
  4826. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  4827. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  4828. config.num_mcast_table_elems =
  4829. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  4830. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  4831. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  4832. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  4833. config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
  4834. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  4835. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  4836. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  4837. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  4838. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  4839. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  4840. len = sizeof(*cmd) +
  4841. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  4842. buf = ath10k_wmi_alloc_skb(ar, len);
  4843. if (!buf)
  4844. return ERR_PTR(-ENOMEM);
  4845. cmd = (struct wmi_init_cmd_10_2 *)buf->data;
  4846. features = WMI_10_2_RX_BATCH_MODE;
  4847. if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
  4848. test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
  4849. features |= WMI_10_2_COEX_GPIO;
  4850. cmd->resource_config.feature_mask = __cpu_to_le32(features);
  4851. memcpy(&cmd->resource_config.common, &config, sizeof(config));
  4852. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  4853. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
  4854. return buf;
  4855. }
  4856. static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
  4857. {
  4858. struct wmi_init_cmd_10_4 *cmd;
  4859. struct sk_buff *buf;
  4860. struct wmi_resource_config_10_4 config = {};
  4861. u32 len;
  4862. config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
  4863. config.num_peers = __cpu_to_le32(ar->max_num_peers);
  4864. config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
  4865. config.num_tids = __cpu_to_le32(ar->num_tids);
  4866. config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
  4867. config.num_offload_reorder_buffs =
  4868. __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
  4869. config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
  4870. config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
  4871. config.tx_chain_mask = __cpu_to_le32(TARGET_10_4_TX_CHAIN_MASK);
  4872. config.rx_chain_mask = __cpu_to_le32(TARGET_10_4_RX_CHAIN_MASK);
  4873. config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  4874. config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  4875. config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  4876. config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
  4877. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  4878. config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
  4879. config.bmiss_offload_max_vdev =
  4880. __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
  4881. config.roam_offload_max_vdev =
  4882. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
  4883. config.roam_offload_max_ap_profiles =
  4884. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
  4885. config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
  4886. config.num_mcast_table_elems =
  4887. __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
  4888. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
  4889. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
  4890. config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
  4891. config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
  4892. config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
  4893. config.rx_skip_defrag_timeout_dup_detection_check =
  4894. __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
  4895. config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
  4896. config.gtk_offload_max_vdev =
  4897. __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
  4898. config.num_msdu_desc = __cpu_to_le32(TARGET_10_4_NUM_MSDU_DESC);
  4899. config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
  4900. config.max_peer_ext_stats =
  4901. __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
  4902. config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
  4903. config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
  4904. config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
  4905. config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
  4906. config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
  4907. config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
  4908. config.tt_support =
  4909. __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
  4910. config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
  4911. config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
  4912. config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
  4913. len = sizeof(*cmd) +
  4914. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  4915. buf = ath10k_wmi_alloc_skb(ar, len);
  4916. if (!buf)
  4917. return ERR_PTR(-ENOMEM);
  4918. cmd = (struct wmi_init_cmd_10_4 *)buf->data;
  4919. memcpy(&cmd->resource_config, &config, sizeof(config));
  4920. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  4921. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
  4922. return buf;
  4923. }
  4924. int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
  4925. {
  4926. if (arg->ie_len && !arg->ie)
  4927. return -EINVAL;
  4928. if (arg->n_channels && !arg->channels)
  4929. return -EINVAL;
  4930. if (arg->n_ssids && !arg->ssids)
  4931. return -EINVAL;
  4932. if (arg->n_bssids && !arg->bssids)
  4933. return -EINVAL;
  4934. if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
  4935. return -EINVAL;
  4936. if (arg->n_channels > ARRAY_SIZE(arg->channels))
  4937. return -EINVAL;
  4938. if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
  4939. return -EINVAL;
  4940. if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
  4941. return -EINVAL;
  4942. return 0;
  4943. }
  4944. static size_t
  4945. ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
  4946. {
  4947. int len = 0;
  4948. if (arg->ie_len) {
  4949. len += sizeof(struct wmi_ie_data);
  4950. len += roundup(arg->ie_len, 4);
  4951. }
  4952. if (arg->n_channels) {
  4953. len += sizeof(struct wmi_chan_list);
  4954. len += sizeof(__le32) * arg->n_channels;
  4955. }
  4956. if (arg->n_ssids) {
  4957. len += sizeof(struct wmi_ssid_list);
  4958. len += sizeof(struct wmi_ssid) * arg->n_ssids;
  4959. }
  4960. if (arg->n_bssids) {
  4961. len += sizeof(struct wmi_bssid_list);
  4962. len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  4963. }
  4964. return len;
  4965. }
  4966. void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
  4967. const struct wmi_start_scan_arg *arg)
  4968. {
  4969. u32 scan_id;
  4970. u32 scan_req_id;
  4971. scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
  4972. scan_id |= arg->scan_id;
  4973. scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  4974. scan_req_id |= arg->scan_req_id;
  4975. cmn->scan_id = __cpu_to_le32(scan_id);
  4976. cmn->scan_req_id = __cpu_to_le32(scan_req_id);
  4977. cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
  4978. cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
  4979. cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
  4980. cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
  4981. cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
  4982. cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
  4983. cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
  4984. cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
  4985. cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
  4986. cmn->idle_time = __cpu_to_le32(arg->idle_time);
  4987. cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
  4988. cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
  4989. cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
  4990. }
  4991. static void
  4992. ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
  4993. const struct wmi_start_scan_arg *arg)
  4994. {
  4995. struct wmi_ie_data *ie;
  4996. struct wmi_chan_list *channels;
  4997. struct wmi_ssid_list *ssids;
  4998. struct wmi_bssid_list *bssids;
  4999. void *ptr = tlvs->tlvs;
  5000. int i;
  5001. if (arg->n_channels) {
  5002. channels = ptr;
  5003. channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
  5004. channels->num_chan = __cpu_to_le32(arg->n_channels);
  5005. for (i = 0; i < arg->n_channels; i++)
  5006. channels->channel_list[i].freq =
  5007. __cpu_to_le16(arg->channels[i]);
  5008. ptr += sizeof(*channels);
  5009. ptr += sizeof(__le32) * arg->n_channels;
  5010. }
  5011. if (arg->n_ssids) {
  5012. ssids = ptr;
  5013. ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
  5014. ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
  5015. for (i = 0; i < arg->n_ssids; i++) {
  5016. ssids->ssids[i].ssid_len =
  5017. __cpu_to_le32(arg->ssids[i].len);
  5018. memcpy(&ssids->ssids[i].ssid,
  5019. arg->ssids[i].ssid,
  5020. arg->ssids[i].len);
  5021. }
  5022. ptr += sizeof(*ssids);
  5023. ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
  5024. }
  5025. if (arg->n_bssids) {
  5026. bssids = ptr;
  5027. bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
  5028. bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
  5029. for (i = 0; i < arg->n_bssids; i++)
  5030. memcpy(&bssids->bssid_list[i],
  5031. arg->bssids[i].bssid,
  5032. ETH_ALEN);
  5033. ptr += sizeof(*bssids);
  5034. ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5035. }
  5036. if (arg->ie_len) {
  5037. ie = ptr;
  5038. ie->tag = __cpu_to_le32(WMI_IE_TAG);
  5039. ie->ie_len = __cpu_to_le32(arg->ie_len);
  5040. memcpy(ie->ie_data, arg->ie, arg->ie_len);
  5041. ptr += sizeof(*ie);
  5042. ptr += roundup(arg->ie_len, 4);
  5043. }
  5044. }
  5045. static struct sk_buff *
  5046. ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
  5047. const struct wmi_start_scan_arg *arg)
  5048. {
  5049. struct wmi_start_scan_cmd *cmd;
  5050. struct sk_buff *skb;
  5051. size_t len;
  5052. int ret;
  5053. ret = ath10k_wmi_start_scan_verify(arg);
  5054. if (ret)
  5055. return ERR_PTR(ret);
  5056. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5057. skb = ath10k_wmi_alloc_skb(ar, len);
  5058. if (!skb)
  5059. return ERR_PTR(-ENOMEM);
  5060. cmd = (struct wmi_start_scan_cmd *)skb->data;
  5061. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5062. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5063. cmd->burst_duration_ms = __cpu_to_le32(0);
  5064. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
  5065. return skb;
  5066. }
  5067. static struct sk_buff *
  5068. ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
  5069. const struct wmi_start_scan_arg *arg)
  5070. {
  5071. struct wmi_10x_start_scan_cmd *cmd;
  5072. struct sk_buff *skb;
  5073. size_t len;
  5074. int ret;
  5075. ret = ath10k_wmi_start_scan_verify(arg);
  5076. if (ret)
  5077. return ERR_PTR(ret);
  5078. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5079. skb = ath10k_wmi_alloc_skb(ar, len);
  5080. if (!skb)
  5081. return ERR_PTR(-ENOMEM);
  5082. cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
  5083. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5084. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5085. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
  5086. return skb;
  5087. }
  5088. void ath10k_wmi_start_scan_init(struct ath10k *ar,
  5089. struct wmi_start_scan_arg *arg)
  5090. {
  5091. /* setup commonly used values */
  5092. arg->scan_req_id = 1;
  5093. arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
  5094. arg->dwell_time_active = 50;
  5095. arg->dwell_time_passive = 150;
  5096. arg->min_rest_time = 50;
  5097. arg->max_rest_time = 500;
  5098. arg->repeat_probe_time = 0;
  5099. arg->probe_spacing_time = 0;
  5100. arg->idle_time = 0;
  5101. arg->max_scan_time = 20000;
  5102. arg->probe_delay = 5;
  5103. arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
  5104. | WMI_SCAN_EVENT_COMPLETED
  5105. | WMI_SCAN_EVENT_BSS_CHANNEL
  5106. | WMI_SCAN_EVENT_FOREIGN_CHANNEL
  5107. | WMI_SCAN_EVENT_DEQUEUED;
  5108. arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
  5109. arg->n_bssids = 1;
  5110. arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
  5111. }
  5112. static struct sk_buff *
  5113. ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
  5114. const struct wmi_stop_scan_arg *arg)
  5115. {
  5116. struct wmi_stop_scan_cmd *cmd;
  5117. struct sk_buff *skb;
  5118. u32 scan_id;
  5119. u32 req_id;
  5120. if (arg->req_id > 0xFFF)
  5121. return ERR_PTR(-EINVAL);
  5122. if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
  5123. return ERR_PTR(-EINVAL);
  5124. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5125. if (!skb)
  5126. return ERR_PTR(-ENOMEM);
  5127. scan_id = arg->u.scan_id;
  5128. scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
  5129. req_id = arg->req_id;
  5130. req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5131. cmd = (struct wmi_stop_scan_cmd *)skb->data;
  5132. cmd->req_type = __cpu_to_le32(arg->req_type);
  5133. cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
  5134. cmd->scan_id = __cpu_to_le32(scan_id);
  5135. cmd->scan_req_id = __cpu_to_le32(req_id);
  5136. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5137. "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
  5138. arg->req_id, arg->req_type, arg->u.scan_id);
  5139. return skb;
  5140. }
  5141. static struct sk_buff *
  5142. ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
  5143. enum wmi_vdev_type type,
  5144. enum wmi_vdev_subtype subtype,
  5145. const u8 macaddr[ETH_ALEN])
  5146. {
  5147. struct wmi_vdev_create_cmd *cmd;
  5148. struct sk_buff *skb;
  5149. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5150. if (!skb)
  5151. return ERR_PTR(-ENOMEM);
  5152. cmd = (struct wmi_vdev_create_cmd *)skb->data;
  5153. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5154. cmd->vdev_type = __cpu_to_le32(type);
  5155. cmd->vdev_subtype = __cpu_to_le32(subtype);
  5156. ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
  5157. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5158. "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
  5159. vdev_id, type, subtype, macaddr);
  5160. return skb;
  5161. }
  5162. static struct sk_buff *
  5163. ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
  5164. {
  5165. struct wmi_vdev_delete_cmd *cmd;
  5166. struct sk_buff *skb;
  5167. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5168. if (!skb)
  5169. return ERR_PTR(-ENOMEM);
  5170. cmd = (struct wmi_vdev_delete_cmd *)skb->data;
  5171. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5172. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5173. "WMI vdev delete id %d\n", vdev_id);
  5174. return skb;
  5175. }
  5176. static struct sk_buff *
  5177. ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
  5178. const struct wmi_vdev_start_request_arg *arg,
  5179. bool restart)
  5180. {
  5181. struct wmi_vdev_start_request_cmd *cmd;
  5182. struct sk_buff *skb;
  5183. const char *cmdname;
  5184. u32 flags = 0;
  5185. if (WARN_ON(arg->hidden_ssid && !arg->ssid))
  5186. return ERR_PTR(-EINVAL);
  5187. if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
  5188. return ERR_PTR(-EINVAL);
  5189. if (restart)
  5190. cmdname = "restart";
  5191. else
  5192. cmdname = "start";
  5193. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5194. if (!skb)
  5195. return ERR_PTR(-ENOMEM);
  5196. if (arg->hidden_ssid)
  5197. flags |= WMI_VDEV_START_HIDDEN_SSID;
  5198. if (arg->pmf_enabled)
  5199. flags |= WMI_VDEV_START_PMF_ENABLED;
  5200. cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
  5201. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5202. cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
  5203. cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
  5204. cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
  5205. cmd->flags = __cpu_to_le32(flags);
  5206. cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
  5207. cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
  5208. if (arg->ssid) {
  5209. cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
  5210. memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
  5211. }
  5212. ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
  5213. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5214. "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
  5215. cmdname, arg->vdev_id,
  5216. flags, arg->channel.freq, arg->channel.mode,
  5217. cmd->chan.flags, arg->channel.max_power);
  5218. return skb;
  5219. }
  5220. static struct sk_buff *
  5221. ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
  5222. {
  5223. struct wmi_vdev_stop_cmd *cmd;
  5224. struct sk_buff *skb;
  5225. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5226. if (!skb)
  5227. return ERR_PTR(-ENOMEM);
  5228. cmd = (struct wmi_vdev_stop_cmd *)skb->data;
  5229. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5230. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
  5231. return skb;
  5232. }
  5233. static struct sk_buff *
  5234. ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
  5235. const u8 *bssid)
  5236. {
  5237. struct wmi_vdev_up_cmd *cmd;
  5238. struct sk_buff *skb;
  5239. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5240. if (!skb)
  5241. return ERR_PTR(-ENOMEM);
  5242. cmd = (struct wmi_vdev_up_cmd *)skb->data;
  5243. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5244. cmd->vdev_assoc_id = __cpu_to_le32(aid);
  5245. ether_addr_copy(cmd->vdev_bssid.addr, bssid);
  5246. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5247. "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
  5248. vdev_id, aid, bssid);
  5249. return skb;
  5250. }
  5251. static struct sk_buff *
  5252. ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
  5253. {
  5254. struct wmi_vdev_down_cmd *cmd;
  5255. struct sk_buff *skb;
  5256. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5257. if (!skb)
  5258. return ERR_PTR(-ENOMEM);
  5259. cmd = (struct wmi_vdev_down_cmd *)skb->data;
  5260. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5261. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5262. "wmi mgmt vdev down id 0x%x\n", vdev_id);
  5263. return skb;
  5264. }
  5265. static struct sk_buff *
  5266. ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
  5267. u32 param_id, u32 param_value)
  5268. {
  5269. struct wmi_vdev_set_param_cmd *cmd;
  5270. struct sk_buff *skb;
  5271. if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
  5272. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5273. "vdev param %d not supported by firmware\n",
  5274. param_id);
  5275. return ERR_PTR(-EOPNOTSUPP);
  5276. }
  5277. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5278. if (!skb)
  5279. return ERR_PTR(-ENOMEM);
  5280. cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
  5281. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5282. cmd->param_id = __cpu_to_le32(param_id);
  5283. cmd->param_value = __cpu_to_le32(param_value);
  5284. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5285. "wmi vdev id 0x%x set param %d value %d\n",
  5286. vdev_id, param_id, param_value);
  5287. return skb;
  5288. }
  5289. static struct sk_buff *
  5290. ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
  5291. const struct wmi_vdev_install_key_arg *arg)
  5292. {
  5293. struct wmi_vdev_install_key_cmd *cmd;
  5294. struct sk_buff *skb;
  5295. if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
  5296. return ERR_PTR(-EINVAL);
  5297. if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
  5298. return ERR_PTR(-EINVAL);
  5299. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
  5300. if (!skb)
  5301. return ERR_PTR(-ENOMEM);
  5302. cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
  5303. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5304. cmd->key_idx = __cpu_to_le32(arg->key_idx);
  5305. cmd->key_flags = __cpu_to_le32(arg->key_flags);
  5306. cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
  5307. cmd->key_len = __cpu_to_le32(arg->key_len);
  5308. cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
  5309. cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
  5310. if (arg->macaddr)
  5311. ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
  5312. if (arg->key_data)
  5313. memcpy(cmd->key_data, arg->key_data, arg->key_len);
  5314. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5315. "wmi vdev install key idx %d cipher %d len %d\n",
  5316. arg->key_idx, arg->key_cipher, arg->key_len);
  5317. return skb;
  5318. }
  5319. static struct sk_buff *
  5320. ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
  5321. const struct wmi_vdev_spectral_conf_arg *arg)
  5322. {
  5323. struct wmi_vdev_spectral_conf_cmd *cmd;
  5324. struct sk_buff *skb;
  5325. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5326. if (!skb)
  5327. return ERR_PTR(-ENOMEM);
  5328. cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
  5329. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5330. cmd->scan_count = __cpu_to_le32(arg->scan_count);
  5331. cmd->scan_period = __cpu_to_le32(arg->scan_period);
  5332. cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
  5333. cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
  5334. cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
  5335. cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
  5336. cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
  5337. cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
  5338. cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
  5339. cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
  5340. cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
  5341. cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
  5342. cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
  5343. cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
  5344. cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
  5345. cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
  5346. cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
  5347. cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
  5348. return skb;
  5349. }
  5350. static struct sk_buff *
  5351. ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
  5352. u32 trigger, u32 enable)
  5353. {
  5354. struct wmi_vdev_spectral_enable_cmd *cmd;
  5355. struct sk_buff *skb;
  5356. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5357. if (!skb)
  5358. return ERR_PTR(-ENOMEM);
  5359. cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
  5360. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5361. cmd->trigger_cmd = __cpu_to_le32(trigger);
  5362. cmd->enable_cmd = __cpu_to_le32(enable);
  5363. return skb;
  5364. }
  5365. static struct sk_buff *
  5366. ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
  5367. const u8 peer_addr[ETH_ALEN],
  5368. enum wmi_peer_type peer_type)
  5369. {
  5370. struct wmi_peer_create_cmd *cmd;
  5371. struct sk_buff *skb;
  5372. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5373. if (!skb)
  5374. return ERR_PTR(-ENOMEM);
  5375. cmd = (struct wmi_peer_create_cmd *)skb->data;
  5376. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5377. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5378. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5379. "wmi peer create vdev_id %d peer_addr %pM\n",
  5380. vdev_id, peer_addr);
  5381. return skb;
  5382. }
  5383. static struct sk_buff *
  5384. ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
  5385. const u8 peer_addr[ETH_ALEN])
  5386. {
  5387. struct wmi_peer_delete_cmd *cmd;
  5388. struct sk_buff *skb;
  5389. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5390. if (!skb)
  5391. return ERR_PTR(-ENOMEM);
  5392. cmd = (struct wmi_peer_delete_cmd *)skb->data;
  5393. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5394. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5395. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5396. "wmi peer delete vdev_id %d peer_addr %pM\n",
  5397. vdev_id, peer_addr);
  5398. return skb;
  5399. }
  5400. static struct sk_buff *
  5401. ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
  5402. const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
  5403. {
  5404. struct wmi_peer_flush_tids_cmd *cmd;
  5405. struct sk_buff *skb;
  5406. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5407. if (!skb)
  5408. return ERR_PTR(-ENOMEM);
  5409. cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
  5410. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5411. cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
  5412. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5413. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5414. "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
  5415. vdev_id, peer_addr, tid_bitmap);
  5416. return skb;
  5417. }
  5418. static struct sk_buff *
  5419. ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
  5420. const u8 *peer_addr,
  5421. enum wmi_peer_param param_id,
  5422. u32 param_value)
  5423. {
  5424. struct wmi_peer_set_param_cmd *cmd;
  5425. struct sk_buff *skb;
  5426. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5427. if (!skb)
  5428. return ERR_PTR(-ENOMEM);
  5429. cmd = (struct wmi_peer_set_param_cmd *)skb->data;
  5430. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5431. cmd->param_id = __cpu_to_le32(param_id);
  5432. cmd->param_value = __cpu_to_le32(param_value);
  5433. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5434. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5435. "wmi vdev %d peer 0x%pM set param %d value %d\n",
  5436. vdev_id, peer_addr, param_id, param_value);
  5437. return skb;
  5438. }
  5439. static struct sk_buff *
  5440. ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
  5441. enum wmi_sta_ps_mode psmode)
  5442. {
  5443. struct wmi_sta_powersave_mode_cmd *cmd;
  5444. struct sk_buff *skb;
  5445. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5446. if (!skb)
  5447. return ERR_PTR(-ENOMEM);
  5448. cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
  5449. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5450. cmd->sta_ps_mode = __cpu_to_le32(psmode);
  5451. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5452. "wmi set powersave id 0x%x mode %d\n",
  5453. vdev_id, psmode);
  5454. return skb;
  5455. }
  5456. static struct sk_buff *
  5457. ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
  5458. enum wmi_sta_powersave_param param_id,
  5459. u32 value)
  5460. {
  5461. struct wmi_sta_powersave_param_cmd *cmd;
  5462. struct sk_buff *skb;
  5463. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5464. if (!skb)
  5465. return ERR_PTR(-ENOMEM);
  5466. cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
  5467. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5468. cmd->param_id = __cpu_to_le32(param_id);
  5469. cmd->param_value = __cpu_to_le32(value);
  5470. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5471. "wmi sta ps param vdev_id 0x%x param %d value %d\n",
  5472. vdev_id, param_id, value);
  5473. return skb;
  5474. }
  5475. static struct sk_buff *
  5476. ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  5477. enum wmi_ap_ps_peer_param param_id, u32 value)
  5478. {
  5479. struct wmi_ap_ps_peer_cmd *cmd;
  5480. struct sk_buff *skb;
  5481. if (!mac)
  5482. return ERR_PTR(-EINVAL);
  5483. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5484. if (!skb)
  5485. return ERR_PTR(-ENOMEM);
  5486. cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
  5487. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5488. cmd->param_id = __cpu_to_le32(param_id);
  5489. cmd->param_value = __cpu_to_le32(value);
  5490. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  5491. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5492. "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
  5493. vdev_id, param_id, value, mac);
  5494. return skb;
  5495. }
  5496. static struct sk_buff *
  5497. ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
  5498. const struct wmi_scan_chan_list_arg *arg)
  5499. {
  5500. struct wmi_scan_chan_list_cmd *cmd;
  5501. struct sk_buff *skb;
  5502. struct wmi_channel_arg *ch;
  5503. struct wmi_channel *ci;
  5504. int len;
  5505. int i;
  5506. len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
  5507. skb = ath10k_wmi_alloc_skb(ar, len);
  5508. if (!skb)
  5509. return ERR_PTR(-EINVAL);
  5510. cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
  5511. cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
  5512. for (i = 0; i < arg->n_channels; i++) {
  5513. ch = &arg->channels[i];
  5514. ci = &cmd->chan_info[i];
  5515. ath10k_wmi_put_wmi_channel(ci, ch);
  5516. }
  5517. return skb;
  5518. }
  5519. static void
  5520. ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
  5521. const struct wmi_peer_assoc_complete_arg *arg)
  5522. {
  5523. struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
  5524. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5525. cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
  5526. cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
  5527. cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
  5528. cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
  5529. cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
  5530. cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
  5531. cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
  5532. cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
  5533. cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
  5534. cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
  5535. cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
  5536. cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
  5537. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  5538. cmd->peer_legacy_rates.num_rates =
  5539. __cpu_to_le32(arg->peer_legacy_rates.num_rates);
  5540. memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
  5541. arg->peer_legacy_rates.num_rates);
  5542. cmd->peer_ht_rates.num_rates =
  5543. __cpu_to_le32(arg->peer_ht_rates.num_rates);
  5544. memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
  5545. arg->peer_ht_rates.num_rates);
  5546. cmd->peer_vht_rates.rx_max_rate =
  5547. __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
  5548. cmd->peer_vht_rates.rx_mcs_set =
  5549. __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
  5550. cmd->peer_vht_rates.tx_max_rate =
  5551. __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
  5552. cmd->peer_vht_rates.tx_mcs_set =
  5553. __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
  5554. }
  5555. static void
  5556. ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
  5557. const struct wmi_peer_assoc_complete_arg *arg)
  5558. {
  5559. struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
  5560. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5561. memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
  5562. }
  5563. static void
  5564. ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
  5565. const struct wmi_peer_assoc_complete_arg *arg)
  5566. {
  5567. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5568. }
  5569. static void
  5570. ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
  5571. const struct wmi_peer_assoc_complete_arg *arg)
  5572. {
  5573. struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
  5574. int max_mcs, max_nss;
  5575. u32 info0;
  5576. /* TODO: Is using max values okay with firmware? */
  5577. max_mcs = 0xf;
  5578. max_nss = 0xf;
  5579. info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
  5580. SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
  5581. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5582. cmd->info0 = __cpu_to_le32(info0);
  5583. }
  5584. static void
  5585. ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
  5586. const struct wmi_peer_assoc_complete_arg *arg)
  5587. {
  5588. struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
  5589. ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
  5590. cmd->peer_bw_rxnss_override = 0;
  5591. }
  5592. static int
  5593. ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
  5594. {
  5595. if (arg->peer_mpdu_density > 16)
  5596. return -EINVAL;
  5597. if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
  5598. return -EINVAL;
  5599. if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
  5600. return -EINVAL;
  5601. return 0;
  5602. }
  5603. static struct sk_buff *
  5604. ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
  5605. const struct wmi_peer_assoc_complete_arg *arg)
  5606. {
  5607. size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
  5608. struct sk_buff *skb;
  5609. int ret;
  5610. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5611. if (ret)
  5612. return ERR_PTR(ret);
  5613. skb = ath10k_wmi_alloc_skb(ar, len);
  5614. if (!skb)
  5615. return ERR_PTR(-ENOMEM);
  5616. ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
  5617. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5618. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5619. arg->vdev_id, arg->addr,
  5620. arg->peer_reassoc ? "reassociate" : "new");
  5621. return skb;
  5622. }
  5623. static struct sk_buff *
  5624. ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
  5625. const struct wmi_peer_assoc_complete_arg *arg)
  5626. {
  5627. size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
  5628. struct sk_buff *skb;
  5629. int ret;
  5630. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5631. if (ret)
  5632. return ERR_PTR(ret);
  5633. skb = ath10k_wmi_alloc_skb(ar, len);
  5634. if (!skb)
  5635. return ERR_PTR(-ENOMEM);
  5636. ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
  5637. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5638. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5639. arg->vdev_id, arg->addr,
  5640. arg->peer_reassoc ? "reassociate" : "new");
  5641. return skb;
  5642. }
  5643. static struct sk_buff *
  5644. ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
  5645. const struct wmi_peer_assoc_complete_arg *arg)
  5646. {
  5647. size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
  5648. struct sk_buff *skb;
  5649. int ret;
  5650. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5651. if (ret)
  5652. return ERR_PTR(ret);
  5653. skb = ath10k_wmi_alloc_skb(ar, len);
  5654. if (!skb)
  5655. return ERR_PTR(-ENOMEM);
  5656. ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
  5657. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5658. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5659. arg->vdev_id, arg->addr,
  5660. arg->peer_reassoc ? "reassociate" : "new");
  5661. return skb;
  5662. }
  5663. static struct sk_buff *
  5664. ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
  5665. const struct wmi_peer_assoc_complete_arg *arg)
  5666. {
  5667. size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
  5668. struct sk_buff *skb;
  5669. int ret;
  5670. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5671. if (ret)
  5672. return ERR_PTR(ret);
  5673. skb = ath10k_wmi_alloc_skb(ar, len);
  5674. if (!skb)
  5675. return ERR_PTR(-ENOMEM);
  5676. ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
  5677. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5678. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5679. arg->vdev_id, arg->addr,
  5680. arg->peer_reassoc ? "reassociate" : "new");
  5681. return skb;
  5682. }
  5683. static struct sk_buff *
  5684. ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
  5685. {
  5686. struct sk_buff *skb;
  5687. skb = ath10k_wmi_alloc_skb(ar, 0);
  5688. if (!skb)
  5689. return ERR_PTR(-ENOMEM);
  5690. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
  5691. return skb;
  5692. }
  5693. /* This function assumes the beacon is already DMA mapped */
  5694. static struct sk_buff *
  5695. ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
  5696. size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
  5697. bool deliver_cab)
  5698. {
  5699. struct wmi_bcn_tx_ref_cmd *cmd;
  5700. struct sk_buff *skb;
  5701. struct ieee80211_hdr *hdr;
  5702. u16 fc;
  5703. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5704. if (!skb)
  5705. return ERR_PTR(-ENOMEM);
  5706. hdr = (struct ieee80211_hdr *)bcn;
  5707. fc = le16_to_cpu(hdr->frame_control);
  5708. cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
  5709. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5710. cmd->data_len = __cpu_to_le32(bcn_len);
  5711. cmd->data_ptr = __cpu_to_le32(bcn_paddr);
  5712. cmd->msdu_id = 0;
  5713. cmd->frame_control = __cpu_to_le32(fc);
  5714. cmd->flags = 0;
  5715. cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
  5716. if (dtim_zero)
  5717. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
  5718. if (deliver_cab)
  5719. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
  5720. return skb;
  5721. }
  5722. void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
  5723. const struct wmi_wmm_params_arg *arg)
  5724. {
  5725. params->cwmin = __cpu_to_le32(arg->cwmin);
  5726. params->cwmax = __cpu_to_le32(arg->cwmax);
  5727. params->aifs = __cpu_to_le32(arg->aifs);
  5728. params->txop = __cpu_to_le32(arg->txop);
  5729. params->acm = __cpu_to_le32(arg->acm);
  5730. params->no_ack = __cpu_to_le32(arg->no_ack);
  5731. }
  5732. static struct sk_buff *
  5733. ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
  5734. const struct wmi_wmm_params_all_arg *arg)
  5735. {
  5736. struct wmi_pdev_set_wmm_params *cmd;
  5737. struct sk_buff *skb;
  5738. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5739. if (!skb)
  5740. return ERR_PTR(-ENOMEM);
  5741. cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
  5742. ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
  5743. ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
  5744. ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
  5745. ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
  5746. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
  5747. return skb;
  5748. }
  5749. static struct sk_buff *
  5750. ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
  5751. {
  5752. struct wmi_request_stats_cmd *cmd;
  5753. struct sk_buff *skb;
  5754. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5755. if (!skb)
  5756. return ERR_PTR(-ENOMEM);
  5757. cmd = (struct wmi_request_stats_cmd *)skb->data;
  5758. cmd->stats_id = __cpu_to_le32(stats_mask);
  5759. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
  5760. stats_mask);
  5761. return skb;
  5762. }
  5763. static struct sk_buff *
  5764. ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
  5765. enum wmi_force_fw_hang_type type, u32 delay_ms)
  5766. {
  5767. struct wmi_force_fw_hang_cmd *cmd;
  5768. struct sk_buff *skb;
  5769. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5770. if (!skb)
  5771. return ERR_PTR(-ENOMEM);
  5772. cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
  5773. cmd->type = __cpu_to_le32(type);
  5774. cmd->delay_ms = __cpu_to_le32(delay_ms);
  5775. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
  5776. type, delay_ms);
  5777. return skb;
  5778. }
  5779. static struct sk_buff *
  5780. ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable,
  5781. u32 log_level)
  5782. {
  5783. struct wmi_dbglog_cfg_cmd *cmd;
  5784. struct sk_buff *skb;
  5785. u32 cfg;
  5786. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5787. if (!skb)
  5788. return ERR_PTR(-ENOMEM);
  5789. cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
  5790. if (module_enable) {
  5791. cfg = SM(log_level,
  5792. ATH10K_DBGLOG_CFG_LOG_LVL);
  5793. } else {
  5794. /* set back defaults, all modules with WARN level */
  5795. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  5796. ATH10K_DBGLOG_CFG_LOG_LVL);
  5797. module_enable = ~0;
  5798. }
  5799. cmd->module_enable = __cpu_to_le32(module_enable);
  5800. cmd->module_valid = __cpu_to_le32(~0);
  5801. cmd->config_enable = __cpu_to_le32(cfg);
  5802. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  5803. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5804. "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
  5805. __le32_to_cpu(cmd->module_enable),
  5806. __le32_to_cpu(cmd->module_valid),
  5807. __le32_to_cpu(cmd->config_enable),
  5808. __le32_to_cpu(cmd->config_valid));
  5809. return skb;
  5810. }
  5811. static struct sk_buff *
  5812. ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
  5813. {
  5814. struct wmi_pdev_pktlog_enable_cmd *cmd;
  5815. struct sk_buff *skb;
  5816. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5817. if (!skb)
  5818. return ERR_PTR(-ENOMEM);
  5819. ev_bitmap &= ATH10K_PKTLOG_ANY;
  5820. cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
  5821. cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
  5822. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
  5823. ev_bitmap);
  5824. return skb;
  5825. }
  5826. static struct sk_buff *
  5827. ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
  5828. {
  5829. struct sk_buff *skb;
  5830. skb = ath10k_wmi_alloc_skb(ar, 0);
  5831. if (!skb)
  5832. return ERR_PTR(-ENOMEM);
  5833. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
  5834. return skb;
  5835. }
  5836. static struct sk_buff *
  5837. ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
  5838. u32 duration, u32 next_offset,
  5839. u32 enabled)
  5840. {
  5841. struct wmi_pdev_set_quiet_cmd *cmd;
  5842. struct sk_buff *skb;
  5843. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5844. if (!skb)
  5845. return ERR_PTR(-ENOMEM);
  5846. cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
  5847. cmd->period = __cpu_to_le32(period);
  5848. cmd->duration = __cpu_to_le32(duration);
  5849. cmd->next_start = __cpu_to_le32(next_offset);
  5850. cmd->enabled = __cpu_to_le32(enabled);
  5851. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5852. "wmi quiet param: period %u duration %u enabled %d\n",
  5853. period, duration, enabled);
  5854. return skb;
  5855. }
  5856. static struct sk_buff *
  5857. ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
  5858. const u8 *mac)
  5859. {
  5860. struct wmi_addba_clear_resp_cmd *cmd;
  5861. struct sk_buff *skb;
  5862. if (!mac)
  5863. return ERR_PTR(-EINVAL);
  5864. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5865. if (!skb)
  5866. return ERR_PTR(-ENOMEM);
  5867. cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
  5868. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5869. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  5870. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5871. "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
  5872. vdev_id, mac);
  5873. return skb;
  5874. }
  5875. static struct sk_buff *
  5876. ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  5877. u32 tid, u32 buf_size)
  5878. {
  5879. struct wmi_addba_send_cmd *cmd;
  5880. struct sk_buff *skb;
  5881. if (!mac)
  5882. return ERR_PTR(-EINVAL);
  5883. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5884. if (!skb)
  5885. return ERR_PTR(-ENOMEM);
  5886. cmd = (struct wmi_addba_send_cmd *)skb->data;
  5887. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5888. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  5889. cmd->tid = __cpu_to_le32(tid);
  5890. cmd->buffersize = __cpu_to_le32(buf_size);
  5891. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5892. "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
  5893. vdev_id, mac, tid, buf_size);
  5894. return skb;
  5895. }
  5896. static struct sk_buff *
  5897. ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  5898. u32 tid, u32 status)
  5899. {
  5900. struct wmi_addba_setresponse_cmd *cmd;
  5901. struct sk_buff *skb;
  5902. if (!mac)
  5903. return ERR_PTR(-EINVAL);
  5904. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5905. if (!skb)
  5906. return ERR_PTR(-ENOMEM);
  5907. cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
  5908. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5909. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  5910. cmd->tid = __cpu_to_le32(tid);
  5911. cmd->statuscode = __cpu_to_le32(status);
  5912. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5913. "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
  5914. vdev_id, mac, tid, status);
  5915. return skb;
  5916. }
  5917. static struct sk_buff *
  5918. ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  5919. u32 tid, u32 initiator, u32 reason)
  5920. {
  5921. struct wmi_delba_send_cmd *cmd;
  5922. struct sk_buff *skb;
  5923. if (!mac)
  5924. return ERR_PTR(-EINVAL);
  5925. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5926. if (!skb)
  5927. return ERR_PTR(-ENOMEM);
  5928. cmd = (struct wmi_delba_send_cmd *)skb->data;
  5929. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5930. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  5931. cmd->tid = __cpu_to_le32(tid);
  5932. cmd->initiator = __cpu_to_le32(initiator);
  5933. cmd->reasoncode = __cpu_to_le32(reason);
  5934. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5935. "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
  5936. vdev_id, mac, tid, initiator, reason);
  5937. return skb;
  5938. }
  5939. static struct sk_buff *
  5940. ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
  5941. {
  5942. struct wmi_pdev_get_tpc_config_cmd *cmd;
  5943. struct sk_buff *skb;
  5944. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5945. if (!skb)
  5946. return ERR_PTR(-ENOMEM);
  5947. cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
  5948. cmd->param = __cpu_to_le32(param);
  5949. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5950. "wmi pdev get tcp config param:%d\n", param);
  5951. return skb;
  5952. }
  5953. size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
  5954. {
  5955. struct ath10k_fw_stats_peer *i;
  5956. size_t num = 0;
  5957. list_for_each_entry(i, head, list)
  5958. ++num;
  5959. return num;
  5960. }
  5961. size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
  5962. {
  5963. struct ath10k_fw_stats_vdev *i;
  5964. size_t num = 0;
  5965. list_for_each_entry(i, head, list)
  5966. ++num;
  5967. return num;
  5968. }
  5969. static void
  5970. ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  5971. char *buf, u32 *length)
  5972. {
  5973. u32 len = *length;
  5974. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  5975. len += scnprintf(buf + len, buf_len - len, "\n");
  5976. len += scnprintf(buf + len, buf_len - len, "%30s\n",
  5977. "ath10k PDEV stats");
  5978. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  5979. "=================");
  5980. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  5981. "Channel noise floor", pdev->ch_noise_floor);
  5982. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  5983. "Channel TX power", pdev->chan_tx_power);
  5984. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  5985. "TX frame count", pdev->tx_frame_count);
  5986. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  5987. "RX frame count", pdev->rx_frame_count);
  5988. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  5989. "RX clear count", pdev->rx_clear_count);
  5990. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  5991. "Cycle count", pdev->cycle_count);
  5992. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  5993. "PHY error count", pdev->phy_err_count);
  5994. *length = len;
  5995. }
  5996. static void
  5997. ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  5998. char *buf, u32 *length)
  5999. {
  6000. u32 len = *length;
  6001. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6002. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6003. "RTS bad count", pdev->rts_bad);
  6004. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6005. "RTS good count", pdev->rts_good);
  6006. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6007. "FCS bad count", pdev->fcs_bad);
  6008. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6009. "No beacon count", pdev->no_beacons);
  6010. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6011. "MIB int count", pdev->mib_int_count);
  6012. len += scnprintf(buf + len, buf_len - len, "\n");
  6013. *length = len;
  6014. }
  6015. static void
  6016. ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6017. char *buf, u32 *length)
  6018. {
  6019. u32 len = *length;
  6020. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6021. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6022. "ath10k PDEV TX stats");
  6023. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6024. "=================");
  6025. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6026. "HTT cookies queued", pdev->comp_queued);
  6027. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6028. "HTT cookies disp.", pdev->comp_delivered);
  6029. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6030. "MSDU queued", pdev->msdu_enqued);
  6031. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6032. "MPDU queued", pdev->mpdu_enqued);
  6033. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6034. "MSDUs dropped", pdev->wmm_drop);
  6035. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6036. "Local enqued", pdev->local_enqued);
  6037. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6038. "Local freed", pdev->local_freed);
  6039. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6040. "HW queued", pdev->hw_queued);
  6041. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6042. "PPDUs reaped", pdev->hw_reaped);
  6043. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6044. "Num underruns", pdev->underrun);
  6045. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6046. "PPDUs cleaned", pdev->tx_abort);
  6047. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6048. "MPDUs requed", pdev->mpdus_requed);
  6049. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6050. "Excessive retries", pdev->tx_ko);
  6051. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6052. "HW rate", pdev->data_rc);
  6053. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6054. "Sched self tiggers", pdev->self_triggers);
  6055. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6056. "Dropped due to SW retries",
  6057. pdev->sw_retry_failure);
  6058. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6059. "Illegal rate phy errors",
  6060. pdev->illgl_rate_phy_err);
  6061. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6062. "Pdev continuous xretry", pdev->pdev_cont_xretry);
  6063. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6064. "TX timeout", pdev->pdev_tx_timeout);
  6065. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6066. "PDEV resets", pdev->pdev_resets);
  6067. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6068. "PHY underrun", pdev->phy_underrun);
  6069. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6070. "MPDU is more than txop limit", pdev->txop_ovf);
  6071. *length = len;
  6072. }
  6073. static void
  6074. ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6075. char *buf, u32 *length)
  6076. {
  6077. u32 len = *length;
  6078. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6079. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6080. "ath10k PDEV RX stats");
  6081. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6082. "=================");
  6083. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6084. "Mid PPDU route change",
  6085. pdev->mid_ppdu_route_change);
  6086. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6087. "Tot. number of statuses", pdev->status_rcvd);
  6088. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6089. "Extra frags on rings 0", pdev->r0_frags);
  6090. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6091. "Extra frags on rings 1", pdev->r1_frags);
  6092. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6093. "Extra frags on rings 2", pdev->r2_frags);
  6094. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6095. "Extra frags on rings 3", pdev->r3_frags);
  6096. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6097. "MSDUs delivered to HTT", pdev->htt_msdus);
  6098. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6099. "MPDUs delivered to HTT", pdev->htt_mpdus);
  6100. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6101. "MSDUs delivered to stack", pdev->loc_msdus);
  6102. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6103. "MPDUs delivered to stack", pdev->loc_mpdus);
  6104. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6105. "Oversized AMSUs", pdev->oversize_amsdu);
  6106. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6107. "PHY errors", pdev->phy_errs);
  6108. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6109. "PHY errors drops", pdev->phy_err_drop);
  6110. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6111. "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
  6112. *length = len;
  6113. }
  6114. static void
  6115. ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
  6116. char *buf, u32 *length)
  6117. {
  6118. u32 len = *length;
  6119. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6120. int i;
  6121. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6122. "vdev id", vdev->vdev_id);
  6123. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6124. "beacon snr", vdev->beacon_snr);
  6125. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6126. "data snr", vdev->data_snr);
  6127. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6128. "num rx frames", vdev->num_rx_frames);
  6129. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6130. "num rts fail", vdev->num_rts_fail);
  6131. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6132. "num rts success", vdev->num_rts_success);
  6133. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6134. "num rx err", vdev->num_rx_err);
  6135. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6136. "num rx discard", vdev->num_rx_discard);
  6137. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6138. "num tx not acked", vdev->num_tx_not_acked);
  6139. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
  6140. len += scnprintf(buf + len, buf_len - len,
  6141. "%25s [%02d] %u\n",
  6142. "num tx frames", i,
  6143. vdev->num_tx_frames[i]);
  6144. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
  6145. len += scnprintf(buf + len, buf_len - len,
  6146. "%25s [%02d] %u\n",
  6147. "num tx frames retries", i,
  6148. vdev->num_tx_frames_retries[i]);
  6149. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
  6150. len += scnprintf(buf + len, buf_len - len,
  6151. "%25s [%02d] %u\n",
  6152. "num tx frames failures", i,
  6153. vdev->num_tx_frames_failures[i]);
  6154. for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
  6155. len += scnprintf(buf + len, buf_len - len,
  6156. "%25s [%02d] 0x%08x\n",
  6157. "tx rate history", i,
  6158. vdev->tx_rate_history[i]);
  6159. for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
  6160. len += scnprintf(buf + len, buf_len - len,
  6161. "%25s [%02d] %u\n",
  6162. "beacon rssi history", i,
  6163. vdev->beacon_rssi_history[i]);
  6164. len += scnprintf(buf + len, buf_len - len, "\n");
  6165. *length = len;
  6166. }
  6167. static void
  6168. ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
  6169. char *buf, u32 *length)
  6170. {
  6171. u32 len = *length;
  6172. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6173. len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
  6174. "Peer MAC address", peer->peer_macaddr);
  6175. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6176. "Peer RSSI", peer->peer_rssi);
  6177. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6178. "Peer TX rate", peer->peer_tx_rate);
  6179. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6180. "Peer RX rate", peer->peer_rx_rate);
  6181. len += scnprintf(buf + len, buf_len - len, "\n");
  6182. *length = len;
  6183. }
  6184. void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
  6185. struct ath10k_fw_stats *fw_stats,
  6186. char *buf)
  6187. {
  6188. u32 len = 0;
  6189. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6190. const struct ath10k_fw_stats_pdev *pdev;
  6191. const struct ath10k_fw_stats_vdev *vdev;
  6192. const struct ath10k_fw_stats_peer *peer;
  6193. size_t num_peers;
  6194. size_t num_vdevs;
  6195. spin_lock_bh(&ar->data_lock);
  6196. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6197. struct ath10k_fw_stats_pdev, list);
  6198. if (!pdev) {
  6199. ath10k_warn(ar, "failed to get pdev stats\n");
  6200. goto unlock;
  6201. }
  6202. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6203. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6204. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6205. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6206. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6207. len += scnprintf(buf + len, buf_len - len, "\n");
  6208. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6209. "ath10k VDEV stats", num_vdevs);
  6210. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6211. "=================");
  6212. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6213. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6214. }
  6215. len += scnprintf(buf + len, buf_len - len, "\n");
  6216. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6217. "ath10k PEER stats", num_peers);
  6218. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6219. "=================");
  6220. list_for_each_entry(peer, &fw_stats->peers, list) {
  6221. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6222. }
  6223. unlock:
  6224. spin_unlock_bh(&ar->data_lock);
  6225. if (len >= buf_len)
  6226. buf[len - 1] = 0;
  6227. else
  6228. buf[len] = 0;
  6229. }
  6230. void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
  6231. struct ath10k_fw_stats *fw_stats,
  6232. char *buf)
  6233. {
  6234. unsigned int len = 0;
  6235. unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6236. const struct ath10k_fw_stats_pdev *pdev;
  6237. const struct ath10k_fw_stats_vdev *vdev;
  6238. const struct ath10k_fw_stats_peer *peer;
  6239. size_t num_peers;
  6240. size_t num_vdevs;
  6241. spin_lock_bh(&ar->data_lock);
  6242. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6243. struct ath10k_fw_stats_pdev, list);
  6244. if (!pdev) {
  6245. ath10k_warn(ar, "failed to get pdev stats\n");
  6246. goto unlock;
  6247. }
  6248. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6249. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6250. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6251. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  6252. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6253. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6254. len += scnprintf(buf + len, buf_len - len, "\n");
  6255. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6256. "ath10k VDEV stats", num_vdevs);
  6257. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6258. "=================");
  6259. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6260. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6261. }
  6262. len += scnprintf(buf + len, buf_len - len, "\n");
  6263. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6264. "ath10k PEER stats", num_peers);
  6265. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6266. "=================");
  6267. list_for_each_entry(peer, &fw_stats->peers, list) {
  6268. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6269. }
  6270. unlock:
  6271. spin_unlock_bh(&ar->data_lock);
  6272. if (len >= buf_len)
  6273. buf[len - 1] = 0;
  6274. else
  6275. buf[len] = 0;
  6276. }
  6277. static struct sk_buff *
  6278. ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
  6279. u32 detect_level, u32 detect_margin)
  6280. {
  6281. struct wmi_pdev_set_adaptive_cca_params *cmd;
  6282. struct sk_buff *skb;
  6283. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6284. if (!skb)
  6285. return ERR_PTR(-ENOMEM);
  6286. cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
  6287. cmd->enable = __cpu_to_le32(enable);
  6288. cmd->cca_detect_level = __cpu_to_le32(detect_level);
  6289. cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
  6290. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6291. "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
  6292. enable, detect_level, detect_margin);
  6293. return skb;
  6294. }
  6295. void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
  6296. struct ath10k_fw_stats *fw_stats,
  6297. char *buf)
  6298. {
  6299. u32 len = 0;
  6300. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6301. const struct ath10k_fw_stats_pdev *pdev;
  6302. const struct ath10k_fw_stats_vdev *vdev;
  6303. const struct ath10k_fw_stats_peer *peer;
  6304. size_t num_peers;
  6305. size_t num_vdevs;
  6306. spin_lock_bh(&ar->data_lock);
  6307. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6308. struct ath10k_fw_stats_pdev, list);
  6309. if (!pdev) {
  6310. ath10k_warn(ar, "failed to get pdev stats\n");
  6311. goto unlock;
  6312. }
  6313. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6314. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6315. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6316. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  6317. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6318. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6319. "HW paused", pdev->hw_paused);
  6320. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6321. "Seqs posted", pdev->seq_posted);
  6322. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6323. "Seqs failed queueing", pdev->seq_failed_queueing);
  6324. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6325. "Seqs completed", pdev->seq_completed);
  6326. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6327. "Seqs restarted", pdev->seq_restarted);
  6328. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6329. "MU Seqs posted", pdev->mu_seq_posted);
  6330. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6331. "MPDUs SW flushed", pdev->mpdus_sw_flush);
  6332. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6333. "MPDUs HW filtered", pdev->mpdus_hw_filter);
  6334. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6335. "MPDUs truncated", pdev->mpdus_truncated);
  6336. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6337. "MPDUs receive no ACK", pdev->mpdus_ack_failed);
  6338. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6339. "MPDUs expired", pdev->mpdus_expired);
  6340. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6341. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6342. "Num Rx Overflow errors", pdev->rx_ovfl_errs);
  6343. len += scnprintf(buf + len, buf_len - len, "\n");
  6344. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6345. "ath10k VDEV stats", num_vdevs);
  6346. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6347. "=================");
  6348. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6349. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6350. }
  6351. len += scnprintf(buf + len, buf_len - len, "\n");
  6352. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6353. "ath10k PEER stats", num_peers);
  6354. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6355. "=================");
  6356. list_for_each_entry(peer, &fw_stats->peers, list) {
  6357. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6358. }
  6359. unlock:
  6360. spin_unlock_bh(&ar->data_lock);
  6361. if (len >= buf_len)
  6362. buf[len - 1] = 0;
  6363. else
  6364. buf[len] = 0;
  6365. }
  6366. static const struct wmi_ops wmi_ops = {
  6367. .rx = ath10k_wmi_op_rx,
  6368. .map_svc = wmi_main_svc_map,
  6369. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  6370. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  6371. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  6372. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  6373. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  6374. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  6375. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  6376. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  6377. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  6378. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  6379. .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
  6380. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  6381. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  6382. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  6383. .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
  6384. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  6385. .gen_init = ath10k_wmi_op_gen_init,
  6386. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  6387. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  6388. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  6389. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  6390. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  6391. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  6392. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  6393. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  6394. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  6395. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  6396. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  6397. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  6398. /* .gen_vdev_wmm_conf not implemented */
  6399. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  6400. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  6401. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  6402. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  6403. .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
  6404. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  6405. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  6406. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  6407. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  6408. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  6409. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  6410. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  6411. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  6412. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  6413. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  6414. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  6415. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  6416. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  6417. /* .gen_pdev_get_temperature not implemented */
  6418. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  6419. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  6420. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  6421. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  6422. .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
  6423. /* .gen_bcn_tmpl not implemented */
  6424. /* .gen_prb_tmpl not implemented */
  6425. /* .gen_p2p_go_bcn_ie not implemented */
  6426. /* .gen_adaptive_qcs not implemented */
  6427. /* .gen_pdev_enable_adaptive_cca not implemented */
  6428. };
  6429. static const struct wmi_ops wmi_10_1_ops = {
  6430. .rx = ath10k_wmi_10_1_op_rx,
  6431. .map_svc = wmi_10x_svc_map,
  6432. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  6433. .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
  6434. .gen_init = ath10k_wmi_10_1_op_gen_init,
  6435. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  6436. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  6437. .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
  6438. /* .gen_pdev_get_temperature not implemented */
  6439. /* shared with main branch */
  6440. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  6441. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  6442. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  6443. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  6444. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  6445. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  6446. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  6447. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  6448. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  6449. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  6450. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  6451. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  6452. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  6453. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  6454. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  6455. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  6456. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  6457. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  6458. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  6459. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  6460. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  6461. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  6462. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  6463. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  6464. /* .gen_vdev_wmm_conf not implemented */
  6465. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  6466. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  6467. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  6468. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  6469. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  6470. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  6471. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  6472. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  6473. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  6474. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  6475. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  6476. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  6477. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  6478. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  6479. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  6480. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  6481. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  6482. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  6483. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  6484. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  6485. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  6486. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  6487. /* .gen_bcn_tmpl not implemented */
  6488. /* .gen_prb_tmpl not implemented */
  6489. /* .gen_p2p_go_bcn_ie not implemented */
  6490. /* .gen_adaptive_qcs not implemented */
  6491. /* .gen_pdev_enable_adaptive_cca not implemented */
  6492. };
  6493. static const struct wmi_ops wmi_10_2_ops = {
  6494. .rx = ath10k_wmi_10_2_op_rx,
  6495. .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
  6496. .gen_init = ath10k_wmi_10_2_op_gen_init,
  6497. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  6498. /* .gen_pdev_get_temperature not implemented */
  6499. /* shared with 10.1 */
  6500. .map_svc = wmi_10x_svc_map,
  6501. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  6502. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  6503. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  6504. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  6505. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  6506. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  6507. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  6508. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  6509. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  6510. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  6511. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  6512. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  6513. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  6514. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  6515. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  6516. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  6517. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  6518. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  6519. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  6520. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  6521. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  6522. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  6523. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  6524. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  6525. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  6526. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  6527. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  6528. /* .gen_vdev_wmm_conf not implemented */
  6529. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  6530. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  6531. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  6532. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  6533. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  6534. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  6535. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  6536. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  6537. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  6538. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  6539. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  6540. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  6541. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  6542. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  6543. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  6544. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  6545. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  6546. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  6547. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  6548. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  6549. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  6550. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  6551. /* .gen_pdev_enable_adaptive_cca not implemented */
  6552. };
  6553. static const struct wmi_ops wmi_10_2_4_ops = {
  6554. .rx = ath10k_wmi_10_2_op_rx,
  6555. .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
  6556. .gen_init = ath10k_wmi_10_2_op_gen_init,
  6557. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  6558. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  6559. /* shared with 10.1 */
  6560. .map_svc = wmi_10x_svc_map,
  6561. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  6562. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  6563. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  6564. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  6565. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  6566. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  6567. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  6568. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  6569. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  6570. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  6571. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  6572. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  6573. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  6574. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  6575. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  6576. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  6577. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  6578. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  6579. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  6580. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  6581. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  6582. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  6583. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  6584. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  6585. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  6586. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  6587. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  6588. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  6589. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  6590. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  6591. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  6592. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  6593. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  6594. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  6595. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  6596. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  6597. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  6598. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  6599. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  6600. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  6601. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  6602. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  6603. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  6604. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  6605. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  6606. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  6607. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  6608. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  6609. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  6610. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  6611. .gen_pdev_enable_adaptive_cca =
  6612. ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
  6613. /* .gen_bcn_tmpl not implemented */
  6614. /* .gen_prb_tmpl not implemented */
  6615. /* .gen_p2p_go_bcn_ie not implemented */
  6616. /* .gen_adaptive_qcs not implemented */
  6617. };
  6618. static const struct wmi_ops wmi_10_4_ops = {
  6619. .rx = ath10k_wmi_10_4_op_rx,
  6620. .map_svc = wmi_10_4_svc_map,
  6621. .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
  6622. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  6623. .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
  6624. .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
  6625. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  6626. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  6627. .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
  6628. .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
  6629. .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
  6630. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  6631. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  6632. .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
  6633. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  6634. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  6635. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  6636. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  6637. .gen_init = ath10k_wmi_10_4_op_gen_init,
  6638. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  6639. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  6640. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  6641. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  6642. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  6643. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  6644. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  6645. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  6646. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  6647. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  6648. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  6649. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  6650. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  6651. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  6652. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  6653. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  6654. .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
  6655. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  6656. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  6657. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  6658. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  6659. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  6660. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  6661. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  6662. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  6663. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  6664. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  6665. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  6666. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  6667. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  6668. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  6669. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  6670. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  6671. .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
  6672. /* shared with 10.2 */
  6673. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  6674. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  6675. };
  6676. int ath10k_wmi_attach(struct ath10k *ar)
  6677. {
  6678. switch (ar->wmi.op_version) {
  6679. case ATH10K_FW_WMI_OP_VERSION_10_4:
  6680. ar->wmi.ops = &wmi_10_4_ops;
  6681. ar->wmi.cmd = &wmi_10_4_cmd_map;
  6682. ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
  6683. ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
  6684. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  6685. break;
  6686. case ATH10K_FW_WMI_OP_VERSION_10_2_4:
  6687. ar->wmi.cmd = &wmi_10_2_4_cmd_map;
  6688. ar->wmi.ops = &wmi_10_2_4_ops;
  6689. ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
  6690. ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
  6691. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  6692. break;
  6693. case ATH10K_FW_WMI_OP_VERSION_10_2:
  6694. ar->wmi.cmd = &wmi_10_2_cmd_map;
  6695. ar->wmi.ops = &wmi_10_2_ops;
  6696. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  6697. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  6698. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  6699. break;
  6700. case ATH10K_FW_WMI_OP_VERSION_10_1:
  6701. ar->wmi.cmd = &wmi_10x_cmd_map;
  6702. ar->wmi.ops = &wmi_10_1_ops;
  6703. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  6704. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  6705. ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
  6706. break;
  6707. case ATH10K_FW_WMI_OP_VERSION_MAIN:
  6708. ar->wmi.cmd = &wmi_cmd_map;
  6709. ar->wmi.ops = &wmi_ops;
  6710. ar->wmi.vdev_param = &wmi_vdev_param_map;
  6711. ar->wmi.pdev_param = &wmi_pdev_param_map;
  6712. ar->wmi.peer_flags = &wmi_peer_flags_map;
  6713. break;
  6714. case ATH10K_FW_WMI_OP_VERSION_TLV:
  6715. ath10k_wmi_tlv_attach(ar);
  6716. break;
  6717. case ATH10K_FW_WMI_OP_VERSION_UNSET:
  6718. case ATH10K_FW_WMI_OP_VERSION_MAX:
  6719. ath10k_err(ar, "unsupported WMI op version: %d\n",
  6720. ar->wmi.op_version);
  6721. return -EINVAL;
  6722. }
  6723. init_completion(&ar->wmi.service_ready);
  6724. init_completion(&ar->wmi.unified_ready);
  6725. INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
  6726. return 0;
  6727. }
  6728. void ath10k_wmi_free_host_mem(struct ath10k *ar)
  6729. {
  6730. int i;
  6731. /* free the host memory chunks requested by firmware */
  6732. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  6733. dma_unmap_single(ar->dev,
  6734. ar->wmi.mem_chunks[i].paddr,
  6735. ar->wmi.mem_chunks[i].len,
  6736. DMA_TO_DEVICE);
  6737. kfree(ar->wmi.mem_chunks[i].vaddr);
  6738. }
  6739. ar->wmi.num_mem_chunks = 0;
  6740. }
  6741. void ath10k_wmi_detach(struct ath10k *ar)
  6742. {
  6743. cancel_work_sync(&ar->svc_rdy_work);
  6744. if (ar->svc_rdy_skb)
  6745. dev_kfree_skb(ar->svc_rdy_skb);
  6746. }