at86rf230.c 43 KB

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  1. /*
  2. * AT86RF230/RF231 driver
  3. *
  4. * Copyright (C) 2009-2012 Siemens AG
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2
  8. * as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * Written by:
  16. * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
  17. * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
  18. * Alexander Aring <aar@pengutronix.de>
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/hrtimer.h>
  23. #include <linux/jiffies.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/gpio.h>
  27. #include <linux/delay.h>
  28. #include <linux/spi/spi.h>
  29. #include <linux/spi/at86rf230.h>
  30. #include <linux/regmap.h>
  31. #include <linux/skbuff.h>
  32. #include <linux/of_gpio.h>
  33. #include <linux/ieee802154.h>
  34. #include <linux/debugfs.h>
  35. #include <net/mac802154.h>
  36. #include <net/cfg802154.h>
  37. #include "at86rf230.h"
  38. struct at86rf230_local;
  39. /* at86rf2xx chip depend data.
  40. * All timings are in us.
  41. */
  42. struct at86rf2xx_chip_data {
  43. u16 t_sleep_cycle;
  44. u16 t_channel_switch;
  45. u16 t_reset_to_off;
  46. u16 t_off_to_aack;
  47. u16 t_off_to_tx_on;
  48. u16 t_off_to_sleep;
  49. u16 t_sleep_to_off;
  50. u16 t_frame;
  51. u16 t_p_ack;
  52. int rssi_base_val;
  53. int (*set_channel)(struct at86rf230_local *, u8, u8);
  54. int (*set_txpower)(struct at86rf230_local *, s32);
  55. };
  56. #define AT86RF2XX_MAX_BUF (127 + 3)
  57. /* tx retries to access the TX_ON state
  58. * if it's above then force change will be started.
  59. *
  60. * We assume the max_frame_retries (7) value of 802.15.4 here.
  61. */
  62. #define AT86RF2XX_MAX_TX_RETRIES 7
  63. /* We use the recommended 5 minutes timeout to recalibrate */
  64. #define AT86RF2XX_CAL_LOOP_TIMEOUT (5 * 60 * HZ)
  65. struct at86rf230_state_change {
  66. struct at86rf230_local *lp;
  67. int irq;
  68. struct hrtimer timer;
  69. struct spi_message msg;
  70. struct spi_transfer trx;
  71. u8 buf[AT86RF2XX_MAX_BUF];
  72. void (*complete)(void *context);
  73. u8 from_state;
  74. u8 to_state;
  75. bool free;
  76. };
  77. struct at86rf230_trac {
  78. u64 success;
  79. u64 success_data_pending;
  80. u64 success_wait_for_ack;
  81. u64 channel_access_failure;
  82. u64 no_ack;
  83. u64 invalid;
  84. };
  85. struct at86rf230_local {
  86. struct spi_device *spi;
  87. struct ieee802154_hw *hw;
  88. struct at86rf2xx_chip_data *data;
  89. struct regmap *regmap;
  90. int slp_tr;
  91. bool sleep;
  92. struct completion state_complete;
  93. struct at86rf230_state_change state;
  94. unsigned long cal_timeout;
  95. bool is_tx;
  96. bool is_tx_from_off;
  97. u8 tx_retry;
  98. struct sk_buff *tx_skb;
  99. struct at86rf230_state_change tx;
  100. struct at86rf230_trac trac;
  101. };
  102. #define AT86RF2XX_NUMREGS 0x3F
  103. static void
  104. at86rf230_async_state_change(struct at86rf230_local *lp,
  105. struct at86rf230_state_change *ctx,
  106. const u8 state, void (*complete)(void *context));
  107. static inline void
  108. at86rf230_sleep(struct at86rf230_local *lp)
  109. {
  110. if (gpio_is_valid(lp->slp_tr)) {
  111. gpio_set_value(lp->slp_tr, 1);
  112. usleep_range(lp->data->t_off_to_sleep,
  113. lp->data->t_off_to_sleep + 10);
  114. lp->sleep = true;
  115. }
  116. }
  117. static inline void
  118. at86rf230_awake(struct at86rf230_local *lp)
  119. {
  120. if (gpio_is_valid(lp->slp_tr)) {
  121. gpio_set_value(lp->slp_tr, 0);
  122. usleep_range(lp->data->t_sleep_to_off,
  123. lp->data->t_sleep_to_off + 100);
  124. lp->sleep = false;
  125. }
  126. }
  127. static inline int
  128. __at86rf230_write(struct at86rf230_local *lp,
  129. unsigned int addr, unsigned int data)
  130. {
  131. bool sleep = lp->sleep;
  132. int ret;
  133. /* awake for register setting if sleep */
  134. if (sleep)
  135. at86rf230_awake(lp);
  136. ret = regmap_write(lp->regmap, addr, data);
  137. /* sleep again if was sleeping */
  138. if (sleep)
  139. at86rf230_sleep(lp);
  140. return ret;
  141. }
  142. static inline int
  143. __at86rf230_read(struct at86rf230_local *lp,
  144. unsigned int addr, unsigned int *data)
  145. {
  146. bool sleep = lp->sleep;
  147. int ret;
  148. /* awake for register setting if sleep */
  149. if (sleep)
  150. at86rf230_awake(lp);
  151. ret = regmap_read(lp->regmap, addr, data);
  152. /* sleep again if was sleeping */
  153. if (sleep)
  154. at86rf230_sleep(lp);
  155. return ret;
  156. }
  157. static inline int
  158. at86rf230_read_subreg(struct at86rf230_local *lp,
  159. unsigned int addr, unsigned int mask,
  160. unsigned int shift, unsigned int *data)
  161. {
  162. int rc;
  163. rc = __at86rf230_read(lp, addr, data);
  164. if (!rc)
  165. *data = (*data & mask) >> shift;
  166. return rc;
  167. }
  168. static inline int
  169. at86rf230_write_subreg(struct at86rf230_local *lp,
  170. unsigned int addr, unsigned int mask,
  171. unsigned int shift, unsigned int data)
  172. {
  173. bool sleep = lp->sleep;
  174. int ret;
  175. /* awake for register setting if sleep */
  176. if (sleep)
  177. at86rf230_awake(lp);
  178. ret = regmap_update_bits(lp->regmap, addr, mask, data << shift);
  179. /* sleep again if was sleeping */
  180. if (sleep)
  181. at86rf230_sleep(lp);
  182. return ret;
  183. }
  184. static inline void
  185. at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
  186. {
  187. gpio_set_value(lp->slp_tr, 1);
  188. udelay(1);
  189. gpio_set_value(lp->slp_tr, 0);
  190. }
  191. static bool
  192. at86rf230_reg_writeable(struct device *dev, unsigned int reg)
  193. {
  194. switch (reg) {
  195. case RG_TRX_STATE:
  196. case RG_TRX_CTRL_0:
  197. case RG_TRX_CTRL_1:
  198. case RG_PHY_TX_PWR:
  199. case RG_PHY_ED_LEVEL:
  200. case RG_PHY_CC_CCA:
  201. case RG_CCA_THRES:
  202. case RG_RX_CTRL:
  203. case RG_SFD_VALUE:
  204. case RG_TRX_CTRL_2:
  205. case RG_ANT_DIV:
  206. case RG_IRQ_MASK:
  207. case RG_VREG_CTRL:
  208. case RG_BATMON:
  209. case RG_XOSC_CTRL:
  210. case RG_RX_SYN:
  211. case RG_XAH_CTRL_1:
  212. case RG_FTN_CTRL:
  213. case RG_PLL_CF:
  214. case RG_PLL_DCU:
  215. case RG_SHORT_ADDR_0:
  216. case RG_SHORT_ADDR_1:
  217. case RG_PAN_ID_0:
  218. case RG_PAN_ID_1:
  219. case RG_IEEE_ADDR_0:
  220. case RG_IEEE_ADDR_1:
  221. case RG_IEEE_ADDR_2:
  222. case RG_IEEE_ADDR_3:
  223. case RG_IEEE_ADDR_4:
  224. case RG_IEEE_ADDR_5:
  225. case RG_IEEE_ADDR_6:
  226. case RG_IEEE_ADDR_7:
  227. case RG_XAH_CTRL_0:
  228. case RG_CSMA_SEED_0:
  229. case RG_CSMA_SEED_1:
  230. case RG_CSMA_BE:
  231. return true;
  232. default:
  233. return false;
  234. }
  235. }
  236. static bool
  237. at86rf230_reg_readable(struct device *dev, unsigned int reg)
  238. {
  239. bool rc;
  240. /* all writeable are also readable */
  241. rc = at86rf230_reg_writeable(dev, reg);
  242. if (rc)
  243. return rc;
  244. /* readonly regs */
  245. switch (reg) {
  246. case RG_TRX_STATUS:
  247. case RG_PHY_RSSI:
  248. case RG_IRQ_STATUS:
  249. case RG_PART_NUM:
  250. case RG_VERSION_NUM:
  251. case RG_MAN_ID_1:
  252. case RG_MAN_ID_0:
  253. return true;
  254. default:
  255. return false;
  256. }
  257. }
  258. static bool
  259. at86rf230_reg_volatile(struct device *dev, unsigned int reg)
  260. {
  261. /* can be changed during runtime */
  262. switch (reg) {
  263. case RG_TRX_STATUS:
  264. case RG_TRX_STATE:
  265. case RG_PHY_RSSI:
  266. case RG_PHY_ED_LEVEL:
  267. case RG_IRQ_STATUS:
  268. case RG_VREG_CTRL:
  269. case RG_PLL_CF:
  270. case RG_PLL_DCU:
  271. return true;
  272. default:
  273. return false;
  274. }
  275. }
  276. static bool
  277. at86rf230_reg_precious(struct device *dev, unsigned int reg)
  278. {
  279. /* don't clear irq line on read */
  280. switch (reg) {
  281. case RG_IRQ_STATUS:
  282. return true;
  283. default:
  284. return false;
  285. }
  286. }
  287. static const struct regmap_config at86rf230_regmap_spi_config = {
  288. .reg_bits = 8,
  289. .val_bits = 8,
  290. .write_flag_mask = CMD_REG | CMD_WRITE,
  291. .read_flag_mask = CMD_REG,
  292. .cache_type = REGCACHE_RBTREE,
  293. .max_register = AT86RF2XX_NUMREGS,
  294. .writeable_reg = at86rf230_reg_writeable,
  295. .readable_reg = at86rf230_reg_readable,
  296. .volatile_reg = at86rf230_reg_volatile,
  297. .precious_reg = at86rf230_reg_precious,
  298. };
  299. static void
  300. at86rf230_async_error_recover(void *context)
  301. {
  302. struct at86rf230_state_change *ctx = context;
  303. struct at86rf230_local *lp = ctx->lp;
  304. lp->is_tx = 0;
  305. at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, NULL);
  306. ieee802154_wake_queue(lp->hw);
  307. if (ctx->free)
  308. kfree(ctx);
  309. }
  310. static inline void
  311. at86rf230_async_error(struct at86rf230_local *lp,
  312. struct at86rf230_state_change *ctx, int rc)
  313. {
  314. dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
  315. at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
  316. at86rf230_async_error_recover);
  317. }
  318. /* Generic function to get some register value in async mode */
  319. static void
  320. at86rf230_async_read_reg(struct at86rf230_local *lp, u8 reg,
  321. struct at86rf230_state_change *ctx,
  322. void (*complete)(void *context))
  323. {
  324. int rc;
  325. u8 *tx_buf = ctx->buf;
  326. tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
  327. ctx->msg.complete = complete;
  328. rc = spi_async(lp->spi, &ctx->msg);
  329. if (rc)
  330. at86rf230_async_error(lp, ctx, rc);
  331. }
  332. static void
  333. at86rf230_async_write_reg(struct at86rf230_local *lp, u8 reg, u8 val,
  334. struct at86rf230_state_change *ctx,
  335. void (*complete)(void *context))
  336. {
  337. int rc;
  338. ctx->buf[0] = (reg & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
  339. ctx->buf[1] = val;
  340. ctx->msg.complete = complete;
  341. rc = spi_async(lp->spi, &ctx->msg);
  342. if (rc)
  343. at86rf230_async_error(lp, ctx, rc);
  344. }
  345. static void
  346. at86rf230_async_state_assert(void *context)
  347. {
  348. struct at86rf230_state_change *ctx = context;
  349. struct at86rf230_local *lp = ctx->lp;
  350. const u8 *buf = ctx->buf;
  351. const u8 trx_state = buf[1] & TRX_STATE_MASK;
  352. /* Assert state change */
  353. if (trx_state != ctx->to_state) {
  354. /* Special handling if transceiver state is in
  355. * STATE_BUSY_RX_AACK and a SHR was detected.
  356. */
  357. if (trx_state == STATE_BUSY_RX_AACK) {
  358. /* Undocumented race condition. If we send a state
  359. * change to STATE_RX_AACK_ON the transceiver could
  360. * change his state automatically to STATE_BUSY_RX_AACK
  361. * if a SHR was detected. This is not an error, but we
  362. * can't assert this.
  363. */
  364. if (ctx->to_state == STATE_RX_AACK_ON)
  365. goto done;
  366. /* If we change to STATE_TX_ON without forcing and
  367. * transceiver state is STATE_BUSY_RX_AACK, we wait
  368. * 'tFrame + tPAck' receiving time. In this time the
  369. * PDU should be received. If the transceiver is still
  370. * in STATE_BUSY_RX_AACK, we run a force state change
  371. * to STATE_TX_ON. This is a timeout handling, if the
  372. * transceiver stucks in STATE_BUSY_RX_AACK.
  373. *
  374. * Additional we do several retries to try to get into
  375. * TX_ON state without forcing. If the retries are
  376. * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
  377. * will do a force change.
  378. */
  379. if (ctx->to_state == STATE_TX_ON ||
  380. ctx->to_state == STATE_TRX_OFF) {
  381. u8 state = ctx->to_state;
  382. if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
  383. state = STATE_FORCE_TRX_OFF;
  384. lp->tx_retry++;
  385. at86rf230_async_state_change(lp, ctx, state,
  386. ctx->complete);
  387. return;
  388. }
  389. }
  390. dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
  391. ctx->from_state, ctx->to_state, trx_state);
  392. }
  393. done:
  394. if (ctx->complete)
  395. ctx->complete(context);
  396. }
  397. static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
  398. {
  399. struct at86rf230_state_change *ctx =
  400. container_of(timer, struct at86rf230_state_change, timer);
  401. struct at86rf230_local *lp = ctx->lp;
  402. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  403. at86rf230_async_state_assert);
  404. return HRTIMER_NORESTART;
  405. }
  406. /* Do state change timing delay. */
  407. static void
  408. at86rf230_async_state_delay(void *context)
  409. {
  410. struct at86rf230_state_change *ctx = context;
  411. struct at86rf230_local *lp = ctx->lp;
  412. struct at86rf2xx_chip_data *c = lp->data;
  413. bool force = false;
  414. ktime_t tim;
  415. /* The force state changes are will show as normal states in the
  416. * state status subregister. We change the to_state to the
  417. * corresponding one and remember if it was a force change, this
  418. * differs if we do a state change from STATE_BUSY_RX_AACK.
  419. */
  420. switch (ctx->to_state) {
  421. case STATE_FORCE_TX_ON:
  422. ctx->to_state = STATE_TX_ON;
  423. force = true;
  424. break;
  425. case STATE_FORCE_TRX_OFF:
  426. ctx->to_state = STATE_TRX_OFF;
  427. force = true;
  428. break;
  429. default:
  430. break;
  431. }
  432. switch (ctx->from_state) {
  433. case STATE_TRX_OFF:
  434. switch (ctx->to_state) {
  435. case STATE_RX_AACK_ON:
  436. tim = ktime_set(0, c->t_off_to_aack * NSEC_PER_USEC);
  437. /* state change from TRX_OFF to RX_AACK_ON to do a
  438. * calibration, we need to reset the timeout for the
  439. * next one.
  440. */
  441. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  442. goto change;
  443. case STATE_TX_ARET_ON:
  444. case STATE_TX_ON:
  445. tim = ktime_set(0, c->t_off_to_tx_on * NSEC_PER_USEC);
  446. /* state change from TRX_OFF to TX_ON or ARET_ON to do
  447. * a calibration, we need to reset the timeout for the
  448. * next one.
  449. */
  450. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  451. goto change;
  452. default:
  453. break;
  454. }
  455. break;
  456. case STATE_BUSY_RX_AACK:
  457. switch (ctx->to_state) {
  458. case STATE_TRX_OFF:
  459. case STATE_TX_ON:
  460. /* Wait for worst case receiving time if we
  461. * didn't make a force change from BUSY_RX_AACK
  462. * to TX_ON or TRX_OFF.
  463. */
  464. if (!force) {
  465. tim = ktime_set(0, (c->t_frame + c->t_p_ack) *
  466. NSEC_PER_USEC);
  467. goto change;
  468. }
  469. break;
  470. default:
  471. break;
  472. }
  473. break;
  474. /* Default value, means RESET state */
  475. case STATE_P_ON:
  476. switch (ctx->to_state) {
  477. case STATE_TRX_OFF:
  478. tim = ktime_set(0, c->t_reset_to_off * NSEC_PER_USEC);
  479. goto change;
  480. default:
  481. break;
  482. }
  483. break;
  484. default:
  485. break;
  486. }
  487. /* Default delay is 1us in the most cases */
  488. udelay(1);
  489. at86rf230_async_state_timer(&ctx->timer);
  490. return;
  491. change:
  492. hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
  493. }
  494. static void
  495. at86rf230_async_state_change_start(void *context)
  496. {
  497. struct at86rf230_state_change *ctx = context;
  498. struct at86rf230_local *lp = ctx->lp;
  499. u8 *buf = ctx->buf;
  500. const u8 trx_state = buf[1] & TRX_STATE_MASK;
  501. /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
  502. if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
  503. udelay(1);
  504. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  505. at86rf230_async_state_change_start);
  506. return;
  507. }
  508. /* Check if we already are in the state which we change in */
  509. if (trx_state == ctx->to_state) {
  510. if (ctx->complete)
  511. ctx->complete(context);
  512. return;
  513. }
  514. /* Set current state to the context of state change */
  515. ctx->from_state = trx_state;
  516. /* Going into the next step for a state change which do a timing
  517. * relevant delay.
  518. */
  519. at86rf230_async_write_reg(lp, RG_TRX_STATE, ctx->to_state, ctx,
  520. at86rf230_async_state_delay);
  521. }
  522. static void
  523. at86rf230_async_state_change(struct at86rf230_local *lp,
  524. struct at86rf230_state_change *ctx,
  525. const u8 state, void (*complete)(void *context))
  526. {
  527. /* Initialization for the state change context */
  528. ctx->to_state = state;
  529. ctx->complete = complete;
  530. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  531. at86rf230_async_state_change_start);
  532. }
  533. static void
  534. at86rf230_sync_state_change_complete(void *context)
  535. {
  536. struct at86rf230_state_change *ctx = context;
  537. struct at86rf230_local *lp = ctx->lp;
  538. complete(&lp->state_complete);
  539. }
  540. /* This function do a sync framework above the async state change.
  541. * Some callbacks of the IEEE 802.15.4 driver interface need to be
  542. * handled synchronously.
  543. */
  544. static int
  545. at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
  546. {
  547. unsigned long rc;
  548. at86rf230_async_state_change(lp, &lp->state, state,
  549. at86rf230_sync_state_change_complete);
  550. rc = wait_for_completion_timeout(&lp->state_complete,
  551. msecs_to_jiffies(100));
  552. if (!rc) {
  553. at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
  554. return -ETIMEDOUT;
  555. }
  556. return 0;
  557. }
  558. static void
  559. at86rf230_tx_complete(void *context)
  560. {
  561. struct at86rf230_state_change *ctx = context;
  562. struct at86rf230_local *lp = ctx->lp;
  563. ieee802154_xmit_complete(lp->hw, lp->tx_skb, false);
  564. kfree(ctx);
  565. }
  566. static void
  567. at86rf230_tx_on(void *context)
  568. {
  569. struct at86rf230_state_change *ctx = context;
  570. struct at86rf230_local *lp = ctx->lp;
  571. at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
  572. at86rf230_tx_complete);
  573. }
  574. static void
  575. at86rf230_tx_trac_check(void *context)
  576. {
  577. struct at86rf230_state_change *ctx = context;
  578. struct at86rf230_local *lp = ctx->lp;
  579. if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) {
  580. u8 trac = TRAC_MASK(ctx->buf[1]);
  581. switch (trac) {
  582. case TRAC_SUCCESS:
  583. lp->trac.success++;
  584. break;
  585. case TRAC_SUCCESS_DATA_PENDING:
  586. lp->trac.success_data_pending++;
  587. break;
  588. case TRAC_CHANNEL_ACCESS_FAILURE:
  589. lp->trac.channel_access_failure++;
  590. break;
  591. case TRAC_NO_ACK:
  592. lp->trac.no_ack++;
  593. break;
  594. case TRAC_INVALID:
  595. lp->trac.invalid++;
  596. break;
  597. default:
  598. WARN_ONCE(1, "received tx trac status %d\n", trac);
  599. break;
  600. }
  601. }
  602. at86rf230_async_state_change(lp, ctx, STATE_TX_ON, at86rf230_tx_on);
  603. }
  604. static void
  605. at86rf230_rx_read_frame_complete(void *context)
  606. {
  607. struct at86rf230_state_change *ctx = context;
  608. struct at86rf230_local *lp = ctx->lp;
  609. const u8 *buf = ctx->buf;
  610. struct sk_buff *skb;
  611. u8 len, lqi;
  612. len = buf[1];
  613. if (!ieee802154_is_valid_psdu_len(len)) {
  614. dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
  615. len = IEEE802154_MTU;
  616. }
  617. lqi = buf[2 + len];
  618. skb = dev_alloc_skb(IEEE802154_MTU);
  619. if (!skb) {
  620. dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
  621. kfree(ctx);
  622. return;
  623. }
  624. memcpy(skb_put(skb, len), buf + 2, len);
  625. ieee802154_rx_irqsafe(lp->hw, skb, lqi);
  626. kfree(ctx);
  627. }
  628. static void
  629. at86rf230_rx_trac_check(void *context)
  630. {
  631. struct at86rf230_state_change *ctx = context;
  632. struct at86rf230_local *lp = ctx->lp;
  633. u8 *buf = ctx->buf;
  634. int rc;
  635. if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS)) {
  636. u8 trac = TRAC_MASK(buf[1]);
  637. switch (trac) {
  638. case TRAC_SUCCESS:
  639. lp->trac.success++;
  640. break;
  641. case TRAC_SUCCESS_WAIT_FOR_ACK:
  642. lp->trac.success_wait_for_ack++;
  643. break;
  644. case TRAC_INVALID:
  645. lp->trac.invalid++;
  646. break;
  647. default:
  648. WARN_ONCE(1, "received rx trac status %d\n", trac);
  649. break;
  650. }
  651. }
  652. buf[0] = CMD_FB;
  653. ctx->trx.len = AT86RF2XX_MAX_BUF;
  654. ctx->msg.complete = at86rf230_rx_read_frame_complete;
  655. rc = spi_async(lp->spi, &ctx->msg);
  656. if (rc) {
  657. ctx->trx.len = 2;
  658. at86rf230_async_error(lp, ctx, rc);
  659. }
  660. }
  661. static void
  662. at86rf230_irq_trx_end(void *context)
  663. {
  664. struct at86rf230_state_change *ctx = context;
  665. struct at86rf230_local *lp = ctx->lp;
  666. if (lp->is_tx) {
  667. lp->is_tx = 0;
  668. at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
  669. at86rf230_tx_trac_check);
  670. } else {
  671. at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
  672. at86rf230_rx_trac_check);
  673. }
  674. }
  675. static void
  676. at86rf230_irq_status(void *context)
  677. {
  678. struct at86rf230_state_change *ctx = context;
  679. struct at86rf230_local *lp = ctx->lp;
  680. const u8 *buf = ctx->buf;
  681. u8 irq = buf[1];
  682. enable_irq(lp->spi->irq);
  683. if (irq & IRQ_TRX_END) {
  684. at86rf230_irq_trx_end(ctx);
  685. } else {
  686. dev_err(&lp->spi->dev, "not supported irq %02x received\n",
  687. irq);
  688. kfree(ctx);
  689. }
  690. }
  691. static void
  692. at86rf230_setup_spi_messages(struct at86rf230_local *lp,
  693. struct at86rf230_state_change *state)
  694. {
  695. state->lp = lp;
  696. state->irq = lp->spi->irq;
  697. spi_message_init(&state->msg);
  698. state->msg.context = state;
  699. state->trx.len = 2;
  700. state->trx.tx_buf = state->buf;
  701. state->trx.rx_buf = state->buf;
  702. spi_message_add_tail(&state->trx, &state->msg);
  703. hrtimer_init(&state->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  704. state->timer.function = at86rf230_async_state_timer;
  705. }
  706. static irqreturn_t at86rf230_isr(int irq, void *data)
  707. {
  708. struct at86rf230_local *lp = data;
  709. struct at86rf230_state_change *ctx;
  710. int rc;
  711. disable_irq_nosync(irq);
  712. ctx = kzalloc(sizeof(*ctx), GFP_ATOMIC);
  713. if (!ctx) {
  714. enable_irq(irq);
  715. return IRQ_NONE;
  716. }
  717. at86rf230_setup_spi_messages(lp, ctx);
  718. /* tell on error handling to free ctx */
  719. ctx->free = true;
  720. ctx->buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
  721. ctx->msg.complete = at86rf230_irq_status;
  722. rc = spi_async(lp->spi, &ctx->msg);
  723. if (rc) {
  724. at86rf230_async_error(lp, ctx, rc);
  725. enable_irq(irq);
  726. return IRQ_NONE;
  727. }
  728. return IRQ_HANDLED;
  729. }
  730. static void
  731. at86rf230_write_frame_complete(void *context)
  732. {
  733. struct at86rf230_state_change *ctx = context;
  734. struct at86rf230_local *lp = ctx->lp;
  735. ctx->trx.len = 2;
  736. if (gpio_is_valid(lp->slp_tr))
  737. at86rf230_slp_tr_rising_edge(lp);
  738. else
  739. at86rf230_async_write_reg(lp, RG_TRX_STATE, STATE_BUSY_TX, ctx,
  740. NULL);
  741. }
  742. static void
  743. at86rf230_write_frame(void *context)
  744. {
  745. struct at86rf230_state_change *ctx = context;
  746. struct at86rf230_local *lp = ctx->lp;
  747. struct sk_buff *skb = lp->tx_skb;
  748. u8 *buf = ctx->buf;
  749. int rc;
  750. lp->is_tx = 1;
  751. buf[0] = CMD_FB | CMD_WRITE;
  752. buf[1] = skb->len + 2;
  753. memcpy(buf + 2, skb->data, skb->len);
  754. ctx->trx.len = skb->len + 2;
  755. ctx->msg.complete = at86rf230_write_frame_complete;
  756. rc = spi_async(lp->spi, &ctx->msg);
  757. if (rc) {
  758. ctx->trx.len = 2;
  759. at86rf230_async_error(lp, ctx, rc);
  760. }
  761. }
  762. static void
  763. at86rf230_xmit_tx_on(void *context)
  764. {
  765. struct at86rf230_state_change *ctx = context;
  766. struct at86rf230_local *lp = ctx->lp;
  767. at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
  768. at86rf230_write_frame);
  769. }
  770. static void
  771. at86rf230_xmit_start(void *context)
  772. {
  773. struct at86rf230_state_change *ctx = context;
  774. struct at86rf230_local *lp = ctx->lp;
  775. /* check if we change from off state */
  776. if (lp->is_tx_from_off) {
  777. lp->is_tx_from_off = false;
  778. at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
  779. at86rf230_write_frame);
  780. } else {
  781. at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
  782. at86rf230_xmit_tx_on);
  783. }
  784. }
  785. static int
  786. at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
  787. {
  788. struct at86rf230_local *lp = hw->priv;
  789. struct at86rf230_state_change *ctx = &lp->tx;
  790. lp->tx_skb = skb;
  791. lp->tx_retry = 0;
  792. /* After 5 minutes in PLL and the same frequency we run again the
  793. * calibration loops which is recommended by at86rf2xx datasheets.
  794. *
  795. * The calibration is initiate by a state change from TRX_OFF
  796. * to TX_ON, the lp->cal_timeout should be reinit by state_delay
  797. * function then to start in the next 5 minutes.
  798. */
  799. if (time_is_before_jiffies(lp->cal_timeout)) {
  800. lp->is_tx_from_off = true;
  801. at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
  802. at86rf230_xmit_start);
  803. } else {
  804. at86rf230_xmit_start(ctx);
  805. }
  806. return 0;
  807. }
  808. static int
  809. at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
  810. {
  811. BUG_ON(!level);
  812. *level = 0xbe;
  813. return 0;
  814. }
  815. static int
  816. at86rf230_start(struct ieee802154_hw *hw)
  817. {
  818. struct at86rf230_local *lp = hw->priv;
  819. /* reset trac stats on start */
  820. if (IS_ENABLED(CONFIG_IEEE802154_AT86RF230_DEBUGFS))
  821. memset(&lp->trac, 0, sizeof(struct at86rf230_trac));
  822. at86rf230_awake(lp);
  823. enable_irq(lp->spi->irq);
  824. return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON);
  825. }
  826. static void
  827. at86rf230_stop(struct ieee802154_hw *hw)
  828. {
  829. struct at86rf230_local *lp = hw->priv;
  830. u8 csma_seed[2];
  831. at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
  832. disable_irq(lp->spi->irq);
  833. /* It's recommended to set random new csma_seeds before sleep state.
  834. * Makes only sense in the stop callback, not doing this inside of
  835. * at86rf230_sleep, this is also used when we don't transmit afterwards
  836. * when calling start callback again.
  837. */
  838. get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
  839. at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
  840. at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
  841. at86rf230_sleep(lp);
  842. }
  843. static int
  844. at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
  845. {
  846. return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
  847. }
  848. #define AT86RF2XX_MAX_ED_LEVELS 0xF
  849. static const s32 at86rf23x_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  850. -9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300,
  851. -7100, -6900, -6700, -6500, -6300, -6100,
  852. };
  853. static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  854. -10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200,
  855. -8000, -7800, -7600, -7400, -7200, -7000,
  856. };
  857. static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  858. -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000,
  859. -7800, -7600, -7400, -7200, -7000, -6800,
  860. };
  861. static inline int
  862. at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val)
  863. {
  864. unsigned int cca_ed_thres;
  865. int rc;
  866. rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres);
  867. if (rc < 0)
  868. return rc;
  869. switch (rssi_base_val) {
  870. case -98:
  871. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98;
  872. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98);
  873. lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres];
  874. break;
  875. case -100:
  876. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
  877. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
  878. lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres];
  879. break;
  880. default:
  881. WARN_ON(1);
  882. }
  883. return 0;
  884. }
  885. static int
  886. at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
  887. {
  888. int rc;
  889. if (channel == 0)
  890. rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
  891. else
  892. rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
  893. if (rc < 0)
  894. return rc;
  895. if (page == 0) {
  896. rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
  897. lp->data->rssi_base_val = -100;
  898. } else {
  899. rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
  900. lp->data->rssi_base_val = -98;
  901. }
  902. if (rc < 0)
  903. return rc;
  904. rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val);
  905. if (rc < 0)
  906. return rc;
  907. /* This sets the symbol_duration according frequency on the 212.
  908. * TODO move this handling while set channel and page in cfg802154.
  909. * We can do that, this timings are according 802.15.4 standard.
  910. * If we do that in cfg802154, this is a more generic calculation.
  911. *
  912. * This should also protected from ifs_timer. Means cancel timer and
  913. * init with a new value. For now, this is okay.
  914. */
  915. if (channel == 0) {
  916. if (page == 0) {
  917. /* SUB:0 and BPSK:0 -> BPSK-20 */
  918. lp->hw->phy->symbol_duration = 50;
  919. } else {
  920. /* SUB:1 and BPSK:0 -> BPSK-40 */
  921. lp->hw->phy->symbol_duration = 25;
  922. }
  923. } else {
  924. if (page == 0)
  925. /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
  926. lp->hw->phy->symbol_duration = 40;
  927. else
  928. /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
  929. lp->hw->phy->symbol_duration = 16;
  930. }
  931. lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
  932. lp->hw->phy->symbol_duration;
  933. lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
  934. lp->hw->phy->symbol_duration;
  935. return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
  936. }
  937. static int
  938. at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
  939. {
  940. struct at86rf230_local *lp = hw->priv;
  941. int rc;
  942. rc = lp->data->set_channel(lp, page, channel);
  943. /* Wait for PLL */
  944. usleep_range(lp->data->t_channel_switch,
  945. lp->data->t_channel_switch + 10);
  946. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  947. return rc;
  948. }
  949. static int
  950. at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
  951. struct ieee802154_hw_addr_filt *filt,
  952. unsigned long changed)
  953. {
  954. struct at86rf230_local *lp = hw->priv;
  955. if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
  956. u16 addr = le16_to_cpu(filt->short_addr);
  957. dev_vdbg(&lp->spi->dev,
  958. "at86rf230_set_hw_addr_filt called for saddr\n");
  959. __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
  960. __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
  961. }
  962. if (changed & IEEE802154_AFILT_PANID_CHANGED) {
  963. u16 pan = le16_to_cpu(filt->pan_id);
  964. dev_vdbg(&lp->spi->dev,
  965. "at86rf230_set_hw_addr_filt called for pan id\n");
  966. __at86rf230_write(lp, RG_PAN_ID_0, pan);
  967. __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
  968. }
  969. if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
  970. u8 i, addr[8];
  971. memcpy(addr, &filt->ieee_addr, 8);
  972. dev_vdbg(&lp->spi->dev,
  973. "at86rf230_set_hw_addr_filt called for IEEE addr\n");
  974. for (i = 0; i < 8; i++)
  975. __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
  976. }
  977. if (changed & IEEE802154_AFILT_PANC_CHANGED) {
  978. dev_vdbg(&lp->spi->dev,
  979. "at86rf230_set_hw_addr_filt called for panc change\n");
  980. if (filt->pan_coord)
  981. at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
  982. else
  983. at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
  984. }
  985. return 0;
  986. }
  987. #define AT86RF23X_MAX_TX_POWERS 0xF
  988. static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
  989. 400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600,
  990. -800, -1200, -1700,
  991. };
  992. static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
  993. 300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700,
  994. -900, -1200, -1700,
  995. };
  996. #define AT86RF212_MAX_TX_POWERS 0x1F
  997. static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = {
  998. 500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700,
  999. -800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700,
  1000. -1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600,
  1001. };
  1002. static int
  1003. at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm)
  1004. {
  1005. u32 i;
  1006. for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
  1007. if (lp->hw->phy->supported.tx_powers[i] == mbm)
  1008. return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i);
  1009. }
  1010. return -EINVAL;
  1011. }
  1012. static int
  1013. at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm)
  1014. {
  1015. u32 i;
  1016. for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
  1017. if (lp->hw->phy->supported.tx_powers[i] == mbm)
  1018. return at86rf230_write_subreg(lp, SR_TX_PWR_212, i);
  1019. }
  1020. return -EINVAL;
  1021. }
  1022. static int
  1023. at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm)
  1024. {
  1025. struct at86rf230_local *lp = hw->priv;
  1026. return lp->data->set_txpower(lp, mbm);
  1027. }
  1028. static int
  1029. at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
  1030. {
  1031. struct at86rf230_local *lp = hw->priv;
  1032. return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
  1033. }
  1034. static int
  1035. at86rf230_set_cca_mode(struct ieee802154_hw *hw,
  1036. const struct wpan_phy_cca *cca)
  1037. {
  1038. struct at86rf230_local *lp = hw->priv;
  1039. u8 val;
  1040. /* mapping 802.15.4 to driver spec */
  1041. switch (cca->mode) {
  1042. case NL802154_CCA_ENERGY:
  1043. val = 1;
  1044. break;
  1045. case NL802154_CCA_CARRIER:
  1046. val = 2;
  1047. break;
  1048. case NL802154_CCA_ENERGY_CARRIER:
  1049. switch (cca->opt) {
  1050. case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
  1051. val = 3;
  1052. break;
  1053. case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
  1054. val = 0;
  1055. break;
  1056. default:
  1057. return -EINVAL;
  1058. }
  1059. break;
  1060. default:
  1061. return -EINVAL;
  1062. }
  1063. return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
  1064. }
  1065. static int
  1066. at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
  1067. {
  1068. struct at86rf230_local *lp = hw->priv;
  1069. u32 i;
  1070. for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) {
  1071. if (hw->phy->supported.cca_ed_levels[i] == mbm)
  1072. return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i);
  1073. }
  1074. return -EINVAL;
  1075. }
  1076. static int
  1077. at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
  1078. u8 retries)
  1079. {
  1080. struct at86rf230_local *lp = hw->priv;
  1081. int rc;
  1082. rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
  1083. if (rc)
  1084. return rc;
  1085. rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
  1086. if (rc)
  1087. return rc;
  1088. return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
  1089. }
  1090. static int
  1091. at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
  1092. {
  1093. struct at86rf230_local *lp = hw->priv;
  1094. return at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
  1095. }
  1096. static int
  1097. at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
  1098. {
  1099. struct at86rf230_local *lp = hw->priv;
  1100. int rc;
  1101. if (on) {
  1102. rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
  1103. if (rc < 0)
  1104. return rc;
  1105. rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
  1106. if (rc < 0)
  1107. return rc;
  1108. } else {
  1109. rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
  1110. if (rc < 0)
  1111. return rc;
  1112. rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
  1113. if (rc < 0)
  1114. return rc;
  1115. }
  1116. return 0;
  1117. }
  1118. static const struct ieee802154_ops at86rf230_ops = {
  1119. .owner = THIS_MODULE,
  1120. .xmit_async = at86rf230_xmit,
  1121. .ed = at86rf230_ed,
  1122. .set_channel = at86rf230_channel,
  1123. .start = at86rf230_start,
  1124. .stop = at86rf230_stop,
  1125. .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
  1126. .set_txpower = at86rf230_set_txpower,
  1127. .set_lbt = at86rf230_set_lbt,
  1128. .set_cca_mode = at86rf230_set_cca_mode,
  1129. .set_cca_ed_level = at86rf230_set_cca_ed_level,
  1130. .set_csma_params = at86rf230_set_csma_params,
  1131. .set_frame_retries = at86rf230_set_frame_retries,
  1132. .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
  1133. };
  1134. static struct at86rf2xx_chip_data at86rf233_data = {
  1135. .t_sleep_cycle = 330,
  1136. .t_channel_switch = 11,
  1137. .t_reset_to_off = 26,
  1138. .t_off_to_aack = 80,
  1139. .t_off_to_tx_on = 80,
  1140. .t_off_to_sleep = 35,
  1141. .t_sleep_to_off = 210,
  1142. .t_frame = 4096,
  1143. .t_p_ack = 545,
  1144. .rssi_base_val = -91,
  1145. .set_channel = at86rf23x_set_channel,
  1146. .set_txpower = at86rf23x_set_txpower,
  1147. };
  1148. static struct at86rf2xx_chip_data at86rf231_data = {
  1149. .t_sleep_cycle = 330,
  1150. .t_channel_switch = 24,
  1151. .t_reset_to_off = 37,
  1152. .t_off_to_aack = 110,
  1153. .t_off_to_tx_on = 110,
  1154. .t_off_to_sleep = 35,
  1155. .t_sleep_to_off = 380,
  1156. .t_frame = 4096,
  1157. .t_p_ack = 545,
  1158. .rssi_base_val = -91,
  1159. .set_channel = at86rf23x_set_channel,
  1160. .set_txpower = at86rf23x_set_txpower,
  1161. };
  1162. static struct at86rf2xx_chip_data at86rf212_data = {
  1163. .t_sleep_cycle = 330,
  1164. .t_channel_switch = 11,
  1165. .t_reset_to_off = 26,
  1166. .t_off_to_aack = 200,
  1167. .t_off_to_tx_on = 200,
  1168. .t_off_to_sleep = 35,
  1169. .t_sleep_to_off = 380,
  1170. .t_frame = 4096,
  1171. .t_p_ack = 545,
  1172. .rssi_base_val = -100,
  1173. .set_channel = at86rf212_set_channel,
  1174. .set_txpower = at86rf212_set_txpower,
  1175. };
  1176. static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
  1177. {
  1178. int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
  1179. unsigned int dvdd;
  1180. u8 csma_seed[2];
  1181. rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
  1182. if (rc)
  1183. return rc;
  1184. irq_type = irq_get_trigger_type(lp->spi->irq);
  1185. if (irq_type == IRQ_TYPE_EDGE_FALLING ||
  1186. irq_type == IRQ_TYPE_LEVEL_LOW)
  1187. irq_pol = IRQ_ACTIVE_LOW;
  1188. rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
  1189. if (rc)
  1190. return rc;
  1191. rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
  1192. if (rc)
  1193. return rc;
  1194. rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
  1195. if (rc)
  1196. return rc;
  1197. /* reset values differs in at86rf231 and at86rf233 */
  1198. rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
  1199. if (rc)
  1200. return rc;
  1201. get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
  1202. rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
  1203. if (rc)
  1204. return rc;
  1205. rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
  1206. if (rc)
  1207. return rc;
  1208. /* CLKM changes are applied immediately */
  1209. rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
  1210. if (rc)
  1211. return rc;
  1212. /* Turn CLKM Off */
  1213. rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
  1214. if (rc)
  1215. return rc;
  1216. /* Wait the next SLEEP cycle */
  1217. usleep_range(lp->data->t_sleep_cycle,
  1218. lp->data->t_sleep_cycle + 100);
  1219. /* xtal_trim value is calculated by:
  1220. * CL = 0.5 * (CX + CTRIM + CPAR)
  1221. *
  1222. * whereas:
  1223. * CL = capacitor of used crystal
  1224. * CX = connected capacitors at xtal pins
  1225. * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
  1226. * but this is different on each board setup. You need to fine
  1227. * tuning this value via CTRIM.
  1228. * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
  1229. * 0 pF upto 4.5 pF.
  1230. *
  1231. * Examples:
  1232. * atben transceiver:
  1233. *
  1234. * CL = 8 pF
  1235. * CX = 12 pF
  1236. * CPAR = 3 pF (We assume the magic constant from datasheet)
  1237. * CTRIM = 0.9 pF
  1238. *
  1239. * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
  1240. *
  1241. * xtal_trim = 0x3
  1242. *
  1243. * openlabs transceiver:
  1244. *
  1245. * CL = 16 pF
  1246. * CX = 22 pF
  1247. * CPAR = 3 pF (We assume the magic constant from datasheet)
  1248. * CTRIM = 4.5 pF
  1249. *
  1250. * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
  1251. *
  1252. * xtal_trim = 0xf
  1253. */
  1254. rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
  1255. if (rc)
  1256. return rc;
  1257. rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
  1258. if (rc)
  1259. return rc;
  1260. if (!dvdd) {
  1261. dev_err(&lp->spi->dev, "DVDD error\n");
  1262. return -EINVAL;
  1263. }
  1264. /* Force setting slotted operation bit to 0. Sometimes the atben
  1265. * sets this bit and I don't know why. We set this always force
  1266. * to zero while probing.
  1267. */
  1268. return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
  1269. }
  1270. static int
  1271. at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
  1272. u8 *xtal_trim)
  1273. {
  1274. struct at86rf230_platform_data *pdata = spi->dev.platform_data;
  1275. int ret;
  1276. if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
  1277. if (!pdata)
  1278. return -ENOENT;
  1279. *rstn = pdata->rstn;
  1280. *slp_tr = pdata->slp_tr;
  1281. *xtal_trim = pdata->xtal_trim;
  1282. return 0;
  1283. }
  1284. *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
  1285. *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
  1286. ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
  1287. if (ret < 0 && ret != -EINVAL)
  1288. return ret;
  1289. return 0;
  1290. }
  1291. static int
  1292. at86rf230_detect_device(struct at86rf230_local *lp)
  1293. {
  1294. unsigned int part, version, val;
  1295. u16 man_id = 0;
  1296. const char *chip;
  1297. int rc;
  1298. rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
  1299. if (rc)
  1300. return rc;
  1301. man_id |= val;
  1302. rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
  1303. if (rc)
  1304. return rc;
  1305. man_id |= (val << 8);
  1306. rc = __at86rf230_read(lp, RG_PART_NUM, &part);
  1307. if (rc)
  1308. return rc;
  1309. rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
  1310. if (rc)
  1311. return rc;
  1312. if (man_id != 0x001f) {
  1313. dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
  1314. man_id >> 8, man_id & 0xFF);
  1315. return -EINVAL;
  1316. }
  1317. lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
  1318. IEEE802154_HW_CSMA_PARAMS |
  1319. IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT |
  1320. IEEE802154_HW_PROMISCUOUS;
  1321. lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER |
  1322. WPAN_PHY_FLAG_CCA_ED_LEVEL |
  1323. WPAN_PHY_FLAG_CCA_MODE;
  1324. lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) |
  1325. BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER);
  1326. lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) |
  1327. BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR);
  1328. lp->hw->phy->supported.cca_ed_levels = at86rf23x_ed_levels;
  1329. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf23x_ed_levels);
  1330. lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
  1331. switch (part) {
  1332. case 2:
  1333. chip = "at86rf230";
  1334. rc = -ENOTSUPP;
  1335. goto not_supp;
  1336. case 3:
  1337. chip = "at86rf231";
  1338. lp->data = &at86rf231_data;
  1339. lp->hw->phy->supported.channels[0] = 0x7FFF800;
  1340. lp->hw->phy->current_channel = 11;
  1341. lp->hw->phy->symbol_duration = 16;
  1342. lp->hw->phy->supported.tx_powers = at86rf231_powers;
  1343. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers);
  1344. break;
  1345. case 7:
  1346. chip = "at86rf212";
  1347. lp->data = &at86rf212_data;
  1348. lp->hw->flags |= IEEE802154_HW_LBT;
  1349. lp->hw->phy->supported.channels[0] = 0x00007FF;
  1350. lp->hw->phy->supported.channels[2] = 0x00007FF;
  1351. lp->hw->phy->current_channel = 5;
  1352. lp->hw->phy->symbol_duration = 25;
  1353. lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH;
  1354. lp->hw->phy->supported.tx_powers = at86rf212_powers;
  1355. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers);
  1356. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
  1357. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
  1358. break;
  1359. case 11:
  1360. chip = "at86rf233";
  1361. lp->data = &at86rf233_data;
  1362. lp->hw->phy->supported.channels[0] = 0x7FFF800;
  1363. lp->hw->phy->current_channel = 13;
  1364. lp->hw->phy->symbol_duration = 16;
  1365. lp->hw->phy->supported.tx_powers = at86rf233_powers;
  1366. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers);
  1367. break;
  1368. default:
  1369. chip = "unknown";
  1370. rc = -ENOTSUPP;
  1371. goto not_supp;
  1372. }
  1373. lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7];
  1374. lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0];
  1375. not_supp:
  1376. dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
  1377. return rc;
  1378. }
  1379. #ifdef CONFIG_IEEE802154_AT86RF230_DEBUGFS
  1380. static struct dentry *at86rf230_debugfs_root;
  1381. static int at86rf230_stats_show(struct seq_file *file, void *offset)
  1382. {
  1383. struct at86rf230_local *lp = file->private;
  1384. seq_printf(file, "SUCCESS:\t\t%8llu\n", lp->trac.success);
  1385. seq_printf(file, "SUCCESS_DATA_PENDING:\t%8llu\n",
  1386. lp->trac.success_data_pending);
  1387. seq_printf(file, "SUCCESS_WAIT_FOR_ACK:\t%8llu\n",
  1388. lp->trac.success_wait_for_ack);
  1389. seq_printf(file, "CHANNEL_ACCESS_FAILURE:\t%8llu\n",
  1390. lp->trac.channel_access_failure);
  1391. seq_printf(file, "NO_ACK:\t\t\t%8llu\n", lp->trac.no_ack);
  1392. seq_printf(file, "INVALID:\t\t%8llu\n", lp->trac.invalid);
  1393. return 0;
  1394. }
  1395. static int at86rf230_stats_open(struct inode *inode, struct file *file)
  1396. {
  1397. return single_open(file, at86rf230_stats_show, inode->i_private);
  1398. }
  1399. static const struct file_operations at86rf230_stats_fops = {
  1400. .open = at86rf230_stats_open,
  1401. .read = seq_read,
  1402. .llseek = seq_lseek,
  1403. .release = single_release,
  1404. };
  1405. static int at86rf230_debugfs_init(struct at86rf230_local *lp)
  1406. {
  1407. char debugfs_dir_name[DNAME_INLINE_LEN + 1] = "at86rf230-";
  1408. struct dentry *stats;
  1409. strncat(debugfs_dir_name, dev_name(&lp->spi->dev), DNAME_INLINE_LEN);
  1410. at86rf230_debugfs_root = debugfs_create_dir(debugfs_dir_name, NULL);
  1411. if (!at86rf230_debugfs_root)
  1412. return -ENOMEM;
  1413. stats = debugfs_create_file("trac_stats", S_IRUGO,
  1414. at86rf230_debugfs_root, lp,
  1415. &at86rf230_stats_fops);
  1416. if (!stats)
  1417. return -ENOMEM;
  1418. return 0;
  1419. }
  1420. static void at86rf230_debugfs_remove(void)
  1421. {
  1422. debugfs_remove_recursive(at86rf230_debugfs_root);
  1423. }
  1424. #else
  1425. static int at86rf230_debugfs_init(struct at86rf230_local *lp) { return 0; }
  1426. static void at86rf230_debugfs_remove(void) { }
  1427. #endif
  1428. static int at86rf230_probe(struct spi_device *spi)
  1429. {
  1430. struct ieee802154_hw *hw;
  1431. struct at86rf230_local *lp;
  1432. unsigned int status;
  1433. int rc, irq_type, rstn, slp_tr;
  1434. u8 xtal_trim = 0;
  1435. if (!spi->irq) {
  1436. dev_err(&spi->dev, "no IRQ specified\n");
  1437. return -EINVAL;
  1438. }
  1439. rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
  1440. if (rc < 0) {
  1441. dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
  1442. return rc;
  1443. }
  1444. if (gpio_is_valid(rstn)) {
  1445. rc = devm_gpio_request_one(&spi->dev, rstn,
  1446. GPIOF_OUT_INIT_HIGH, "rstn");
  1447. if (rc)
  1448. return rc;
  1449. }
  1450. if (gpio_is_valid(slp_tr)) {
  1451. rc = devm_gpio_request_one(&spi->dev, slp_tr,
  1452. GPIOF_OUT_INIT_LOW, "slp_tr");
  1453. if (rc)
  1454. return rc;
  1455. }
  1456. /* Reset */
  1457. if (gpio_is_valid(rstn)) {
  1458. udelay(1);
  1459. gpio_set_value(rstn, 0);
  1460. udelay(1);
  1461. gpio_set_value(rstn, 1);
  1462. usleep_range(120, 240);
  1463. }
  1464. hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
  1465. if (!hw)
  1466. return -ENOMEM;
  1467. lp = hw->priv;
  1468. lp->hw = hw;
  1469. lp->spi = spi;
  1470. lp->slp_tr = slp_tr;
  1471. hw->parent = &spi->dev;
  1472. ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
  1473. lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
  1474. if (IS_ERR(lp->regmap)) {
  1475. rc = PTR_ERR(lp->regmap);
  1476. dev_err(&spi->dev, "Failed to allocate register map: %d\n",
  1477. rc);
  1478. goto free_dev;
  1479. }
  1480. at86rf230_setup_spi_messages(lp, &lp->state);
  1481. at86rf230_setup_spi_messages(lp, &lp->tx);
  1482. rc = at86rf230_detect_device(lp);
  1483. if (rc < 0)
  1484. goto free_dev;
  1485. init_completion(&lp->state_complete);
  1486. spi_set_drvdata(spi, lp);
  1487. rc = at86rf230_hw_init(lp, xtal_trim);
  1488. if (rc)
  1489. goto free_dev;
  1490. /* Read irq status register to reset irq line */
  1491. rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
  1492. if (rc)
  1493. goto free_dev;
  1494. irq_type = irq_get_trigger_type(spi->irq);
  1495. if (!irq_type)
  1496. irq_type = IRQF_TRIGGER_HIGH;
  1497. rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
  1498. IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
  1499. if (rc)
  1500. goto free_dev;
  1501. /* disable_irq by default and wait for starting hardware */
  1502. disable_irq(spi->irq);
  1503. /* going into sleep by default */
  1504. at86rf230_sleep(lp);
  1505. rc = at86rf230_debugfs_init(lp);
  1506. if (rc)
  1507. goto free_dev;
  1508. rc = ieee802154_register_hw(lp->hw);
  1509. if (rc)
  1510. goto free_debugfs;
  1511. return rc;
  1512. free_debugfs:
  1513. at86rf230_debugfs_remove();
  1514. free_dev:
  1515. ieee802154_free_hw(lp->hw);
  1516. return rc;
  1517. }
  1518. static int at86rf230_remove(struct spi_device *spi)
  1519. {
  1520. struct at86rf230_local *lp = spi_get_drvdata(spi);
  1521. /* mask all at86rf230 irq's */
  1522. at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
  1523. ieee802154_unregister_hw(lp->hw);
  1524. ieee802154_free_hw(lp->hw);
  1525. at86rf230_debugfs_remove();
  1526. dev_dbg(&spi->dev, "unregistered at86rf230\n");
  1527. return 0;
  1528. }
  1529. static const struct of_device_id at86rf230_of_match[] = {
  1530. { .compatible = "atmel,at86rf230", },
  1531. { .compatible = "atmel,at86rf231", },
  1532. { .compatible = "atmel,at86rf233", },
  1533. { .compatible = "atmel,at86rf212", },
  1534. { },
  1535. };
  1536. MODULE_DEVICE_TABLE(of, at86rf230_of_match);
  1537. static const struct spi_device_id at86rf230_device_id[] = {
  1538. { .name = "at86rf230", },
  1539. { .name = "at86rf231", },
  1540. { .name = "at86rf233", },
  1541. { .name = "at86rf212", },
  1542. { },
  1543. };
  1544. MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
  1545. static struct spi_driver at86rf230_driver = {
  1546. .id_table = at86rf230_device_id,
  1547. .driver = {
  1548. .of_match_table = of_match_ptr(at86rf230_of_match),
  1549. .name = "at86rf230",
  1550. },
  1551. .probe = at86rf230_probe,
  1552. .remove = at86rf230_remove,
  1553. };
  1554. module_spi_driver(at86rf230_driver);
  1555. MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
  1556. MODULE_LICENSE("GPL v2");