turbostat.8 11 KB

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  1. .TH TURBOSTAT 8
  2. .SH NAME
  3. turbostat \- Report processor frequency and idle statistics
  4. .SH SYNOPSIS
  5. .ft B
  6. .B turbostat
  7. .RB [ Options ]
  8. .RB command
  9. .br
  10. .B turbostat
  11. .RB [ Options ]
  12. .RB [ "\--interval seconds" ]
  13. .SH DESCRIPTION
  14. \fBturbostat \fP reports processor topology, frequency,
  15. idle power-state statistics, temperature and power on X86 processors.
  16. There are two ways to invoke turbostat.
  17. The first method is to supply a
  18. \fBcommand\fP, which is forked and statistics are printed
  19. upon its completion.
  20. The second method is to omit the command,
  21. and turbostat displays statistics every 5 seconds.
  22. The 5-second interval can be changed using the --interval option.
  23. Some information is not available on older processors.
  24. .SS Options
  25. \fB--Counter MSR#\fP shows the delta of the specified 64-bit MSR counter.
  26. .PP
  27. \fB--counter MSR#\fP shows the delta of the specified 32-bit MSR counter.
  28. .PP
  29. \fB--Dump\fP displays the raw counter values.
  30. .PP
  31. \fB--debug\fP displays additional system configuration information. Invoking this parameter
  32. more than once may also enable internal turbostat debug information.
  33. .PP
  34. \fB--interval seconds\fP overrides the default 5-second measurement interval.
  35. .PP
  36. \fB--help\fP displays usage for the most common parameters.
  37. .PP
  38. \fB--Joules\fP displays energy in Joules, rather than dividing Joules by time to print power in Watts.
  39. .PP
  40. \fB--MSR MSR#\fP shows the specified 64-bit MSR value.
  41. .PP
  42. \fB--msr MSR#\fP shows the specified 32-bit MSR value.
  43. .PP
  44. \fB--Package\fP limits output to the system summary plus the 1st thread in each Package.
  45. .PP
  46. \fB--processor\fP limits output to the system summary plus the 1st thread in each processor of each package. Ie. it skips hyper-threaded siblings.
  47. .PP
  48. \fB--Summary\fP limits output to a 1-line System Summary for each interval.
  49. .PP
  50. \fB--TCC temperature\fP sets the Thermal Control Circuit temperature for systems which do not export that value. This is used for making sense of the Digital Thermal Sensor outputs, as they return degrees Celsius below the TCC activation temperature.
  51. .PP
  52. \fB--version\fP displays the version.
  53. .PP
  54. The \fBcommand\fP parameter forks \fBcommand\fP, and upon its exit,
  55. displays the statistics gathered since it was forked.
  56. .PP
  57. .SH FIELD DESCRIPTIONS
  58. .nf
  59. \fBPackage\fP processor package number.
  60. \fBCore\fP processor core number.
  61. \fBCPU\fP Linux CPU (logical processor) number.
  62. Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology.
  63. \fBAVG_MHz\fP number of cycles executed divided by time elapsed.
  64. \fB%Busy\fP percent of the interval that the CPU retired instructions, aka. % of time in "C0" state.
  65. \fBBzy_MHz\fP average clock rate while the CPU was busy (in "c0" state).
  66. \fBTSC_MHz\fP average MHz that the TSC ran during the entire interval.
  67. \fBCPU%c1, CPU%c3, CPU%c6, CPU%c7\fP show the percentage residency in hardware core idle states.
  68. \fBCoreTmp\fP Degrees Celsius reported by the per-core Digital Thermal Sensor.
  69. \fBPkgTtmp\fP Degrees Celsius reported by the per-package Package Thermal Monitor.
  70. \fBPkg%pc2, Pkg%pc3, Pkg%pc6, Pkg%pc7\fP percentage residency in hardware package idle states.
  71. \fBPkgWatt\fP Watts consumed by the whole package.
  72. \fBCorWatt\fP Watts consumed by the core part of the package.
  73. \fBGFXWatt\fP Watts consumed by the Graphics part of the package -- available only on client processors.
  74. \fBRAMWatt\fP Watts consumed by the DRAM DIMMS -- available only on server processors.
  75. \fBPKG_%\fP percent of the interval that RAPL throttling was active on the Package.
  76. \fBRAM_%\fP percent of the interval that RAPL throttling was active on DRAM.
  77. .fi
  78. .PP
  79. .SH EXAMPLE
  80. Without any parameters, turbostat displays statistics ever 5 seconds.
  81. (override interval with "-i sec" option, or specify a command
  82. for turbostat to fork).
  83. The first row of statistics is a summary for the entire system.
  84. For residency % columns, the summary is a weighted average.
  85. For Temperature columns, the summary is the column maximum.
  86. For Watts columns, the summary is a system total.
  87. Subsequent rows show per-CPU statistics.
  88. .nf
  89. [root@ivy]# ./turbostat
  90. Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
  91. - - 6 0.36 1596 3492 0 0.59 0.01 99.04 0.00 23 24 23.82 0.01 72.47 0.00 6.40 1.01 0.00
  92. 0 0 9 0.58 1596 3492 0 0.28 0.01 99.13 0.00 23 24 23.82 0.01 72.47 0.00 6.40 1.01 0.00
  93. 0 4 1 0.07 1596 3492 0 0.79
  94. 1 1 10 0.65 1596 3492 0 0.59 0.00 98.76 0.00 23
  95. 1 5 5 0.28 1596 3492 0 0.95
  96. 2 2 10 0.66 1596 3492 0 0.41 0.01 98.92 0.00 23
  97. 2 6 2 0.10 1597 3492 0 0.97
  98. 3 3 3 0.20 1596 3492 0 0.44 0.00 99.37 0.00 23
  99. 3 7 5 0.31 1596 3492 0 0.33
  100. .fi
  101. .SH DEBUG EXAMPLE
  102. The "--debug" option prints additional system information before measurements:
  103. .nf
  104. turbostat version 4.0 10-Feb, 2015 - Len Brown <lenb@kernel.org>
  105. CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3a:9 (6:58:9)
  106. CPUID(6): APERF, DTS, PTM, EPB
  107. RAPL: 851 sec. Joule Counter Range, at 77 Watts
  108. cpu0: MSR_NHM_PLATFORM_INFO: 0x81010f0012300
  109. 16 * 100 = 1600 MHz max efficiency
  110. 35 * 100 = 3500 MHz TSC frequency
  111. cpu0: MSR_IA32_POWER_CTL: 0x0014005d (C1E auto-promotion: DISabled)
  112. cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e008402 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, locked: pkg-cstate-limit=2: pc6n)
  113. cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x25262727
  114. 37 * 100 = 3700 MHz max turbo 4 active cores
  115. 38 * 100 = 3800 MHz max turbo 3 active cores
  116. 39 * 100 = 3900 MHz max turbo 2 active cores
  117. 39 * 100 = 3900 MHz max turbo 1 active cores
  118. cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x00000006 (balanced)
  119. cpu0: MSR_RAPL_POWER_UNIT: 0x000a1003 (0.125000 Watts, 0.000015 Joules, 0.000977 sec.)
  120. cpu0: MSR_PKG_POWER_INFO: 0x01e00268 (77 W TDP, RAPL 60 - 0 W, 0.000000 sec.)
  121. cpu0: MSR_PKG_POWER_LIMIT: 0x30000148268 (UNlocked)
  122. cpu0: PKG Limit #1: ENabled (77.000000 Watts, 1.000000 sec, clamp DISabled)
  123. cpu0: PKG Limit #2: DISabled (96.000000 Watts, 0.000977* sec, clamp DISabled)
  124. cpu0: MSR_PP0_POLICY: 0
  125. cpu0: MSR_PP0_POWER_LIMIT: 0x00000000 (UNlocked)
  126. cpu0: Cores Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
  127. cpu0: MSR_PP1_POLICY: 0
  128. cpu0: MSR_PP1_POWER_LIMIT: 0x00000000 (UNlocked)
  129. cpu0: GFX Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
  130. cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00691400 (105 C)
  131. cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x884e0000 (27 C)
  132. cpu0: MSR_IA32_THERM_STATUS: 0x88580000 (17 C +/- 1)
  133. cpu1: MSR_IA32_THERM_STATUS: 0x885a0000 (15 C +/- 1)
  134. cpu2: MSR_IA32_THERM_STATUS: 0x88570000 (18 C +/- 1)
  135. cpu3: MSR_IA32_THERM_STATUS: 0x884e0000 (27 C +/- 1)
  136. ...
  137. .fi
  138. The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency
  139. available at the minimum package voltage. The \fBTSC frequency\fP is the base
  140. frequency of the processor -- this should match the brand string
  141. in /proc/cpuinfo. This base frequency
  142. should be sustainable on all CPUs indefinitely, given nominal power and cooling.
  143. The remaining rows show what maximum turbo frequency is possible
  144. depending on the number of idle cores. Note that not all information is
  145. available on all processors.
  146. .SH FORK EXAMPLE
  147. If turbostat is invoked with a command, it will fork that command
  148. and output the statistics gathered when the command exits.
  149. eg. Here a cycle soaker is run on 1 CPU (see %c0) for a few seconds
  150. until ^C while the other CPUs are mostly idle:
  151. .nf
  152. root@ivy: turbostat cat /dev/zero > /dev/null
  153. ^C
  154. Core CPU Avg_MHz %Busy Bzy_MHz TSC_MHz SMI CPU%c1 CPU%c3 CPU%c6 CPU%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
  155. - - 496 12.75 3886 3492 0 13.16 0.04 74.04 0.00 36 36 0.00 0.00 0.00 0.00 23.15 17.65 0.00
  156. 0 0 22 0.57 3830 3492 0 0.83 0.02 98.59 0.00 27 36 0.00 0.00 0.00 0.00 23.15 17.65 0.00
  157. 0 4 9 0.24 3829 3492 0 1.15
  158. 1 1 4 0.09 3783 3492 0 99.91 0.00 0.00 0.00 36
  159. 1 5 3880 99.82 3888 3492 0 0.18
  160. 2 2 17 0.44 3813 3492 0 0.77 0.04 98.75 0.00 28
  161. 2 6 12 0.32 3823 3492 0 0.89
  162. 3 3 16 0.43 3844 3492 0 0.63 0.11 98.84 0.00 30
  163. 3 7 4 0.11 3827 3492 0 0.94
  164. 30.372243 sec
  165. .fi
  166. Above the cycle soaker drives cpu5 up its 3.8 GHz turbo limit
  167. while the other processors are generally in various states of idle.
  168. Note that cpu1 and cpu5 are HT siblings within core1.
  169. As cpu5 is very busy, it prevents its sibling, cpu1,
  170. from entering a c-state deeper than c1.
  171. Note that the Avg_MHz column reflects the total number of cycles executed
  172. divided by the measurement interval. If the %Busy column is 100%,
  173. then the processor was running at that speed the entire interval.
  174. The Avg_MHz multiplied by the %Busy results in the Bzy_MHz --
  175. which is the average frequency while the processor was executing --
  176. not including any non-busy idle time.
  177. .SH NOTES
  178. .B "turbostat "
  179. must be run as root.
  180. Alternatively, non-root users can be enabled to run turbostat this way:
  181. # setcap cap_sys_rawio=ep ./turbostat
  182. # chmod +r /dev/cpu/*/msr
  183. .B "turbostat "
  184. reads hardware counters, but doesn't write them.
  185. So it will not interfere with the OS or other programs, including
  186. multiple invocations of itself.
  187. \fBturbostat \fP
  188. may work poorly on Linux-2.6.20 through 2.6.29,
  189. as \fBacpi-cpufreq \fPperiodically cleared the APERF and MPERF MSRs
  190. in those kernels.
  191. AVG_MHz = APERF_delta/measurement_interval. This is the actual
  192. number of elapsed cycles divided by the entire sample interval --
  193. including idle time. Note that this calculation is resilient
  194. to systems lacking a non-stop TSC.
  195. TSC_MHz = TSC_delta/measurement_interval.
  196. On a system with an invariant TSC, this value will be constant
  197. and will closely match the base frequency value shown
  198. in the brand string in /proc/cpuinfo. On a system where
  199. the TSC stops in idle, TSC_MHz will drop
  200. below the processor's base frequency.
  201. %Busy = MPERF_delta/TSC_delta
  202. Bzy_MHz = TSC_delta/APERF_delta/MPERF_delta/measurement_interval
  203. Note that these calculations depend on TSC_delta, so they
  204. are not reliable during intervals when TSC_MHz is not running at the base frequency.
  205. Turbostat data collection is not atomic.
  206. Extremely short measurement intervals (much less than 1 second),
  207. or system activity that prevents turbostat from being able
  208. to run on all CPUS to quickly collect data, will result in
  209. inconsistent results.
  210. The APERF, MPERF MSRs are defined to count non-halted cycles.
  211. Although it is not guaranteed by the architecture, turbostat assumes
  212. that they count at TSC rate, which is true on all processors tested to date.
  213. .SH REFERENCES
  214. "Intel® Turbo Boost Technology
  215. in Intel® Core™ Microarchitecture (Nehalem) Based Processors"
  216. http://download.intel.com/design/processor/applnots/320354.pdf
  217. "Intel® 64 and IA-32 Architectures Software Developer's Manual
  218. Volume 3B: System Programming Guide"
  219. http://www.intel.com/products/processor/manuals/
  220. .SH FILES
  221. .ta
  222. .nf
  223. /dev/cpu/*/msr
  224. .fi
  225. .SH "SEE ALSO"
  226. msr(4), vmstat(8)
  227. .PP
  228. .SH AUTHOR
  229. .nf
  230. Written by Len Brown <len.brown@intel.com>