en_netdev.c 79 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967
  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/etherdevice.h>
  34. #include <linux/tcp.h>
  35. #include <linux/if_vlan.h>
  36. #include <linux/delay.h>
  37. #include <linux/slab.h>
  38. #include <linux/hash.h>
  39. #include <net/ip.h>
  40. #include <net/busy_poll.h>
  41. #include <net/vxlan.h>
  42. #include <linux/mlx4/driver.h>
  43. #include <linux/mlx4/device.h>
  44. #include <linux/mlx4/cmd.h>
  45. #include <linux/mlx4/cq.h>
  46. #include "mlx4_en.h"
  47. #include "en_port.h"
  48. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  49. {
  50. struct mlx4_en_priv *priv = netdev_priv(dev);
  51. int i;
  52. unsigned int offset = 0;
  53. if (up && up != MLX4_EN_NUM_UP)
  54. return -EINVAL;
  55. netdev_set_num_tc(dev, up);
  56. /* Partition Tx queues evenly amongst UP's */
  57. for (i = 0; i < up; i++) {
  58. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  59. offset += priv->num_tx_rings_p_up;
  60. }
  61. return 0;
  62. }
  63. #ifdef CONFIG_NET_RX_BUSY_POLL
  64. /* must be called with local_bh_disable()d */
  65. static int mlx4_en_low_latency_recv(struct napi_struct *napi)
  66. {
  67. struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
  68. struct net_device *dev = cq->dev;
  69. struct mlx4_en_priv *priv = netdev_priv(dev);
  70. struct mlx4_en_rx_ring *rx_ring = priv->rx_ring[cq->ring];
  71. int done;
  72. if (!priv->port_up)
  73. return LL_FLUSH_FAILED;
  74. if (!mlx4_en_cq_lock_poll(cq))
  75. return LL_FLUSH_BUSY;
  76. done = mlx4_en_process_rx_cq(dev, cq, 4);
  77. if (likely(done))
  78. rx_ring->cleaned += done;
  79. else
  80. rx_ring->misses++;
  81. mlx4_en_cq_unlock_poll(cq);
  82. return done;
  83. }
  84. #endif /* CONFIG_NET_RX_BUSY_POLL */
  85. #ifdef CONFIG_RFS_ACCEL
  86. struct mlx4_en_filter {
  87. struct list_head next;
  88. struct work_struct work;
  89. u8 ip_proto;
  90. __be32 src_ip;
  91. __be32 dst_ip;
  92. __be16 src_port;
  93. __be16 dst_port;
  94. int rxq_index;
  95. struct mlx4_en_priv *priv;
  96. u32 flow_id; /* RFS infrastructure id */
  97. int id; /* mlx4_en driver id */
  98. u64 reg_id; /* Flow steering API id */
  99. u8 activated; /* Used to prevent expiry before filter
  100. * is attached
  101. */
  102. struct hlist_node filter_chain;
  103. };
  104. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  105. static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
  106. {
  107. switch (ip_proto) {
  108. case IPPROTO_UDP:
  109. return MLX4_NET_TRANS_RULE_ID_UDP;
  110. case IPPROTO_TCP:
  111. return MLX4_NET_TRANS_RULE_ID_TCP;
  112. default:
  113. return MLX4_NET_TRANS_RULE_NUM;
  114. }
  115. };
  116. static void mlx4_en_filter_work(struct work_struct *work)
  117. {
  118. struct mlx4_en_filter *filter = container_of(work,
  119. struct mlx4_en_filter,
  120. work);
  121. struct mlx4_en_priv *priv = filter->priv;
  122. struct mlx4_spec_list spec_tcp_udp = {
  123. .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
  124. {
  125. .tcp_udp = {
  126. .dst_port = filter->dst_port,
  127. .dst_port_msk = (__force __be16)-1,
  128. .src_port = filter->src_port,
  129. .src_port_msk = (__force __be16)-1,
  130. },
  131. },
  132. };
  133. struct mlx4_spec_list spec_ip = {
  134. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  135. {
  136. .ipv4 = {
  137. .dst_ip = filter->dst_ip,
  138. .dst_ip_msk = (__force __be32)-1,
  139. .src_ip = filter->src_ip,
  140. .src_ip_msk = (__force __be32)-1,
  141. },
  142. },
  143. };
  144. struct mlx4_spec_list spec_eth = {
  145. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  146. };
  147. struct mlx4_net_trans_rule rule = {
  148. .list = LIST_HEAD_INIT(rule.list),
  149. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  150. .exclusive = 1,
  151. .allow_loopback = 1,
  152. .promisc_mode = MLX4_FS_REGULAR,
  153. .port = priv->port,
  154. .priority = MLX4_DOMAIN_RFS,
  155. };
  156. int rc;
  157. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  158. if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
  159. en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
  160. filter->ip_proto);
  161. goto ignore;
  162. }
  163. list_add_tail(&spec_eth.list, &rule.list);
  164. list_add_tail(&spec_ip.list, &rule.list);
  165. list_add_tail(&spec_tcp_udp.list, &rule.list);
  166. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  167. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  168. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  169. filter->activated = 0;
  170. if (filter->reg_id) {
  171. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  172. if (rc && rc != -ENOENT)
  173. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  174. }
  175. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  176. if (rc)
  177. en_err(priv, "Error attaching flow. err = %d\n", rc);
  178. ignore:
  179. mlx4_en_filter_rfs_expire(priv);
  180. filter->activated = 1;
  181. }
  182. static inline struct hlist_head *
  183. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  184. __be16 src_port, __be16 dst_port)
  185. {
  186. unsigned long l;
  187. int bucket_idx;
  188. l = (__force unsigned long)src_port |
  189. ((__force unsigned long)dst_port << 2);
  190. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  191. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  192. return &priv->filter_hash[bucket_idx];
  193. }
  194. static struct mlx4_en_filter *
  195. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  196. __be32 dst_ip, u8 ip_proto, __be16 src_port,
  197. __be16 dst_port, u32 flow_id)
  198. {
  199. struct mlx4_en_filter *filter = NULL;
  200. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  201. if (!filter)
  202. return NULL;
  203. filter->priv = priv;
  204. filter->rxq_index = rxq_index;
  205. INIT_WORK(&filter->work, mlx4_en_filter_work);
  206. filter->src_ip = src_ip;
  207. filter->dst_ip = dst_ip;
  208. filter->ip_proto = ip_proto;
  209. filter->src_port = src_port;
  210. filter->dst_port = dst_port;
  211. filter->flow_id = flow_id;
  212. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  213. list_add_tail(&filter->next, &priv->filters);
  214. hlist_add_head(&filter->filter_chain,
  215. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  216. dst_port));
  217. return filter;
  218. }
  219. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  220. {
  221. struct mlx4_en_priv *priv = filter->priv;
  222. int rc;
  223. list_del(&filter->next);
  224. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  225. if (rc && rc != -ENOENT)
  226. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  227. kfree(filter);
  228. }
  229. static inline struct mlx4_en_filter *
  230. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  231. u8 ip_proto, __be16 src_port, __be16 dst_port)
  232. {
  233. struct mlx4_en_filter *filter;
  234. struct mlx4_en_filter *ret = NULL;
  235. hlist_for_each_entry(filter,
  236. filter_hash_bucket(priv, src_ip, dst_ip,
  237. src_port, dst_port),
  238. filter_chain) {
  239. if (filter->src_ip == src_ip &&
  240. filter->dst_ip == dst_ip &&
  241. filter->ip_proto == ip_proto &&
  242. filter->src_port == src_port &&
  243. filter->dst_port == dst_port) {
  244. ret = filter;
  245. break;
  246. }
  247. }
  248. return ret;
  249. }
  250. static int
  251. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  252. u16 rxq_index, u32 flow_id)
  253. {
  254. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  255. struct mlx4_en_filter *filter;
  256. const struct iphdr *ip;
  257. const __be16 *ports;
  258. u8 ip_proto;
  259. __be32 src_ip;
  260. __be32 dst_ip;
  261. __be16 src_port;
  262. __be16 dst_port;
  263. int nhoff = skb_network_offset(skb);
  264. int ret = 0;
  265. if (skb->protocol != htons(ETH_P_IP))
  266. return -EPROTONOSUPPORT;
  267. ip = (const struct iphdr *)(skb->data + nhoff);
  268. if (ip_is_fragment(ip))
  269. return -EPROTONOSUPPORT;
  270. if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
  271. return -EPROTONOSUPPORT;
  272. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  273. ip_proto = ip->protocol;
  274. src_ip = ip->saddr;
  275. dst_ip = ip->daddr;
  276. src_port = ports[0];
  277. dst_port = ports[1];
  278. spin_lock_bh(&priv->filters_lock);
  279. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
  280. src_port, dst_port);
  281. if (filter) {
  282. if (filter->rxq_index == rxq_index)
  283. goto out;
  284. filter->rxq_index = rxq_index;
  285. } else {
  286. filter = mlx4_en_filter_alloc(priv, rxq_index,
  287. src_ip, dst_ip, ip_proto,
  288. src_port, dst_port, flow_id);
  289. if (!filter) {
  290. ret = -ENOMEM;
  291. goto err;
  292. }
  293. }
  294. queue_work(priv->mdev->workqueue, &filter->work);
  295. out:
  296. ret = filter->id;
  297. err:
  298. spin_unlock_bh(&priv->filters_lock);
  299. return ret;
  300. }
  301. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
  302. {
  303. struct mlx4_en_filter *filter, *tmp;
  304. LIST_HEAD(del_list);
  305. spin_lock_bh(&priv->filters_lock);
  306. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  307. list_move(&filter->next, &del_list);
  308. hlist_del(&filter->filter_chain);
  309. }
  310. spin_unlock_bh(&priv->filters_lock);
  311. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  312. cancel_work_sync(&filter->work);
  313. mlx4_en_filter_free(filter);
  314. }
  315. }
  316. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  317. {
  318. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  319. LIST_HEAD(del_list);
  320. int i = 0;
  321. spin_lock_bh(&priv->filters_lock);
  322. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  323. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  324. break;
  325. if (filter->activated &&
  326. !work_pending(&filter->work) &&
  327. rps_may_expire_flow(priv->dev,
  328. filter->rxq_index, filter->flow_id,
  329. filter->id)) {
  330. list_move(&filter->next, &del_list);
  331. hlist_del(&filter->filter_chain);
  332. } else
  333. last_filter = filter;
  334. i++;
  335. }
  336. if (last_filter && (&last_filter->next != priv->filters.next))
  337. list_move(&priv->filters, &last_filter->next);
  338. spin_unlock_bh(&priv->filters_lock);
  339. list_for_each_entry_safe(filter, tmp, &del_list, next)
  340. mlx4_en_filter_free(filter);
  341. }
  342. #endif
  343. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
  344. __be16 proto, u16 vid)
  345. {
  346. struct mlx4_en_priv *priv = netdev_priv(dev);
  347. struct mlx4_en_dev *mdev = priv->mdev;
  348. int err;
  349. int idx;
  350. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  351. set_bit(vid, priv->active_vlans);
  352. /* Add VID to port VLAN filter */
  353. mutex_lock(&mdev->state_lock);
  354. if (mdev->device_up && priv->port_up) {
  355. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  356. if (err)
  357. en_err(priv, "Failed configuring VLAN filter\n");
  358. }
  359. if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
  360. en_dbg(HW, priv, "failed adding vlan %d\n", vid);
  361. mutex_unlock(&mdev->state_lock);
  362. return 0;
  363. }
  364. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
  365. __be16 proto, u16 vid)
  366. {
  367. struct mlx4_en_priv *priv = netdev_priv(dev);
  368. struct mlx4_en_dev *mdev = priv->mdev;
  369. int err;
  370. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  371. clear_bit(vid, priv->active_vlans);
  372. /* Remove VID from port VLAN filter */
  373. mutex_lock(&mdev->state_lock);
  374. mlx4_unregister_vlan(mdev->dev, priv->port, vid);
  375. if (mdev->device_up && priv->port_up) {
  376. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  377. if (err)
  378. en_err(priv, "Failed configuring VLAN filter\n");
  379. }
  380. mutex_unlock(&mdev->state_lock);
  381. return 0;
  382. }
  383. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  384. {
  385. int i;
  386. for (i = ETH_ALEN - 1; i >= 0; --i) {
  387. dst_mac[i] = src_mac & 0xff;
  388. src_mac >>= 8;
  389. }
  390. memset(&dst_mac[ETH_ALEN], 0, 2);
  391. }
  392. static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
  393. int qpn, u64 *reg_id)
  394. {
  395. int err;
  396. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
  397. priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
  398. return 0; /* do nothing */
  399. err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
  400. MLX4_DOMAIN_NIC, reg_id);
  401. if (err) {
  402. en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
  403. return err;
  404. }
  405. en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
  406. return 0;
  407. }
  408. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  409. unsigned char *mac, int *qpn, u64 *reg_id)
  410. {
  411. struct mlx4_en_dev *mdev = priv->mdev;
  412. struct mlx4_dev *dev = mdev->dev;
  413. int err;
  414. switch (dev->caps.steering_mode) {
  415. case MLX4_STEERING_MODE_B0: {
  416. struct mlx4_qp qp;
  417. u8 gid[16] = {0};
  418. qp.qpn = *qpn;
  419. memcpy(&gid[10], mac, ETH_ALEN);
  420. gid[5] = priv->port;
  421. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  422. break;
  423. }
  424. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  425. struct mlx4_spec_list spec_eth = { {NULL} };
  426. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  427. struct mlx4_net_trans_rule rule = {
  428. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  429. .exclusive = 0,
  430. .allow_loopback = 1,
  431. .promisc_mode = MLX4_FS_REGULAR,
  432. .priority = MLX4_DOMAIN_NIC,
  433. };
  434. rule.port = priv->port;
  435. rule.qpn = *qpn;
  436. INIT_LIST_HEAD(&rule.list);
  437. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  438. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  439. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  440. list_add_tail(&spec_eth.list, &rule.list);
  441. err = mlx4_flow_attach(dev, &rule, reg_id);
  442. break;
  443. }
  444. default:
  445. return -EINVAL;
  446. }
  447. if (err)
  448. en_warn(priv, "Failed Attaching Unicast\n");
  449. return err;
  450. }
  451. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  452. unsigned char *mac, int qpn, u64 reg_id)
  453. {
  454. struct mlx4_en_dev *mdev = priv->mdev;
  455. struct mlx4_dev *dev = mdev->dev;
  456. switch (dev->caps.steering_mode) {
  457. case MLX4_STEERING_MODE_B0: {
  458. struct mlx4_qp qp;
  459. u8 gid[16] = {0};
  460. qp.qpn = qpn;
  461. memcpy(&gid[10], mac, ETH_ALEN);
  462. gid[5] = priv->port;
  463. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  464. break;
  465. }
  466. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  467. mlx4_flow_detach(dev, reg_id);
  468. break;
  469. }
  470. default:
  471. en_err(priv, "Invalid steering mode.\n");
  472. }
  473. }
  474. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  475. {
  476. struct mlx4_en_dev *mdev = priv->mdev;
  477. struct mlx4_dev *dev = mdev->dev;
  478. struct mlx4_mac_entry *entry;
  479. int index = 0;
  480. int err = 0;
  481. u64 reg_id = 0;
  482. int *qpn = &priv->base_qpn;
  483. u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
  484. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  485. priv->dev->dev_addr);
  486. index = mlx4_register_mac(dev, priv->port, mac);
  487. if (index < 0) {
  488. err = index;
  489. en_err(priv, "Failed adding MAC: %pM\n",
  490. priv->dev->dev_addr);
  491. return err;
  492. }
  493. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  494. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  495. *qpn = base_qpn + index;
  496. return 0;
  497. }
  498. err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP);
  499. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  500. if (err) {
  501. en_err(priv, "Failed to reserve qp for mac registration\n");
  502. goto qp_err;
  503. }
  504. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  505. if (err)
  506. goto steer_err;
  507. err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
  508. &priv->tunnel_reg_id);
  509. if (err)
  510. goto tunnel_err;
  511. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  512. if (!entry) {
  513. err = -ENOMEM;
  514. goto alloc_err;
  515. }
  516. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  517. memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
  518. entry->reg_id = reg_id;
  519. hlist_add_head_rcu(&entry->hlist,
  520. &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
  521. return 0;
  522. alloc_err:
  523. if (priv->tunnel_reg_id)
  524. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  525. tunnel_err:
  526. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  527. steer_err:
  528. mlx4_qp_release_range(dev, *qpn, 1);
  529. qp_err:
  530. mlx4_unregister_mac(dev, priv->port, mac);
  531. return err;
  532. }
  533. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  534. {
  535. struct mlx4_en_dev *mdev = priv->mdev;
  536. struct mlx4_dev *dev = mdev->dev;
  537. int qpn = priv->base_qpn;
  538. u64 mac;
  539. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  540. mac = mlx4_mac_to_u64(priv->dev->dev_addr);
  541. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  542. priv->dev->dev_addr);
  543. mlx4_unregister_mac(dev, priv->port, mac);
  544. } else {
  545. struct mlx4_mac_entry *entry;
  546. struct hlist_node *tmp;
  547. struct hlist_head *bucket;
  548. unsigned int i;
  549. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  550. bucket = &priv->mac_hash[i];
  551. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  552. mac = mlx4_mac_to_u64(entry->mac);
  553. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  554. entry->mac);
  555. mlx4_en_uc_steer_release(priv, entry->mac,
  556. qpn, entry->reg_id);
  557. mlx4_unregister_mac(dev, priv->port, mac);
  558. hlist_del_rcu(&entry->hlist);
  559. kfree_rcu(entry, rcu);
  560. }
  561. }
  562. if (priv->tunnel_reg_id) {
  563. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  564. priv->tunnel_reg_id = 0;
  565. }
  566. en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
  567. priv->port, qpn);
  568. mlx4_qp_release_range(dev, qpn, 1);
  569. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  570. }
  571. }
  572. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  573. unsigned char *new_mac, unsigned char *prev_mac)
  574. {
  575. struct mlx4_en_dev *mdev = priv->mdev;
  576. struct mlx4_dev *dev = mdev->dev;
  577. int err = 0;
  578. u64 new_mac_u64 = mlx4_mac_to_u64(new_mac);
  579. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  580. struct hlist_head *bucket;
  581. unsigned int mac_hash;
  582. struct mlx4_mac_entry *entry;
  583. struct hlist_node *tmp;
  584. u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
  585. bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
  586. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  587. if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
  588. mlx4_en_uc_steer_release(priv, entry->mac,
  589. qpn, entry->reg_id);
  590. mlx4_unregister_mac(dev, priv->port,
  591. prev_mac_u64);
  592. hlist_del_rcu(&entry->hlist);
  593. synchronize_rcu();
  594. memcpy(entry->mac, new_mac, ETH_ALEN);
  595. entry->reg_id = 0;
  596. mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
  597. hlist_add_head_rcu(&entry->hlist,
  598. &priv->mac_hash[mac_hash]);
  599. mlx4_register_mac(dev, priv->port, new_mac_u64);
  600. err = mlx4_en_uc_steer_add(priv, new_mac,
  601. &qpn,
  602. &entry->reg_id);
  603. if (err)
  604. return err;
  605. if (priv->tunnel_reg_id) {
  606. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  607. priv->tunnel_reg_id = 0;
  608. }
  609. err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
  610. &priv->tunnel_reg_id);
  611. return err;
  612. }
  613. }
  614. return -EINVAL;
  615. }
  616. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  617. }
  618. static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
  619. unsigned char new_mac[ETH_ALEN + 2])
  620. {
  621. int err = 0;
  622. if (priv->port_up) {
  623. /* Remove old MAC and insert the new one */
  624. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  625. new_mac, priv->current_mac);
  626. if (err)
  627. en_err(priv, "Failed changing HW MAC address\n");
  628. } else
  629. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  630. if (!err)
  631. memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
  632. return err;
  633. }
  634. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  635. {
  636. struct mlx4_en_priv *priv = netdev_priv(dev);
  637. struct mlx4_en_dev *mdev = priv->mdev;
  638. struct sockaddr *saddr = addr;
  639. unsigned char new_mac[ETH_ALEN + 2];
  640. int err;
  641. if (!is_valid_ether_addr(saddr->sa_data))
  642. return -EADDRNOTAVAIL;
  643. mutex_lock(&mdev->state_lock);
  644. memcpy(new_mac, saddr->sa_data, ETH_ALEN);
  645. err = mlx4_en_do_set_mac(priv, new_mac);
  646. if (!err)
  647. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  648. mutex_unlock(&mdev->state_lock);
  649. return err;
  650. }
  651. static void mlx4_en_clear_list(struct net_device *dev)
  652. {
  653. struct mlx4_en_priv *priv = netdev_priv(dev);
  654. struct mlx4_en_mc_list *tmp, *mc_to_del;
  655. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  656. list_del(&mc_to_del->list);
  657. kfree(mc_to_del);
  658. }
  659. }
  660. static void mlx4_en_cache_mclist(struct net_device *dev)
  661. {
  662. struct mlx4_en_priv *priv = netdev_priv(dev);
  663. struct netdev_hw_addr *ha;
  664. struct mlx4_en_mc_list *tmp;
  665. mlx4_en_clear_list(dev);
  666. netdev_for_each_mc_addr(ha, dev) {
  667. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  668. if (!tmp) {
  669. mlx4_en_clear_list(dev);
  670. return;
  671. }
  672. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  673. list_add_tail(&tmp->list, &priv->mc_list);
  674. }
  675. }
  676. static void update_mclist_flags(struct mlx4_en_priv *priv,
  677. struct list_head *dst,
  678. struct list_head *src)
  679. {
  680. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  681. bool found;
  682. /* Find all the entries that should be removed from dst,
  683. * These are the entries that are not found in src
  684. */
  685. list_for_each_entry(dst_tmp, dst, list) {
  686. found = false;
  687. list_for_each_entry(src_tmp, src, list) {
  688. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  689. found = true;
  690. break;
  691. }
  692. }
  693. if (!found)
  694. dst_tmp->action = MCLIST_REM;
  695. }
  696. /* Add entries that exist in src but not in dst
  697. * mark them as need to add
  698. */
  699. list_for_each_entry(src_tmp, src, list) {
  700. found = false;
  701. list_for_each_entry(dst_tmp, dst, list) {
  702. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  703. dst_tmp->action = MCLIST_NONE;
  704. found = true;
  705. break;
  706. }
  707. }
  708. if (!found) {
  709. new_mc = kmemdup(src_tmp,
  710. sizeof(struct mlx4_en_mc_list),
  711. GFP_KERNEL);
  712. if (!new_mc)
  713. return;
  714. new_mc->action = MCLIST_ADD;
  715. list_add_tail(&new_mc->list, dst);
  716. }
  717. }
  718. }
  719. static void mlx4_en_set_rx_mode(struct net_device *dev)
  720. {
  721. struct mlx4_en_priv *priv = netdev_priv(dev);
  722. if (!priv->port_up)
  723. return;
  724. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  725. }
  726. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  727. struct mlx4_en_dev *mdev)
  728. {
  729. int err = 0;
  730. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  731. if (netif_msg_rx_status(priv))
  732. en_warn(priv, "Entering promiscuous mode\n");
  733. priv->flags |= MLX4_EN_FLAG_PROMISC;
  734. /* Enable promiscouos mode */
  735. switch (mdev->dev->caps.steering_mode) {
  736. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  737. err = mlx4_flow_steer_promisc_add(mdev->dev,
  738. priv->port,
  739. priv->base_qpn,
  740. MLX4_FS_ALL_DEFAULT);
  741. if (err)
  742. en_err(priv, "Failed enabling promiscuous mode\n");
  743. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  744. break;
  745. case MLX4_STEERING_MODE_B0:
  746. err = mlx4_unicast_promisc_add(mdev->dev,
  747. priv->base_qpn,
  748. priv->port);
  749. if (err)
  750. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  751. /* Add the default qp number as multicast
  752. * promisc
  753. */
  754. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  755. err = mlx4_multicast_promisc_add(mdev->dev,
  756. priv->base_qpn,
  757. priv->port);
  758. if (err)
  759. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  760. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  761. }
  762. break;
  763. case MLX4_STEERING_MODE_A0:
  764. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  765. priv->port,
  766. priv->base_qpn,
  767. 1);
  768. if (err)
  769. en_err(priv, "Failed enabling promiscuous mode\n");
  770. break;
  771. }
  772. /* Disable port multicast filter (unconditionally) */
  773. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  774. 0, MLX4_MCAST_DISABLE);
  775. if (err)
  776. en_err(priv, "Failed disabling multicast filter\n");
  777. }
  778. }
  779. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  780. struct mlx4_en_dev *mdev)
  781. {
  782. int err = 0;
  783. if (netif_msg_rx_status(priv))
  784. en_warn(priv, "Leaving promiscuous mode\n");
  785. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  786. /* Disable promiscouos mode */
  787. switch (mdev->dev->caps.steering_mode) {
  788. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  789. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  790. priv->port,
  791. MLX4_FS_ALL_DEFAULT);
  792. if (err)
  793. en_err(priv, "Failed disabling promiscuous mode\n");
  794. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  795. break;
  796. case MLX4_STEERING_MODE_B0:
  797. err = mlx4_unicast_promisc_remove(mdev->dev,
  798. priv->base_qpn,
  799. priv->port);
  800. if (err)
  801. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  802. /* Disable Multicast promisc */
  803. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  804. err = mlx4_multicast_promisc_remove(mdev->dev,
  805. priv->base_qpn,
  806. priv->port);
  807. if (err)
  808. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  809. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  810. }
  811. break;
  812. case MLX4_STEERING_MODE_A0:
  813. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  814. priv->port,
  815. priv->base_qpn, 0);
  816. if (err)
  817. en_err(priv, "Failed disabling promiscuous mode\n");
  818. break;
  819. }
  820. }
  821. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  822. struct net_device *dev,
  823. struct mlx4_en_dev *mdev)
  824. {
  825. struct mlx4_en_mc_list *mclist, *tmp;
  826. u64 mcast_addr = 0;
  827. u8 mc_list[16] = {0};
  828. int err = 0;
  829. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  830. if (dev->flags & IFF_ALLMULTI) {
  831. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  832. 0, MLX4_MCAST_DISABLE);
  833. if (err)
  834. en_err(priv, "Failed disabling multicast filter\n");
  835. /* Add the default qp number as multicast promisc */
  836. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  837. switch (mdev->dev->caps.steering_mode) {
  838. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  839. err = mlx4_flow_steer_promisc_add(mdev->dev,
  840. priv->port,
  841. priv->base_qpn,
  842. MLX4_FS_MC_DEFAULT);
  843. break;
  844. case MLX4_STEERING_MODE_B0:
  845. err = mlx4_multicast_promisc_add(mdev->dev,
  846. priv->base_qpn,
  847. priv->port);
  848. break;
  849. case MLX4_STEERING_MODE_A0:
  850. break;
  851. }
  852. if (err)
  853. en_err(priv, "Failed entering multicast promisc mode\n");
  854. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  855. }
  856. } else {
  857. /* Disable Multicast promisc */
  858. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  859. switch (mdev->dev->caps.steering_mode) {
  860. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  861. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  862. priv->port,
  863. MLX4_FS_MC_DEFAULT);
  864. break;
  865. case MLX4_STEERING_MODE_B0:
  866. err = mlx4_multicast_promisc_remove(mdev->dev,
  867. priv->base_qpn,
  868. priv->port);
  869. break;
  870. case MLX4_STEERING_MODE_A0:
  871. break;
  872. }
  873. if (err)
  874. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  875. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  876. }
  877. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  878. 0, MLX4_MCAST_DISABLE);
  879. if (err)
  880. en_err(priv, "Failed disabling multicast filter\n");
  881. /* Flush mcast filter and init it with broadcast address */
  882. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  883. 1, MLX4_MCAST_CONFIG);
  884. /* Update multicast list - we cache all addresses so they won't
  885. * change while HW is updated holding the command semaphor */
  886. netif_addr_lock_bh(dev);
  887. mlx4_en_cache_mclist(dev);
  888. netif_addr_unlock_bh(dev);
  889. list_for_each_entry(mclist, &priv->mc_list, list) {
  890. mcast_addr = mlx4_mac_to_u64(mclist->addr);
  891. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  892. mcast_addr, 0, MLX4_MCAST_CONFIG);
  893. }
  894. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  895. 0, MLX4_MCAST_ENABLE);
  896. if (err)
  897. en_err(priv, "Failed enabling multicast filter\n");
  898. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  899. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  900. if (mclist->action == MCLIST_REM) {
  901. /* detach this address and delete from list */
  902. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  903. mc_list[5] = priv->port;
  904. err = mlx4_multicast_detach(mdev->dev,
  905. &priv->rss_map.indir_qp,
  906. mc_list,
  907. MLX4_PROT_ETH,
  908. mclist->reg_id);
  909. if (err)
  910. en_err(priv, "Fail to detach multicast address\n");
  911. if (mclist->tunnel_reg_id) {
  912. err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
  913. if (err)
  914. en_err(priv, "Failed to detach multicast address\n");
  915. }
  916. /* remove from list */
  917. list_del(&mclist->list);
  918. kfree(mclist);
  919. } else if (mclist->action == MCLIST_ADD) {
  920. /* attach the address */
  921. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  922. /* needed for B0 steering support */
  923. mc_list[5] = priv->port;
  924. err = mlx4_multicast_attach(mdev->dev,
  925. &priv->rss_map.indir_qp,
  926. mc_list,
  927. priv->port, 0,
  928. MLX4_PROT_ETH,
  929. &mclist->reg_id);
  930. if (err)
  931. en_err(priv, "Fail to attach multicast address\n");
  932. err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
  933. &mclist->tunnel_reg_id);
  934. if (err)
  935. en_err(priv, "Failed to attach multicast address\n");
  936. }
  937. }
  938. }
  939. }
  940. static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
  941. struct net_device *dev,
  942. struct mlx4_en_dev *mdev)
  943. {
  944. struct netdev_hw_addr *ha;
  945. struct mlx4_mac_entry *entry;
  946. struct hlist_node *tmp;
  947. bool found;
  948. u64 mac;
  949. int err = 0;
  950. struct hlist_head *bucket;
  951. unsigned int i;
  952. int removed = 0;
  953. u32 prev_flags;
  954. /* Note that we do not need to protect our mac_hash traversal with rcu,
  955. * since all modification code is protected by mdev->state_lock
  956. */
  957. /* find what to remove */
  958. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  959. bucket = &priv->mac_hash[i];
  960. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  961. found = false;
  962. netdev_for_each_uc_addr(ha, dev) {
  963. if (ether_addr_equal_64bits(entry->mac,
  964. ha->addr)) {
  965. found = true;
  966. break;
  967. }
  968. }
  969. /* MAC address of the port is not in uc list */
  970. if (ether_addr_equal_64bits(entry->mac,
  971. priv->current_mac))
  972. found = true;
  973. if (!found) {
  974. mac = mlx4_mac_to_u64(entry->mac);
  975. mlx4_en_uc_steer_release(priv, entry->mac,
  976. priv->base_qpn,
  977. entry->reg_id);
  978. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  979. hlist_del_rcu(&entry->hlist);
  980. kfree_rcu(entry, rcu);
  981. en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
  982. entry->mac, priv->port);
  983. ++removed;
  984. }
  985. }
  986. }
  987. /* if we didn't remove anything, there is no use in trying to add
  988. * again once we are in a forced promisc mode state
  989. */
  990. if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
  991. return;
  992. prev_flags = priv->flags;
  993. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  994. /* find what to add */
  995. netdev_for_each_uc_addr(ha, dev) {
  996. found = false;
  997. bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
  998. hlist_for_each_entry(entry, bucket, hlist) {
  999. if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
  1000. found = true;
  1001. break;
  1002. }
  1003. }
  1004. if (!found) {
  1005. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  1006. if (!entry) {
  1007. en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
  1008. ha->addr, priv->port);
  1009. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1010. break;
  1011. }
  1012. mac = mlx4_mac_to_u64(ha->addr);
  1013. memcpy(entry->mac, ha->addr, ETH_ALEN);
  1014. err = mlx4_register_mac(mdev->dev, priv->port, mac);
  1015. if (err < 0) {
  1016. en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
  1017. ha->addr, priv->port, err);
  1018. kfree(entry);
  1019. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1020. break;
  1021. }
  1022. err = mlx4_en_uc_steer_add(priv, ha->addr,
  1023. &priv->base_qpn,
  1024. &entry->reg_id);
  1025. if (err) {
  1026. en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
  1027. ha->addr, priv->port, err);
  1028. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  1029. kfree(entry);
  1030. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1031. break;
  1032. } else {
  1033. unsigned int mac_hash;
  1034. en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
  1035. ha->addr, priv->port);
  1036. mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
  1037. bucket = &priv->mac_hash[mac_hash];
  1038. hlist_add_head_rcu(&entry->hlist, bucket);
  1039. }
  1040. }
  1041. }
  1042. if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1043. en_warn(priv, "Forcing promiscuous mode on port:%d\n",
  1044. priv->port);
  1045. } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1046. en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
  1047. priv->port);
  1048. }
  1049. }
  1050. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  1051. {
  1052. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1053. rx_mode_task);
  1054. struct mlx4_en_dev *mdev = priv->mdev;
  1055. struct net_device *dev = priv->dev;
  1056. mutex_lock(&mdev->state_lock);
  1057. if (!mdev->device_up) {
  1058. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  1059. goto out;
  1060. }
  1061. if (!priv->port_up) {
  1062. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  1063. goto out;
  1064. }
  1065. if (!netif_carrier_ok(dev)) {
  1066. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  1067. if (priv->port_state.link_state) {
  1068. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  1069. netif_carrier_on(dev);
  1070. en_dbg(LINK, priv, "Link Up\n");
  1071. }
  1072. }
  1073. }
  1074. if (dev->priv_flags & IFF_UNICAST_FLT)
  1075. mlx4_en_do_uc_filter(priv, dev, mdev);
  1076. /* Promsicuous mode: disable all filters */
  1077. if ((dev->flags & IFF_PROMISC) ||
  1078. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  1079. mlx4_en_set_promisc_mode(priv, mdev);
  1080. goto out;
  1081. }
  1082. /* Not in promiscuous mode */
  1083. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  1084. mlx4_en_clear_promisc_mode(priv, mdev);
  1085. mlx4_en_do_multicast(priv, dev, mdev);
  1086. out:
  1087. mutex_unlock(&mdev->state_lock);
  1088. }
  1089. #ifdef CONFIG_NET_POLL_CONTROLLER
  1090. static void mlx4_en_netpoll(struct net_device *dev)
  1091. {
  1092. struct mlx4_en_priv *priv = netdev_priv(dev);
  1093. struct mlx4_en_cq *cq;
  1094. int i;
  1095. for (i = 0; i < priv->rx_ring_num; i++) {
  1096. cq = priv->rx_cq[i];
  1097. napi_schedule(&cq->napi);
  1098. }
  1099. }
  1100. #endif
  1101. static void mlx4_en_tx_timeout(struct net_device *dev)
  1102. {
  1103. struct mlx4_en_priv *priv = netdev_priv(dev);
  1104. struct mlx4_en_dev *mdev = priv->mdev;
  1105. int i;
  1106. if (netif_msg_timer(priv))
  1107. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  1108. for (i = 0; i < priv->tx_ring_num; i++) {
  1109. if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
  1110. continue;
  1111. en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
  1112. i, priv->tx_ring[i]->qpn, priv->tx_ring[i]->cqn,
  1113. priv->tx_ring[i]->cons, priv->tx_ring[i]->prod);
  1114. }
  1115. priv->port_stats.tx_timeout++;
  1116. en_dbg(DRV, priv, "Scheduling watchdog\n");
  1117. queue_work(mdev->workqueue, &priv->watchdog_task);
  1118. }
  1119. static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
  1120. {
  1121. struct mlx4_en_priv *priv = netdev_priv(dev);
  1122. spin_lock_bh(&priv->stats_lock);
  1123. memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
  1124. spin_unlock_bh(&priv->stats_lock);
  1125. return &priv->ret_stats;
  1126. }
  1127. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  1128. {
  1129. struct mlx4_en_cq *cq;
  1130. int i;
  1131. /* If we haven't received a specific coalescing setting
  1132. * (module param), we set the moderation parameters as follows:
  1133. * - moder_cnt is set to the number of mtu sized packets to
  1134. * satisfy our coalescing target.
  1135. * - moder_time is set to a fixed value.
  1136. */
  1137. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  1138. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  1139. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  1140. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  1141. en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  1142. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  1143. /* Setup cq moderation params */
  1144. for (i = 0; i < priv->rx_ring_num; i++) {
  1145. cq = priv->rx_cq[i];
  1146. cq->moder_cnt = priv->rx_frames;
  1147. cq->moder_time = priv->rx_usecs;
  1148. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  1149. priv->last_moder_packets[i] = 0;
  1150. priv->last_moder_bytes[i] = 0;
  1151. }
  1152. for (i = 0; i < priv->tx_ring_num; i++) {
  1153. cq = priv->tx_cq[i];
  1154. cq->moder_cnt = priv->tx_frames;
  1155. cq->moder_time = priv->tx_usecs;
  1156. }
  1157. /* Reset auto-moderation params */
  1158. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  1159. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  1160. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  1161. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  1162. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  1163. priv->adaptive_rx_coal = 1;
  1164. priv->last_moder_jiffies = 0;
  1165. priv->last_moder_tx_packets = 0;
  1166. }
  1167. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  1168. {
  1169. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  1170. struct mlx4_en_cq *cq;
  1171. unsigned long packets;
  1172. unsigned long rate;
  1173. unsigned long avg_pkt_size;
  1174. unsigned long rx_packets;
  1175. unsigned long rx_bytes;
  1176. unsigned long rx_pkt_diff;
  1177. int moder_time;
  1178. int ring, err;
  1179. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  1180. return;
  1181. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  1182. spin_lock_bh(&priv->stats_lock);
  1183. rx_packets = priv->rx_ring[ring]->packets;
  1184. rx_bytes = priv->rx_ring[ring]->bytes;
  1185. spin_unlock_bh(&priv->stats_lock);
  1186. rx_pkt_diff = ((unsigned long) (rx_packets -
  1187. priv->last_moder_packets[ring]));
  1188. packets = rx_pkt_diff;
  1189. rate = packets * HZ / period;
  1190. avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
  1191. priv->last_moder_bytes[ring])) / packets : 0;
  1192. /* Apply auto-moderation only when packet rate
  1193. * exceeds a rate that it matters */
  1194. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  1195. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  1196. if (rate < priv->pkt_rate_low)
  1197. moder_time = priv->rx_usecs_low;
  1198. else if (rate > priv->pkt_rate_high)
  1199. moder_time = priv->rx_usecs_high;
  1200. else
  1201. moder_time = (rate - priv->pkt_rate_low) *
  1202. (priv->rx_usecs_high - priv->rx_usecs_low) /
  1203. (priv->pkt_rate_high - priv->pkt_rate_low) +
  1204. priv->rx_usecs_low;
  1205. } else {
  1206. moder_time = priv->rx_usecs_low;
  1207. }
  1208. if (moder_time != priv->last_moder_time[ring]) {
  1209. priv->last_moder_time[ring] = moder_time;
  1210. cq = priv->rx_cq[ring];
  1211. cq->moder_time = moder_time;
  1212. cq->moder_cnt = priv->rx_frames;
  1213. err = mlx4_en_set_cq_moder(priv, cq);
  1214. if (err)
  1215. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1216. ring);
  1217. }
  1218. priv->last_moder_packets[ring] = rx_packets;
  1219. priv->last_moder_bytes[ring] = rx_bytes;
  1220. }
  1221. priv->last_moder_jiffies = jiffies;
  1222. }
  1223. static void mlx4_en_do_get_stats(struct work_struct *work)
  1224. {
  1225. struct delayed_work *delay = to_delayed_work(work);
  1226. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1227. stats_task);
  1228. struct mlx4_en_dev *mdev = priv->mdev;
  1229. int err;
  1230. mutex_lock(&mdev->state_lock);
  1231. if (mdev->device_up) {
  1232. if (priv->port_up) {
  1233. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1234. if (err)
  1235. en_dbg(HW, priv, "Could not update stats\n");
  1236. mlx4_en_auto_moderation(priv);
  1237. }
  1238. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1239. }
  1240. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1241. mlx4_en_do_set_mac(priv, priv->current_mac);
  1242. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1243. }
  1244. mutex_unlock(&mdev->state_lock);
  1245. }
  1246. /* mlx4_en_service_task - Run service task for tasks that needed to be done
  1247. * periodically
  1248. */
  1249. static void mlx4_en_service_task(struct work_struct *work)
  1250. {
  1251. struct delayed_work *delay = to_delayed_work(work);
  1252. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1253. service_task);
  1254. struct mlx4_en_dev *mdev = priv->mdev;
  1255. mutex_lock(&mdev->state_lock);
  1256. if (mdev->device_up) {
  1257. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1258. mlx4_en_ptp_overflow_check(mdev);
  1259. queue_delayed_work(mdev->workqueue, &priv->service_task,
  1260. SERVICE_TASK_DELAY);
  1261. }
  1262. mutex_unlock(&mdev->state_lock);
  1263. }
  1264. static void mlx4_en_linkstate(struct work_struct *work)
  1265. {
  1266. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1267. linkstate_task);
  1268. struct mlx4_en_dev *mdev = priv->mdev;
  1269. int linkstate = priv->link_state;
  1270. mutex_lock(&mdev->state_lock);
  1271. /* If observable port state changed set carrier state and
  1272. * report to system log */
  1273. if (priv->last_link_state != linkstate) {
  1274. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1275. en_info(priv, "Link Down\n");
  1276. netif_carrier_off(priv->dev);
  1277. } else {
  1278. en_info(priv, "Link Up\n");
  1279. netif_carrier_on(priv->dev);
  1280. }
  1281. }
  1282. priv->last_link_state = linkstate;
  1283. mutex_unlock(&mdev->state_lock);
  1284. }
  1285. static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
  1286. {
  1287. struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
  1288. int numa_node = priv->mdev->dev->numa_node;
  1289. int ret = 0;
  1290. if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))
  1291. return -ENOMEM;
  1292. ret = cpumask_set_cpu_local_first(ring_idx, numa_node,
  1293. ring->affinity_mask);
  1294. if (ret)
  1295. free_cpumask_var(ring->affinity_mask);
  1296. return ret;
  1297. }
  1298. static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
  1299. {
  1300. free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
  1301. }
  1302. int mlx4_en_start_port(struct net_device *dev)
  1303. {
  1304. struct mlx4_en_priv *priv = netdev_priv(dev);
  1305. struct mlx4_en_dev *mdev = priv->mdev;
  1306. struct mlx4_en_cq *cq;
  1307. struct mlx4_en_tx_ring *tx_ring;
  1308. int rx_index = 0;
  1309. int tx_index = 0;
  1310. int err = 0;
  1311. int i;
  1312. int j;
  1313. u8 mc_list[16] = {0};
  1314. if (priv->port_up) {
  1315. en_dbg(DRV, priv, "start port called while port already up\n");
  1316. return 0;
  1317. }
  1318. INIT_LIST_HEAD(&priv->mc_list);
  1319. INIT_LIST_HEAD(&priv->curr_list);
  1320. INIT_LIST_HEAD(&priv->ethtool_list);
  1321. memset(&priv->ethtool_rules[0], 0,
  1322. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1323. /* Calculate Rx buf size */
  1324. dev->mtu = min(dev->mtu, priv->max_mtu);
  1325. mlx4_en_calc_rx_buf(dev);
  1326. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1327. /* Configure rx cq's and rings */
  1328. err = mlx4_en_activate_rx_rings(priv);
  1329. if (err) {
  1330. en_err(priv, "Failed to activate RX rings\n");
  1331. return err;
  1332. }
  1333. for (i = 0; i < priv->rx_ring_num; i++) {
  1334. cq = priv->rx_cq[i];
  1335. mlx4_en_cq_init_lock(cq);
  1336. err = mlx4_en_init_affinity_hint(priv, i);
  1337. if (err) {
  1338. en_err(priv, "Failed preparing IRQ affinity hint\n");
  1339. goto cq_err;
  1340. }
  1341. err = mlx4_en_activate_cq(priv, cq, i);
  1342. if (err) {
  1343. en_err(priv, "Failed activating Rx CQ\n");
  1344. mlx4_en_free_affinity_hint(priv, i);
  1345. goto cq_err;
  1346. }
  1347. for (j = 0; j < cq->size; j++) {
  1348. struct mlx4_cqe *cqe = NULL;
  1349. cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
  1350. priv->cqe_factor;
  1351. cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1352. }
  1353. err = mlx4_en_set_cq_moder(priv, cq);
  1354. if (err) {
  1355. en_err(priv, "Failed setting cq moderation parameters\n");
  1356. mlx4_en_deactivate_cq(priv, cq);
  1357. mlx4_en_free_affinity_hint(priv, i);
  1358. goto cq_err;
  1359. }
  1360. mlx4_en_arm_cq(priv, cq);
  1361. priv->rx_ring[i]->cqn = cq->mcq.cqn;
  1362. ++rx_index;
  1363. }
  1364. /* Set qp number */
  1365. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1366. err = mlx4_en_get_qp(priv);
  1367. if (err) {
  1368. en_err(priv, "Failed getting eth qp\n");
  1369. goto cq_err;
  1370. }
  1371. mdev->mac_removed[priv->port] = 0;
  1372. err = mlx4_en_config_rss_steer(priv);
  1373. if (err) {
  1374. en_err(priv, "Failed configuring rss steering\n");
  1375. goto mac_err;
  1376. }
  1377. err = mlx4_en_create_drop_qp(priv);
  1378. if (err)
  1379. goto rss_err;
  1380. /* Configure tx cq's and rings */
  1381. for (i = 0; i < priv->tx_ring_num; i++) {
  1382. /* Configure cq */
  1383. cq = priv->tx_cq[i];
  1384. err = mlx4_en_activate_cq(priv, cq, i);
  1385. if (err) {
  1386. en_err(priv, "Failed allocating Tx CQ\n");
  1387. goto tx_err;
  1388. }
  1389. err = mlx4_en_set_cq_moder(priv, cq);
  1390. if (err) {
  1391. en_err(priv, "Failed setting cq moderation parameters\n");
  1392. mlx4_en_deactivate_cq(priv, cq);
  1393. goto tx_err;
  1394. }
  1395. en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
  1396. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1397. /* Configure ring */
  1398. tx_ring = priv->tx_ring[i];
  1399. err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
  1400. i / priv->num_tx_rings_p_up);
  1401. if (err) {
  1402. en_err(priv, "Failed allocating Tx ring\n");
  1403. mlx4_en_deactivate_cq(priv, cq);
  1404. goto tx_err;
  1405. }
  1406. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1407. /* Arm CQ for TX completions */
  1408. mlx4_en_arm_cq(priv, cq);
  1409. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1410. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1411. *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
  1412. ++tx_index;
  1413. }
  1414. /* Configure port */
  1415. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1416. priv->rx_skb_size + ETH_FCS_LEN,
  1417. priv->prof->tx_pause,
  1418. priv->prof->tx_ppp,
  1419. priv->prof->rx_pause,
  1420. priv->prof->rx_ppp);
  1421. if (err) {
  1422. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1423. priv->port, err);
  1424. goto tx_err;
  1425. }
  1426. /* Set default qp number */
  1427. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1428. if (err) {
  1429. en_err(priv, "Failed setting default qp numbers\n");
  1430. goto tx_err;
  1431. }
  1432. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  1433. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
  1434. if (err) {
  1435. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  1436. err);
  1437. goto tx_err;
  1438. }
  1439. }
  1440. /* Init port */
  1441. en_dbg(HW, priv, "Initializing port\n");
  1442. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1443. if (err) {
  1444. en_err(priv, "Failed Initializing port\n");
  1445. goto tx_err;
  1446. }
  1447. /* Attach rx QP to bradcast address */
  1448. eth_broadcast_addr(&mc_list[10]);
  1449. mc_list[5] = priv->port; /* needed for B0 steering support */
  1450. if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1451. priv->port, 0, MLX4_PROT_ETH,
  1452. &priv->broadcast_id))
  1453. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1454. /* Must redo promiscuous mode setup. */
  1455. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1456. /* Schedule multicast task to populate multicast list */
  1457. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1458. #ifdef CONFIG_MLX4_EN_VXLAN
  1459. if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  1460. vxlan_get_rx_port(dev);
  1461. #endif
  1462. priv->port_up = true;
  1463. netif_tx_start_all_queues(dev);
  1464. netif_device_attach(dev);
  1465. return 0;
  1466. tx_err:
  1467. while (tx_index--) {
  1468. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[tx_index]);
  1469. mlx4_en_deactivate_cq(priv, priv->tx_cq[tx_index]);
  1470. }
  1471. mlx4_en_destroy_drop_qp(priv);
  1472. rss_err:
  1473. mlx4_en_release_rss_steer(priv);
  1474. mac_err:
  1475. mlx4_en_put_qp(priv);
  1476. cq_err:
  1477. while (rx_index--) {
  1478. mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
  1479. mlx4_en_free_affinity_hint(priv, i);
  1480. }
  1481. for (i = 0; i < priv->rx_ring_num; i++)
  1482. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1483. return err; /* need to close devices */
  1484. }
  1485. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1486. {
  1487. struct mlx4_en_priv *priv = netdev_priv(dev);
  1488. struct mlx4_en_dev *mdev = priv->mdev;
  1489. struct mlx4_en_mc_list *mclist, *tmp;
  1490. struct ethtool_flow_id *flow, *tmp_flow;
  1491. int i;
  1492. u8 mc_list[16] = {0};
  1493. if (!priv->port_up) {
  1494. en_dbg(DRV, priv, "stop port called while port already down\n");
  1495. return;
  1496. }
  1497. /* close port*/
  1498. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1499. /* Synchronize with tx routine */
  1500. netif_tx_lock_bh(dev);
  1501. if (detach)
  1502. netif_device_detach(dev);
  1503. netif_tx_stop_all_queues(dev);
  1504. netif_tx_unlock_bh(dev);
  1505. netif_tx_disable(dev);
  1506. /* Set port as not active */
  1507. priv->port_up = false;
  1508. /* Promsicuous mode */
  1509. if (mdev->dev->caps.steering_mode ==
  1510. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1511. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1512. MLX4_EN_FLAG_MC_PROMISC);
  1513. mlx4_flow_steer_promisc_remove(mdev->dev,
  1514. priv->port,
  1515. MLX4_FS_ALL_DEFAULT);
  1516. mlx4_flow_steer_promisc_remove(mdev->dev,
  1517. priv->port,
  1518. MLX4_FS_MC_DEFAULT);
  1519. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1520. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1521. /* Disable promiscouos mode */
  1522. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1523. priv->port);
  1524. /* Disable Multicast promisc */
  1525. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1526. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1527. priv->port);
  1528. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1529. }
  1530. }
  1531. /* Detach All multicasts */
  1532. eth_broadcast_addr(&mc_list[10]);
  1533. mc_list[5] = priv->port; /* needed for B0 steering support */
  1534. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1535. MLX4_PROT_ETH, priv->broadcast_id);
  1536. list_for_each_entry(mclist, &priv->curr_list, list) {
  1537. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1538. mc_list[5] = priv->port;
  1539. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
  1540. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1541. if (mclist->tunnel_reg_id)
  1542. mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
  1543. }
  1544. mlx4_en_clear_list(dev);
  1545. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1546. list_del(&mclist->list);
  1547. kfree(mclist);
  1548. }
  1549. /* Flush multicast filter */
  1550. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1551. /* Remove flow steering rules for the port*/
  1552. if (mdev->dev->caps.steering_mode ==
  1553. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1554. ASSERT_RTNL();
  1555. list_for_each_entry_safe(flow, tmp_flow,
  1556. &priv->ethtool_list, list) {
  1557. mlx4_flow_detach(mdev->dev, flow->id);
  1558. list_del(&flow->list);
  1559. }
  1560. }
  1561. mlx4_en_destroy_drop_qp(priv);
  1562. /* Free TX Rings */
  1563. for (i = 0; i < priv->tx_ring_num; i++) {
  1564. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[i]);
  1565. mlx4_en_deactivate_cq(priv, priv->tx_cq[i]);
  1566. }
  1567. msleep(10);
  1568. for (i = 0; i < priv->tx_ring_num; i++)
  1569. mlx4_en_free_tx_buf(dev, priv->tx_ring[i]);
  1570. /* Free RSS qps */
  1571. mlx4_en_release_rss_steer(priv);
  1572. /* Unregister Mac address for the port */
  1573. mlx4_en_put_qp(priv);
  1574. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
  1575. mdev->mac_removed[priv->port] = 1;
  1576. /* Free RX Rings */
  1577. for (i = 0; i < priv->rx_ring_num; i++) {
  1578. struct mlx4_en_cq *cq = priv->rx_cq[i];
  1579. local_bh_disable();
  1580. while (!mlx4_en_cq_lock_napi(cq)) {
  1581. pr_info("CQ %d locked\n", i);
  1582. mdelay(1);
  1583. }
  1584. local_bh_enable();
  1585. napi_synchronize(&cq->napi);
  1586. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1587. mlx4_en_deactivate_cq(priv, cq);
  1588. mlx4_en_free_affinity_hint(priv, i);
  1589. }
  1590. }
  1591. static void mlx4_en_restart(struct work_struct *work)
  1592. {
  1593. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1594. watchdog_task);
  1595. struct mlx4_en_dev *mdev = priv->mdev;
  1596. struct net_device *dev = priv->dev;
  1597. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1598. mutex_lock(&mdev->state_lock);
  1599. if (priv->port_up) {
  1600. mlx4_en_stop_port(dev, 1);
  1601. if (mlx4_en_start_port(dev))
  1602. en_err(priv, "Failed restarting port %d\n", priv->port);
  1603. }
  1604. mutex_unlock(&mdev->state_lock);
  1605. }
  1606. static void mlx4_en_clear_stats(struct net_device *dev)
  1607. {
  1608. struct mlx4_en_priv *priv = netdev_priv(dev);
  1609. struct mlx4_en_dev *mdev = priv->mdev;
  1610. int i;
  1611. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1612. en_dbg(HW, priv, "Failed dumping statistics\n");
  1613. memset(&priv->stats, 0, sizeof(priv->stats));
  1614. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1615. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1616. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1617. for (i = 0; i < priv->tx_ring_num; i++) {
  1618. priv->tx_ring[i]->bytes = 0;
  1619. priv->tx_ring[i]->packets = 0;
  1620. priv->tx_ring[i]->tx_csum = 0;
  1621. }
  1622. for (i = 0; i < priv->rx_ring_num; i++) {
  1623. priv->rx_ring[i]->bytes = 0;
  1624. priv->rx_ring[i]->packets = 0;
  1625. priv->rx_ring[i]->csum_ok = 0;
  1626. priv->rx_ring[i]->csum_none = 0;
  1627. priv->rx_ring[i]->csum_complete = 0;
  1628. }
  1629. }
  1630. static int mlx4_en_open(struct net_device *dev)
  1631. {
  1632. struct mlx4_en_priv *priv = netdev_priv(dev);
  1633. struct mlx4_en_dev *mdev = priv->mdev;
  1634. int err = 0;
  1635. mutex_lock(&mdev->state_lock);
  1636. if (!mdev->device_up) {
  1637. en_err(priv, "Cannot open - device down/disabled\n");
  1638. err = -EBUSY;
  1639. goto out;
  1640. }
  1641. /* Reset HW statistics and SW counters */
  1642. mlx4_en_clear_stats(dev);
  1643. err = mlx4_en_start_port(dev);
  1644. if (err)
  1645. en_err(priv, "Failed starting port:%d\n", priv->port);
  1646. out:
  1647. mutex_unlock(&mdev->state_lock);
  1648. return err;
  1649. }
  1650. static int mlx4_en_close(struct net_device *dev)
  1651. {
  1652. struct mlx4_en_priv *priv = netdev_priv(dev);
  1653. struct mlx4_en_dev *mdev = priv->mdev;
  1654. en_dbg(IFDOWN, priv, "Close port called\n");
  1655. mutex_lock(&mdev->state_lock);
  1656. mlx4_en_stop_port(dev, 0);
  1657. netif_carrier_off(dev);
  1658. mutex_unlock(&mdev->state_lock);
  1659. return 0;
  1660. }
  1661. void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1662. {
  1663. int i;
  1664. #ifdef CONFIG_RFS_ACCEL
  1665. free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
  1666. priv->dev->rx_cpu_rmap = NULL;
  1667. #endif
  1668. for (i = 0; i < priv->tx_ring_num; i++) {
  1669. if (priv->tx_ring && priv->tx_ring[i])
  1670. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1671. if (priv->tx_cq && priv->tx_cq[i])
  1672. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1673. }
  1674. for (i = 0; i < priv->rx_ring_num; i++) {
  1675. if (priv->rx_ring[i])
  1676. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1677. priv->prof->rx_ring_size, priv->stride);
  1678. if (priv->rx_cq[i])
  1679. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1680. }
  1681. if (priv->base_tx_qpn) {
  1682. mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
  1683. priv->base_tx_qpn = 0;
  1684. }
  1685. }
  1686. int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1687. {
  1688. struct mlx4_en_port_profile *prof = priv->prof;
  1689. int i;
  1690. int node;
  1691. /* Create tx Rings */
  1692. for (i = 0; i < priv->tx_ring_num; i++) {
  1693. node = cpu_to_node(i % num_online_cpus());
  1694. if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
  1695. prof->tx_ring_size, i, TX, node))
  1696. goto err;
  1697. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i],
  1698. prof->tx_ring_size, TXBB_SIZE,
  1699. node, i))
  1700. goto err;
  1701. }
  1702. /* Create rx Rings */
  1703. for (i = 0; i < priv->rx_ring_num; i++) {
  1704. node = cpu_to_node(i % num_online_cpus());
  1705. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1706. prof->rx_ring_size, i, RX, node))
  1707. goto err;
  1708. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1709. prof->rx_ring_size, priv->stride,
  1710. node))
  1711. goto err;
  1712. }
  1713. #ifdef CONFIG_RFS_ACCEL
  1714. if (priv->mdev->dev->caps.comp_pool) {
  1715. priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool);
  1716. if (!priv->dev->rx_cpu_rmap)
  1717. goto err;
  1718. }
  1719. #endif
  1720. return 0;
  1721. err:
  1722. en_err(priv, "Failed to allocate NIC resources\n");
  1723. for (i = 0; i < priv->rx_ring_num; i++) {
  1724. if (priv->rx_ring[i])
  1725. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1726. prof->rx_ring_size,
  1727. priv->stride);
  1728. if (priv->rx_cq[i])
  1729. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1730. }
  1731. for (i = 0; i < priv->tx_ring_num; i++) {
  1732. if (priv->tx_ring[i])
  1733. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1734. if (priv->tx_cq[i])
  1735. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1736. }
  1737. return -ENOMEM;
  1738. }
  1739. void mlx4_en_destroy_netdev(struct net_device *dev)
  1740. {
  1741. struct mlx4_en_priv *priv = netdev_priv(dev);
  1742. struct mlx4_en_dev *mdev = priv->mdev;
  1743. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1744. /* Unregister device - this will close the port if it was up */
  1745. if (priv->registered)
  1746. unregister_netdev(dev);
  1747. if (priv->allocated)
  1748. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1749. cancel_delayed_work(&priv->stats_task);
  1750. cancel_delayed_work(&priv->service_task);
  1751. /* flush any pending task for this netdev */
  1752. flush_workqueue(mdev->workqueue);
  1753. /* Detach the netdev so tasks would not attempt to access it */
  1754. mutex_lock(&mdev->state_lock);
  1755. mdev->pndev[priv->port] = NULL;
  1756. mdev->upper[priv->port] = NULL;
  1757. mutex_unlock(&mdev->state_lock);
  1758. mlx4_en_free_resources(priv);
  1759. kfree(priv->tx_ring);
  1760. kfree(priv->tx_cq);
  1761. free_netdev(dev);
  1762. }
  1763. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  1764. {
  1765. struct mlx4_en_priv *priv = netdev_priv(dev);
  1766. struct mlx4_en_dev *mdev = priv->mdev;
  1767. int err = 0;
  1768. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  1769. dev->mtu, new_mtu);
  1770. if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
  1771. en_err(priv, "Bad MTU size:%d.\n", new_mtu);
  1772. return -EPERM;
  1773. }
  1774. dev->mtu = new_mtu;
  1775. if (netif_running(dev)) {
  1776. mutex_lock(&mdev->state_lock);
  1777. if (!mdev->device_up) {
  1778. /* NIC is probably restarting - let watchdog task reset
  1779. * the port */
  1780. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  1781. } else {
  1782. mlx4_en_stop_port(dev, 1);
  1783. err = mlx4_en_start_port(dev);
  1784. if (err) {
  1785. en_err(priv, "Failed restarting port:%d\n",
  1786. priv->port);
  1787. queue_work(mdev->workqueue, &priv->watchdog_task);
  1788. }
  1789. }
  1790. mutex_unlock(&mdev->state_lock);
  1791. }
  1792. return 0;
  1793. }
  1794. static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
  1795. {
  1796. struct mlx4_en_priv *priv = netdev_priv(dev);
  1797. struct mlx4_en_dev *mdev = priv->mdev;
  1798. struct hwtstamp_config config;
  1799. if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
  1800. return -EFAULT;
  1801. /* reserved for future extensions */
  1802. if (config.flags)
  1803. return -EINVAL;
  1804. /* device doesn't support time stamping */
  1805. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
  1806. return -EINVAL;
  1807. /* TX HW timestamp */
  1808. switch (config.tx_type) {
  1809. case HWTSTAMP_TX_OFF:
  1810. case HWTSTAMP_TX_ON:
  1811. break;
  1812. default:
  1813. return -ERANGE;
  1814. }
  1815. /* RX HW timestamp */
  1816. switch (config.rx_filter) {
  1817. case HWTSTAMP_FILTER_NONE:
  1818. break;
  1819. case HWTSTAMP_FILTER_ALL:
  1820. case HWTSTAMP_FILTER_SOME:
  1821. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  1822. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  1823. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  1824. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  1825. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  1826. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  1827. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  1828. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  1829. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  1830. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  1831. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  1832. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  1833. config.rx_filter = HWTSTAMP_FILTER_ALL;
  1834. break;
  1835. default:
  1836. return -ERANGE;
  1837. }
  1838. if (mlx4_en_reset_config(dev, config, dev->features)) {
  1839. config.tx_type = HWTSTAMP_TX_OFF;
  1840. config.rx_filter = HWTSTAMP_FILTER_NONE;
  1841. }
  1842. return copy_to_user(ifr->ifr_data, &config,
  1843. sizeof(config)) ? -EFAULT : 0;
  1844. }
  1845. static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
  1846. {
  1847. struct mlx4_en_priv *priv = netdev_priv(dev);
  1848. return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
  1849. sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
  1850. }
  1851. static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1852. {
  1853. switch (cmd) {
  1854. case SIOCSHWTSTAMP:
  1855. return mlx4_en_hwtstamp_set(dev, ifr);
  1856. case SIOCGHWTSTAMP:
  1857. return mlx4_en_hwtstamp_get(dev, ifr);
  1858. default:
  1859. return -EOPNOTSUPP;
  1860. }
  1861. }
  1862. static int mlx4_en_set_features(struct net_device *netdev,
  1863. netdev_features_t features)
  1864. {
  1865. struct mlx4_en_priv *priv = netdev_priv(netdev);
  1866. int ret = 0;
  1867. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
  1868. en_info(priv, "Turn %s RX vlan strip offload\n",
  1869. (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");
  1870. ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,
  1871. features);
  1872. if (ret)
  1873. return ret;
  1874. }
  1875. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))
  1876. en_info(priv, "Turn %s TX vlan strip offload\n",
  1877. (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");
  1878. if (features & NETIF_F_LOOPBACK)
  1879. priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1880. else
  1881. priv->ctrl_flags &=
  1882. cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1883. mlx4_en_update_loopback_state(netdev, features);
  1884. return 0;
  1885. }
  1886. static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
  1887. {
  1888. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1889. struct mlx4_en_dev *mdev = en_priv->mdev;
  1890. u64 mac_u64 = mlx4_mac_to_u64(mac);
  1891. if (!is_valid_ether_addr(mac))
  1892. return -EINVAL;
  1893. return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac_u64);
  1894. }
  1895. static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos)
  1896. {
  1897. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1898. struct mlx4_en_dev *mdev = en_priv->mdev;
  1899. return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos);
  1900. }
  1901. static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
  1902. {
  1903. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1904. struct mlx4_en_dev *mdev = en_priv->mdev;
  1905. return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
  1906. }
  1907. static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
  1908. {
  1909. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1910. struct mlx4_en_dev *mdev = en_priv->mdev;
  1911. return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
  1912. }
  1913. static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
  1914. {
  1915. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  1916. struct mlx4_en_dev *mdev = en_priv->mdev;
  1917. return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
  1918. }
  1919. #define PORT_ID_BYTE_LEN 8
  1920. static int mlx4_en_get_phys_port_id(struct net_device *dev,
  1921. struct netdev_phys_item_id *ppid)
  1922. {
  1923. struct mlx4_en_priv *priv = netdev_priv(dev);
  1924. struct mlx4_dev *mdev = priv->mdev->dev;
  1925. int i;
  1926. u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
  1927. if (!phys_port_id)
  1928. return -EOPNOTSUPP;
  1929. ppid->id_len = sizeof(phys_port_id);
  1930. for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
  1931. ppid->id[i] = phys_port_id & 0xff;
  1932. phys_port_id >>= 8;
  1933. }
  1934. return 0;
  1935. }
  1936. #ifdef CONFIG_MLX4_EN_VXLAN
  1937. static void mlx4_en_add_vxlan_offloads(struct work_struct *work)
  1938. {
  1939. int ret;
  1940. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1941. vxlan_add_task);
  1942. ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
  1943. if (ret)
  1944. goto out;
  1945. ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
  1946. VXLAN_STEER_BY_OUTER_MAC, 1);
  1947. out:
  1948. if (ret) {
  1949. en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
  1950. return;
  1951. }
  1952. /* set offloads */
  1953. priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
  1954. NETIF_F_TSO | NETIF_F_GSO_UDP_TUNNEL;
  1955. priv->dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL;
  1956. priv->dev->features |= NETIF_F_GSO_UDP_TUNNEL;
  1957. }
  1958. static void mlx4_en_del_vxlan_offloads(struct work_struct *work)
  1959. {
  1960. int ret;
  1961. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1962. vxlan_del_task);
  1963. /* unset offloads */
  1964. priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
  1965. NETIF_F_TSO | NETIF_F_GSO_UDP_TUNNEL);
  1966. priv->dev->hw_features &= ~NETIF_F_GSO_UDP_TUNNEL;
  1967. priv->dev->features &= ~NETIF_F_GSO_UDP_TUNNEL;
  1968. ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
  1969. VXLAN_STEER_BY_OUTER_MAC, 0);
  1970. if (ret)
  1971. en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
  1972. priv->vxlan_port = 0;
  1973. }
  1974. static void mlx4_en_add_vxlan_port(struct net_device *dev,
  1975. sa_family_t sa_family, __be16 port)
  1976. {
  1977. struct mlx4_en_priv *priv = netdev_priv(dev);
  1978. __be16 current_port;
  1979. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  1980. return;
  1981. if (sa_family == AF_INET6)
  1982. return;
  1983. current_port = priv->vxlan_port;
  1984. if (current_port && current_port != port) {
  1985. en_warn(priv, "vxlan port %d configured, can't add port %d\n",
  1986. ntohs(current_port), ntohs(port));
  1987. return;
  1988. }
  1989. priv->vxlan_port = port;
  1990. queue_work(priv->mdev->workqueue, &priv->vxlan_add_task);
  1991. }
  1992. static void mlx4_en_del_vxlan_port(struct net_device *dev,
  1993. sa_family_t sa_family, __be16 port)
  1994. {
  1995. struct mlx4_en_priv *priv = netdev_priv(dev);
  1996. __be16 current_port;
  1997. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  1998. return;
  1999. if (sa_family == AF_INET6)
  2000. return;
  2001. current_port = priv->vxlan_port;
  2002. if (current_port != port) {
  2003. en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port));
  2004. return;
  2005. }
  2006. queue_work(priv->mdev->workqueue, &priv->vxlan_del_task);
  2007. }
  2008. static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
  2009. struct net_device *dev,
  2010. netdev_features_t features)
  2011. {
  2012. return vxlan_features_check(skb, features);
  2013. }
  2014. #endif
  2015. static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate)
  2016. {
  2017. struct mlx4_en_priv *priv = netdev_priv(dev);
  2018. struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[queue_index];
  2019. struct mlx4_update_qp_params params;
  2020. int err;
  2021. if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))
  2022. return -EOPNOTSUPP;
  2023. /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */
  2024. if (maxrate >> 12) {
  2025. params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;
  2026. params.rate_val = maxrate / 1000;
  2027. } else if (maxrate) {
  2028. params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;
  2029. params.rate_val = maxrate;
  2030. } else { /* zero serves to revoke the QP rate-limitation */
  2031. params.rate_unit = 0;
  2032. params.rate_val = 0;
  2033. }
  2034. err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,
  2035. &params);
  2036. return err;
  2037. }
  2038. static const struct net_device_ops mlx4_netdev_ops = {
  2039. .ndo_open = mlx4_en_open,
  2040. .ndo_stop = mlx4_en_close,
  2041. .ndo_start_xmit = mlx4_en_xmit,
  2042. .ndo_select_queue = mlx4_en_select_queue,
  2043. .ndo_get_stats = mlx4_en_get_stats,
  2044. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  2045. .ndo_set_mac_address = mlx4_en_set_mac,
  2046. .ndo_validate_addr = eth_validate_addr,
  2047. .ndo_change_mtu = mlx4_en_change_mtu,
  2048. .ndo_do_ioctl = mlx4_en_ioctl,
  2049. .ndo_tx_timeout = mlx4_en_tx_timeout,
  2050. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  2051. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  2052. #ifdef CONFIG_NET_POLL_CONTROLLER
  2053. .ndo_poll_controller = mlx4_en_netpoll,
  2054. #endif
  2055. .ndo_set_features = mlx4_en_set_features,
  2056. .ndo_setup_tc = mlx4_en_setup_tc,
  2057. #ifdef CONFIG_RFS_ACCEL
  2058. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  2059. #endif
  2060. #ifdef CONFIG_NET_RX_BUSY_POLL
  2061. .ndo_busy_poll = mlx4_en_low_latency_recv,
  2062. #endif
  2063. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  2064. #ifdef CONFIG_MLX4_EN_VXLAN
  2065. .ndo_add_vxlan_port = mlx4_en_add_vxlan_port,
  2066. .ndo_del_vxlan_port = mlx4_en_del_vxlan_port,
  2067. .ndo_features_check = mlx4_en_features_check,
  2068. #endif
  2069. .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
  2070. };
  2071. static const struct net_device_ops mlx4_netdev_ops_master = {
  2072. .ndo_open = mlx4_en_open,
  2073. .ndo_stop = mlx4_en_close,
  2074. .ndo_start_xmit = mlx4_en_xmit,
  2075. .ndo_select_queue = mlx4_en_select_queue,
  2076. .ndo_get_stats = mlx4_en_get_stats,
  2077. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  2078. .ndo_set_mac_address = mlx4_en_set_mac,
  2079. .ndo_validate_addr = eth_validate_addr,
  2080. .ndo_change_mtu = mlx4_en_change_mtu,
  2081. .ndo_tx_timeout = mlx4_en_tx_timeout,
  2082. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  2083. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  2084. .ndo_set_vf_mac = mlx4_en_set_vf_mac,
  2085. .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
  2086. .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
  2087. .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
  2088. .ndo_get_vf_config = mlx4_en_get_vf_config,
  2089. #ifdef CONFIG_NET_POLL_CONTROLLER
  2090. .ndo_poll_controller = mlx4_en_netpoll,
  2091. #endif
  2092. .ndo_set_features = mlx4_en_set_features,
  2093. .ndo_setup_tc = mlx4_en_setup_tc,
  2094. #ifdef CONFIG_RFS_ACCEL
  2095. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  2096. #endif
  2097. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  2098. #ifdef CONFIG_MLX4_EN_VXLAN
  2099. .ndo_add_vxlan_port = mlx4_en_add_vxlan_port,
  2100. .ndo_del_vxlan_port = mlx4_en_del_vxlan_port,
  2101. .ndo_features_check = mlx4_en_features_check,
  2102. #endif
  2103. .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
  2104. };
  2105. struct mlx4_en_bond {
  2106. struct work_struct work;
  2107. struct mlx4_en_priv *priv;
  2108. int is_bonded;
  2109. struct mlx4_port_map port_map;
  2110. };
  2111. static void mlx4_en_bond_work(struct work_struct *work)
  2112. {
  2113. struct mlx4_en_bond *bond = container_of(work,
  2114. struct mlx4_en_bond,
  2115. work);
  2116. int err = 0;
  2117. struct mlx4_dev *dev = bond->priv->mdev->dev;
  2118. if (bond->is_bonded) {
  2119. if (!mlx4_is_bonded(dev)) {
  2120. err = mlx4_bond(dev);
  2121. if (err)
  2122. en_err(bond->priv, "Fail to bond device\n");
  2123. }
  2124. if (!err) {
  2125. err = mlx4_port_map_set(dev, &bond->port_map);
  2126. if (err)
  2127. en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n",
  2128. bond->port_map.port1,
  2129. bond->port_map.port2,
  2130. err);
  2131. }
  2132. } else if (mlx4_is_bonded(dev)) {
  2133. err = mlx4_unbond(dev);
  2134. if (err)
  2135. en_err(bond->priv, "Fail to unbond device\n");
  2136. }
  2137. dev_put(bond->priv->dev);
  2138. kfree(bond);
  2139. }
  2140. static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded,
  2141. u8 v2p_p1, u8 v2p_p2)
  2142. {
  2143. struct mlx4_en_bond *bond = NULL;
  2144. bond = kzalloc(sizeof(*bond), GFP_ATOMIC);
  2145. if (!bond)
  2146. return -ENOMEM;
  2147. INIT_WORK(&bond->work, mlx4_en_bond_work);
  2148. bond->priv = priv;
  2149. bond->is_bonded = is_bonded;
  2150. bond->port_map.port1 = v2p_p1;
  2151. bond->port_map.port2 = v2p_p2;
  2152. dev_hold(priv->dev);
  2153. queue_work(priv->mdev->workqueue, &bond->work);
  2154. return 0;
  2155. }
  2156. int mlx4_en_netdev_event(struct notifier_block *this,
  2157. unsigned long event, void *ptr)
  2158. {
  2159. struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
  2160. u8 port = 0;
  2161. struct mlx4_en_dev *mdev;
  2162. struct mlx4_dev *dev;
  2163. int i, num_eth_ports = 0;
  2164. bool do_bond = true;
  2165. struct mlx4_en_priv *priv;
  2166. u8 v2p_port1 = 0;
  2167. u8 v2p_port2 = 0;
  2168. if (!net_eq(dev_net(ndev), &init_net))
  2169. return NOTIFY_DONE;
  2170. mdev = container_of(this, struct mlx4_en_dev, nb);
  2171. dev = mdev->dev;
  2172. /* Go into this mode only when two network devices set on two ports
  2173. * of the same mlx4 device are slaves of the same bonding master
  2174. */
  2175. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
  2176. ++num_eth_ports;
  2177. if (!port && (mdev->pndev[i] == ndev))
  2178. port = i;
  2179. mdev->upper[i] = mdev->pndev[i] ?
  2180. netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;
  2181. /* condition not met: network device is a slave */
  2182. if (!mdev->upper[i])
  2183. do_bond = false;
  2184. if (num_eth_ports < 2)
  2185. continue;
  2186. /* condition not met: same master */
  2187. if (mdev->upper[i] != mdev->upper[i-1])
  2188. do_bond = false;
  2189. }
  2190. /* condition not met: 2 salves */
  2191. do_bond = (num_eth_ports == 2) ? do_bond : false;
  2192. /* handle only events that come with enough info */
  2193. if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)
  2194. return NOTIFY_DONE;
  2195. priv = netdev_priv(ndev);
  2196. if (do_bond) {
  2197. struct netdev_notifier_bonding_info *notifier_info = ptr;
  2198. struct netdev_bonding_info *bonding_info =
  2199. &notifier_info->bonding_info;
  2200. /* required mode 1, 2 or 4 */
  2201. if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&
  2202. (bonding_info->master.bond_mode != BOND_MODE_XOR) &&
  2203. (bonding_info->master.bond_mode != BOND_MODE_8023AD))
  2204. do_bond = false;
  2205. /* require exactly 2 slaves */
  2206. if (bonding_info->master.num_slaves != 2)
  2207. do_bond = false;
  2208. /* calc v2p */
  2209. if (do_bond) {
  2210. if (bonding_info->master.bond_mode ==
  2211. BOND_MODE_ACTIVEBACKUP) {
  2212. /* in active-backup mode virtual ports are
  2213. * mapped to the physical port of the active
  2214. * slave */
  2215. if (bonding_info->slave.state ==
  2216. BOND_STATE_BACKUP) {
  2217. if (port == 1) {
  2218. v2p_port1 = 2;
  2219. v2p_port2 = 2;
  2220. } else {
  2221. v2p_port1 = 1;
  2222. v2p_port2 = 1;
  2223. }
  2224. } else { /* BOND_STATE_ACTIVE */
  2225. if (port == 1) {
  2226. v2p_port1 = 1;
  2227. v2p_port2 = 1;
  2228. } else {
  2229. v2p_port1 = 2;
  2230. v2p_port2 = 2;
  2231. }
  2232. }
  2233. } else { /* Active-Active */
  2234. /* in active-active mode a virtual port is
  2235. * mapped to the native physical port if and only
  2236. * if the physical port is up */
  2237. __s8 link = bonding_info->slave.link;
  2238. if (port == 1)
  2239. v2p_port2 = 2;
  2240. else
  2241. v2p_port1 = 1;
  2242. if ((link == BOND_LINK_UP) ||
  2243. (link == BOND_LINK_FAIL)) {
  2244. if (port == 1)
  2245. v2p_port1 = 1;
  2246. else
  2247. v2p_port2 = 2;
  2248. } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */
  2249. if (port == 1)
  2250. v2p_port1 = 2;
  2251. else
  2252. v2p_port2 = 1;
  2253. }
  2254. }
  2255. }
  2256. }
  2257. mlx4_en_queue_bond_work(priv, do_bond,
  2258. v2p_port1, v2p_port2);
  2259. return NOTIFY_DONE;
  2260. }
  2261. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  2262. struct mlx4_en_port_profile *prof)
  2263. {
  2264. struct net_device *dev;
  2265. struct mlx4_en_priv *priv;
  2266. int i;
  2267. int err;
  2268. u64 mac_u64;
  2269. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  2270. MAX_TX_RINGS, MAX_RX_RINGS);
  2271. if (dev == NULL)
  2272. return -ENOMEM;
  2273. netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
  2274. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  2275. SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);
  2276. dev->dev_port = port - 1;
  2277. /*
  2278. * Initialize driver private data
  2279. */
  2280. priv = netdev_priv(dev);
  2281. memset(priv, 0, sizeof(struct mlx4_en_priv));
  2282. spin_lock_init(&priv->stats_lock);
  2283. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  2284. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  2285. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  2286. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  2287. INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
  2288. #ifdef CONFIG_MLX4_EN_VXLAN
  2289. INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads);
  2290. INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads);
  2291. #endif
  2292. #ifdef CONFIG_RFS_ACCEL
  2293. INIT_LIST_HEAD(&priv->filters);
  2294. spin_lock_init(&priv->filters_lock);
  2295. #endif
  2296. priv->dev = dev;
  2297. priv->mdev = mdev;
  2298. priv->ddev = &mdev->pdev->dev;
  2299. priv->prof = prof;
  2300. priv->port = port;
  2301. priv->port_up = false;
  2302. priv->flags = prof->flags;
  2303. priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
  2304. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  2305. MLX4_WQE_CTRL_SOLICITED);
  2306. priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
  2307. priv->tx_ring_num = prof->tx_ring_num;
  2308. priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
  2309. netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));
  2310. priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring *) * MAX_TX_RINGS,
  2311. GFP_KERNEL);
  2312. if (!priv->tx_ring) {
  2313. err = -ENOMEM;
  2314. goto out;
  2315. }
  2316. priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq *) * MAX_TX_RINGS,
  2317. GFP_KERNEL);
  2318. if (!priv->tx_cq) {
  2319. err = -ENOMEM;
  2320. goto out;
  2321. }
  2322. priv->rx_ring_num = prof->rx_ring_num;
  2323. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  2324. priv->cqe_size = mdev->dev->caps.cqe_size;
  2325. priv->mac_index = -1;
  2326. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  2327. #ifdef CONFIG_MLX4_EN_DCB
  2328. if (!mlx4_is_slave(priv->mdev->dev)) {
  2329. if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) {
  2330. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  2331. } else {
  2332. en_info(priv, "enabling only PFC DCB ops\n");
  2333. dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
  2334. }
  2335. }
  2336. #endif
  2337. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
  2338. INIT_HLIST_HEAD(&priv->mac_hash[i]);
  2339. /* Query for default mac and max mtu */
  2340. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  2341. if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &
  2342. MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)
  2343. priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;
  2344. /* Set default MAC */
  2345. dev->addr_len = ETH_ALEN;
  2346. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  2347. if (!is_valid_ether_addr(dev->dev_addr)) {
  2348. if (mlx4_is_slave(priv->mdev->dev)) {
  2349. eth_hw_addr_random(dev);
  2350. en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
  2351. mac_u64 = mlx4_mac_to_u64(dev->dev_addr);
  2352. mdev->dev->caps.def_mac[priv->port] = mac_u64;
  2353. } else {
  2354. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  2355. priv->port, dev->dev_addr);
  2356. err = -EINVAL;
  2357. goto out;
  2358. }
  2359. }
  2360. memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));
  2361. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  2362. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  2363. err = mlx4_en_alloc_resources(priv);
  2364. if (err)
  2365. goto out;
  2366. /* Initialize time stamping config */
  2367. priv->hwtstamp_config.flags = 0;
  2368. priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
  2369. priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
  2370. /* Allocate page for receive rings */
  2371. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  2372. MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
  2373. if (err) {
  2374. en_err(priv, "Failed to allocate page for rx qps\n");
  2375. goto out;
  2376. }
  2377. priv->allocated = 1;
  2378. /*
  2379. * Initialize netdev entry points
  2380. */
  2381. if (mlx4_is_master(priv->mdev->dev))
  2382. dev->netdev_ops = &mlx4_netdev_ops_master;
  2383. else
  2384. dev->netdev_ops = &mlx4_netdev_ops;
  2385. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  2386. netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
  2387. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  2388. dev->ethtool_ops = &mlx4_en_ethtool_ops;
  2389. /*
  2390. * Set driver features
  2391. */
  2392. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  2393. if (mdev->LSO_support)
  2394. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  2395. dev->vlan_features = dev->hw_features;
  2396. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  2397. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  2398. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
  2399. NETIF_F_HW_VLAN_CTAG_FILTER;
  2400. dev->hw_features |= NETIF_F_LOOPBACK |
  2401. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
  2402. if (mdev->dev->caps.steering_mode ==
  2403. MLX4_STEERING_MODE_DEVICE_MANAGED &&
  2404. mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
  2405. dev->hw_features |= NETIF_F_NTUPLE;
  2406. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  2407. dev->priv_flags |= IFF_UNICAST_FLT;
  2408. /* Setting a default hash function value */
  2409. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
  2410. priv->rss_hash_fn = ETH_RSS_HASH_TOP;
  2411. } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
  2412. priv->rss_hash_fn = ETH_RSS_HASH_XOR;
  2413. } else {
  2414. en_warn(priv,
  2415. "No RSS hash capabilities exposed, using Toeplitz\n");
  2416. priv->rss_hash_fn = ETH_RSS_HASH_TOP;
  2417. }
  2418. mdev->pndev[port] = dev;
  2419. mdev->upper[port] = NULL;
  2420. netif_carrier_off(dev);
  2421. mlx4_en_set_default_moderation(priv);
  2422. err = register_netdev(dev);
  2423. if (err) {
  2424. en_err(priv, "Netdev registration failed for port %d\n", port);
  2425. goto out;
  2426. }
  2427. priv->registered = 1;
  2428. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
  2429. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  2430. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  2431. /* Configure port */
  2432. mlx4_en_calc_rx_buf(dev);
  2433. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  2434. priv->rx_skb_size + ETH_FCS_LEN,
  2435. prof->tx_pause, prof->tx_ppp,
  2436. prof->rx_pause, prof->rx_ppp);
  2437. if (err) {
  2438. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  2439. priv->port, err);
  2440. goto out;
  2441. }
  2442. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  2443. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
  2444. if (err) {
  2445. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  2446. err);
  2447. goto out;
  2448. }
  2449. }
  2450. /* Init port */
  2451. en_warn(priv, "Initializing port\n");
  2452. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  2453. if (err) {
  2454. en_err(priv, "Failed Initializing port\n");
  2455. goto out;
  2456. }
  2457. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  2458. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  2459. queue_delayed_work(mdev->workqueue, &priv->service_task,
  2460. SERVICE_TASK_DELAY);
  2461. mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
  2462. return 0;
  2463. out:
  2464. mlx4_en_destroy_netdev(dev);
  2465. return err;
  2466. }
  2467. int mlx4_en_reset_config(struct net_device *dev,
  2468. struct hwtstamp_config ts_config,
  2469. netdev_features_t features)
  2470. {
  2471. struct mlx4_en_priv *priv = netdev_priv(dev);
  2472. struct mlx4_en_dev *mdev = priv->mdev;
  2473. int port_up = 0;
  2474. int err = 0;
  2475. if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
  2476. priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
  2477. !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX))
  2478. return 0; /* Nothing to change */
  2479. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
  2480. (features & NETIF_F_HW_VLAN_CTAG_RX) &&
  2481. (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {
  2482. en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");
  2483. return -EINVAL;
  2484. }
  2485. mutex_lock(&mdev->state_lock);
  2486. if (priv->port_up) {
  2487. port_up = 1;
  2488. mlx4_en_stop_port(dev, 1);
  2489. }
  2490. mlx4_en_free_resources(priv);
  2491. en_warn(priv, "Changing device configuration rx filter(%x) rx vlan(%x)\n",
  2492. ts_config.rx_filter, !!(features & NETIF_F_HW_VLAN_CTAG_RX));
  2493. priv->hwtstamp_config.tx_type = ts_config.tx_type;
  2494. priv->hwtstamp_config.rx_filter = ts_config.rx_filter;
  2495. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
  2496. if (features & NETIF_F_HW_VLAN_CTAG_RX)
  2497. dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
  2498. else
  2499. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  2500. } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {
  2501. /* RX time-stamping is OFF, update the RX vlan offload
  2502. * to the latest wanted state
  2503. */
  2504. if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)
  2505. dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
  2506. else
  2507. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  2508. }
  2509. /* RX vlan offload and RX time-stamping can't co-exist !
  2510. * Regardless of the caller's choice,
  2511. * Turn Off RX vlan offload in case of time-stamping is ON
  2512. */
  2513. if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {
  2514. if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
  2515. en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");
  2516. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  2517. }
  2518. err = mlx4_en_alloc_resources(priv);
  2519. if (err) {
  2520. en_err(priv, "Failed reallocating port resources\n");
  2521. goto out;
  2522. }
  2523. if (port_up) {
  2524. err = mlx4_en_start_port(dev);
  2525. if (err)
  2526. en_err(priv, "Failed starting port\n");
  2527. }
  2528. out:
  2529. mutex_unlock(&mdev->state_lock);
  2530. netdev_features_change(dev);
  2531. return err;
  2532. }