enic_main.c 67 KB

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  1. /*
  2. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/kernel.h>
  21. #include <linux/string.h>
  22. #include <linux/errno.h>
  23. #include <linux/types.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/workqueue.h>
  27. #include <linux/pci.h>
  28. #include <linux/netdevice.h>
  29. #include <linux/etherdevice.h>
  30. #include <linux/if.h>
  31. #include <linux/if_ether.h>
  32. #include <linux/if_vlan.h>
  33. #include <linux/in.h>
  34. #include <linux/ip.h>
  35. #include <linux/ipv6.h>
  36. #include <linux/tcp.h>
  37. #include <linux/rtnetlink.h>
  38. #include <linux/prefetch.h>
  39. #include <net/ip6_checksum.h>
  40. #include <linux/ktime.h>
  41. #ifdef CONFIG_RFS_ACCEL
  42. #include <linux/cpu_rmap.h>
  43. #endif
  44. #ifdef CONFIG_NET_RX_BUSY_POLL
  45. #include <net/busy_poll.h>
  46. #endif
  47. #include <linux/crash_dump.h>
  48. #include "cq_enet_desc.h"
  49. #include "vnic_dev.h"
  50. #include "vnic_intr.h"
  51. #include "vnic_stats.h"
  52. #include "vnic_vic.h"
  53. #include "enic_res.h"
  54. #include "enic.h"
  55. #include "enic_dev.h"
  56. #include "enic_pp.h"
  57. #include "enic_clsf.h"
  58. #define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
  59. #define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
  60. #define MAX_TSO (1 << 16)
  61. #define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
  62. #define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
  63. #define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
  64. #define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */
  65. #define RX_COPYBREAK_DEFAULT 256
  66. /* Supported devices */
  67. static const struct pci_device_id enic_id_table[] = {
  68. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
  69. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
  70. { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
  71. { 0, } /* end of table */
  72. };
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
  75. MODULE_LICENSE("GPL");
  76. MODULE_VERSION(DRV_VERSION);
  77. MODULE_DEVICE_TABLE(pci, enic_id_table);
  78. #define ENIC_LARGE_PKT_THRESHOLD 1000
  79. #define ENIC_MAX_COALESCE_TIMERS 10
  80. /* Interrupt moderation table, which will be used to decide the
  81. * coalescing timer values
  82. * {rx_rate in Mbps, mapping percentage of the range}
  83. */
  84. static struct enic_intr_mod_table mod_table[ENIC_MAX_COALESCE_TIMERS + 1] = {
  85. {4000, 0},
  86. {4400, 10},
  87. {5060, 20},
  88. {5230, 30},
  89. {5540, 40},
  90. {5820, 50},
  91. {6120, 60},
  92. {6435, 70},
  93. {6745, 80},
  94. {7000, 90},
  95. {0xFFFFFFFF, 100}
  96. };
  97. /* This table helps the driver to pick different ranges for rx coalescing
  98. * timer depending on the link speed.
  99. */
  100. static struct enic_intr_mod_range mod_range[ENIC_MAX_LINK_SPEEDS] = {
  101. {0, 0}, /* 0 - 4 Gbps */
  102. {0, 3}, /* 4 - 10 Gbps */
  103. {3, 6}, /* 10 - 40 Gbps */
  104. };
  105. int enic_is_dynamic(struct enic *enic)
  106. {
  107. return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
  108. }
  109. int enic_sriov_enabled(struct enic *enic)
  110. {
  111. return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
  112. }
  113. static int enic_is_sriov_vf(struct enic *enic)
  114. {
  115. return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
  116. }
  117. int enic_is_valid_vf(struct enic *enic, int vf)
  118. {
  119. #ifdef CONFIG_PCI_IOV
  120. return vf >= 0 && vf < enic->num_vfs;
  121. #else
  122. return 0;
  123. #endif
  124. }
  125. static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
  126. {
  127. struct enic *enic = vnic_dev_priv(wq->vdev);
  128. if (buf->sop)
  129. pci_unmap_single(enic->pdev, buf->dma_addr,
  130. buf->len, PCI_DMA_TODEVICE);
  131. else
  132. pci_unmap_page(enic->pdev, buf->dma_addr,
  133. buf->len, PCI_DMA_TODEVICE);
  134. if (buf->os_buf)
  135. dev_kfree_skb_any(buf->os_buf);
  136. }
  137. static void enic_wq_free_buf(struct vnic_wq *wq,
  138. struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
  139. {
  140. enic_free_wq_buf(wq, buf);
  141. }
  142. static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  143. u8 type, u16 q_number, u16 completed_index, void *opaque)
  144. {
  145. struct enic *enic = vnic_dev_priv(vdev);
  146. spin_lock(&enic->wq_lock[q_number]);
  147. vnic_wq_service(&enic->wq[q_number], cq_desc,
  148. completed_index, enic_wq_free_buf,
  149. opaque);
  150. if (netif_tx_queue_stopped(netdev_get_tx_queue(enic->netdev, q_number)) &&
  151. vnic_wq_desc_avail(&enic->wq[q_number]) >=
  152. (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
  153. netif_wake_subqueue(enic->netdev, q_number);
  154. spin_unlock(&enic->wq_lock[q_number]);
  155. return 0;
  156. }
  157. static void enic_log_q_error(struct enic *enic)
  158. {
  159. unsigned int i;
  160. u32 error_status;
  161. for (i = 0; i < enic->wq_count; i++) {
  162. error_status = vnic_wq_error_status(&enic->wq[i]);
  163. if (error_status)
  164. netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
  165. i, error_status);
  166. }
  167. for (i = 0; i < enic->rq_count; i++) {
  168. error_status = vnic_rq_error_status(&enic->rq[i]);
  169. if (error_status)
  170. netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
  171. i, error_status);
  172. }
  173. }
  174. static void enic_msglvl_check(struct enic *enic)
  175. {
  176. u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
  177. if (msg_enable != enic->msg_enable) {
  178. netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
  179. enic->msg_enable, msg_enable);
  180. enic->msg_enable = msg_enable;
  181. }
  182. }
  183. static void enic_mtu_check(struct enic *enic)
  184. {
  185. u32 mtu = vnic_dev_mtu(enic->vdev);
  186. struct net_device *netdev = enic->netdev;
  187. if (mtu && mtu != enic->port_mtu) {
  188. enic->port_mtu = mtu;
  189. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
  190. mtu = max_t(int, ENIC_MIN_MTU,
  191. min_t(int, ENIC_MAX_MTU, mtu));
  192. if (mtu != netdev->mtu)
  193. schedule_work(&enic->change_mtu_work);
  194. } else {
  195. if (mtu < netdev->mtu)
  196. netdev_warn(netdev,
  197. "interface MTU (%d) set higher "
  198. "than switch port MTU (%d)\n",
  199. netdev->mtu, mtu);
  200. }
  201. }
  202. }
  203. static void enic_link_check(struct enic *enic)
  204. {
  205. int link_status = vnic_dev_link_status(enic->vdev);
  206. int carrier_ok = netif_carrier_ok(enic->netdev);
  207. if (link_status && !carrier_ok) {
  208. netdev_info(enic->netdev, "Link UP\n");
  209. netif_carrier_on(enic->netdev);
  210. } else if (!link_status && carrier_ok) {
  211. netdev_info(enic->netdev, "Link DOWN\n");
  212. netif_carrier_off(enic->netdev);
  213. }
  214. }
  215. static void enic_notify_check(struct enic *enic)
  216. {
  217. enic_msglvl_check(enic);
  218. enic_mtu_check(enic);
  219. enic_link_check(enic);
  220. }
  221. #define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
  222. static irqreturn_t enic_isr_legacy(int irq, void *data)
  223. {
  224. struct net_device *netdev = data;
  225. struct enic *enic = netdev_priv(netdev);
  226. unsigned int io_intr = enic_legacy_io_intr();
  227. unsigned int err_intr = enic_legacy_err_intr();
  228. unsigned int notify_intr = enic_legacy_notify_intr();
  229. u32 pba;
  230. vnic_intr_mask(&enic->intr[io_intr]);
  231. pba = vnic_intr_legacy_pba(enic->legacy_pba);
  232. if (!pba) {
  233. vnic_intr_unmask(&enic->intr[io_intr]);
  234. return IRQ_NONE; /* not our interrupt */
  235. }
  236. if (ENIC_TEST_INTR(pba, notify_intr)) {
  237. enic_notify_check(enic);
  238. vnic_intr_return_all_credits(&enic->intr[notify_intr]);
  239. }
  240. if (ENIC_TEST_INTR(pba, err_intr)) {
  241. vnic_intr_return_all_credits(&enic->intr[err_intr]);
  242. enic_log_q_error(enic);
  243. /* schedule recovery from WQ/RQ error */
  244. schedule_work(&enic->reset);
  245. return IRQ_HANDLED;
  246. }
  247. if (ENIC_TEST_INTR(pba, io_intr))
  248. napi_schedule_irqoff(&enic->napi[0]);
  249. else
  250. vnic_intr_unmask(&enic->intr[io_intr]);
  251. return IRQ_HANDLED;
  252. }
  253. static irqreturn_t enic_isr_msi(int irq, void *data)
  254. {
  255. struct enic *enic = data;
  256. /* With MSI, there is no sharing of interrupts, so this is
  257. * our interrupt and there is no need to ack it. The device
  258. * is not providing per-vector masking, so the OS will not
  259. * write to PCI config space to mask/unmask the interrupt.
  260. * We're using mask_on_assertion for MSI, so the device
  261. * automatically masks the interrupt when the interrupt is
  262. * generated. Later, when exiting polling, the interrupt
  263. * will be unmasked (see enic_poll).
  264. *
  265. * Also, the device uses the same PCIe Traffic Class (TC)
  266. * for Memory Write data and MSI, so there are no ordering
  267. * issues; the MSI will always arrive at the Root Complex
  268. * _after_ corresponding Memory Writes (i.e. descriptor
  269. * writes).
  270. */
  271. napi_schedule_irqoff(&enic->napi[0]);
  272. return IRQ_HANDLED;
  273. }
  274. static irqreturn_t enic_isr_msix(int irq, void *data)
  275. {
  276. struct napi_struct *napi = data;
  277. napi_schedule_irqoff(napi);
  278. return IRQ_HANDLED;
  279. }
  280. static irqreturn_t enic_isr_msix_err(int irq, void *data)
  281. {
  282. struct enic *enic = data;
  283. unsigned int intr = enic_msix_err_intr(enic);
  284. vnic_intr_return_all_credits(&enic->intr[intr]);
  285. enic_log_q_error(enic);
  286. /* schedule recovery from WQ/RQ error */
  287. schedule_work(&enic->reset);
  288. return IRQ_HANDLED;
  289. }
  290. static irqreturn_t enic_isr_msix_notify(int irq, void *data)
  291. {
  292. struct enic *enic = data;
  293. unsigned int intr = enic_msix_notify_intr(enic);
  294. enic_notify_check(enic);
  295. vnic_intr_return_all_credits(&enic->intr[intr]);
  296. return IRQ_HANDLED;
  297. }
  298. static int enic_queue_wq_skb_cont(struct enic *enic, struct vnic_wq *wq,
  299. struct sk_buff *skb, unsigned int len_left,
  300. int loopback)
  301. {
  302. const skb_frag_t *frag;
  303. dma_addr_t dma_addr;
  304. /* Queue additional data fragments */
  305. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  306. len_left -= skb_frag_size(frag);
  307. dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag, 0,
  308. skb_frag_size(frag),
  309. DMA_TO_DEVICE);
  310. if (unlikely(enic_dma_map_check(enic, dma_addr)))
  311. return -ENOMEM;
  312. enic_queue_wq_desc_cont(wq, skb, dma_addr, skb_frag_size(frag),
  313. (len_left == 0), /* EOP? */
  314. loopback);
  315. }
  316. return 0;
  317. }
  318. static int enic_queue_wq_skb_vlan(struct enic *enic, struct vnic_wq *wq,
  319. struct sk_buff *skb, int vlan_tag_insert,
  320. unsigned int vlan_tag, int loopback)
  321. {
  322. unsigned int head_len = skb_headlen(skb);
  323. unsigned int len_left = skb->len - head_len;
  324. int eop = (len_left == 0);
  325. dma_addr_t dma_addr;
  326. int err = 0;
  327. dma_addr = pci_map_single(enic->pdev, skb->data, head_len,
  328. PCI_DMA_TODEVICE);
  329. if (unlikely(enic_dma_map_check(enic, dma_addr)))
  330. return -ENOMEM;
  331. /* Queue the main skb fragment. The fragments are no larger
  332. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  333. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  334. * per fragment is queued.
  335. */
  336. enic_queue_wq_desc(wq, skb, dma_addr, head_len, vlan_tag_insert,
  337. vlan_tag, eop, loopback);
  338. if (!eop)
  339. err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
  340. return err;
  341. }
  342. static int enic_queue_wq_skb_csum_l4(struct enic *enic, struct vnic_wq *wq,
  343. struct sk_buff *skb, int vlan_tag_insert,
  344. unsigned int vlan_tag, int loopback)
  345. {
  346. unsigned int head_len = skb_headlen(skb);
  347. unsigned int len_left = skb->len - head_len;
  348. unsigned int hdr_len = skb_checksum_start_offset(skb);
  349. unsigned int csum_offset = hdr_len + skb->csum_offset;
  350. int eop = (len_left == 0);
  351. dma_addr_t dma_addr;
  352. int err = 0;
  353. dma_addr = pci_map_single(enic->pdev, skb->data, head_len,
  354. PCI_DMA_TODEVICE);
  355. if (unlikely(enic_dma_map_check(enic, dma_addr)))
  356. return -ENOMEM;
  357. /* Queue the main skb fragment. The fragments are no larger
  358. * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
  359. * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
  360. * per fragment is queued.
  361. */
  362. enic_queue_wq_desc_csum_l4(wq, skb, dma_addr, head_len, csum_offset,
  363. hdr_len, vlan_tag_insert, vlan_tag, eop,
  364. loopback);
  365. if (!eop)
  366. err = enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
  367. return err;
  368. }
  369. static int enic_queue_wq_skb_tso(struct enic *enic, struct vnic_wq *wq,
  370. struct sk_buff *skb, unsigned int mss,
  371. int vlan_tag_insert, unsigned int vlan_tag,
  372. int loopback)
  373. {
  374. unsigned int frag_len_left = skb_headlen(skb);
  375. unsigned int len_left = skb->len - frag_len_left;
  376. unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  377. int eop = (len_left == 0);
  378. unsigned int len;
  379. dma_addr_t dma_addr;
  380. unsigned int offset = 0;
  381. skb_frag_t *frag;
  382. /* Preload TCP csum field with IP pseudo hdr calculated
  383. * with IP length set to zero. HW will later add in length
  384. * to each TCP segment resulting from the TSO.
  385. */
  386. if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
  387. ip_hdr(skb)->check = 0;
  388. tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
  389. ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  390. } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
  391. tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  392. &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
  393. }
  394. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  395. * for the main skb fragment
  396. */
  397. while (frag_len_left) {
  398. len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
  399. dma_addr = pci_map_single(enic->pdev, skb->data + offset, len,
  400. PCI_DMA_TODEVICE);
  401. if (unlikely(enic_dma_map_check(enic, dma_addr)))
  402. return -ENOMEM;
  403. enic_queue_wq_desc_tso(wq, skb, dma_addr, len, mss, hdr_len,
  404. vlan_tag_insert, vlan_tag,
  405. eop && (len == frag_len_left), loopback);
  406. frag_len_left -= len;
  407. offset += len;
  408. }
  409. if (eop)
  410. return 0;
  411. /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
  412. * for additional data fragments
  413. */
  414. for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
  415. len_left -= skb_frag_size(frag);
  416. frag_len_left = skb_frag_size(frag);
  417. offset = 0;
  418. while (frag_len_left) {
  419. len = min(frag_len_left,
  420. (unsigned int)WQ_ENET_MAX_DESC_LEN);
  421. dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
  422. offset, len,
  423. DMA_TO_DEVICE);
  424. if (unlikely(enic_dma_map_check(enic, dma_addr)))
  425. return -ENOMEM;
  426. enic_queue_wq_desc_cont(wq, skb, dma_addr, len,
  427. (len_left == 0) &&
  428. (len == frag_len_left),/*EOP*/
  429. loopback);
  430. frag_len_left -= len;
  431. offset += len;
  432. }
  433. }
  434. return 0;
  435. }
  436. static inline void enic_queue_wq_skb(struct enic *enic,
  437. struct vnic_wq *wq, struct sk_buff *skb)
  438. {
  439. unsigned int mss = skb_shinfo(skb)->gso_size;
  440. unsigned int vlan_tag = 0;
  441. int vlan_tag_insert = 0;
  442. int loopback = 0;
  443. int err;
  444. if (skb_vlan_tag_present(skb)) {
  445. /* VLAN tag from trunking driver */
  446. vlan_tag_insert = 1;
  447. vlan_tag = skb_vlan_tag_get(skb);
  448. } else if (enic->loop_enable) {
  449. vlan_tag = enic->loop_tag;
  450. loopback = 1;
  451. }
  452. if (mss)
  453. err = enic_queue_wq_skb_tso(enic, wq, skb, mss,
  454. vlan_tag_insert, vlan_tag,
  455. loopback);
  456. else if (skb->ip_summed == CHECKSUM_PARTIAL)
  457. err = enic_queue_wq_skb_csum_l4(enic, wq, skb, vlan_tag_insert,
  458. vlan_tag, loopback);
  459. else
  460. err = enic_queue_wq_skb_vlan(enic, wq, skb, vlan_tag_insert,
  461. vlan_tag, loopback);
  462. if (unlikely(err)) {
  463. struct vnic_wq_buf *buf;
  464. buf = wq->to_use->prev;
  465. /* while not EOP of previous pkt && queue not empty.
  466. * For all non EOP bufs, os_buf is NULL.
  467. */
  468. while (!buf->os_buf && (buf->next != wq->to_clean)) {
  469. enic_free_wq_buf(wq, buf);
  470. wq->ring.desc_avail++;
  471. buf = buf->prev;
  472. }
  473. wq->to_use = buf->next;
  474. dev_kfree_skb(skb);
  475. }
  476. }
  477. /* netif_tx_lock held, process context with BHs disabled, or BH */
  478. static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
  479. struct net_device *netdev)
  480. {
  481. struct enic *enic = netdev_priv(netdev);
  482. struct vnic_wq *wq;
  483. unsigned int txq_map;
  484. struct netdev_queue *txq;
  485. if (skb->len <= 0) {
  486. dev_kfree_skb_any(skb);
  487. return NETDEV_TX_OK;
  488. }
  489. txq_map = skb_get_queue_mapping(skb) % enic->wq_count;
  490. wq = &enic->wq[txq_map];
  491. txq = netdev_get_tx_queue(netdev, txq_map);
  492. /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
  493. * which is very likely. In the off chance it's going to take
  494. * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
  495. */
  496. if (skb_shinfo(skb)->gso_size == 0 &&
  497. skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
  498. skb_linearize(skb)) {
  499. dev_kfree_skb_any(skb);
  500. return NETDEV_TX_OK;
  501. }
  502. spin_lock(&enic->wq_lock[txq_map]);
  503. if (vnic_wq_desc_avail(wq) <
  504. skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
  505. netif_tx_stop_queue(txq);
  506. /* This is a hard error, log it */
  507. netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
  508. spin_unlock(&enic->wq_lock[txq_map]);
  509. return NETDEV_TX_BUSY;
  510. }
  511. enic_queue_wq_skb(enic, wq, skb);
  512. if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
  513. netif_tx_stop_queue(txq);
  514. if (!skb->xmit_more || netif_xmit_stopped(txq))
  515. vnic_wq_doorbell(wq);
  516. spin_unlock(&enic->wq_lock[txq_map]);
  517. return NETDEV_TX_OK;
  518. }
  519. /* dev_base_lock rwlock held, nominally process context */
  520. static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
  521. struct rtnl_link_stats64 *net_stats)
  522. {
  523. struct enic *enic = netdev_priv(netdev);
  524. struct vnic_stats *stats;
  525. enic_dev_stats_dump(enic, &stats);
  526. net_stats->tx_packets = stats->tx.tx_frames_ok;
  527. net_stats->tx_bytes = stats->tx.tx_bytes_ok;
  528. net_stats->tx_errors = stats->tx.tx_errors;
  529. net_stats->tx_dropped = stats->tx.tx_drops;
  530. net_stats->rx_packets = stats->rx.rx_frames_ok;
  531. net_stats->rx_bytes = stats->rx.rx_bytes_ok;
  532. net_stats->rx_errors = stats->rx.rx_errors;
  533. net_stats->multicast = stats->rx.rx_multicast_frames_ok;
  534. net_stats->rx_over_errors = enic->rq_truncated_pkts;
  535. net_stats->rx_crc_errors = enic->rq_bad_fcs;
  536. net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
  537. return net_stats;
  538. }
  539. static int enic_mc_sync(struct net_device *netdev, const u8 *mc_addr)
  540. {
  541. struct enic *enic = netdev_priv(netdev);
  542. if (enic->mc_count == ENIC_MULTICAST_PERFECT_FILTERS) {
  543. unsigned int mc_count = netdev_mc_count(netdev);
  544. netdev_warn(netdev, "Registering only %d out of %d multicast addresses\n",
  545. ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
  546. return -ENOSPC;
  547. }
  548. enic_dev_add_addr(enic, mc_addr);
  549. enic->mc_count++;
  550. return 0;
  551. }
  552. static int enic_mc_unsync(struct net_device *netdev, const u8 *mc_addr)
  553. {
  554. struct enic *enic = netdev_priv(netdev);
  555. enic_dev_del_addr(enic, mc_addr);
  556. enic->mc_count--;
  557. return 0;
  558. }
  559. static int enic_uc_sync(struct net_device *netdev, const u8 *uc_addr)
  560. {
  561. struct enic *enic = netdev_priv(netdev);
  562. if (enic->uc_count == ENIC_UNICAST_PERFECT_FILTERS) {
  563. unsigned int uc_count = netdev_uc_count(netdev);
  564. netdev_warn(netdev, "Registering only %d out of %d unicast addresses\n",
  565. ENIC_UNICAST_PERFECT_FILTERS, uc_count);
  566. return -ENOSPC;
  567. }
  568. enic_dev_add_addr(enic, uc_addr);
  569. enic->uc_count++;
  570. return 0;
  571. }
  572. static int enic_uc_unsync(struct net_device *netdev, const u8 *uc_addr)
  573. {
  574. struct enic *enic = netdev_priv(netdev);
  575. enic_dev_del_addr(enic, uc_addr);
  576. enic->uc_count--;
  577. return 0;
  578. }
  579. void enic_reset_addr_lists(struct enic *enic)
  580. {
  581. struct net_device *netdev = enic->netdev;
  582. __dev_uc_unsync(netdev, NULL);
  583. __dev_mc_unsync(netdev, NULL);
  584. enic->mc_count = 0;
  585. enic->uc_count = 0;
  586. enic->flags = 0;
  587. }
  588. static int enic_set_mac_addr(struct net_device *netdev, char *addr)
  589. {
  590. struct enic *enic = netdev_priv(netdev);
  591. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
  592. if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
  593. return -EADDRNOTAVAIL;
  594. } else {
  595. if (!is_valid_ether_addr(addr))
  596. return -EADDRNOTAVAIL;
  597. }
  598. memcpy(netdev->dev_addr, addr, netdev->addr_len);
  599. return 0;
  600. }
  601. static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
  602. {
  603. struct enic *enic = netdev_priv(netdev);
  604. struct sockaddr *saddr = p;
  605. char *addr = saddr->sa_data;
  606. int err;
  607. if (netif_running(enic->netdev)) {
  608. err = enic_dev_del_station_addr(enic);
  609. if (err)
  610. return err;
  611. }
  612. err = enic_set_mac_addr(netdev, addr);
  613. if (err)
  614. return err;
  615. if (netif_running(enic->netdev)) {
  616. err = enic_dev_add_station_addr(enic);
  617. if (err)
  618. return err;
  619. }
  620. return err;
  621. }
  622. static int enic_set_mac_address(struct net_device *netdev, void *p)
  623. {
  624. struct sockaddr *saddr = p;
  625. char *addr = saddr->sa_data;
  626. struct enic *enic = netdev_priv(netdev);
  627. int err;
  628. err = enic_dev_del_station_addr(enic);
  629. if (err)
  630. return err;
  631. err = enic_set_mac_addr(netdev, addr);
  632. if (err)
  633. return err;
  634. return enic_dev_add_station_addr(enic);
  635. }
  636. /* netif_tx_lock held, BHs disabled */
  637. static void enic_set_rx_mode(struct net_device *netdev)
  638. {
  639. struct enic *enic = netdev_priv(netdev);
  640. int directed = 1;
  641. int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
  642. int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
  643. int promisc = (netdev->flags & IFF_PROMISC) ||
  644. netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
  645. int allmulti = (netdev->flags & IFF_ALLMULTI) ||
  646. netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
  647. unsigned int flags = netdev->flags |
  648. (allmulti ? IFF_ALLMULTI : 0) |
  649. (promisc ? IFF_PROMISC : 0);
  650. if (enic->flags != flags) {
  651. enic->flags = flags;
  652. enic_dev_packet_filter(enic, directed,
  653. multicast, broadcast, promisc, allmulti);
  654. }
  655. if (!promisc) {
  656. __dev_uc_sync(netdev, enic_uc_sync, enic_uc_unsync);
  657. if (!allmulti)
  658. __dev_mc_sync(netdev, enic_mc_sync, enic_mc_unsync);
  659. }
  660. }
  661. /* netif_tx_lock held, BHs disabled */
  662. static void enic_tx_timeout(struct net_device *netdev)
  663. {
  664. struct enic *enic = netdev_priv(netdev);
  665. schedule_work(&enic->reset);
  666. }
  667. static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
  668. {
  669. struct enic *enic = netdev_priv(netdev);
  670. struct enic_port_profile *pp;
  671. int err;
  672. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  673. if (err)
  674. return err;
  675. if (is_valid_ether_addr(mac) || is_zero_ether_addr(mac)) {
  676. if (vf == PORT_SELF_VF) {
  677. memcpy(pp->vf_mac, mac, ETH_ALEN);
  678. return 0;
  679. } else {
  680. /*
  681. * For sriov vf's set the mac in hw
  682. */
  683. ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
  684. vnic_dev_set_mac_addr, mac);
  685. return enic_dev_status_to_errno(err);
  686. }
  687. } else
  688. return -EINVAL;
  689. }
  690. static int enic_set_vf_port(struct net_device *netdev, int vf,
  691. struct nlattr *port[])
  692. {
  693. struct enic *enic = netdev_priv(netdev);
  694. struct enic_port_profile prev_pp;
  695. struct enic_port_profile *pp;
  696. int err = 0, restore_pp = 1;
  697. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  698. if (err)
  699. return err;
  700. if (!port[IFLA_PORT_REQUEST])
  701. return -EOPNOTSUPP;
  702. memcpy(&prev_pp, pp, sizeof(*enic->pp));
  703. memset(pp, 0, sizeof(*enic->pp));
  704. pp->set |= ENIC_SET_REQUEST;
  705. pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]);
  706. if (port[IFLA_PORT_PROFILE]) {
  707. pp->set |= ENIC_SET_NAME;
  708. memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]),
  709. PORT_PROFILE_MAX);
  710. }
  711. if (port[IFLA_PORT_INSTANCE_UUID]) {
  712. pp->set |= ENIC_SET_INSTANCE;
  713. memcpy(pp->instance_uuid,
  714. nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
  715. }
  716. if (port[IFLA_PORT_HOST_UUID]) {
  717. pp->set |= ENIC_SET_HOST;
  718. memcpy(pp->host_uuid,
  719. nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
  720. }
  721. if (vf == PORT_SELF_VF) {
  722. /* Special case handling: mac came from IFLA_VF_MAC */
  723. if (!is_zero_ether_addr(prev_pp.vf_mac))
  724. memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN);
  725. if (is_zero_ether_addr(netdev->dev_addr))
  726. eth_hw_addr_random(netdev);
  727. } else {
  728. /* SR-IOV VF: get mac from adapter */
  729. ENIC_DEVCMD_PROXY_BY_INDEX(vf, err, enic,
  730. vnic_dev_get_mac_addr, pp->mac_addr);
  731. if (err) {
  732. netdev_err(netdev, "Error getting mac for vf %d\n", vf);
  733. memcpy(pp, &prev_pp, sizeof(*pp));
  734. return enic_dev_status_to_errno(err);
  735. }
  736. }
  737. err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp);
  738. if (err) {
  739. if (restore_pp) {
  740. /* Things are still the way they were: Implicit
  741. * DISASSOCIATE failed
  742. */
  743. memcpy(pp, &prev_pp, sizeof(*pp));
  744. } else {
  745. memset(pp, 0, sizeof(*pp));
  746. if (vf == PORT_SELF_VF)
  747. eth_zero_addr(netdev->dev_addr);
  748. }
  749. } else {
  750. /* Set flag to indicate that the port assoc/disassoc
  751. * request has been sent out to fw
  752. */
  753. pp->set |= ENIC_PORT_REQUEST_APPLIED;
  754. /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
  755. if (pp->request == PORT_REQUEST_DISASSOCIATE) {
  756. eth_zero_addr(pp->mac_addr);
  757. if (vf == PORT_SELF_VF)
  758. eth_zero_addr(netdev->dev_addr);
  759. }
  760. }
  761. if (vf == PORT_SELF_VF)
  762. eth_zero_addr(pp->vf_mac);
  763. return err;
  764. }
  765. static int enic_get_vf_port(struct net_device *netdev, int vf,
  766. struct sk_buff *skb)
  767. {
  768. struct enic *enic = netdev_priv(netdev);
  769. u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
  770. struct enic_port_profile *pp;
  771. int err;
  772. ENIC_PP_BY_INDEX(enic, vf, pp, &err);
  773. if (err)
  774. return err;
  775. if (!(pp->set & ENIC_PORT_REQUEST_APPLIED))
  776. return -ENODATA;
  777. err = enic_process_get_pp_request(enic, vf, pp->request, &response);
  778. if (err)
  779. return err;
  780. if (nla_put_u16(skb, IFLA_PORT_REQUEST, pp->request) ||
  781. nla_put_u16(skb, IFLA_PORT_RESPONSE, response) ||
  782. ((pp->set & ENIC_SET_NAME) &&
  783. nla_put(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX, pp->name)) ||
  784. ((pp->set & ENIC_SET_INSTANCE) &&
  785. nla_put(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
  786. pp->instance_uuid)) ||
  787. ((pp->set & ENIC_SET_HOST) &&
  788. nla_put(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX, pp->host_uuid)))
  789. goto nla_put_failure;
  790. return 0;
  791. nla_put_failure:
  792. return -EMSGSIZE;
  793. }
  794. static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
  795. {
  796. struct enic *enic = vnic_dev_priv(rq->vdev);
  797. if (!buf->os_buf)
  798. return;
  799. pci_unmap_single(enic->pdev, buf->dma_addr,
  800. buf->len, PCI_DMA_FROMDEVICE);
  801. dev_kfree_skb_any(buf->os_buf);
  802. buf->os_buf = NULL;
  803. }
  804. static int enic_rq_alloc_buf(struct vnic_rq *rq)
  805. {
  806. struct enic *enic = vnic_dev_priv(rq->vdev);
  807. struct net_device *netdev = enic->netdev;
  808. struct sk_buff *skb;
  809. unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
  810. unsigned int os_buf_index = 0;
  811. dma_addr_t dma_addr;
  812. struct vnic_rq_buf *buf = rq->to_use;
  813. if (buf->os_buf) {
  814. enic_queue_rq_desc(rq, buf->os_buf, os_buf_index, buf->dma_addr,
  815. buf->len);
  816. return 0;
  817. }
  818. skb = netdev_alloc_skb_ip_align(netdev, len);
  819. if (!skb)
  820. return -ENOMEM;
  821. dma_addr = pci_map_single(enic->pdev, skb->data, len,
  822. PCI_DMA_FROMDEVICE);
  823. if (unlikely(enic_dma_map_check(enic, dma_addr))) {
  824. dev_kfree_skb(skb);
  825. return -ENOMEM;
  826. }
  827. enic_queue_rq_desc(rq, skb, os_buf_index,
  828. dma_addr, len);
  829. return 0;
  830. }
  831. static void enic_intr_update_pkt_size(struct vnic_rx_bytes_counter *pkt_size,
  832. u32 pkt_len)
  833. {
  834. if (ENIC_LARGE_PKT_THRESHOLD <= pkt_len)
  835. pkt_size->large_pkt_bytes_cnt += pkt_len;
  836. else
  837. pkt_size->small_pkt_bytes_cnt += pkt_len;
  838. }
  839. static bool enic_rxcopybreak(struct net_device *netdev, struct sk_buff **skb,
  840. struct vnic_rq_buf *buf, u16 len)
  841. {
  842. struct enic *enic = netdev_priv(netdev);
  843. struct sk_buff *new_skb;
  844. if (len > enic->rx_copybreak)
  845. return false;
  846. new_skb = netdev_alloc_skb_ip_align(netdev, len);
  847. if (!new_skb)
  848. return false;
  849. pci_dma_sync_single_for_cpu(enic->pdev, buf->dma_addr, len,
  850. DMA_FROM_DEVICE);
  851. memcpy(new_skb->data, (*skb)->data, len);
  852. *skb = new_skb;
  853. return true;
  854. }
  855. static void enic_rq_indicate_buf(struct vnic_rq *rq,
  856. struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
  857. int skipped, void *opaque)
  858. {
  859. struct enic *enic = vnic_dev_priv(rq->vdev);
  860. struct net_device *netdev = enic->netdev;
  861. struct sk_buff *skb;
  862. struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
  863. u8 type, color, eop, sop, ingress_port, vlan_stripped;
  864. u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
  865. u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
  866. u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
  867. u8 packet_error;
  868. u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
  869. u32 rss_hash;
  870. if (skipped)
  871. return;
  872. skb = buf->os_buf;
  873. cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
  874. &type, &color, &q_number, &completed_index,
  875. &ingress_port, &fcoe, &eop, &sop, &rss_type,
  876. &csum_not_calc, &rss_hash, &bytes_written,
  877. &packet_error, &vlan_stripped, &vlan_tci, &checksum,
  878. &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
  879. &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
  880. &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
  881. &fcs_ok);
  882. if (packet_error) {
  883. if (!fcs_ok) {
  884. if (bytes_written > 0)
  885. enic->rq_bad_fcs++;
  886. else if (bytes_written == 0)
  887. enic->rq_truncated_pkts++;
  888. }
  889. pci_unmap_single(enic->pdev, buf->dma_addr, buf->len,
  890. PCI_DMA_FROMDEVICE);
  891. dev_kfree_skb_any(skb);
  892. buf->os_buf = NULL;
  893. return;
  894. }
  895. if (eop && bytes_written > 0) {
  896. /* Good receive
  897. */
  898. if (!enic_rxcopybreak(netdev, &skb, buf, bytes_written)) {
  899. buf->os_buf = NULL;
  900. pci_unmap_single(enic->pdev, buf->dma_addr, buf->len,
  901. PCI_DMA_FROMDEVICE);
  902. }
  903. prefetch(skb->data - NET_IP_ALIGN);
  904. skb_put(skb, bytes_written);
  905. skb->protocol = eth_type_trans(skb, netdev);
  906. skb_record_rx_queue(skb, q_number);
  907. if (netdev->features & NETIF_F_RXHASH) {
  908. skb_set_hash(skb, rss_hash,
  909. (rss_type &
  910. (NIC_CFG_RSS_HASH_TYPE_TCP_IPV6_EX |
  911. NIC_CFG_RSS_HASH_TYPE_TCP_IPV6 |
  912. NIC_CFG_RSS_HASH_TYPE_TCP_IPV4)) ?
  913. PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
  914. }
  915. /* Hardware does not provide whole packet checksum. It only
  916. * provides pseudo checksum. Since hw validates the packet
  917. * checksum but not provide us the checksum value. use
  918. * CHECSUM_UNNECESSARY.
  919. */
  920. if ((netdev->features & NETIF_F_RXCSUM) && tcp_udp_csum_ok &&
  921. ipv4_csum_ok)
  922. skb->ip_summed = CHECKSUM_UNNECESSARY;
  923. if (vlan_stripped)
  924. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tci);
  925. skb_mark_napi_id(skb, &enic->napi[rq->index]);
  926. if (enic_poll_busy_polling(rq) ||
  927. !(netdev->features & NETIF_F_GRO))
  928. netif_receive_skb(skb);
  929. else
  930. napi_gro_receive(&enic->napi[q_number], skb);
  931. if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
  932. enic_intr_update_pkt_size(&cq->pkt_size_counter,
  933. bytes_written);
  934. } else {
  935. /* Buffer overflow
  936. */
  937. pci_unmap_single(enic->pdev, buf->dma_addr, buf->len,
  938. PCI_DMA_FROMDEVICE);
  939. dev_kfree_skb_any(skb);
  940. buf->os_buf = NULL;
  941. }
  942. }
  943. static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
  944. u8 type, u16 q_number, u16 completed_index, void *opaque)
  945. {
  946. struct enic *enic = vnic_dev_priv(vdev);
  947. vnic_rq_service(&enic->rq[q_number], cq_desc,
  948. completed_index, VNIC_RQ_RETURN_DESC,
  949. enic_rq_indicate_buf, opaque);
  950. return 0;
  951. }
  952. static int enic_poll(struct napi_struct *napi, int budget)
  953. {
  954. struct net_device *netdev = napi->dev;
  955. struct enic *enic = netdev_priv(netdev);
  956. unsigned int cq_rq = enic_cq_rq(enic, 0);
  957. unsigned int cq_wq = enic_cq_wq(enic, 0);
  958. unsigned int intr = enic_legacy_io_intr();
  959. unsigned int rq_work_to_do = budget;
  960. unsigned int wq_work_to_do = -1; /* no limit */
  961. unsigned int work_done, rq_work_done = 0, wq_work_done;
  962. int err;
  963. wq_work_done = vnic_cq_service(&enic->cq[cq_wq], wq_work_to_do,
  964. enic_wq_service, NULL);
  965. if (!enic_poll_lock_napi(&enic->rq[cq_rq])) {
  966. if (wq_work_done > 0)
  967. vnic_intr_return_credits(&enic->intr[intr],
  968. wq_work_done,
  969. 0 /* dont unmask intr */,
  970. 0 /* dont reset intr timer */);
  971. return rq_work_done;
  972. }
  973. if (budget > 0)
  974. rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
  975. rq_work_to_do, enic_rq_service, NULL);
  976. /* Accumulate intr event credits for this polling
  977. * cycle. An intr event is the completion of a
  978. * a WQ or RQ packet.
  979. */
  980. work_done = rq_work_done + wq_work_done;
  981. if (work_done > 0)
  982. vnic_intr_return_credits(&enic->intr[intr],
  983. work_done,
  984. 0 /* don't unmask intr */,
  985. 0 /* don't reset intr timer */);
  986. err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
  987. /* Buffer allocation failed. Stay in polling
  988. * mode so we can try to fill the ring again.
  989. */
  990. if (err)
  991. rq_work_done = rq_work_to_do;
  992. if (rq_work_done < rq_work_to_do) {
  993. /* Some work done, but not enough to stay in polling,
  994. * exit polling
  995. */
  996. napi_complete(napi);
  997. vnic_intr_unmask(&enic->intr[intr]);
  998. }
  999. enic_poll_unlock_napi(&enic->rq[cq_rq]);
  1000. return rq_work_done;
  1001. }
  1002. static void enic_set_int_moderation(struct enic *enic, struct vnic_rq *rq)
  1003. {
  1004. unsigned int intr = enic_msix_rq_intr(enic, rq->index);
  1005. struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
  1006. u32 timer = cq->tobe_rx_coal_timeval;
  1007. if (cq->tobe_rx_coal_timeval != cq->cur_rx_coal_timeval) {
  1008. vnic_intr_coalescing_timer_set(&enic->intr[intr], timer);
  1009. cq->cur_rx_coal_timeval = cq->tobe_rx_coal_timeval;
  1010. }
  1011. }
  1012. static void enic_calc_int_moderation(struct enic *enic, struct vnic_rq *rq)
  1013. {
  1014. struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting;
  1015. struct vnic_cq *cq = &enic->cq[enic_cq_rq(enic, rq->index)];
  1016. struct vnic_rx_bytes_counter *pkt_size_counter = &cq->pkt_size_counter;
  1017. int index;
  1018. u32 timer;
  1019. u32 range_start;
  1020. u32 traffic;
  1021. u64 delta;
  1022. ktime_t now = ktime_get();
  1023. delta = ktime_us_delta(now, cq->prev_ts);
  1024. if (delta < ENIC_AIC_TS_BREAK)
  1025. return;
  1026. cq->prev_ts = now;
  1027. traffic = pkt_size_counter->large_pkt_bytes_cnt +
  1028. pkt_size_counter->small_pkt_bytes_cnt;
  1029. /* The table takes Mbps
  1030. * traffic *= 8 => bits
  1031. * traffic *= (10^6 / delta) => bps
  1032. * traffic /= 10^6 => Mbps
  1033. *
  1034. * Combining, traffic *= (8 / delta)
  1035. */
  1036. traffic <<= 3;
  1037. traffic = delta > UINT_MAX ? 0 : traffic / (u32)delta;
  1038. for (index = 0; index < ENIC_MAX_COALESCE_TIMERS; index++)
  1039. if (traffic < mod_table[index].rx_rate)
  1040. break;
  1041. range_start = (pkt_size_counter->small_pkt_bytes_cnt >
  1042. pkt_size_counter->large_pkt_bytes_cnt << 1) ?
  1043. rx_coal->small_pkt_range_start :
  1044. rx_coal->large_pkt_range_start;
  1045. timer = range_start + ((rx_coal->range_end - range_start) *
  1046. mod_table[index].range_percent / 100);
  1047. /* Damping */
  1048. cq->tobe_rx_coal_timeval = (timer + cq->tobe_rx_coal_timeval) >> 1;
  1049. pkt_size_counter->large_pkt_bytes_cnt = 0;
  1050. pkt_size_counter->small_pkt_bytes_cnt = 0;
  1051. }
  1052. #ifdef CONFIG_RFS_ACCEL
  1053. static void enic_free_rx_cpu_rmap(struct enic *enic)
  1054. {
  1055. free_irq_cpu_rmap(enic->netdev->rx_cpu_rmap);
  1056. enic->netdev->rx_cpu_rmap = NULL;
  1057. }
  1058. static void enic_set_rx_cpu_rmap(struct enic *enic)
  1059. {
  1060. int i, res;
  1061. if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX) {
  1062. enic->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(enic->rq_count);
  1063. if (unlikely(!enic->netdev->rx_cpu_rmap))
  1064. return;
  1065. for (i = 0; i < enic->rq_count; i++) {
  1066. res = irq_cpu_rmap_add(enic->netdev->rx_cpu_rmap,
  1067. enic->msix_entry[i].vector);
  1068. if (unlikely(res)) {
  1069. enic_free_rx_cpu_rmap(enic);
  1070. return;
  1071. }
  1072. }
  1073. }
  1074. }
  1075. #else
  1076. static void enic_free_rx_cpu_rmap(struct enic *enic)
  1077. {
  1078. }
  1079. static void enic_set_rx_cpu_rmap(struct enic *enic)
  1080. {
  1081. }
  1082. #endif /* CONFIG_RFS_ACCEL */
  1083. #ifdef CONFIG_NET_RX_BUSY_POLL
  1084. static int enic_busy_poll(struct napi_struct *napi)
  1085. {
  1086. struct net_device *netdev = napi->dev;
  1087. struct enic *enic = netdev_priv(netdev);
  1088. unsigned int rq = (napi - &enic->napi[0]);
  1089. unsigned int cq = enic_cq_rq(enic, rq);
  1090. unsigned int intr = enic_msix_rq_intr(enic, rq);
  1091. unsigned int work_to_do = -1; /* clean all pkts possible */
  1092. unsigned int work_done;
  1093. if (!enic_poll_lock_poll(&enic->rq[rq]))
  1094. return LL_FLUSH_BUSY;
  1095. work_done = vnic_cq_service(&enic->cq[cq], work_to_do,
  1096. enic_rq_service, NULL);
  1097. if (work_done > 0)
  1098. vnic_intr_return_credits(&enic->intr[intr],
  1099. work_done, 0, 0);
  1100. vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
  1101. if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
  1102. enic_calc_int_moderation(enic, &enic->rq[rq]);
  1103. enic_poll_unlock_poll(&enic->rq[rq]);
  1104. return work_done;
  1105. }
  1106. #endif /* CONFIG_NET_RX_BUSY_POLL */
  1107. static int enic_poll_msix_wq(struct napi_struct *napi, int budget)
  1108. {
  1109. struct net_device *netdev = napi->dev;
  1110. struct enic *enic = netdev_priv(netdev);
  1111. unsigned int wq_index = (napi - &enic->napi[0]) - enic->rq_count;
  1112. struct vnic_wq *wq = &enic->wq[wq_index];
  1113. unsigned int cq;
  1114. unsigned int intr;
  1115. unsigned int wq_work_to_do = -1; /* clean all desc possible */
  1116. unsigned int wq_work_done;
  1117. unsigned int wq_irq;
  1118. wq_irq = wq->index;
  1119. cq = enic_cq_wq(enic, wq_irq);
  1120. intr = enic_msix_wq_intr(enic, wq_irq);
  1121. wq_work_done = vnic_cq_service(&enic->cq[cq], wq_work_to_do,
  1122. enic_wq_service, NULL);
  1123. vnic_intr_return_credits(&enic->intr[intr], wq_work_done,
  1124. 0 /* don't unmask intr */,
  1125. 1 /* reset intr timer */);
  1126. if (!wq_work_done) {
  1127. napi_complete(napi);
  1128. vnic_intr_unmask(&enic->intr[intr]);
  1129. return 0;
  1130. }
  1131. return budget;
  1132. }
  1133. static int enic_poll_msix_rq(struct napi_struct *napi, int budget)
  1134. {
  1135. struct net_device *netdev = napi->dev;
  1136. struct enic *enic = netdev_priv(netdev);
  1137. unsigned int rq = (napi - &enic->napi[0]);
  1138. unsigned int cq = enic_cq_rq(enic, rq);
  1139. unsigned int intr = enic_msix_rq_intr(enic, rq);
  1140. unsigned int work_to_do = budget;
  1141. unsigned int work_done = 0;
  1142. int err;
  1143. if (!enic_poll_lock_napi(&enic->rq[rq]))
  1144. return budget;
  1145. /* Service RQ
  1146. */
  1147. if (budget > 0)
  1148. work_done = vnic_cq_service(&enic->cq[cq],
  1149. work_to_do, enic_rq_service, NULL);
  1150. /* Return intr event credits for this polling
  1151. * cycle. An intr event is the completion of a
  1152. * RQ packet.
  1153. */
  1154. if (work_done > 0)
  1155. vnic_intr_return_credits(&enic->intr[intr],
  1156. work_done,
  1157. 0 /* don't unmask intr */,
  1158. 0 /* don't reset intr timer */);
  1159. err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
  1160. /* Buffer allocation failed. Stay in polling mode
  1161. * so we can try to fill the ring again.
  1162. */
  1163. if (err)
  1164. work_done = work_to_do;
  1165. if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
  1166. /* Call the function which refreshes
  1167. * the intr coalescing timer value based on
  1168. * the traffic. This is supported only in
  1169. * the case of MSI-x mode
  1170. */
  1171. enic_calc_int_moderation(enic, &enic->rq[rq]);
  1172. if (work_done < work_to_do) {
  1173. /* Some work done, but not enough to stay in polling,
  1174. * exit polling
  1175. */
  1176. napi_complete(napi);
  1177. if (enic->rx_coalesce_setting.use_adaptive_rx_coalesce)
  1178. enic_set_int_moderation(enic, &enic->rq[rq]);
  1179. vnic_intr_unmask(&enic->intr[intr]);
  1180. }
  1181. enic_poll_unlock_napi(&enic->rq[rq]);
  1182. return work_done;
  1183. }
  1184. static void enic_notify_timer(unsigned long data)
  1185. {
  1186. struct enic *enic = (struct enic *)data;
  1187. enic_notify_check(enic);
  1188. mod_timer(&enic->notify_timer,
  1189. round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
  1190. }
  1191. static void enic_free_intr(struct enic *enic)
  1192. {
  1193. struct net_device *netdev = enic->netdev;
  1194. unsigned int i;
  1195. enic_free_rx_cpu_rmap(enic);
  1196. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1197. case VNIC_DEV_INTR_MODE_INTX:
  1198. free_irq(enic->pdev->irq, netdev);
  1199. break;
  1200. case VNIC_DEV_INTR_MODE_MSI:
  1201. free_irq(enic->pdev->irq, enic);
  1202. break;
  1203. case VNIC_DEV_INTR_MODE_MSIX:
  1204. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1205. if (enic->msix[i].requested)
  1206. free_irq(enic->msix_entry[i].vector,
  1207. enic->msix[i].devid);
  1208. break;
  1209. default:
  1210. break;
  1211. }
  1212. }
  1213. static int enic_request_intr(struct enic *enic)
  1214. {
  1215. struct net_device *netdev = enic->netdev;
  1216. unsigned int i, intr;
  1217. int err = 0;
  1218. enic_set_rx_cpu_rmap(enic);
  1219. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1220. case VNIC_DEV_INTR_MODE_INTX:
  1221. err = request_irq(enic->pdev->irq, enic_isr_legacy,
  1222. IRQF_SHARED, netdev->name, netdev);
  1223. break;
  1224. case VNIC_DEV_INTR_MODE_MSI:
  1225. err = request_irq(enic->pdev->irq, enic_isr_msi,
  1226. 0, netdev->name, enic);
  1227. break;
  1228. case VNIC_DEV_INTR_MODE_MSIX:
  1229. for (i = 0; i < enic->rq_count; i++) {
  1230. intr = enic_msix_rq_intr(enic, i);
  1231. snprintf(enic->msix[intr].devname,
  1232. sizeof(enic->msix[intr].devname),
  1233. "%.11s-rx-%d", netdev->name, i);
  1234. enic->msix[intr].isr = enic_isr_msix;
  1235. enic->msix[intr].devid = &enic->napi[i];
  1236. }
  1237. for (i = 0; i < enic->wq_count; i++) {
  1238. int wq = enic_cq_wq(enic, i);
  1239. intr = enic_msix_wq_intr(enic, i);
  1240. snprintf(enic->msix[intr].devname,
  1241. sizeof(enic->msix[intr].devname),
  1242. "%.11s-tx-%d", netdev->name, i);
  1243. enic->msix[intr].isr = enic_isr_msix;
  1244. enic->msix[intr].devid = &enic->napi[wq];
  1245. }
  1246. intr = enic_msix_err_intr(enic);
  1247. snprintf(enic->msix[intr].devname,
  1248. sizeof(enic->msix[intr].devname),
  1249. "%.11s-err", netdev->name);
  1250. enic->msix[intr].isr = enic_isr_msix_err;
  1251. enic->msix[intr].devid = enic;
  1252. intr = enic_msix_notify_intr(enic);
  1253. snprintf(enic->msix[intr].devname,
  1254. sizeof(enic->msix[intr].devname),
  1255. "%.11s-notify", netdev->name);
  1256. enic->msix[intr].isr = enic_isr_msix_notify;
  1257. enic->msix[intr].devid = enic;
  1258. for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
  1259. enic->msix[i].requested = 0;
  1260. for (i = 0; i < enic->intr_count; i++) {
  1261. err = request_irq(enic->msix_entry[i].vector,
  1262. enic->msix[i].isr, 0,
  1263. enic->msix[i].devname,
  1264. enic->msix[i].devid);
  1265. if (err) {
  1266. enic_free_intr(enic);
  1267. break;
  1268. }
  1269. enic->msix[i].requested = 1;
  1270. }
  1271. break;
  1272. default:
  1273. break;
  1274. }
  1275. return err;
  1276. }
  1277. static void enic_synchronize_irqs(struct enic *enic)
  1278. {
  1279. unsigned int i;
  1280. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1281. case VNIC_DEV_INTR_MODE_INTX:
  1282. case VNIC_DEV_INTR_MODE_MSI:
  1283. synchronize_irq(enic->pdev->irq);
  1284. break;
  1285. case VNIC_DEV_INTR_MODE_MSIX:
  1286. for (i = 0; i < enic->intr_count; i++)
  1287. synchronize_irq(enic->msix_entry[i].vector);
  1288. break;
  1289. default:
  1290. break;
  1291. }
  1292. }
  1293. static void enic_set_rx_coal_setting(struct enic *enic)
  1294. {
  1295. unsigned int speed;
  1296. int index = -1;
  1297. struct enic_rx_coal *rx_coal = &enic->rx_coalesce_setting;
  1298. /* If intr mode is not MSIX, do not do adaptive coalescing */
  1299. if (VNIC_DEV_INTR_MODE_MSIX != vnic_dev_get_intr_mode(enic->vdev)) {
  1300. netdev_info(enic->netdev, "INTR mode is not MSIX, Not initializing adaptive coalescing");
  1301. return;
  1302. }
  1303. /* 1. Read the link speed from fw
  1304. * 2. Pick the default range for the speed
  1305. * 3. Update it in enic->rx_coalesce_setting
  1306. */
  1307. speed = vnic_dev_port_speed(enic->vdev);
  1308. if (ENIC_LINK_SPEED_10G < speed)
  1309. index = ENIC_LINK_40G_INDEX;
  1310. else if (ENIC_LINK_SPEED_4G < speed)
  1311. index = ENIC_LINK_10G_INDEX;
  1312. else
  1313. index = ENIC_LINK_4G_INDEX;
  1314. rx_coal->small_pkt_range_start = mod_range[index].small_pkt_range_start;
  1315. rx_coal->large_pkt_range_start = mod_range[index].large_pkt_range_start;
  1316. rx_coal->range_end = ENIC_RX_COALESCE_RANGE_END;
  1317. /* Start with the value provided by UCSM */
  1318. for (index = 0; index < enic->rq_count; index++)
  1319. enic->cq[index].cur_rx_coal_timeval =
  1320. enic->config.intr_timer_usec;
  1321. rx_coal->use_adaptive_rx_coalesce = 1;
  1322. }
  1323. static int enic_dev_notify_set(struct enic *enic)
  1324. {
  1325. int err;
  1326. spin_lock_bh(&enic->devcmd_lock);
  1327. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1328. case VNIC_DEV_INTR_MODE_INTX:
  1329. err = vnic_dev_notify_set(enic->vdev,
  1330. enic_legacy_notify_intr());
  1331. break;
  1332. case VNIC_DEV_INTR_MODE_MSIX:
  1333. err = vnic_dev_notify_set(enic->vdev,
  1334. enic_msix_notify_intr(enic));
  1335. break;
  1336. default:
  1337. err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
  1338. break;
  1339. }
  1340. spin_unlock_bh(&enic->devcmd_lock);
  1341. return err;
  1342. }
  1343. static void enic_notify_timer_start(struct enic *enic)
  1344. {
  1345. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1346. case VNIC_DEV_INTR_MODE_MSI:
  1347. mod_timer(&enic->notify_timer, jiffies);
  1348. break;
  1349. default:
  1350. /* Using intr for notification for INTx/MSI-X */
  1351. break;
  1352. }
  1353. }
  1354. /* rtnl lock is held, process context */
  1355. static int enic_open(struct net_device *netdev)
  1356. {
  1357. struct enic *enic = netdev_priv(netdev);
  1358. unsigned int i;
  1359. int err;
  1360. err = enic_request_intr(enic);
  1361. if (err) {
  1362. netdev_err(netdev, "Unable to request irq.\n");
  1363. return err;
  1364. }
  1365. err = enic_dev_notify_set(enic);
  1366. if (err) {
  1367. netdev_err(netdev,
  1368. "Failed to alloc notify buffer, aborting.\n");
  1369. goto err_out_free_intr;
  1370. }
  1371. for (i = 0; i < enic->rq_count; i++) {
  1372. vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
  1373. /* Need at least one buffer on ring to get going */
  1374. if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
  1375. netdev_err(netdev, "Unable to alloc receive buffers\n");
  1376. err = -ENOMEM;
  1377. goto err_out_free_rq;
  1378. }
  1379. }
  1380. for (i = 0; i < enic->wq_count; i++)
  1381. vnic_wq_enable(&enic->wq[i]);
  1382. for (i = 0; i < enic->rq_count; i++)
  1383. vnic_rq_enable(&enic->rq[i]);
  1384. if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
  1385. enic_dev_add_station_addr(enic);
  1386. enic_set_rx_mode(netdev);
  1387. netif_tx_wake_all_queues(netdev);
  1388. for (i = 0; i < enic->rq_count; i++) {
  1389. enic_busy_poll_init_lock(&enic->rq[i]);
  1390. napi_enable(&enic->napi[i]);
  1391. }
  1392. if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
  1393. for (i = 0; i < enic->wq_count; i++)
  1394. napi_enable(&enic->napi[enic_cq_wq(enic, i)]);
  1395. enic_dev_enable(enic);
  1396. for (i = 0; i < enic->intr_count; i++)
  1397. vnic_intr_unmask(&enic->intr[i]);
  1398. enic_notify_timer_start(enic);
  1399. enic_rfs_flw_tbl_init(enic);
  1400. return 0;
  1401. err_out_free_rq:
  1402. for (i = 0; i < enic->rq_count; i++)
  1403. vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
  1404. enic_dev_notify_unset(enic);
  1405. err_out_free_intr:
  1406. enic_free_intr(enic);
  1407. return err;
  1408. }
  1409. /* rtnl lock is held, process context */
  1410. static int enic_stop(struct net_device *netdev)
  1411. {
  1412. struct enic *enic = netdev_priv(netdev);
  1413. unsigned int i;
  1414. int err;
  1415. for (i = 0; i < enic->intr_count; i++) {
  1416. vnic_intr_mask(&enic->intr[i]);
  1417. (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
  1418. }
  1419. enic_synchronize_irqs(enic);
  1420. del_timer_sync(&enic->notify_timer);
  1421. enic_rfs_flw_tbl_free(enic);
  1422. enic_dev_disable(enic);
  1423. for (i = 0; i < enic->rq_count; i++) {
  1424. napi_disable(&enic->napi[i]);
  1425. local_bh_disable();
  1426. while (!enic_poll_lock_napi(&enic->rq[i]))
  1427. mdelay(1);
  1428. local_bh_enable();
  1429. }
  1430. netif_carrier_off(netdev);
  1431. netif_tx_disable(netdev);
  1432. if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
  1433. for (i = 0; i < enic->wq_count; i++)
  1434. napi_disable(&enic->napi[enic_cq_wq(enic, i)]);
  1435. if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
  1436. enic_dev_del_station_addr(enic);
  1437. for (i = 0; i < enic->wq_count; i++) {
  1438. err = vnic_wq_disable(&enic->wq[i]);
  1439. if (err)
  1440. return err;
  1441. }
  1442. for (i = 0; i < enic->rq_count; i++) {
  1443. err = vnic_rq_disable(&enic->rq[i]);
  1444. if (err)
  1445. return err;
  1446. }
  1447. enic_dev_notify_unset(enic);
  1448. enic_free_intr(enic);
  1449. for (i = 0; i < enic->wq_count; i++)
  1450. vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
  1451. for (i = 0; i < enic->rq_count; i++)
  1452. vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
  1453. for (i = 0; i < enic->cq_count; i++)
  1454. vnic_cq_clean(&enic->cq[i]);
  1455. for (i = 0; i < enic->intr_count; i++)
  1456. vnic_intr_clean(&enic->intr[i]);
  1457. return 0;
  1458. }
  1459. static int enic_change_mtu(struct net_device *netdev, int new_mtu)
  1460. {
  1461. struct enic *enic = netdev_priv(netdev);
  1462. int running = netif_running(netdev);
  1463. if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
  1464. return -EINVAL;
  1465. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
  1466. return -EOPNOTSUPP;
  1467. if (running)
  1468. enic_stop(netdev);
  1469. netdev->mtu = new_mtu;
  1470. if (netdev->mtu > enic->port_mtu)
  1471. netdev_warn(netdev,
  1472. "interface MTU (%d) set higher than port MTU (%d)\n",
  1473. netdev->mtu, enic->port_mtu);
  1474. if (running)
  1475. enic_open(netdev);
  1476. return 0;
  1477. }
  1478. static void enic_change_mtu_work(struct work_struct *work)
  1479. {
  1480. struct enic *enic = container_of(work, struct enic, change_mtu_work);
  1481. struct net_device *netdev = enic->netdev;
  1482. int new_mtu = vnic_dev_mtu(enic->vdev);
  1483. int err;
  1484. unsigned int i;
  1485. new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
  1486. rtnl_lock();
  1487. /* Stop RQ */
  1488. del_timer_sync(&enic->notify_timer);
  1489. for (i = 0; i < enic->rq_count; i++)
  1490. napi_disable(&enic->napi[i]);
  1491. vnic_intr_mask(&enic->intr[0]);
  1492. enic_synchronize_irqs(enic);
  1493. err = vnic_rq_disable(&enic->rq[0]);
  1494. if (err) {
  1495. rtnl_unlock();
  1496. netdev_err(netdev, "Unable to disable RQ.\n");
  1497. return;
  1498. }
  1499. vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
  1500. vnic_cq_clean(&enic->cq[0]);
  1501. vnic_intr_clean(&enic->intr[0]);
  1502. /* Fill RQ with new_mtu-sized buffers */
  1503. netdev->mtu = new_mtu;
  1504. vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
  1505. /* Need at least one buffer on ring to get going */
  1506. if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
  1507. rtnl_unlock();
  1508. netdev_err(netdev, "Unable to alloc receive buffers.\n");
  1509. return;
  1510. }
  1511. /* Start RQ */
  1512. vnic_rq_enable(&enic->rq[0]);
  1513. napi_enable(&enic->napi[0]);
  1514. vnic_intr_unmask(&enic->intr[0]);
  1515. enic_notify_timer_start(enic);
  1516. rtnl_unlock();
  1517. netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
  1518. }
  1519. #ifdef CONFIG_NET_POLL_CONTROLLER
  1520. static void enic_poll_controller(struct net_device *netdev)
  1521. {
  1522. struct enic *enic = netdev_priv(netdev);
  1523. struct vnic_dev *vdev = enic->vdev;
  1524. unsigned int i, intr;
  1525. switch (vnic_dev_get_intr_mode(vdev)) {
  1526. case VNIC_DEV_INTR_MODE_MSIX:
  1527. for (i = 0; i < enic->rq_count; i++) {
  1528. intr = enic_msix_rq_intr(enic, i);
  1529. enic_isr_msix(enic->msix_entry[intr].vector,
  1530. &enic->napi[i]);
  1531. }
  1532. for (i = 0; i < enic->wq_count; i++) {
  1533. intr = enic_msix_wq_intr(enic, i);
  1534. enic_isr_msix(enic->msix_entry[intr].vector,
  1535. &enic->napi[enic_cq_wq(enic, i)]);
  1536. }
  1537. break;
  1538. case VNIC_DEV_INTR_MODE_MSI:
  1539. enic_isr_msi(enic->pdev->irq, enic);
  1540. break;
  1541. case VNIC_DEV_INTR_MODE_INTX:
  1542. enic_isr_legacy(enic->pdev->irq, netdev);
  1543. break;
  1544. default:
  1545. break;
  1546. }
  1547. }
  1548. #endif
  1549. static int enic_dev_wait(struct vnic_dev *vdev,
  1550. int (*start)(struct vnic_dev *, int),
  1551. int (*finished)(struct vnic_dev *, int *),
  1552. int arg)
  1553. {
  1554. unsigned long time;
  1555. int done;
  1556. int err;
  1557. BUG_ON(in_interrupt());
  1558. err = start(vdev, arg);
  1559. if (err)
  1560. return err;
  1561. /* Wait for func to complete...2 seconds max
  1562. */
  1563. time = jiffies + (HZ * 2);
  1564. do {
  1565. err = finished(vdev, &done);
  1566. if (err)
  1567. return err;
  1568. if (done)
  1569. return 0;
  1570. schedule_timeout_uninterruptible(HZ / 10);
  1571. } while (time_after(time, jiffies));
  1572. return -ETIMEDOUT;
  1573. }
  1574. static int enic_dev_open(struct enic *enic)
  1575. {
  1576. int err;
  1577. err = enic_dev_wait(enic->vdev, vnic_dev_open,
  1578. vnic_dev_open_done, 0);
  1579. if (err)
  1580. dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
  1581. err);
  1582. return err;
  1583. }
  1584. static int enic_dev_hang_reset(struct enic *enic)
  1585. {
  1586. int err;
  1587. err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
  1588. vnic_dev_hang_reset_done, 0);
  1589. if (err)
  1590. netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
  1591. err);
  1592. return err;
  1593. }
  1594. int __enic_set_rsskey(struct enic *enic)
  1595. {
  1596. union vnic_rss_key *rss_key_buf_va;
  1597. dma_addr_t rss_key_buf_pa;
  1598. int i, kidx, bidx, err;
  1599. rss_key_buf_va = pci_zalloc_consistent(enic->pdev,
  1600. sizeof(union vnic_rss_key),
  1601. &rss_key_buf_pa);
  1602. if (!rss_key_buf_va)
  1603. return -ENOMEM;
  1604. for (i = 0; i < ENIC_RSS_LEN; i++) {
  1605. kidx = i / ENIC_RSS_BYTES_PER_KEY;
  1606. bidx = i % ENIC_RSS_BYTES_PER_KEY;
  1607. rss_key_buf_va->key[kidx].b[bidx] = enic->rss_key[i];
  1608. }
  1609. spin_lock_bh(&enic->devcmd_lock);
  1610. err = enic_set_rss_key(enic,
  1611. rss_key_buf_pa,
  1612. sizeof(union vnic_rss_key));
  1613. spin_unlock_bh(&enic->devcmd_lock);
  1614. pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
  1615. rss_key_buf_va, rss_key_buf_pa);
  1616. return err;
  1617. }
  1618. static int enic_set_rsskey(struct enic *enic)
  1619. {
  1620. netdev_rss_key_fill(enic->rss_key, ENIC_RSS_LEN);
  1621. return __enic_set_rsskey(enic);
  1622. }
  1623. static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
  1624. {
  1625. dma_addr_t rss_cpu_buf_pa;
  1626. union vnic_rss_cpu *rss_cpu_buf_va = NULL;
  1627. unsigned int i;
  1628. int err;
  1629. rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
  1630. sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
  1631. if (!rss_cpu_buf_va)
  1632. return -ENOMEM;
  1633. for (i = 0; i < (1 << rss_hash_bits); i++)
  1634. (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
  1635. spin_lock_bh(&enic->devcmd_lock);
  1636. err = enic_set_rss_cpu(enic,
  1637. rss_cpu_buf_pa,
  1638. sizeof(union vnic_rss_cpu));
  1639. spin_unlock_bh(&enic->devcmd_lock);
  1640. pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
  1641. rss_cpu_buf_va, rss_cpu_buf_pa);
  1642. return err;
  1643. }
  1644. static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
  1645. u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
  1646. {
  1647. const u8 tso_ipid_split_en = 0;
  1648. const u8 ig_vlan_strip_en = 1;
  1649. int err;
  1650. /* Enable VLAN tag stripping.
  1651. */
  1652. spin_lock_bh(&enic->devcmd_lock);
  1653. err = enic_set_nic_cfg(enic,
  1654. rss_default_cpu, rss_hash_type,
  1655. rss_hash_bits, rss_base_cpu,
  1656. rss_enable, tso_ipid_split_en,
  1657. ig_vlan_strip_en);
  1658. spin_unlock_bh(&enic->devcmd_lock);
  1659. return err;
  1660. }
  1661. static int enic_set_rss_nic_cfg(struct enic *enic)
  1662. {
  1663. struct device *dev = enic_get_dev(enic);
  1664. const u8 rss_default_cpu = 0;
  1665. const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
  1666. NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
  1667. NIC_CFG_RSS_HASH_TYPE_IPV6 |
  1668. NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
  1669. const u8 rss_hash_bits = 7;
  1670. const u8 rss_base_cpu = 0;
  1671. u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
  1672. if (rss_enable) {
  1673. if (!enic_set_rsskey(enic)) {
  1674. if (enic_set_rsscpu(enic, rss_hash_bits)) {
  1675. rss_enable = 0;
  1676. dev_warn(dev, "RSS disabled, "
  1677. "Failed to set RSS cpu indirection table.");
  1678. }
  1679. } else {
  1680. rss_enable = 0;
  1681. dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
  1682. }
  1683. }
  1684. return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
  1685. rss_hash_bits, rss_base_cpu, rss_enable);
  1686. }
  1687. static void enic_reset(struct work_struct *work)
  1688. {
  1689. struct enic *enic = container_of(work, struct enic, reset);
  1690. if (!netif_running(enic->netdev))
  1691. return;
  1692. rtnl_lock();
  1693. spin_lock(&enic->enic_api_lock);
  1694. enic_dev_hang_notify(enic);
  1695. enic_stop(enic->netdev);
  1696. enic_dev_hang_reset(enic);
  1697. enic_reset_addr_lists(enic);
  1698. enic_init_vnic_resources(enic);
  1699. enic_set_rss_nic_cfg(enic);
  1700. enic_dev_set_ig_vlan_rewrite_mode(enic);
  1701. enic_open(enic->netdev);
  1702. spin_unlock(&enic->enic_api_lock);
  1703. call_netdevice_notifiers(NETDEV_REBOOT, enic->netdev);
  1704. rtnl_unlock();
  1705. }
  1706. static int enic_set_intr_mode(struct enic *enic)
  1707. {
  1708. unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
  1709. unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
  1710. unsigned int i;
  1711. /* Set interrupt mode (INTx, MSI, MSI-X) depending
  1712. * on system capabilities.
  1713. *
  1714. * Try MSI-X first
  1715. *
  1716. * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
  1717. * (the second to last INTR is used for WQ/RQ errors)
  1718. * (the last INTR is used for notifications)
  1719. */
  1720. BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
  1721. for (i = 0; i < n + m + 2; i++)
  1722. enic->msix_entry[i].entry = i;
  1723. /* Use multiple RQs if RSS is enabled
  1724. */
  1725. if (ENIC_SETTING(enic, RSS) &&
  1726. enic->config.intr_mode < 1 &&
  1727. enic->rq_count >= n &&
  1728. enic->wq_count >= m &&
  1729. enic->cq_count >= n + m &&
  1730. enic->intr_count >= n + m + 2) {
  1731. if (pci_enable_msix_range(enic->pdev, enic->msix_entry,
  1732. n + m + 2, n + m + 2) > 0) {
  1733. enic->rq_count = n;
  1734. enic->wq_count = m;
  1735. enic->cq_count = n + m;
  1736. enic->intr_count = n + m + 2;
  1737. vnic_dev_set_intr_mode(enic->vdev,
  1738. VNIC_DEV_INTR_MODE_MSIX);
  1739. return 0;
  1740. }
  1741. }
  1742. if (enic->config.intr_mode < 1 &&
  1743. enic->rq_count >= 1 &&
  1744. enic->wq_count >= m &&
  1745. enic->cq_count >= 1 + m &&
  1746. enic->intr_count >= 1 + m + 2) {
  1747. if (pci_enable_msix_range(enic->pdev, enic->msix_entry,
  1748. 1 + m + 2, 1 + m + 2) > 0) {
  1749. enic->rq_count = 1;
  1750. enic->wq_count = m;
  1751. enic->cq_count = 1 + m;
  1752. enic->intr_count = 1 + m + 2;
  1753. vnic_dev_set_intr_mode(enic->vdev,
  1754. VNIC_DEV_INTR_MODE_MSIX);
  1755. return 0;
  1756. }
  1757. }
  1758. /* Next try MSI
  1759. *
  1760. * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
  1761. */
  1762. if (enic->config.intr_mode < 2 &&
  1763. enic->rq_count >= 1 &&
  1764. enic->wq_count >= 1 &&
  1765. enic->cq_count >= 2 &&
  1766. enic->intr_count >= 1 &&
  1767. !pci_enable_msi(enic->pdev)) {
  1768. enic->rq_count = 1;
  1769. enic->wq_count = 1;
  1770. enic->cq_count = 2;
  1771. enic->intr_count = 1;
  1772. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
  1773. return 0;
  1774. }
  1775. /* Next try INTx
  1776. *
  1777. * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
  1778. * (the first INTR is used for WQ/RQ)
  1779. * (the second INTR is used for WQ/RQ errors)
  1780. * (the last INTR is used for notifications)
  1781. */
  1782. if (enic->config.intr_mode < 3 &&
  1783. enic->rq_count >= 1 &&
  1784. enic->wq_count >= 1 &&
  1785. enic->cq_count >= 2 &&
  1786. enic->intr_count >= 3) {
  1787. enic->rq_count = 1;
  1788. enic->wq_count = 1;
  1789. enic->cq_count = 2;
  1790. enic->intr_count = 3;
  1791. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
  1792. return 0;
  1793. }
  1794. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1795. return -EINVAL;
  1796. }
  1797. static void enic_clear_intr_mode(struct enic *enic)
  1798. {
  1799. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1800. case VNIC_DEV_INTR_MODE_MSIX:
  1801. pci_disable_msix(enic->pdev);
  1802. break;
  1803. case VNIC_DEV_INTR_MODE_MSI:
  1804. pci_disable_msi(enic->pdev);
  1805. break;
  1806. default:
  1807. break;
  1808. }
  1809. vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
  1810. }
  1811. static const struct net_device_ops enic_netdev_dynamic_ops = {
  1812. .ndo_open = enic_open,
  1813. .ndo_stop = enic_stop,
  1814. .ndo_start_xmit = enic_hard_start_xmit,
  1815. .ndo_get_stats64 = enic_get_stats,
  1816. .ndo_validate_addr = eth_validate_addr,
  1817. .ndo_set_rx_mode = enic_set_rx_mode,
  1818. .ndo_set_mac_address = enic_set_mac_address_dynamic,
  1819. .ndo_change_mtu = enic_change_mtu,
  1820. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1821. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1822. .ndo_tx_timeout = enic_tx_timeout,
  1823. .ndo_set_vf_port = enic_set_vf_port,
  1824. .ndo_get_vf_port = enic_get_vf_port,
  1825. .ndo_set_vf_mac = enic_set_vf_mac,
  1826. #ifdef CONFIG_NET_POLL_CONTROLLER
  1827. .ndo_poll_controller = enic_poll_controller,
  1828. #endif
  1829. #ifdef CONFIG_RFS_ACCEL
  1830. .ndo_rx_flow_steer = enic_rx_flow_steer,
  1831. #endif
  1832. #ifdef CONFIG_NET_RX_BUSY_POLL
  1833. .ndo_busy_poll = enic_busy_poll,
  1834. #endif
  1835. };
  1836. static const struct net_device_ops enic_netdev_ops = {
  1837. .ndo_open = enic_open,
  1838. .ndo_stop = enic_stop,
  1839. .ndo_start_xmit = enic_hard_start_xmit,
  1840. .ndo_get_stats64 = enic_get_stats,
  1841. .ndo_validate_addr = eth_validate_addr,
  1842. .ndo_set_mac_address = enic_set_mac_address,
  1843. .ndo_set_rx_mode = enic_set_rx_mode,
  1844. .ndo_change_mtu = enic_change_mtu,
  1845. .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
  1846. .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
  1847. .ndo_tx_timeout = enic_tx_timeout,
  1848. .ndo_set_vf_port = enic_set_vf_port,
  1849. .ndo_get_vf_port = enic_get_vf_port,
  1850. .ndo_set_vf_mac = enic_set_vf_mac,
  1851. #ifdef CONFIG_NET_POLL_CONTROLLER
  1852. .ndo_poll_controller = enic_poll_controller,
  1853. #endif
  1854. #ifdef CONFIG_RFS_ACCEL
  1855. .ndo_rx_flow_steer = enic_rx_flow_steer,
  1856. #endif
  1857. #ifdef CONFIG_NET_RX_BUSY_POLL
  1858. .ndo_busy_poll = enic_busy_poll,
  1859. #endif
  1860. };
  1861. static void enic_dev_deinit(struct enic *enic)
  1862. {
  1863. unsigned int i;
  1864. for (i = 0; i < enic->rq_count; i++) {
  1865. napi_hash_del(&enic->napi[i]);
  1866. netif_napi_del(&enic->napi[i]);
  1867. }
  1868. if (vnic_dev_get_intr_mode(enic->vdev) == VNIC_DEV_INTR_MODE_MSIX)
  1869. for (i = 0; i < enic->wq_count; i++)
  1870. netif_napi_del(&enic->napi[enic_cq_wq(enic, i)]);
  1871. enic_free_vnic_resources(enic);
  1872. enic_clear_intr_mode(enic);
  1873. }
  1874. static void enic_kdump_kernel_config(struct enic *enic)
  1875. {
  1876. if (is_kdump_kernel()) {
  1877. dev_info(enic_get_dev(enic), "Running from within kdump kernel. Using minimal resources\n");
  1878. enic->rq_count = 1;
  1879. enic->wq_count = 1;
  1880. enic->config.rq_desc_count = ENIC_MIN_RQ_DESCS;
  1881. enic->config.wq_desc_count = ENIC_MIN_WQ_DESCS;
  1882. enic->config.mtu = min_t(u16, 1500, enic->config.mtu);
  1883. }
  1884. }
  1885. static int enic_dev_init(struct enic *enic)
  1886. {
  1887. struct device *dev = enic_get_dev(enic);
  1888. struct net_device *netdev = enic->netdev;
  1889. unsigned int i;
  1890. int err;
  1891. /* Get interrupt coalesce timer info */
  1892. err = enic_dev_intr_coal_timer_info(enic);
  1893. if (err) {
  1894. dev_warn(dev, "Using default conversion factor for "
  1895. "interrupt coalesce timer\n");
  1896. vnic_dev_intr_coal_timer_info_default(enic->vdev);
  1897. }
  1898. /* Get vNIC configuration
  1899. */
  1900. err = enic_get_vnic_config(enic);
  1901. if (err) {
  1902. dev_err(dev, "Get vNIC configuration failed, aborting\n");
  1903. return err;
  1904. }
  1905. /* Get available resource counts
  1906. */
  1907. enic_get_res_counts(enic);
  1908. /* modify resource count if we are in kdump_kernel
  1909. */
  1910. enic_kdump_kernel_config(enic);
  1911. /* Set interrupt mode based on resource counts and system
  1912. * capabilities
  1913. */
  1914. err = enic_set_intr_mode(enic);
  1915. if (err) {
  1916. dev_err(dev, "Failed to set intr mode based on resource "
  1917. "counts and system capabilities, aborting\n");
  1918. return err;
  1919. }
  1920. /* Allocate and configure vNIC resources
  1921. */
  1922. err = enic_alloc_vnic_resources(enic);
  1923. if (err) {
  1924. dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
  1925. goto err_out_free_vnic_resources;
  1926. }
  1927. enic_init_vnic_resources(enic);
  1928. err = enic_set_rss_nic_cfg(enic);
  1929. if (err) {
  1930. dev_err(dev, "Failed to config nic, aborting\n");
  1931. goto err_out_free_vnic_resources;
  1932. }
  1933. switch (vnic_dev_get_intr_mode(enic->vdev)) {
  1934. default:
  1935. netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
  1936. napi_hash_add(&enic->napi[0]);
  1937. break;
  1938. case VNIC_DEV_INTR_MODE_MSIX:
  1939. for (i = 0; i < enic->rq_count; i++) {
  1940. netif_napi_add(netdev, &enic->napi[i],
  1941. enic_poll_msix_rq, NAPI_POLL_WEIGHT);
  1942. napi_hash_add(&enic->napi[i]);
  1943. }
  1944. for (i = 0; i < enic->wq_count; i++)
  1945. netif_napi_add(netdev, &enic->napi[enic_cq_wq(enic, i)],
  1946. enic_poll_msix_wq, NAPI_POLL_WEIGHT);
  1947. break;
  1948. }
  1949. return 0;
  1950. err_out_free_vnic_resources:
  1951. enic_clear_intr_mode(enic);
  1952. enic_free_vnic_resources(enic);
  1953. return err;
  1954. }
  1955. static void enic_iounmap(struct enic *enic)
  1956. {
  1957. unsigned int i;
  1958. for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
  1959. if (enic->bar[i].vaddr)
  1960. iounmap(enic->bar[i].vaddr);
  1961. }
  1962. static int enic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1963. {
  1964. struct device *dev = &pdev->dev;
  1965. struct net_device *netdev;
  1966. struct enic *enic;
  1967. int using_dac = 0;
  1968. unsigned int i;
  1969. int err;
  1970. #ifdef CONFIG_PCI_IOV
  1971. int pos = 0;
  1972. #endif
  1973. int num_pps = 1;
  1974. /* Allocate net device structure and initialize. Private
  1975. * instance data is initialized to zero.
  1976. */
  1977. netdev = alloc_etherdev_mqs(sizeof(struct enic),
  1978. ENIC_RQ_MAX, ENIC_WQ_MAX);
  1979. if (!netdev)
  1980. return -ENOMEM;
  1981. pci_set_drvdata(pdev, netdev);
  1982. SET_NETDEV_DEV(netdev, &pdev->dev);
  1983. enic = netdev_priv(netdev);
  1984. enic->netdev = netdev;
  1985. enic->pdev = pdev;
  1986. /* Setup PCI resources
  1987. */
  1988. err = pci_enable_device_mem(pdev);
  1989. if (err) {
  1990. dev_err(dev, "Cannot enable PCI device, aborting\n");
  1991. goto err_out_free_netdev;
  1992. }
  1993. err = pci_request_regions(pdev, DRV_NAME);
  1994. if (err) {
  1995. dev_err(dev, "Cannot request PCI regions, aborting\n");
  1996. goto err_out_disable_device;
  1997. }
  1998. pci_set_master(pdev);
  1999. /* Query PCI controller on system for DMA addressing
  2000. * limitation for the device. Try 64-bit first, and
  2001. * fail to 32-bit.
  2002. */
  2003. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  2004. if (err) {
  2005. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  2006. if (err) {
  2007. dev_err(dev, "No usable DMA configuration, aborting\n");
  2008. goto err_out_release_regions;
  2009. }
  2010. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2011. if (err) {
  2012. dev_err(dev, "Unable to obtain %u-bit DMA "
  2013. "for consistent allocations, aborting\n", 32);
  2014. goto err_out_release_regions;
  2015. }
  2016. } else {
  2017. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
  2018. if (err) {
  2019. dev_err(dev, "Unable to obtain %u-bit DMA "
  2020. "for consistent allocations, aborting\n", 64);
  2021. goto err_out_release_regions;
  2022. }
  2023. using_dac = 1;
  2024. }
  2025. /* Map vNIC resources from BAR0-5
  2026. */
  2027. for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
  2028. if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
  2029. continue;
  2030. enic->bar[i].len = pci_resource_len(pdev, i);
  2031. enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
  2032. if (!enic->bar[i].vaddr) {
  2033. dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
  2034. err = -ENODEV;
  2035. goto err_out_iounmap;
  2036. }
  2037. enic->bar[i].bus_addr = pci_resource_start(pdev, i);
  2038. }
  2039. /* Register vNIC device
  2040. */
  2041. enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
  2042. ARRAY_SIZE(enic->bar));
  2043. if (!enic->vdev) {
  2044. dev_err(dev, "vNIC registration failed, aborting\n");
  2045. err = -ENODEV;
  2046. goto err_out_iounmap;
  2047. }
  2048. #ifdef CONFIG_PCI_IOV
  2049. /* Get number of subvnics */
  2050. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
  2051. if (pos) {
  2052. pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
  2053. &enic->num_vfs);
  2054. if (enic->num_vfs) {
  2055. err = pci_enable_sriov(pdev, enic->num_vfs);
  2056. if (err) {
  2057. dev_err(dev, "SRIOV enable failed, aborting."
  2058. " pci_enable_sriov() returned %d\n",
  2059. err);
  2060. goto err_out_vnic_unregister;
  2061. }
  2062. enic->priv_flags |= ENIC_SRIOV_ENABLED;
  2063. num_pps = enic->num_vfs;
  2064. }
  2065. }
  2066. #endif
  2067. /* Allocate structure for port profiles */
  2068. enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL);
  2069. if (!enic->pp) {
  2070. err = -ENOMEM;
  2071. goto err_out_disable_sriov_pp;
  2072. }
  2073. /* Issue device open to get device in known state
  2074. */
  2075. err = enic_dev_open(enic);
  2076. if (err) {
  2077. dev_err(dev, "vNIC dev open failed, aborting\n");
  2078. goto err_out_disable_sriov;
  2079. }
  2080. /* Setup devcmd lock
  2081. */
  2082. spin_lock_init(&enic->devcmd_lock);
  2083. spin_lock_init(&enic->enic_api_lock);
  2084. /*
  2085. * Set ingress vlan rewrite mode before vnic initialization
  2086. */
  2087. err = enic_dev_set_ig_vlan_rewrite_mode(enic);
  2088. if (err) {
  2089. dev_err(dev,
  2090. "Failed to set ingress vlan rewrite mode, aborting.\n");
  2091. goto err_out_dev_close;
  2092. }
  2093. /* Issue device init to initialize the vnic-to-switch link.
  2094. * We'll start with carrier off and wait for link UP
  2095. * notification later to turn on carrier. We don't need
  2096. * to wait here for the vnic-to-switch link initialization
  2097. * to complete; link UP notification is the indication that
  2098. * the process is complete.
  2099. */
  2100. netif_carrier_off(netdev);
  2101. /* Do not call dev_init for a dynamic vnic.
  2102. * For a dynamic vnic, init_prov_info will be
  2103. * called later by an upper layer.
  2104. */
  2105. if (!enic_is_dynamic(enic)) {
  2106. err = vnic_dev_init(enic->vdev, 0);
  2107. if (err) {
  2108. dev_err(dev, "vNIC dev init failed, aborting\n");
  2109. goto err_out_dev_close;
  2110. }
  2111. }
  2112. err = enic_dev_init(enic);
  2113. if (err) {
  2114. dev_err(dev, "Device initialization failed, aborting\n");
  2115. goto err_out_dev_close;
  2116. }
  2117. netif_set_real_num_tx_queues(netdev, enic->wq_count);
  2118. netif_set_real_num_rx_queues(netdev, enic->rq_count);
  2119. /* Setup notification timer, HW reset task, and wq locks
  2120. */
  2121. init_timer(&enic->notify_timer);
  2122. enic->notify_timer.function = enic_notify_timer;
  2123. enic->notify_timer.data = (unsigned long)enic;
  2124. enic_set_rx_coal_setting(enic);
  2125. INIT_WORK(&enic->reset, enic_reset);
  2126. INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
  2127. for (i = 0; i < enic->wq_count; i++)
  2128. spin_lock_init(&enic->wq_lock[i]);
  2129. /* Register net device
  2130. */
  2131. enic->port_mtu = enic->config.mtu;
  2132. (void)enic_change_mtu(netdev, enic->port_mtu);
  2133. err = enic_set_mac_addr(netdev, enic->mac_addr);
  2134. if (err) {
  2135. dev_err(dev, "Invalid MAC address, aborting\n");
  2136. goto err_out_dev_deinit;
  2137. }
  2138. enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
  2139. /* rx coalesce time already got initialized. This gets used
  2140. * if adaptive coal is turned off
  2141. */
  2142. enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
  2143. if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
  2144. netdev->netdev_ops = &enic_netdev_dynamic_ops;
  2145. else
  2146. netdev->netdev_ops = &enic_netdev_ops;
  2147. netdev->watchdog_timeo = 2 * HZ;
  2148. enic_set_ethtool_ops(netdev);
  2149. netdev->features |= NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
  2150. if (ENIC_SETTING(enic, LOOP)) {
  2151. netdev->features &= ~NETIF_F_HW_VLAN_CTAG_TX;
  2152. enic->loop_enable = 1;
  2153. enic->loop_tag = enic->config.loop_tag;
  2154. dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
  2155. }
  2156. if (ENIC_SETTING(enic, TXCSUM))
  2157. netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
  2158. if (ENIC_SETTING(enic, TSO))
  2159. netdev->hw_features |= NETIF_F_TSO |
  2160. NETIF_F_TSO6 | NETIF_F_TSO_ECN;
  2161. if (ENIC_SETTING(enic, RSS))
  2162. netdev->hw_features |= NETIF_F_RXHASH;
  2163. if (ENIC_SETTING(enic, RXCSUM))
  2164. netdev->hw_features |= NETIF_F_RXCSUM;
  2165. netdev->features |= netdev->hw_features;
  2166. #ifdef CONFIG_RFS_ACCEL
  2167. netdev->hw_features |= NETIF_F_NTUPLE;
  2168. #endif
  2169. if (using_dac)
  2170. netdev->features |= NETIF_F_HIGHDMA;
  2171. netdev->priv_flags |= IFF_UNICAST_FLT;
  2172. err = register_netdev(netdev);
  2173. if (err) {
  2174. dev_err(dev, "Cannot register net device, aborting\n");
  2175. goto err_out_dev_deinit;
  2176. }
  2177. enic->rx_copybreak = RX_COPYBREAK_DEFAULT;
  2178. return 0;
  2179. err_out_dev_deinit:
  2180. enic_dev_deinit(enic);
  2181. err_out_dev_close:
  2182. vnic_dev_close(enic->vdev);
  2183. err_out_disable_sriov:
  2184. kfree(enic->pp);
  2185. err_out_disable_sriov_pp:
  2186. #ifdef CONFIG_PCI_IOV
  2187. if (enic_sriov_enabled(enic)) {
  2188. pci_disable_sriov(pdev);
  2189. enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
  2190. }
  2191. err_out_vnic_unregister:
  2192. #endif
  2193. vnic_dev_unregister(enic->vdev);
  2194. err_out_iounmap:
  2195. enic_iounmap(enic);
  2196. err_out_release_regions:
  2197. pci_release_regions(pdev);
  2198. err_out_disable_device:
  2199. pci_disable_device(pdev);
  2200. err_out_free_netdev:
  2201. free_netdev(netdev);
  2202. return err;
  2203. }
  2204. static void enic_remove(struct pci_dev *pdev)
  2205. {
  2206. struct net_device *netdev = pci_get_drvdata(pdev);
  2207. if (netdev) {
  2208. struct enic *enic = netdev_priv(netdev);
  2209. cancel_work_sync(&enic->reset);
  2210. cancel_work_sync(&enic->change_mtu_work);
  2211. unregister_netdev(netdev);
  2212. enic_dev_deinit(enic);
  2213. vnic_dev_close(enic->vdev);
  2214. #ifdef CONFIG_PCI_IOV
  2215. if (enic_sriov_enabled(enic)) {
  2216. pci_disable_sriov(pdev);
  2217. enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
  2218. }
  2219. #endif
  2220. kfree(enic->pp);
  2221. vnic_dev_unregister(enic->vdev);
  2222. enic_iounmap(enic);
  2223. pci_release_regions(pdev);
  2224. pci_disable_device(pdev);
  2225. free_netdev(netdev);
  2226. }
  2227. }
  2228. static struct pci_driver enic_driver = {
  2229. .name = DRV_NAME,
  2230. .id_table = enic_id_table,
  2231. .probe = enic_probe,
  2232. .remove = enic_remove,
  2233. };
  2234. static int __init enic_init_module(void)
  2235. {
  2236. pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
  2237. return pci_register_driver(&enic_driver);
  2238. }
  2239. static void __exit enic_cleanup_module(void)
  2240. {
  2241. pci_unregister_driver(&enic_driver);
  2242. }
  2243. module_init(enic_init_module);
  2244. module_exit(enic_cleanup_module);