cxgb4_debugfs.c 58 KB

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  1. /*
  2. * This file is part of the Chelsio T4 Ethernet driver for Linux.
  3. *
  4. * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
  5. *
  6. * This software is available to you under a choice of one of two
  7. * licenses. You may choose to be licensed under the terms of the GNU
  8. * General Public License (GPL) Version 2, available from the file
  9. * COPYING in the main directory of this source tree, or the
  10. * OpenIB.org BSD license below:
  11. *
  12. * Redistribution and use in source and binary forms, with or
  13. * without modification, are permitted provided that the following
  14. * conditions are met:
  15. *
  16. * - Redistributions of source code must retain the above
  17. * copyright notice, this list of conditions and the following
  18. * disclaimer.
  19. *
  20. * - Redistributions in binary form must reproduce the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer in the documentation and/or other materials
  23. * provided with the distribution.
  24. *
  25. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  26. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  28. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  29. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  30. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  31. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  32. * SOFTWARE.
  33. */
  34. #include <linux/seq_file.h>
  35. #include <linux/debugfs.h>
  36. #include <linux/string_helpers.h>
  37. #include <linux/sort.h>
  38. #include <linux/ctype.h>
  39. #include "cxgb4.h"
  40. #include "t4_regs.h"
  41. #include "t4_values.h"
  42. #include "t4fw_api.h"
  43. #include "cxgb4_debugfs.h"
  44. #include "clip_tbl.h"
  45. #include "l2t.h"
  46. /* generic seq_file support for showing a table of size rows x width. */
  47. static void *seq_tab_get_idx(struct seq_tab *tb, loff_t pos)
  48. {
  49. pos -= tb->skip_first;
  50. return pos >= tb->rows ? NULL : &tb->data[pos * tb->width];
  51. }
  52. static void *seq_tab_start(struct seq_file *seq, loff_t *pos)
  53. {
  54. struct seq_tab *tb = seq->private;
  55. if (tb->skip_first && *pos == 0)
  56. return SEQ_START_TOKEN;
  57. return seq_tab_get_idx(tb, *pos);
  58. }
  59. static void *seq_tab_next(struct seq_file *seq, void *v, loff_t *pos)
  60. {
  61. v = seq_tab_get_idx(seq->private, *pos + 1);
  62. if (v)
  63. ++*pos;
  64. return v;
  65. }
  66. static void seq_tab_stop(struct seq_file *seq, void *v)
  67. {
  68. }
  69. static int seq_tab_show(struct seq_file *seq, void *v)
  70. {
  71. const struct seq_tab *tb = seq->private;
  72. return tb->show(seq, v, ((char *)v - tb->data) / tb->width);
  73. }
  74. static const struct seq_operations seq_tab_ops = {
  75. .start = seq_tab_start,
  76. .next = seq_tab_next,
  77. .stop = seq_tab_stop,
  78. .show = seq_tab_show
  79. };
  80. struct seq_tab *seq_open_tab(struct file *f, unsigned int rows,
  81. unsigned int width, unsigned int have_header,
  82. int (*show)(struct seq_file *seq, void *v, int i))
  83. {
  84. struct seq_tab *p;
  85. p = __seq_open_private(f, &seq_tab_ops, sizeof(*p) + rows * width);
  86. if (p) {
  87. p->show = show;
  88. p->rows = rows;
  89. p->width = width;
  90. p->skip_first = have_header != 0;
  91. }
  92. return p;
  93. }
  94. /* Trim the size of a seq_tab to the supplied number of rows. The operation is
  95. * irreversible.
  96. */
  97. static int seq_tab_trim(struct seq_tab *p, unsigned int new_rows)
  98. {
  99. if (new_rows > p->rows)
  100. return -EINVAL;
  101. p->rows = new_rows;
  102. return 0;
  103. }
  104. static int cim_la_show(struct seq_file *seq, void *v, int idx)
  105. {
  106. if (v == SEQ_START_TOKEN)
  107. seq_puts(seq, "Status Data PC LS0Stat LS0Addr "
  108. " LS0Data\n");
  109. else {
  110. const u32 *p = v;
  111. seq_printf(seq,
  112. " %02x %x%07x %x%07x %08x %08x %08x%08x%08x%08x\n",
  113. (p[0] >> 4) & 0xff, p[0] & 0xf, p[1] >> 4,
  114. p[1] & 0xf, p[2] >> 4, p[2] & 0xf, p[3], p[4], p[5],
  115. p[6], p[7]);
  116. }
  117. return 0;
  118. }
  119. static int cim_la_show_3in1(struct seq_file *seq, void *v, int idx)
  120. {
  121. if (v == SEQ_START_TOKEN) {
  122. seq_puts(seq, "Status Data PC\n");
  123. } else {
  124. const u32 *p = v;
  125. seq_printf(seq, " %02x %08x %08x\n", p[5] & 0xff, p[6],
  126. p[7]);
  127. seq_printf(seq, " %02x %02x%06x %02x%06x\n",
  128. (p[3] >> 8) & 0xff, p[3] & 0xff, p[4] >> 8,
  129. p[4] & 0xff, p[5] >> 8);
  130. seq_printf(seq, " %02x %x%07x %x%07x\n", (p[0] >> 4) & 0xff,
  131. p[0] & 0xf, p[1] >> 4, p[1] & 0xf, p[2] >> 4);
  132. }
  133. return 0;
  134. }
  135. static int cim_la_open(struct inode *inode, struct file *file)
  136. {
  137. int ret;
  138. unsigned int cfg;
  139. struct seq_tab *p;
  140. struct adapter *adap = inode->i_private;
  141. ret = t4_cim_read(adap, UP_UP_DBG_LA_CFG_A, 1, &cfg);
  142. if (ret)
  143. return ret;
  144. p = seq_open_tab(file, adap->params.cim_la_size / 8, 8 * sizeof(u32), 1,
  145. cfg & UPDBGLACAPTPCONLY_F ?
  146. cim_la_show_3in1 : cim_la_show);
  147. if (!p)
  148. return -ENOMEM;
  149. ret = t4_cim_read_la(adap, (u32 *)p->data, NULL);
  150. if (ret)
  151. seq_release_private(inode, file);
  152. return ret;
  153. }
  154. static const struct file_operations cim_la_fops = {
  155. .owner = THIS_MODULE,
  156. .open = cim_la_open,
  157. .read = seq_read,
  158. .llseek = seq_lseek,
  159. .release = seq_release_private
  160. };
  161. static int cim_qcfg_show(struct seq_file *seq, void *v)
  162. {
  163. static const char * const qname[] = {
  164. "TP0", "TP1", "ULP", "SGE0", "SGE1", "NC-SI",
  165. "ULP0", "ULP1", "ULP2", "ULP3", "SGE", "NC-SI",
  166. "SGE0-RX", "SGE1-RX"
  167. };
  168. int i;
  169. struct adapter *adap = seq->private;
  170. u16 base[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
  171. u16 size[CIM_NUM_IBQ + CIM_NUM_OBQ_T5];
  172. u32 stat[(4 * (CIM_NUM_IBQ + CIM_NUM_OBQ_T5))];
  173. u16 thres[CIM_NUM_IBQ];
  174. u32 obq_wr_t4[2 * CIM_NUM_OBQ], *wr;
  175. u32 obq_wr_t5[2 * CIM_NUM_OBQ_T5];
  176. u32 *p = stat;
  177. int cim_num_obq = is_t4(adap->params.chip) ?
  178. CIM_NUM_OBQ : CIM_NUM_OBQ_T5;
  179. i = t4_cim_read(adap, is_t4(adap->params.chip) ? UP_IBQ_0_RDADDR_A :
  180. UP_IBQ_0_SHADOW_RDADDR_A,
  181. ARRAY_SIZE(stat), stat);
  182. if (!i) {
  183. if (is_t4(adap->params.chip)) {
  184. i = t4_cim_read(adap, UP_OBQ_0_REALADDR_A,
  185. ARRAY_SIZE(obq_wr_t4), obq_wr_t4);
  186. wr = obq_wr_t4;
  187. } else {
  188. i = t4_cim_read(adap, UP_OBQ_0_SHADOW_REALADDR_A,
  189. ARRAY_SIZE(obq_wr_t5), obq_wr_t5);
  190. wr = obq_wr_t5;
  191. }
  192. }
  193. if (i)
  194. return i;
  195. t4_read_cimq_cfg(adap, base, size, thres);
  196. seq_printf(seq,
  197. " Queue Base Size Thres RdPtr WrPtr SOP EOP Avail\n");
  198. for (i = 0; i < CIM_NUM_IBQ; i++, p += 4)
  199. seq_printf(seq, "%7s %5x %5u %5u %6x %4x %4u %4u %5u\n",
  200. qname[i], base[i], size[i], thres[i],
  201. IBQRDADDR_G(p[0]), IBQWRADDR_G(p[1]),
  202. QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
  203. QUEREMFLITS_G(p[2]) * 16);
  204. for ( ; i < CIM_NUM_IBQ + cim_num_obq; i++, p += 4, wr += 2)
  205. seq_printf(seq, "%7s %5x %5u %12x %4x %4u %4u %5u\n",
  206. qname[i], base[i], size[i],
  207. QUERDADDR_G(p[0]) & 0x3fff, wr[0] - base[i],
  208. QUESOPCNT_G(p[3]), QUEEOPCNT_G(p[3]),
  209. QUEREMFLITS_G(p[2]) * 16);
  210. return 0;
  211. }
  212. static int cim_qcfg_open(struct inode *inode, struct file *file)
  213. {
  214. return single_open(file, cim_qcfg_show, inode->i_private);
  215. }
  216. static const struct file_operations cim_qcfg_fops = {
  217. .owner = THIS_MODULE,
  218. .open = cim_qcfg_open,
  219. .read = seq_read,
  220. .llseek = seq_lseek,
  221. .release = single_release,
  222. };
  223. static int cimq_show(struct seq_file *seq, void *v, int idx)
  224. {
  225. const u32 *p = v;
  226. seq_printf(seq, "%#06x: %08x %08x %08x %08x\n", idx * 16, p[0], p[1],
  227. p[2], p[3]);
  228. return 0;
  229. }
  230. static int cim_ibq_open(struct inode *inode, struct file *file)
  231. {
  232. int ret;
  233. struct seq_tab *p;
  234. unsigned int qid = (uintptr_t)inode->i_private & 7;
  235. struct adapter *adap = inode->i_private - qid;
  236. p = seq_open_tab(file, CIM_IBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
  237. if (!p)
  238. return -ENOMEM;
  239. ret = t4_read_cim_ibq(adap, qid, (u32 *)p->data, CIM_IBQ_SIZE * 4);
  240. if (ret < 0)
  241. seq_release_private(inode, file);
  242. else
  243. ret = 0;
  244. return ret;
  245. }
  246. static const struct file_operations cim_ibq_fops = {
  247. .owner = THIS_MODULE,
  248. .open = cim_ibq_open,
  249. .read = seq_read,
  250. .llseek = seq_lseek,
  251. .release = seq_release_private
  252. };
  253. static int cim_obq_open(struct inode *inode, struct file *file)
  254. {
  255. int ret;
  256. struct seq_tab *p;
  257. unsigned int qid = (uintptr_t)inode->i_private & 7;
  258. struct adapter *adap = inode->i_private - qid;
  259. p = seq_open_tab(file, 6 * CIM_OBQ_SIZE, 4 * sizeof(u32), 0, cimq_show);
  260. if (!p)
  261. return -ENOMEM;
  262. ret = t4_read_cim_obq(adap, qid, (u32 *)p->data, 6 * CIM_OBQ_SIZE * 4);
  263. if (ret < 0) {
  264. seq_release_private(inode, file);
  265. } else {
  266. seq_tab_trim(p, ret / 4);
  267. ret = 0;
  268. }
  269. return ret;
  270. }
  271. static const struct file_operations cim_obq_fops = {
  272. .owner = THIS_MODULE,
  273. .open = cim_obq_open,
  274. .read = seq_read,
  275. .llseek = seq_lseek,
  276. .release = seq_release_private
  277. };
  278. struct field_desc {
  279. const char *name;
  280. unsigned int start;
  281. unsigned int width;
  282. };
  283. static void field_desc_show(struct seq_file *seq, u64 v,
  284. const struct field_desc *p)
  285. {
  286. char buf[32];
  287. int line_size = 0;
  288. while (p->name) {
  289. u64 mask = (1ULL << p->width) - 1;
  290. int len = scnprintf(buf, sizeof(buf), "%s: %llu", p->name,
  291. ((unsigned long long)v >> p->start) & mask);
  292. if (line_size + len >= 79) {
  293. line_size = 8;
  294. seq_puts(seq, "\n ");
  295. }
  296. seq_printf(seq, "%s ", buf);
  297. line_size += len + 1;
  298. p++;
  299. }
  300. seq_putc(seq, '\n');
  301. }
  302. static struct field_desc tp_la0[] = {
  303. { "RcfOpCodeOut", 60, 4 },
  304. { "State", 56, 4 },
  305. { "WcfState", 52, 4 },
  306. { "RcfOpcSrcOut", 50, 2 },
  307. { "CRxError", 49, 1 },
  308. { "ERxError", 48, 1 },
  309. { "SanityFailed", 47, 1 },
  310. { "SpuriousMsg", 46, 1 },
  311. { "FlushInputMsg", 45, 1 },
  312. { "FlushInputCpl", 44, 1 },
  313. { "RssUpBit", 43, 1 },
  314. { "RssFilterHit", 42, 1 },
  315. { "Tid", 32, 10 },
  316. { "InitTcb", 31, 1 },
  317. { "LineNumber", 24, 7 },
  318. { "Emsg", 23, 1 },
  319. { "EdataOut", 22, 1 },
  320. { "Cmsg", 21, 1 },
  321. { "CdataOut", 20, 1 },
  322. { "EreadPdu", 19, 1 },
  323. { "CreadPdu", 18, 1 },
  324. { "TunnelPkt", 17, 1 },
  325. { "RcfPeerFin", 16, 1 },
  326. { "RcfReasonOut", 12, 4 },
  327. { "TxCchannel", 10, 2 },
  328. { "RcfTxChannel", 8, 2 },
  329. { "RxEchannel", 6, 2 },
  330. { "RcfRxChannel", 5, 1 },
  331. { "RcfDataOutSrdy", 4, 1 },
  332. { "RxDvld", 3, 1 },
  333. { "RxOoDvld", 2, 1 },
  334. { "RxCongestion", 1, 1 },
  335. { "TxCongestion", 0, 1 },
  336. { NULL }
  337. };
  338. static int tp_la_show(struct seq_file *seq, void *v, int idx)
  339. {
  340. const u64 *p = v;
  341. field_desc_show(seq, *p, tp_la0);
  342. return 0;
  343. }
  344. static int tp_la_show2(struct seq_file *seq, void *v, int idx)
  345. {
  346. const u64 *p = v;
  347. if (idx)
  348. seq_putc(seq, '\n');
  349. field_desc_show(seq, p[0], tp_la0);
  350. if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
  351. field_desc_show(seq, p[1], tp_la0);
  352. return 0;
  353. }
  354. static int tp_la_show3(struct seq_file *seq, void *v, int idx)
  355. {
  356. static struct field_desc tp_la1[] = {
  357. { "CplCmdIn", 56, 8 },
  358. { "CplCmdOut", 48, 8 },
  359. { "ESynOut", 47, 1 },
  360. { "EAckOut", 46, 1 },
  361. { "EFinOut", 45, 1 },
  362. { "ERstOut", 44, 1 },
  363. { "SynIn", 43, 1 },
  364. { "AckIn", 42, 1 },
  365. { "FinIn", 41, 1 },
  366. { "RstIn", 40, 1 },
  367. { "DataIn", 39, 1 },
  368. { "DataInVld", 38, 1 },
  369. { "PadIn", 37, 1 },
  370. { "RxBufEmpty", 36, 1 },
  371. { "RxDdp", 35, 1 },
  372. { "RxFbCongestion", 34, 1 },
  373. { "TxFbCongestion", 33, 1 },
  374. { "TxPktSumSrdy", 32, 1 },
  375. { "RcfUlpType", 28, 4 },
  376. { "Eread", 27, 1 },
  377. { "Ebypass", 26, 1 },
  378. { "Esave", 25, 1 },
  379. { "Static0", 24, 1 },
  380. { "Cread", 23, 1 },
  381. { "Cbypass", 22, 1 },
  382. { "Csave", 21, 1 },
  383. { "CPktOut", 20, 1 },
  384. { "RxPagePoolFull", 18, 2 },
  385. { "RxLpbkPkt", 17, 1 },
  386. { "TxLpbkPkt", 16, 1 },
  387. { "RxVfValid", 15, 1 },
  388. { "SynLearned", 14, 1 },
  389. { "SetDelEntry", 13, 1 },
  390. { "SetInvEntry", 12, 1 },
  391. { "CpcmdDvld", 11, 1 },
  392. { "CpcmdSave", 10, 1 },
  393. { "RxPstructsFull", 8, 2 },
  394. { "EpcmdDvld", 7, 1 },
  395. { "EpcmdFlush", 6, 1 },
  396. { "EpcmdTrimPrefix", 5, 1 },
  397. { "EpcmdTrimPostfix", 4, 1 },
  398. { "ERssIp4Pkt", 3, 1 },
  399. { "ERssIp6Pkt", 2, 1 },
  400. { "ERssTcpUdpPkt", 1, 1 },
  401. { "ERssFceFipPkt", 0, 1 },
  402. { NULL }
  403. };
  404. static struct field_desc tp_la2[] = {
  405. { "CplCmdIn", 56, 8 },
  406. { "MpsVfVld", 55, 1 },
  407. { "MpsPf", 52, 3 },
  408. { "MpsVf", 44, 8 },
  409. { "SynIn", 43, 1 },
  410. { "AckIn", 42, 1 },
  411. { "FinIn", 41, 1 },
  412. { "RstIn", 40, 1 },
  413. { "DataIn", 39, 1 },
  414. { "DataInVld", 38, 1 },
  415. { "PadIn", 37, 1 },
  416. { "RxBufEmpty", 36, 1 },
  417. { "RxDdp", 35, 1 },
  418. { "RxFbCongestion", 34, 1 },
  419. { "TxFbCongestion", 33, 1 },
  420. { "TxPktSumSrdy", 32, 1 },
  421. { "RcfUlpType", 28, 4 },
  422. { "Eread", 27, 1 },
  423. { "Ebypass", 26, 1 },
  424. { "Esave", 25, 1 },
  425. { "Static0", 24, 1 },
  426. { "Cread", 23, 1 },
  427. { "Cbypass", 22, 1 },
  428. { "Csave", 21, 1 },
  429. { "CPktOut", 20, 1 },
  430. { "RxPagePoolFull", 18, 2 },
  431. { "RxLpbkPkt", 17, 1 },
  432. { "TxLpbkPkt", 16, 1 },
  433. { "RxVfValid", 15, 1 },
  434. { "SynLearned", 14, 1 },
  435. { "SetDelEntry", 13, 1 },
  436. { "SetInvEntry", 12, 1 },
  437. { "CpcmdDvld", 11, 1 },
  438. { "CpcmdSave", 10, 1 },
  439. { "RxPstructsFull", 8, 2 },
  440. { "EpcmdDvld", 7, 1 },
  441. { "EpcmdFlush", 6, 1 },
  442. { "EpcmdTrimPrefix", 5, 1 },
  443. { "EpcmdTrimPostfix", 4, 1 },
  444. { "ERssIp4Pkt", 3, 1 },
  445. { "ERssIp6Pkt", 2, 1 },
  446. { "ERssTcpUdpPkt", 1, 1 },
  447. { "ERssFceFipPkt", 0, 1 },
  448. { NULL }
  449. };
  450. const u64 *p = v;
  451. if (idx)
  452. seq_putc(seq, '\n');
  453. field_desc_show(seq, p[0], tp_la0);
  454. if (idx < (TPLA_SIZE / 2 - 1) || p[1] != ~0ULL)
  455. field_desc_show(seq, p[1], (p[0] & BIT(17)) ? tp_la2 : tp_la1);
  456. return 0;
  457. }
  458. static int tp_la_open(struct inode *inode, struct file *file)
  459. {
  460. struct seq_tab *p;
  461. struct adapter *adap = inode->i_private;
  462. switch (DBGLAMODE_G(t4_read_reg(adap, TP_DBG_LA_CONFIG_A))) {
  463. case 2:
  464. p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
  465. tp_la_show2);
  466. break;
  467. case 3:
  468. p = seq_open_tab(file, TPLA_SIZE / 2, 2 * sizeof(u64), 0,
  469. tp_la_show3);
  470. break;
  471. default:
  472. p = seq_open_tab(file, TPLA_SIZE, sizeof(u64), 0, tp_la_show);
  473. }
  474. if (!p)
  475. return -ENOMEM;
  476. t4_tp_read_la(adap, (u64 *)p->data, NULL);
  477. return 0;
  478. }
  479. static ssize_t tp_la_write(struct file *file, const char __user *buf,
  480. size_t count, loff_t *pos)
  481. {
  482. int err;
  483. char s[32];
  484. unsigned long val;
  485. size_t size = min(sizeof(s) - 1, count);
  486. struct adapter *adap = FILE_DATA(file)->i_private;
  487. if (copy_from_user(s, buf, size))
  488. return -EFAULT;
  489. s[size] = '\0';
  490. err = kstrtoul(s, 0, &val);
  491. if (err)
  492. return err;
  493. if (val > 0xffff)
  494. return -EINVAL;
  495. adap->params.tp.la_mask = val << 16;
  496. t4_set_reg_field(adap, TP_DBG_LA_CONFIG_A, 0xffff0000U,
  497. adap->params.tp.la_mask);
  498. return count;
  499. }
  500. static const struct file_operations tp_la_fops = {
  501. .owner = THIS_MODULE,
  502. .open = tp_la_open,
  503. .read = seq_read,
  504. .llseek = seq_lseek,
  505. .release = seq_release_private,
  506. .write = tp_la_write
  507. };
  508. static int ulprx_la_show(struct seq_file *seq, void *v, int idx)
  509. {
  510. const u32 *p = v;
  511. if (v == SEQ_START_TOKEN)
  512. seq_puts(seq, " Pcmd Type Message"
  513. " Data\n");
  514. else
  515. seq_printf(seq, "%08x%08x %4x %08x %08x%08x%08x%08x\n",
  516. p[1], p[0], p[2], p[3], p[7], p[6], p[5], p[4]);
  517. return 0;
  518. }
  519. static int ulprx_la_open(struct inode *inode, struct file *file)
  520. {
  521. struct seq_tab *p;
  522. struct adapter *adap = inode->i_private;
  523. p = seq_open_tab(file, ULPRX_LA_SIZE, 8 * sizeof(u32), 1,
  524. ulprx_la_show);
  525. if (!p)
  526. return -ENOMEM;
  527. t4_ulprx_read_la(adap, (u32 *)p->data);
  528. return 0;
  529. }
  530. static const struct file_operations ulprx_la_fops = {
  531. .owner = THIS_MODULE,
  532. .open = ulprx_la_open,
  533. .read = seq_read,
  534. .llseek = seq_lseek,
  535. .release = seq_release_private
  536. };
  537. /* Show the PM memory stats. These stats include:
  538. *
  539. * TX:
  540. * Read: memory read operation
  541. * Write Bypass: cut-through
  542. * Bypass + mem: cut-through and save copy
  543. *
  544. * RX:
  545. * Read: memory read
  546. * Write Bypass: cut-through
  547. * Flush: payload trim or drop
  548. */
  549. static int pm_stats_show(struct seq_file *seq, void *v)
  550. {
  551. static const char * const tx_pm_stats[] = {
  552. "Read:", "Write bypass:", "Write mem:", "Bypass + mem:"
  553. };
  554. static const char * const rx_pm_stats[] = {
  555. "Read:", "Write bypass:", "Write mem:", "Flush:"
  556. };
  557. int i;
  558. u32 tx_cnt[PM_NSTATS], rx_cnt[PM_NSTATS];
  559. u64 tx_cyc[PM_NSTATS], rx_cyc[PM_NSTATS];
  560. struct adapter *adap = seq->private;
  561. t4_pmtx_get_stats(adap, tx_cnt, tx_cyc);
  562. t4_pmrx_get_stats(adap, rx_cnt, rx_cyc);
  563. seq_printf(seq, "%13s %10s %20s\n", " ", "Tx pcmds", "Tx bytes");
  564. for (i = 0; i < PM_NSTATS - 1; i++)
  565. seq_printf(seq, "%-13s %10u %20llu\n",
  566. tx_pm_stats[i], tx_cnt[i], tx_cyc[i]);
  567. seq_printf(seq, "%13s %10s %20s\n", " ", "Rx pcmds", "Rx bytes");
  568. for (i = 0; i < PM_NSTATS - 1; i++)
  569. seq_printf(seq, "%-13s %10u %20llu\n",
  570. rx_pm_stats[i], rx_cnt[i], rx_cyc[i]);
  571. return 0;
  572. }
  573. static int pm_stats_open(struct inode *inode, struct file *file)
  574. {
  575. return single_open(file, pm_stats_show, inode->i_private);
  576. }
  577. static ssize_t pm_stats_clear(struct file *file, const char __user *buf,
  578. size_t count, loff_t *pos)
  579. {
  580. struct adapter *adap = FILE_DATA(file)->i_private;
  581. t4_write_reg(adap, PM_RX_STAT_CONFIG_A, 0);
  582. t4_write_reg(adap, PM_TX_STAT_CONFIG_A, 0);
  583. return count;
  584. }
  585. static const struct file_operations pm_stats_debugfs_fops = {
  586. .owner = THIS_MODULE,
  587. .open = pm_stats_open,
  588. .read = seq_read,
  589. .llseek = seq_lseek,
  590. .release = single_release,
  591. .write = pm_stats_clear
  592. };
  593. static int cctrl_tbl_show(struct seq_file *seq, void *v)
  594. {
  595. static const char * const dec_fac[] = {
  596. "0.5", "0.5625", "0.625", "0.6875", "0.75", "0.8125", "0.875",
  597. "0.9375" };
  598. int i;
  599. u16 incr[NMTUS][NCCTRL_WIN];
  600. struct adapter *adap = seq->private;
  601. t4_read_cong_tbl(adap, incr);
  602. for (i = 0; i < NCCTRL_WIN; ++i) {
  603. seq_printf(seq, "%2d: %4u %4u %4u %4u %4u %4u %4u %4u\n", i,
  604. incr[0][i], incr[1][i], incr[2][i], incr[3][i],
  605. incr[4][i], incr[5][i], incr[6][i], incr[7][i]);
  606. seq_printf(seq, "%8u %4u %4u %4u %4u %4u %4u %4u %5u %s\n",
  607. incr[8][i], incr[9][i], incr[10][i], incr[11][i],
  608. incr[12][i], incr[13][i], incr[14][i], incr[15][i],
  609. adap->params.a_wnd[i],
  610. dec_fac[adap->params.b_wnd[i]]);
  611. }
  612. return 0;
  613. }
  614. DEFINE_SIMPLE_DEBUGFS_FILE(cctrl_tbl);
  615. /* Format a value in a unit that differs from the value's native unit by the
  616. * given factor.
  617. */
  618. static char *unit_conv(char *buf, size_t len, unsigned int val,
  619. unsigned int factor)
  620. {
  621. unsigned int rem = val % factor;
  622. if (rem == 0) {
  623. snprintf(buf, len, "%u", val / factor);
  624. } else {
  625. while (rem % 10 == 0)
  626. rem /= 10;
  627. snprintf(buf, len, "%u.%u", val / factor, rem);
  628. }
  629. return buf;
  630. }
  631. static int clk_show(struct seq_file *seq, void *v)
  632. {
  633. char buf[32];
  634. struct adapter *adap = seq->private;
  635. unsigned int cclk_ps = 1000000000 / adap->params.vpd.cclk; /* in ps */
  636. u32 res = t4_read_reg(adap, TP_TIMER_RESOLUTION_A);
  637. unsigned int tre = TIMERRESOLUTION_G(res);
  638. unsigned int dack_re = DELAYEDACKRESOLUTION_G(res);
  639. unsigned long long tp_tick_us = (cclk_ps << tre) / 1000000; /* in us */
  640. seq_printf(seq, "Core clock period: %s ns\n",
  641. unit_conv(buf, sizeof(buf), cclk_ps, 1000));
  642. seq_printf(seq, "TP timer tick: %s us\n",
  643. unit_conv(buf, sizeof(buf), (cclk_ps << tre), 1000000));
  644. seq_printf(seq, "TCP timestamp tick: %s us\n",
  645. unit_conv(buf, sizeof(buf),
  646. (cclk_ps << TIMESTAMPRESOLUTION_G(res)), 1000000));
  647. seq_printf(seq, "DACK tick: %s us\n",
  648. unit_conv(buf, sizeof(buf), (cclk_ps << dack_re), 1000000));
  649. seq_printf(seq, "DACK timer: %u us\n",
  650. ((cclk_ps << dack_re) / 1000000) *
  651. t4_read_reg(adap, TP_DACK_TIMER_A));
  652. seq_printf(seq, "Retransmit min: %llu us\n",
  653. tp_tick_us * t4_read_reg(adap, TP_RXT_MIN_A));
  654. seq_printf(seq, "Retransmit max: %llu us\n",
  655. tp_tick_us * t4_read_reg(adap, TP_RXT_MAX_A));
  656. seq_printf(seq, "Persist timer min: %llu us\n",
  657. tp_tick_us * t4_read_reg(adap, TP_PERS_MIN_A));
  658. seq_printf(seq, "Persist timer max: %llu us\n",
  659. tp_tick_us * t4_read_reg(adap, TP_PERS_MAX_A));
  660. seq_printf(seq, "Keepalive idle timer: %llu us\n",
  661. tp_tick_us * t4_read_reg(adap, TP_KEEP_IDLE_A));
  662. seq_printf(seq, "Keepalive interval: %llu us\n",
  663. tp_tick_us * t4_read_reg(adap, TP_KEEP_INTVL_A));
  664. seq_printf(seq, "Initial SRTT: %llu us\n",
  665. tp_tick_us * INITSRTT_G(t4_read_reg(adap, TP_INIT_SRTT_A)));
  666. seq_printf(seq, "FINWAIT2 timer: %llu us\n",
  667. tp_tick_us * t4_read_reg(adap, TP_FINWAIT2_TIMER_A));
  668. return 0;
  669. }
  670. DEFINE_SIMPLE_DEBUGFS_FILE(clk);
  671. /* Firmware Device Log dump. */
  672. static const char * const devlog_level_strings[] = {
  673. [FW_DEVLOG_LEVEL_EMERG] = "EMERG",
  674. [FW_DEVLOG_LEVEL_CRIT] = "CRIT",
  675. [FW_DEVLOG_LEVEL_ERR] = "ERR",
  676. [FW_DEVLOG_LEVEL_NOTICE] = "NOTICE",
  677. [FW_DEVLOG_LEVEL_INFO] = "INFO",
  678. [FW_DEVLOG_LEVEL_DEBUG] = "DEBUG"
  679. };
  680. static const char * const devlog_facility_strings[] = {
  681. [FW_DEVLOG_FACILITY_CORE] = "CORE",
  682. [FW_DEVLOG_FACILITY_SCHED] = "SCHED",
  683. [FW_DEVLOG_FACILITY_TIMER] = "TIMER",
  684. [FW_DEVLOG_FACILITY_RES] = "RES",
  685. [FW_DEVLOG_FACILITY_HW] = "HW",
  686. [FW_DEVLOG_FACILITY_FLR] = "FLR",
  687. [FW_DEVLOG_FACILITY_DMAQ] = "DMAQ",
  688. [FW_DEVLOG_FACILITY_PHY] = "PHY",
  689. [FW_DEVLOG_FACILITY_MAC] = "MAC",
  690. [FW_DEVLOG_FACILITY_PORT] = "PORT",
  691. [FW_DEVLOG_FACILITY_VI] = "VI",
  692. [FW_DEVLOG_FACILITY_FILTER] = "FILTER",
  693. [FW_DEVLOG_FACILITY_ACL] = "ACL",
  694. [FW_DEVLOG_FACILITY_TM] = "TM",
  695. [FW_DEVLOG_FACILITY_QFC] = "QFC",
  696. [FW_DEVLOG_FACILITY_DCB] = "DCB",
  697. [FW_DEVLOG_FACILITY_ETH] = "ETH",
  698. [FW_DEVLOG_FACILITY_OFLD] = "OFLD",
  699. [FW_DEVLOG_FACILITY_RI] = "RI",
  700. [FW_DEVLOG_FACILITY_ISCSI] = "ISCSI",
  701. [FW_DEVLOG_FACILITY_FCOE] = "FCOE",
  702. [FW_DEVLOG_FACILITY_FOISCSI] = "FOISCSI",
  703. [FW_DEVLOG_FACILITY_FOFCOE] = "FOFCOE"
  704. };
  705. /* Information gathered by Device Log Open routine for the display routine.
  706. */
  707. struct devlog_info {
  708. unsigned int nentries; /* number of entries in log[] */
  709. unsigned int first; /* first [temporal] entry in log[] */
  710. struct fw_devlog_e log[0]; /* Firmware Device Log */
  711. };
  712. /* Dump a Firmaware Device Log entry.
  713. */
  714. static int devlog_show(struct seq_file *seq, void *v)
  715. {
  716. if (v == SEQ_START_TOKEN)
  717. seq_printf(seq, "%10s %15s %8s %8s %s\n",
  718. "Seq#", "Tstamp", "Level", "Facility", "Message");
  719. else {
  720. struct devlog_info *dinfo = seq->private;
  721. int fidx = (uintptr_t)v - 2;
  722. unsigned long index;
  723. struct fw_devlog_e *e;
  724. /* Get a pointer to the log entry to display. Skip unused log
  725. * entries.
  726. */
  727. index = dinfo->first + fidx;
  728. if (index >= dinfo->nentries)
  729. index -= dinfo->nentries;
  730. e = &dinfo->log[index];
  731. if (e->timestamp == 0)
  732. return 0;
  733. /* Print the message. This depends on the firmware using
  734. * exactly the same formating strings as the kernel so we may
  735. * eventually have to put a format interpreter in here ...
  736. */
  737. seq_printf(seq, "%10d %15llu %8s %8s ",
  738. e->seqno, e->timestamp,
  739. (e->level < ARRAY_SIZE(devlog_level_strings)
  740. ? devlog_level_strings[e->level]
  741. : "UNKNOWN"),
  742. (e->facility < ARRAY_SIZE(devlog_facility_strings)
  743. ? devlog_facility_strings[e->facility]
  744. : "UNKNOWN"));
  745. seq_printf(seq, e->fmt, e->params[0], e->params[1],
  746. e->params[2], e->params[3], e->params[4],
  747. e->params[5], e->params[6], e->params[7]);
  748. }
  749. return 0;
  750. }
  751. /* Sequential File Operations for Device Log.
  752. */
  753. static inline void *devlog_get_idx(struct devlog_info *dinfo, loff_t pos)
  754. {
  755. if (pos > dinfo->nentries)
  756. return NULL;
  757. return (void *)(uintptr_t)(pos + 1);
  758. }
  759. static void *devlog_start(struct seq_file *seq, loff_t *pos)
  760. {
  761. struct devlog_info *dinfo = seq->private;
  762. return (*pos
  763. ? devlog_get_idx(dinfo, *pos)
  764. : SEQ_START_TOKEN);
  765. }
  766. static void *devlog_next(struct seq_file *seq, void *v, loff_t *pos)
  767. {
  768. struct devlog_info *dinfo = seq->private;
  769. (*pos)++;
  770. return devlog_get_idx(dinfo, *pos);
  771. }
  772. static void devlog_stop(struct seq_file *seq, void *v)
  773. {
  774. }
  775. static const struct seq_operations devlog_seq_ops = {
  776. .start = devlog_start,
  777. .next = devlog_next,
  778. .stop = devlog_stop,
  779. .show = devlog_show
  780. };
  781. /* Set up for reading the firmware's device log. We read the entire log here
  782. * and then display it incrementally in devlog_show().
  783. */
  784. static int devlog_open(struct inode *inode, struct file *file)
  785. {
  786. struct adapter *adap = inode->i_private;
  787. struct devlog_params *dparams = &adap->params.devlog;
  788. struct devlog_info *dinfo;
  789. unsigned int index;
  790. u32 fseqno;
  791. int ret;
  792. /* If we don't know where the log is we can't do anything.
  793. */
  794. if (dparams->start == 0)
  795. return -ENXIO;
  796. /* Allocate the space to read in the firmware's device log and set up
  797. * for the iterated call to our display function.
  798. */
  799. dinfo = __seq_open_private(file, &devlog_seq_ops,
  800. sizeof(*dinfo) + dparams->size);
  801. if (!dinfo)
  802. return -ENOMEM;
  803. /* Record the basic log buffer information and read in the raw log.
  804. */
  805. dinfo->nentries = (dparams->size / sizeof(struct fw_devlog_e));
  806. dinfo->first = 0;
  807. spin_lock(&adap->win0_lock);
  808. ret = t4_memory_rw(adap, adap->params.drv_memwin, dparams->memtype,
  809. dparams->start, dparams->size, (__be32 *)dinfo->log,
  810. T4_MEMORY_READ);
  811. spin_unlock(&adap->win0_lock);
  812. if (ret) {
  813. seq_release_private(inode, file);
  814. return ret;
  815. }
  816. /* Translate log multi-byte integral elements into host native format
  817. * and determine where the first entry in the log is.
  818. */
  819. for (fseqno = ~((u32)0), index = 0; index < dinfo->nentries; index++) {
  820. struct fw_devlog_e *e = &dinfo->log[index];
  821. int i;
  822. __u32 seqno;
  823. if (e->timestamp == 0)
  824. continue;
  825. e->timestamp = (__force __be64)be64_to_cpu(e->timestamp);
  826. seqno = be32_to_cpu(e->seqno);
  827. for (i = 0; i < 8; i++)
  828. e->params[i] =
  829. (__force __be32)be32_to_cpu(e->params[i]);
  830. if (seqno < fseqno) {
  831. fseqno = seqno;
  832. dinfo->first = index;
  833. }
  834. }
  835. return 0;
  836. }
  837. static const struct file_operations devlog_fops = {
  838. .owner = THIS_MODULE,
  839. .open = devlog_open,
  840. .read = seq_read,
  841. .llseek = seq_lseek,
  842. .release = seq_release_private
  843. };
  844. static int mbox_show(struct seq_file *seq, void *v)
  845. {
  846. static const char * const owner[] = { "none", "FW", "driver",
  847. "unknown" };
  848. int i;
  849. unsigned int mbox = (uintptr_t)seq->private & 7;
  850. struct adapter *adap = seq->private - mbox;
  851. void __iomem *addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
  852. unsigned int ctrl_reg = (is_t4(adap->params.chip)
  853. ? CIM_PF_MAILBOX_CTRL_A
  854. : CIM_PF_MAILBOX_CTRL_SHADOW_COPY_A);
  855. void __iomem *ctrl = adap->regs + PF_REG(mbox, ctrl_reg);
  856. i = MBOWNER_G(readl(ctrl));
  857. seq_printf(seq, "mailbox owned by %s\n\n", owner[i]);
  858. for (i = 0; i < MBOX_LEN; i += 8)
  859. seq_printf(seq, "%016llx\n",
  860. (unsigned long long)readq(addr + i));
  861. return 0;
  862. }
  863. static int mbox_open(struct inode *inode, struct file *file)
  864. {
  865. return single_open(file, mbox_show, inode->i_private);
  866. }
  867. static ssize_t mbox_write(struct file *file, const char __user *buf,
  868. size_t count, loff_t *pos)
  869. {
  870. int i;
  871. char c = '\n', s[256];
  872. unsigned long long data[8];
  873. const struct inode *ino;
  874. unsigned int mbox;
  875. struct adapter *adap;
  876. void __iomem *addr;
  877. void __iomem *ctrl;
  878. if (count > sizeof(s) - 1 || !count)
  879. return -EINVAL;
  880. if (copy_from_user(s, buf, count))
  881. return -EFAULT;
  882. s[count] = '\0';
  883. if (sscanf(s, "%llx %llx %llx %llx %llx %llx %llx %llx%c", &data[0],
  884. &data[1], &data[2], &data[3], &data[4], &data[5], &data[6],
  885. &data[7], &c) < 8 || c != '\n')
  886. return -EINVAL;
  887. ino = FILE_DATA(file);
  888. mbox = (uintptr_t)ino->i_private & 7;
  889. adap = ino->i_private - mbox;
  890. addr = adap->regs + PF_REG(mbox, CIM_PF_MAILBOX_DATA_A);
  891. ctrl = addr + MBOX_LEN;
  892. if (MBOWNER_G(readl(ctrl)) != X_MBOWNER_PL)
  893. return -EBUSY;
  894. for (i = 0; i < 8; i++)
  895. writeq(data[i], addr + 8 * i);
  896. writel(MBMSGVALID_F | MBOWNER_V(X_MBOWNER_FW), ctrl);
  897. return count;
  898. }
  899. static const struct file_operations mbox_debugfs_fops = {
  900. .owner = THIS_MODULE,
  901. .open = mbox_open,
  902. .read = seq_read,
  903. .llseek = seq_lseek,
  904. .release = single_release,
  905. .write = mbox_write
  906. };
  907. static ssize_t flash_read(struct file *file, char __user *buf, size_t count,
  908. loff_t *ppos)
  909. {
  910. loff_t pos = *ppos;
  911. loff_t avail = FILE_DATA(file)->i_size;
  912. struct adapter *adap = file->private_data;
  913. if (pos < 0)
  914. return -EINVAL;
  915. if (pos >= avail)
  916. return 0;
  917. if (count > avail - pos)
  918. count = avail - pos;
  919. while (count) {
  920. size_t len;
  921. int ret, ofst;
  922. u8 data[256];
  923. ofst = pos & 3;
  924. len = min(count + ofst, sizeof(data));
  925. ret = t4_read_flash(adap, pos - ofst, (len + 3) / 4,
  926. (u32 *)data, 1);
  927. if (ret)
  928. return ret;
  929. len -= ofst;
  930. if (copy_to_user(buf, data + ofst, len))
  931. return -EFAULT;
  932. buf += len;
  933. pos += len;
  934. count -= len;
  935. }
  936. count = pos - *ppos;
  937. *ppos = pos;
  938. return count;
  939. }
  940. static const struct file_operations flash_debugfs_fops = {
  941. .owner = THIS_MODULE,
  942. .open = mem_open,
  943. .read = flash_read,
  944. };
  945. static inline void tcamxy2valmask(u64 x, u64 y, u8 *addr, u64 *mask)
  946. {
  947. *mask = x | y;
  948. y = (__force u64)cpu_to_be64(y);
  949. memcpy(addr, (char *)&y + 2, ETH_ALEN);
  950. }
  951. static int mps_tcam_show(struct seq_file *seq, void *v)
  952. {
  953. if (v == SEQ_START_TOKEN)
  954. seq_puts(seq, "Idx Ethernet address Mask Vld Ports PF"
  955. " VF Replication "
  956. "P0 P1 P2 P3 ML\n");
  957. else {
  958. u64 mask;
  959. u8 addr[ETH_ALEN];
  960. struct adapter *adap = seq->private;
  961. unsigned int idx = (uintptr_t)v - 2;
  962. u64 tcamy = t4_read_reg64(adap, MPS_CLS_TCAM_Y_L(idx));
  963. u64 tcamx = t4_read_reg64(adap, MPS_CLS_TCAM_X_L(idx));
  964. u32 cls_lo = t4_read_reg(adap, MPS_CLS_SRAM_L(idx));
  965. u32 cls_hi = t4_read_reg(adap, MPS_CLS_SRAM_H(idx));
  966. u32 rplc[4] = {0, 0, 0, 0};
  967. if (tcamx & tcamy) {
  968. seq_printf(seq, "%3u -\n", idx);
  969. goto out;
  970. }
  971. if (cls_lo & REPLICATE_F) {
  972. struct fw_ldst_cmd ldst_cmd;
  973. int ret;
  974. memset(&ldst_cmd, 0, sizeof(ldst_cmd));
  975. ldst_cmd.op_to_addrspace =
  976. htonl(FW_CMD_OP_V(FW_LDST_CMD) |
  977. FW_CMD_REQUEST_F |
  978. FW_CMD_READ_F |
  979. FW_LDST_CMD_ADDRSPACE_V(
  980. FW_LDST_ADDRSPC_MPS));
  981. ldst_cmd.cycles_to_len16 = htonl(FW_LEN16(ldst_cmd));
  982. ldst_cmd.u.mps.fid_ctl =
  983. htons(FW_LDST_CMD_FID_V(FW_LDST_MPS_RPLC) |
  984. FW_LDST_CMD_CTL_V(idx));
  985. ret = t4_wr_mbox(adap, adap->mbox, &ldst_cmd,
  986. sizeof(ldst_cmd), &ldst_cmd);
  987. if (ret)
  988. dev_warn(adap->pdev_dev, "Can't read MPS "
  989. "replication map for idx %d: %d\n",
  990. idx, -ret);
  991. else {
  992. rplc[0] = ntohl(ldst_cmd.u.mps.rplc31_0);
  993. rplc[1] = ntohl(ldst_cmd.u.mps.rplc63_32);
  994. rplc[2] = ntohl(ldst_cmd.u.mps.rplc95_64);
  995. rplc[3] = ntohl(ldst_cmd.u.mps.rplc127_96);
  996. }
  997. }
  998. tcamxy2valmask(tcamx, tcamy, addr, &mask);
  999. seq_printf(seq, "%3u %02x:%02x:%02x:%02x:%02x:%02x %012llx"
  1000. "%3c %#x%4u%4d",
  1001. idx, addr[0], addr[1], addr[2], addr[3], addr[4],
  1002. addr[5], (unsigned long long)mask,
  1003. (cls_lo & SRAM_VLD_F) ? 'Y' : 'N', PORTMAP_G(cls_hi),
  1004. PF_G(cls_lo),
  1005. (cls_lo & VF_VALID_F) ? VF_G(cls_lo) : -1);
  1006. if (cls_lo & REPLICATE_F)
  1007. seq_printf(seq, " %08x %08x %08x %08x",
  1008. rplc[3], rplc[2], rplc[1], rplc[0]);
  1009. else
  1010. seq_printf(seq, "%36c", ' ');
  1011. seq_printf(seq, "%4u%3u%3u%3u %#x\n",
  1012. SRAM_PRIO0_G(cls_lo), SRAM_PRIO1_G(cls_lo),
  1013. SRAM_PRIO2_G(cls_lo), SRAM_PRIO3_G(cls_lo),
  1014. (cls_lo >> MULTILISTEN0_S) & 0xf);
  1015. }
  1016. out: return 0;
  1017. }
  1018. static inline void *mps_tcam_get_idx(struct seq_file *seq, loff_t pos)
  1019. {
  1020. struct adapter *adap = seq->private;
  1021. int max_mac_addr = is_t4(adap->params.chip) ?
  1022. NUM_MPS_CLS_SRAM_L_INSTANCES :
  1023. NUM_MPS_T5_CLS_SRAM_L_INSTANCES;
  1024. return ((pos <= max_mac_addr) ? (void *)(uintptr_t)(pos + 1) : NULL);
  1025. }
  1026. static void *mps_tcam_start(struct seq_file *seq, loff_t *pos)
  1027. {
  1028. return *pos ? mps_tcam_get_idx(seq, *pos) : SEQ_START_TOKEN;
  1029. }
  1030. static void *mps_tcam_next(struct seq_file *seq, void *v, loff_t *pos)
  1031. {
  1032. ++*pos;
  1033. return mps_tcam_get_idx(seq, *pos);
  1034. }
  1035. static void mps_tcam_stop(struct seq_file *seq, void *v)
  1036. {
  1037. }
  1038. static const struct seq_operations mps_tcam_seq_ops = {
  1039. .start = mps_tcam_start,
  1040. .next = mps_tcam_next,
  1041. .stop = mps_tcam_stop,
  1042. .show = mps_tcam_show
  1043. };
  1044. static int mps_tcam_open(struct inode *inode, struct file *file)
  1045. {
  1046. int res = seq_open(file, &mps_tcam_seq_ops);
  1047. if (!res) {
  1048. struct seq_file *seq = file->private_data;
  1049. seq->private = inode->i_private;
  1050. }
  1051. return res;
  1052. }
  1053. static const struct file_operations mps_tcam_debugfs_fops = {
  1054. .owner = THIS_MODULE,
  1055. .open = mps_tcam_open,
  1056. .read = seq_read,
  1057. .llseek = seq_lseek,
  1058. .release = seq_release,
  1059. };
  1060. /* Display various sensor information.
  1061. */
  1062. static int sensors_show(struct seq_file *seq, void *v)
  1063. {
  1064. struct adapter *adap = seq->private;
  1065. u32 param[7], val[7];
  1066. int ret;
  1067. /* Note that if the sensors haven't been initialized and turned on
  1068. * we'll get values of 0, so treat those as "<unknown>" ...
  1069. */
  1070. param[0] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
  1071. FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
  1072. FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_TMP));
  1073. param[1] = (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_DEV) |
  1074. FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_DEV_DIAG) |
  1075. FW_PARAMS_PARAM_Y_V(FW_PARAM_DEV_DIAG_VDD));
  1076. ret = t4_query_params(adap, adap->mbox, adap->fn, 0, 2,
  1077. param, val);
  1078. if (ret < 0 || val[0] == 0)
  1079. seq_puts(seq, "Temperature: <unknown>\n");
  1080. else
  1081. seq_printf(seq, "Temperature: %dC\n", val[0]);
  1082. if (ret < 0 || val[1] == 0)
  1083. seq_puts(seq, "Core VDD: <unknown>\n");
  1084. else
  1085. seq_printf(seq, "Core VDD: %dmV\n", val[1]);
  1086. return 0;
  1087. }
  1088. DEFINE_SIMPLE_DEBUGFS_FILE(sensors);
  1089. #if IS_ENABLED(CONFIG_IPV6)
  1090. static int clip_tbl_open(struct inode *inode, struct file *file)
  1091. {
  1092. return single_open(file, clip_tbl_show, inode->i_private);
  1093. }
  1094. static const struct file_operations clip_tbl_debugfs_fops = {
  1095. .owner = THIS_MODULE,
  1096. .open = clip_tbl_open,
  1097. .read = seq_read,
  1098. .llseek = seq_lseek,
  1099. .release = single_release
  1100. };
  1101. #endif
  1102. /*RSS Table.
  1103. */
  1104. static int rss_show(struct seq_file *seq, void *v, int idx)
  1105. {
  1106. u16 *entry = v;
  1107. seq_printf(seq, "%4d: %4u %4u %4u %4u %4u %4u %4u %4u\n",
  1108. idx * 8, entry[0], entry[1], entry[2], entry[3], entry[4],
  1109. entry[5], entry[6], entry[7]);
  1110. return 0;
  1111. }
  1112. static int rss_open(struct inode *inode, struct file *file)
  1113. {
  1114. int ret;
  1115. struct seq_tab *p;
  1116. struct adapter *adap = inode->i_private;
  1117. p = seq_open_tab(file, RSS_NENTRIES / 8, 8 * sizeof(u16), 0, rss_show);
  1118. if (!p)
  1119. return -ENOMEM;
  1120. ret = t4_read_rss(adap, (u16 *)p->data);
  1121. if (ret)
  1122. seq_release_private(inode, file);
  1123. return ret;
  1124. }
  1125. static const struct file_operations rss_debugfs_fops = {
  1126. .owner = THIS_MODULE,
  1127. .open = rss_open,
  1128. .read = seq_read,
  1129. .llseek = seq_lseek,
  1130. .release = seq_release_private
  1131. };
  1132. /* RSS Configuration.
  1133. */
  1134. /* Small utility function to return the strings "yes" or "no" if the supplied
  1135. * argument is non-zero.
  1136. */
  1137. static const char *yesno(int x)
  1138. {
  1139. static const char *yes = "yes";
  1140. static const char *no = "no";
  1141. return x ? yes : no;
  1142. }
  1143. static int rss_config_show(struct seq_file *seq, void *v)
  1144. {
  1145. struct adapter *adapter = seq->private;
  1146. static const char * const keymode[] = {
  1147. "global",
  1148. "global and per-VF scramble",
  1149. "per-PF and per-VF scramble",
  1150. "per-VF and per-VF scramble",
  1151. };
  1152. u32 rssconf;
  1153. rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_A);
  1154. seq_printf(seq, "TP_RSS_CONFIG: %#x\n", rssconf);
  1155. seq_printf(seq, " Tnl4TupEnIpv6: %3s\n", yesno(rssconf &
  1156. TNL4TUPENIPV6_F));
  1157. seq_printf(seq, " Tnl2TupEnIpv6: %3s\n", yesno(rssconf &
  1158. TNL2TUPENIPV6_F));
  1159. seq_printf(seq, " Tnl4TupEnIpv4: %3s\n", yesno(rssconf &
  1160. TNL4TUPENIPV4_F));
  1161. seq_printf(seq, " Tnl2TupEnIpv4: %3s\n", yesno(rssconf &
  1162. TNL2TUPENIPV4_F));
  1163. seq_printf(seq, " TnlTcpSel: %3s\n", yesno(rssconf & TNLTCPSEL_F));
  1164. seq_printf(seq, " TnlIp6Sel: %3s\n", yesno(rssconf & TNLIP6SEL_F));
  1165. seq_printf(seq, " TnlVrtSel: %3s\n", yesno(rssconf & TNLVRTSEL_F));
  1166. seq_printf(seq, " TnlMapEn: %3s\n", yesno(rssconf & TNLMAPEN_F));
  1167. seq_printf(seq, " OfdHashSave: %3s\n", yesno(rssconf &
  1168. OFDHASHSAVE_F));
  1169. seq_printf(seq, " OfdVrtSel: %3s\n", yesno(rssconf & OFDVRTSEL_F));
  1170. seq_printf(seq, " OfdMapEn: %3s\n", yesno(rssconf & OFDMAPEN_F));
  1171. seq_printf(seq, " OfdLkpEn: %3s\n", yesno(rssconf & OFDLKPEN_F));
  1172. seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
  1173. SYN4TUPENIPV6_F));
  1174. seq_printf(seq, " Syn2TupEnIpv6: %3s\n", yesno(rssconf &
  1175. SYN2TUPENIPV6_F));
  1176. seq_printf(seq, " Syn4TupEnIpv4: %3s\n", yesno(rssconf &
  1177. SYN4TUPENIPV4_F));
  1178. seq_printf(seq, " Syn2TupEnIpv4: %3s\n", yesno(rssconf &
  1179. SYN2TUPENIPV4_F));
  1180. seq_printf(seq, " Syn4TupEnIpv6: %3s\n", yesno(rssconf &
  1181. SYN4TUPENIPV6_F));
  1182. seq_printf(seq, " SynIp6Sel: %3s\n", yesno(rssconf & SYNIP6SEL_F));
  1183. seq_printf(seq, " SynVrt6Sel: %3s\n", yesno(rssconf & SYNVRTSEL_F));
  1184. seq_printf(seq, " SynMapEn: %3s\n", yesno(rssconf & SYNMAPEN_F));
  1185. seq_printf(seq, " SynLkpEn: %3s\n", yesno(rssconf & SYNLKPEN_F));
  1186. seq_printf(seq, " ChnEn: %3s\n", yesno(rssconf &
  1187. CHANNELENABLE_F));
  1188. seq_printf(seq, " PrtEn: %3s\n", yesno(rssconf &
  1189. PORTENABLE_F));
  1190. seq_printf(seq, " TnlAllLkp: %3s\n", yesno(rssconf &
  1191. TNLALLLOOKUP_F));
  1192. seq_printf(seq, " VrtEn: %3s\n", yesno(rssconf &
  1193. VIRTENABLE_F));
  1194. seq_printf(seq, " CngEn: %3s\n", yesno(rssconf &
  1195. CONGESTIONENABLE_F));
  1196. seq_printf(seq, " HashToeplitz: %3s\n", yesno(rssconf &
  1197. HASHTOEPLITZ_F));
  1198. seq_printf(seq, " Udp4En: %3s\n", yesno(rssconf & UDPENABLE_F));
  1199. seq_printf(seq, " Disable: %3s\n", yesno(rssconf & DISABLE_F));
  1200. seq_puts(seq, "\n");
  1201. rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_TNL_A);
  1202. seq_printf(seq, "TP_RSS_CONFIG_TNL: %#x\n", rssconf);
  1203. seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
  1204. seq_printf(seq, " MaskFilter: %3d\n", MASKFILTER_G(rssconf));
  1205. if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
  1206. seq_printf(seq, " HashAll: %3s\n",
  1207. yesno(rssconf & HASHALL_F));
  1208. seq_printf(seq, " HashEth: %3s\n",
  1209. yesno(rssconf & HASHETH_F));
  1210. }
  1211. seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
  1212. seq_puts(seq, "\n");
  1213. rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_OFD_A);
  1214. seq_printf(seq, "TP_RSS_CONFIG_OFD: %#x\n", rssconf);
  1215. seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
  1216. seq_printf(seq, " RRCplMapEn: %3s\n", yesno(rssconf &
  1217. RRCPLMAPEN_F));
  1218. seq_printf(seq, " RRCplQueWidth: %3d\n", RRCPLQUEWIDTH_G(rssconf));
  1219. seq_puts(seq, "\n");
  1220. rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_SYN_A);
  1221. seq_printf(seq, "TP_RSS_CONFIG_SYN: %#x\n", rssconf);
  1222. seq_printf(seq, " MaskSize: %3d\n", MASKSIZE_G(rssconf));
  1223. seq_printf(seq, " UseWireCh: %3s\n", yesno(rssconf & USEWIRECH_F));
  1224. seq_puts(seq, "\n");
  1225. rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_VRT_A);
  1226. seq_printf(seq, "TP_RSS_CONFIG_VRT: %#x\n", rssconf);
  1227. if (CHELSIO_CHIP_VERSION(adapter->params.chip) > CHELSIO_T5) {
  1228. seq_printf(seq, " KeyWrAddrX: %3d\n",
  1229. KEYWRADDRX_G(rssconf));
  1230. seq_printf(seq, " KeyExtend: %3s\n",
  1231. yesno(rssconf & KEYEXTEND_F));
  1232. }
  1233. seq_printf(seq, " VfRdRg: %3s\n", yesno(rssconf & VFRDRG_F));
  1234. seq_printf(seq, " VfRdEn: %3s\n", yesno(rssconf & VFRDEN_F));
  1235. seq_printf(seq, " VfPerrEn: %3s\n", yesno(rssconf & VFPERREN_F));
  1236. seq_printf(seq, " KeyPerrEn: %3s\n", yesno(rssconf & KEYPERREN_F));
  1237. seq_printf(seq, " DisVfVlan: %3s\n", yesno(rssconf &
  1238. DISABLEVLAN_F));
  1239. seq_printf(seq, " EnUpSwt: %3s\n", yesno(rssconf & ENABLEUP0_F));
  1240. seq_printf(seq, " HashDelay: %3d\n", HASHDELAY_G(rssconf));
  1241. if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5)
  1242. seq_printf(seq, " VfWrAddr: %3d\n", VFWRADDR_G(rssconf));
  1243. seq_printf(seq, " KeyMode: %s\n", keymode[KEYMODE_G(rssconf)]);
  1244. seq_printf(seq, " VfWrEn: %3s\n", yesno(rssconf & VFWREN_F));
  1245. seq_printf(seq, " KeyWrEn: %3s\n", yesno(rssconf & KEYWREN_F));
  1246. seq_printf(seq, " KeyWrAddr: %3d\n", KEYWRADDR_G(rssconf));
  1247. seq_puts(seq, "\n");
  1248. rssconf = t4_read_reg(adapter, TP_RSS_CONFIG_CNG_A);
  1249. seq_printf(seq, "TP_RSS_CONFIG_CNG: %#x\n", rssconf);
  1250. seq_printf(seq, " ChnCount3: %3s\n", yesno(rssconf & CHNCOUNT3_F));
  1251. seq_printf(seq, " ChnCount2: %3s\n", yesno(rssconf & CHNCOUNT2_F));
  1252. seq_printf(seq, " ChnCount1: %3s\n", yesno(rssconf & CHNCOUNT1_F));
  1253. seq_printf(seq, " ChnCount0: %3s\n", yesno(rssconf & CHNCOUNT0_F));
  1254. seq_printf(seq, " ChnUndFlow3: %3s\n", yesno(rssconf &
  1255. CHNUNDFLOW3_F));
  1256. seq_printf(seq, " ChnUndFlow2: %3s\n", yesno(rssconf &
  1257. CHNUNDFLOW2_F));
  1258. seq_printf(seq, " ChnUndFlow1: %3s\n", yesno(rssconf &
  1259. CHNUNDFLOW1_F));
  1260. seq_printf(seq, " ChnUndFlow0: %3s\n", yesno(rssconf &
  1261. CHNUNDFLOW0_F));
  1262. seq_printf(seq, " RstChn3: %3s\n", yesno(rssconf & RSTCHN3_F));
  1263. seq_printf(seq, " RstChn2: %3s\n", yesno(rssconf & RSTCHN2_F));
  1264. seq_printf(seq, " RstChn1: %3s\n", yesno(rssconf & RSTCHN1_F));
  1265. seq_printf(seq, " RstChn0: %3s\n", yesno(rssconf & RSTCHN0_F));
  1266. seq_printf(seq, " UpdVld: %3s\n", yesno(rssconf & UPDVLD_F));
  1267. seq_printf(seq, " Xoff: %3s\n", yesno(rssconf & XOFF_F));
  1268. seq_printf(seq, " UpdChn3: %3s\n", yesno(rssconf & UPDCHN3_F));
  1269. seq_printf(seq, " UpdChn2: %3s\n", yesno(rssconf & UPDCHN2_F));
  1270. seq_printf(seq, " UpdChn1: %3s\n", yesno(rssconf & UPDCHN1_F));
  1271. seq_printf(seq, " UpdChn0: %3s\n", yesno(rssconf & UPDCHN0_F));
  1272. seq_printf(seq, " Queue: %3d\n", QUEUE_G(rssconf));
  1273. return 0;
  1274. }
  1275. DEFINE_SIMPLE_DEBUGFS_FILE(rss_config);
  1276. /* RSS Secret Key.
  1277. */
  1278. static int rss_key_show(struct seq_file *seq, void *v)
  1279. {
  1280. u32 key[10];
  1281. t4_read_rss_key(seq->private, key);
  1282. seq_printf(seq, "%08x%08x%08x%08x%08x%08x%08x%08x%08x%08x\n",
  1283. key[9], key[8], key[7], key[6], key[5], key[4], key[3],
  1284. key[2], key[1], key[0]);
  1285. return 0;
  1286. }
  1287. static int rss_key_open(struct inode *inode, struct file *file)
  1288. {
  1289. return single_open(file, rss_key_show, inode->i_private);
  1290. }
  1291. static ssize_t rss_key_write(struct file *file, const char __user *buf,
  1292. size_t count, loff_t *pos)
  1293. {
  1294. int i, j;
  1295. u32 key[10];
  1296. char s[100], *p;
  1297. struct adapter *adap = FILE_DATA(file)->i_private;
  1298. if (count > sizeof(s) - 1)
  1299. return -EINVAL;
  1300. if (copy_from_user(s, buf, count))
  1301. return -EFAULT;
  1302. for (i = count; i > 0 && isspace(s[i - 1]); i--)
  1303. ;
  1304. s[i] = '\0';
  1305. for (p = s, i = 9; i >= 0; i--) {
  1306. key[i] = 0;
  1307. for (j = 0; j < 8; j++, p++) {
  1308. if (!isxdigit(*p))
  1309. return -EINVAL;
  1310. key[i] = (key[i] << 4) | hex2val(*p);
  1311. }
  1312. }
  1313. t4_write_rss_key(adap, key, -1);
  1314. return count;
  1315. }
  1316. static const struct file_operations rss_key_debugfs_fops = {
  1317. .owner = THIS_MODULE,
  1318. .open = rss_key_open,
  1319. .read = seq_read,
  1320. .llseek = seq_lseek,
  1321. .release = single_release,
  1322. .write = rss_key_write
  1323. };
  1324. /* PF RSS Configuration.
  1325. */
  1326. struct rss_pf_conf {
  1327. u32 rss_pf_map;
  1328. u32 rss_pf_mask;
  1329. u32 rss_pf_config;
  1330. };
  1331. static int rss_pf_config_show(struct seq_file *seq, void *v, int idx)
  1332. {
  1333. struct rss_pf_conf *pfconf;
  1334. if (v == SEQ_START_TOKEN) {
  1335. /* use the 0th entry to dump the PF Map Index Size */
  1336. pfconf = seq->private + offsetof(struct seq_tab, data);
  1337. seq_printf(seq, "PF Map Index Size = %d\n\n",
  1338. LKPIDXSIZE_G(pfconf->rss_pf_map));
  1339. seq_puts(seq, " RSS PF VF Hash Tuple Enable Default\n");
  1340. seq_puts(seq, " Enable IPF Mask Mask IPv6 IPv4 UDP Queue\n");
  1341. seq_puts(seq, " PF Map Chn Prt Map Size Size Four Two Four Two Four Ch1 Ch0\n");
  1342. } else {
  1343. #define G_PFnLKPIDX(map, n) \
  1344. (((map) >> PF1LKPIDX_S*(n)) & PF0LKPIDX_M)
  1345. #define G_PFnMSKSIZE(mask, n) \
  1346. (((mask) >> PF1MSKSIZE_S*(n)) & PF1MSKSIZE_M)
  1347. pfconf = v;
  1348. seq_printf(seq, "%3d %3s %3s %3s %3d %3d %3d %3s %3s %3s %3s %3s %3d %3d\n",
  1349. idx,
  1350. yesno(pfconf->rss_pf_config & MAPENABLE_F),
  1351. yesno(pfconf->rss_pf_config & CHNENABLE_F),
  1352. yesno(pfconf->rss_pf_config & PRTENABLE_F),
  1353. G_PFnLKPIDX(pfconf->rss_pf_map, idx),
  1354. G_PFnMSKSIZE(pfconf->rss_pf_mask, idx),
  1355. IVFWIDTH_G(pfconf->rss_pf_config),
  1356. yesno(pfconf->rss_pf_config & IP6FOURTUPEN_F),
  1357. yesno(pfconf->rss_pf_config & IP6TWOTUPEN_F),
  1358. yesno(pfconf->rss_pf_config & IP4FOURTUPEN_F),
  1359. yesno(pfconf->rss_pf_config & IP4TWOTUPEN_F),
  1360. yesno(pfconf->rss_pf_config & UDPFOURTUPEN_F),
  1361. CH1DEFAULTQUEUE_G(pfconf->rss_pf_config),
  1362. CH0DEFAULTQUEUE_G(pfconf->rss_pf_config));
  1363. #undef G_PFnLKPIDX
  1364. #undef G_PFnMSKSIZE
  1365. }
  1366. return 0;
  1367. }
  1368. static int rss_pf_config_open(struct inode *inode, struct file *file)
  1369. {
  1370. struct adapter *adapter = inode->i_private;
  1371. struct seq_tab *p;
  1372. u32 rss_pf_map, rss_pf_mask;
  1373. struct rss_pf_conf *pfconf;
  1374. int pf;
  1375. p = seq_open_tab(file, 8, sizeof(*pfconf), 1, rss_pf_config_show);
  1376. if (!p)
  1377. return -ENOMEM;
  1378. pfconf = (struct rss_pf_conf *)p->data;
  1379. rss_pf_map = t4_read_rss_pf_map(adapter);
  1380. rss_pf_mask = t4_read_rss_pf_mask(adapter);
  1381. for (pf = 0; pf < 8; pf++) {
  1382. pfconf[pf].rss_pf_map = rss_pf_map;
  1383. pfconf[pf].rss_pf_mask = rss_pf_mask;
  1384. t4_read_rss_pf_config(adapter, pf, &pfconf[pf].rss_pf_config);
  1385. }
  1386. return 0;
  1387. }
  1388. static const struct file_operations rss_pf_config_debugfs_fops = {
  1389. .owner = THIS_MODULE,
  1390. .open = rss_pf_config_open,
  1391. .read = seq_read,
  1392. .llseek = seq_lseek,
  1393. .release = seq_release_private
  1394. };
  1395. /* VF RSS Configuration.
  1396. */
  1397. struct rss_vf_conf {
  1398. u32 rss_vf_vfl;
  1399. u32 rss_vf_vfh;
  1400. };
  1401. static int rss_vf_config_show(struct seq_file *seq, void *v, int idx)
  1402. {
  1403. if (v == SEQ_START_TOKEN) {
  1404. seq_puts(seq, " RSS Hash Tuple Enable\n");
  1405. seq_puts(seq, " Enable IVF Dis Enb IPv6 IPv4 UDP Def Secret Key\n");
  1406. seq_puts(seq, " VF Chn Prt Map VLAN uP Four Two Four Two Four Que Idx Hash\n");
  1407. } else {
  1408. struct rss_vf_conf *vfconf = v;
  1409. seq_printf(seq, "%3d %3s %3s %3d %3s %3s %3s %3s %3s %3s %3s %4d %3d %#10x\n",
  1410. idx,
  1411. yesno(vfconf->rss_vf_vfh & VFCHNEN_F),
  1412. yesno(vfconf->rss_vf_vfh & VFPRTEN_F),
  1413. VFLKPIDX_G(vfconf->rss_vf_vfh),
  1414. yesno(vfconf->rss_vf_vfh & VFVLNEX_F),
  1415. yesno(vfconf->rss_vf_vfh & VFUPEN_F),
  1416. yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
  1417. yesno(vfconf->rss_vf_vfh & VFIP6TWOTUPEN_F),
  1418. yesno(vfconf->rss_vf_vfh & VFIP4FOURTUPEN_F),
  1419. yesno(vfconf->rss_vf_vfh & VFIP4TWOTUPEN_F),
  1420. yesno(vfconf->rss_vf_vfh & ENABLEUDPHASH_F),
  1421. DEFAULTQUEUE_G(vfconf->rss_vf_vfh),
  1422. KEYINDEX_G(vfconf->rss_vf_vfh),
  1423. vfconf->rss_vf_vfl);
  1424. }
  1425. return 0;
  1426. }
  1427. static int rss_vf_config_open(struct inode *inode, struct file *file)
  1428. {
  1429. struct adapter *adapter = inode->i_private;
  1430. struct seq_tab *p;
  1431. struct rss_vf_conf *vfconf;
  1432. int vf;
  1433. p = seq_open_tab(file, 128, sizeof(*vfconf), 1, rss_vf_config_show);
  1434. if (!p)
  1435. return -ENOMEM;
  1436. vfconf = (struct rss_vf_conf *)p->data;
  1437. for (vf = 0; vf < 128; vf++) {
  1438. t4_read_rss_vf_config(adapter, vf, &vfconf[vf].rss_vf_vfl,
  1439. &vfconf[vf].rss_vf_vfh);
  1440. }
  1441. return 0;
  1442. }
  1443. static const struct file_operations rss_vf_config_debugfs_fops = {
  1444. .owner = THIS_MODULE,
  1445. .open = rss_vf_config_open,
  1446. .read = seq_read,
  1447. .llseek = seq_lseek,
  1448. .release = seq_release_private
  1449. };
  1450. /**
  1451. * ethqset2pinfo - return port_info of an Ethernet Queue Set
  1452. * @adap: the adapter
  1453. * @qset: Ethernet Queue Set
  1454. */
  1455. static inline struct port_info *ethqset2pinfo(struct adapter *adap, int qset)
  1456. {
  1457. int pidx;
  1458. for_each_port(adap, pidx) {
  1459. struct port_info *pi = adap2pinfo(adap, pidx);
  1460. if (qset >= pi->first_qset &&
  1461. qset < pi->first_qset + pi->nqsets)
  1462. return pi;
  1463. }
  1464. /* should never happen! */
  1465. BUG_ON(1);
  1466. return NULL;
  1467. }
  1468. static int sge_qinfo_show(struct seq_file *seq, void *v)
  1469. {
  1470. struct adapter *adap = seq->private;
  1471. int eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
  1472. int toe_entries = DIV_ROUND_UP(adap->sge.ofldqsets, 4);
  1473. int rdma_entries = DIV_ROUND_UP(adap->sge.rdmaqs, 4);
  1474. int ciq_entries = DIV_ROUND_UP(adap->sge.rdmaciqs, 4);
  1475. int ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
  1476. int i, r = (uintptr_t)v - 1;
  1477. int toe_idx = r - eth_entries;
  1478. int rdma_idx = toe_idx - toe_entries;
  1479. int ciq_idx = rdma_idx - rdma_entries;
  1480. int ctrl_idx = ciq_idx - ciq_entries;
  1481. int fq_idx = ctrl_idx - ctrl_entries;
  1482. if (r)
  1483. seq_putc(seq, '\n');
  1484. #define S3(fmt_spec, s, v) \
  1485. do { \
  1486. seq_printf(seq, "%-12s", s); \
  1487. for (i = 0; i < n; ++i) \
  1488. seq_printf(seq, " %16" fmt_spec, v); \
  1489. seq_putc(seq, '\n'); \
  1490. } while (0)
  1491. #define S(s, v) S3("s", s, v)
  1492. #define T(s, v) S3("u", s, tx[i].v)
  1493. #define R(s, v) S3("u", s, rx[i].v)
  1494. if (r < eth_entries) {
  1495. int base_qset = r * 4;
  1496. const struct sge_eth_rxq *rx = &adap->sge.ethrxq[base_qset];
  1497. const struct sge_eth_txq *tx = &adap->sge.ethtxq[base_qset];
  1498. int n = min(4, adap->sge.ethqsets - 4 * r);
  1499. S("QType:", "Ethernet");
  1500. S("Interface:",
  1501. rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
  1502. T("TxQ ID:", q.cntxt_id);
  1503. T("TxQ size:", q.size);
  1504. T("TxQ inuse:", q.in_use);
  1505. T("TxQ CIDX:", q.cidx);
  1506. T("TxQ PIDX:", q.pidx);
  1507. #ifdef CONFIG_CHELSIO_T4_DCB
  1508. T("DCB Prio:", dcb_prio);
  1509. S3("u", "DCB PGID:",
  1510. (ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
  1511. 4*(7-tx[i].dcb_prio)) & 0xf);
  1512. S3("u", "DCB PFC:",
  1513. (ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
  1514. 1*(7-tx[i].dcb_prio)) & 0x1);
  1515. #endif
  1516. R("RspQ ID:", rspq.abs_id);
  1517. R("RspQ size:", rspq.size);
  1518. R("RspQE size:", rspq.iqe_len);
  1519. R("RspQ CIDX:", rspq.cidx);
  1520. R("RspQ Gen:", rspq.gen);
  1521. S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
  1522. S3("u", "Intr pktcnt:",
  1523. adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
  1524. R("FL ID:", fl.cntxt_id);
  1525. R("FL size:", fl.size - 8);
  1526. R("FL pend:", fl.pend_cred);
  1527. R("FL avail:", fl.avail);
  1528. R("FL PIDX:", fl.pidx);
  1529. R("FL CIDX:", fl.cidx);
  1530. } else if (toe_idx < toe_entries) {
  1531. const struct sge_ofld_rxq *rx = &adap->sge.ofldrxq[toe_idx * 4];
  1532. const struct sge_ofld_txq *tx = &adap->sge.ofldtxq[toe_idx * 4];
  1533. int n = min(4, adap->sge.ofldqsets - 4 * toe_idx);
  1534. S("QType:", "TOE");
  1535. T("TxQ ID:", q.cntxt_id);
  1536. T("TxQ size:", q.size);
  1537. T("TxQ inuse:", q.in_use);
  1538. T("TxQ CIDX:", q.cidx);
  1539. T("TxQ PIDX:", q.pidx);
  1540. R("RspQ ID:", rspq.abs_id);
  1541. R("RspQ size:", rspq.size);
  1542. R("RspQE size:", rspq.iqe_len);
  1543. R("RspQ CIDX:", rspq.cidx);
  1544. R("RspQ Gen:", rspq.gen);
  1545. S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
  1546. S3("u", "Intr pktcnt:",
  1547. adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
  1548. R("FL ID:", fl.cntxt_id);
  1549. R("FL size:", fl.size - 8);
  1550. R("FL pend:", fl.pend_cred);
  1551. R("FL avail:", fl.avail);
  1552. R("FL PIDX:", fl.pidx);
  1553. R("FL CIDX:", fl.cidx);
  1554. } else if (rdma_idx < rdma_entries) {
  1555. const struct sge_ofld_rxq *rx =
  1556. &adap->sge.rdmarxq[rdma_idx * 4];
  1557. int n = min(4, adap->sge.rdmaqs - 4 * rdma_idx);
  1558. S("QType:", "RDMA-CPL");
  1559. S("Interface:",
  1560. rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
  1561. R("RspQ ID:", rspq.abs_id);
  1562. R("RspQ size:", rspq.size);
  1563. R("RspQE size:", rspq.iqe_len);
  1564. R("RspQ CIDX:", rspq.cidx);
  1565. R("RspQ Gen:", rspq.gen);
  1566. S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
  1567. S3("u", "Intr pktcnt:",
  1568. adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
  1569. R("FL ID:", fl.cntxt_id);
  1570. R("FL size:", fl.size - 8);
  1571. R("FL pend:", fl.pend_cred);
  1572. R("FL avail:", fl.avail);
  1573. R("FL PIDX:", fl.pidx);
  1574. R("FL CIDX:", fl.cidx);
  1575. } else if (ciq_idx < ciq_entries) {
  1576. const struct sge_ofld_rxq *rx = &adap->sge.rdmaciq[ciq_idx * 4];
  1577. int n = min(4, adap->sge.rdmaciqs - 4 * ciq_idx);
  1578. S("QType:", "RDMA-CIQ");
  1579. S("Interface:",
  1580. rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
  1581. R("RspQ ID:", rspq.abs_id);
  1582. R("RspQ size:", rspq.size);
  1583. R("RspQE size:", rspq.iqe_len);
  1584. R("RspQ CIDX:", rspq.cidx);
  1585. R("RspQ Gen:", rspq.gen);
  1586. S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
  1587. S3("u", "Intr pktcnt:",
  1588. adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
  1589. } else if (ctrl_idx < ctrl_entries) {
  1590. const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4];
  1591. int n = min(4, adap->params.nports - 4 * ctrl_idx);
  1592. S("QType:", "Control");
  1593. T("TxQ ID:", q.cntxt_id);
  1594. T("TxQ size:", q.size);
  1595. T("TxQ inuse:", q.in_use);
  1596. T("TxQ CIDX:", q.cidx);
  1597. T("TxQ PIDX:", q.pidx);
  1598. } else if (fq_idx == 0) {
  1599. const struct sge_rspq *evtq = &adap->sge.fw_evtq;
  1600. seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
  1601. seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
  1602. seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
  1603. seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
  1604. seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
  1605. seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
  1606. seq_printf(seq, "%-12s %16u\n", "Intr delay:",
  1607. qtimer_val(adap, evtq));
  1608. seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
  1609. adap->sge.counter_val[evtq->pktcnt_idx]);
  1610. }
  1611. #undef R
  1612. #undef T
  1613. #undef S
  1614. #undef S3
  1615. return 0;
  1616. }
  1617. static int sge_queue_entries(const struct adapter *adap)
  1618. {
  1619. return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
  1620. DIV_ROUND_UP(adap->sge.ofldqsets, 4) +
  1621. DIV_ROUND_UP(adap->sge.rdmaqs, 4) +
  1622. DIV_ROUND_UP(adap->sge.rdmaciqs, 4) +
  1623. DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
  1624. }
  1625. static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
  1626. {
  1627. int entries = sge_queue_entries(seq->private);
  1628. return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
  1629. }
  1630. static void sge_queue_stop(struct seq_file *seq, void *v)
  1631. {
  1632. }
  1633. static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
  1634. {
  1635. int entries = sge_queue_entries(seq->private);
  1636. ++*pos;
  1637. return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
  1638. }
  1639. static const struct seq_operations sge_qinfo_seq_ops = {
  1640. .start = sge_queue_start,
  1641. .next = sge_queue_next,
  1642. .stop = sge_queue_stop,
  1643. .show = sge_qinfo_show
  1644. };
  1645. static int sge_qinfo_open(struct inode *inode, struct file *file)
  1646. {
  1647. int res = seq_open(file, &sge_qinfo_seq_ops);
  1648. if (!res) {
  1649. struct seq_file *seq = file->private_data;
  1650. seq->private = inode->i_private;
  1651. }
  1652. return res;
  1653. }
  1654. static const struct file_operations sge_qinfo_debugfs_fops = {
  1655. .owner = THIS_MODULE,
  1656. .open = sge_qinfo_open,
  1657. .read = seq_read,
  1658. .llseek = seq_lseek,
  1659. .release = seq_release,
  1660. };
  1661. int mem_open(struct inode *inode, struct file *file)
  1662. {
  1663. unsigned int mem;
  1664. struct adapter *adap;
  1665. file->private_data = inode->i_private;
  1666. mem = (uintptr_t)file->private_data & 0x3;
  1667. adap = file->private_data - mem;
  1668. (void)t4_fwcache(adap, FW_PARAM_DEV_FWCACHE_FLUSH);
  1669. return 0;
  1670. }
  1671. static ssize_t mem_read(struct file *file, char __user *buf, size_t count,
  1672. loff_t *ppos)
  1673. {
  1674. loff_t pos = *ppos;
  1675. loff_t avail = file_inode(file)->i_size;
  1676. unsigned int mem = (uintptr_t)file->private_data & 3;
  1677. struct adapter *adap = file->private_data - mem;
  1678. __be32 *data;
  1679. int ret;
  1680. if (pos < 0)
  1681. return -EINVAL;
  1682. if (pos >= avail)
  1683. return 0;
  1684. if (count > avail - pos)
  1685. count = avail - pos;
  1686. data = t4_alloc_mem(count);
  1687. if (!data)
  1688. return -ENOMEM;
  1689. spin_lock(&adap->win0_lock);
  1690. ret = t4_memory_rw(adap, 0, mem, pos, count, data, T4_MEMORY_READ);
  1691. spin_unlock(&adap->win0_lock);
  1692. if (ret) {
  1693. t4_free_mem(data);
  1694. return ret;
  1695. }
  1696. ret = copy_to_user(buf, data, count);
  1697. t4_free_mem(data);
  1698. if (ret)
  1699. return -EFAULT;
  1700. *ppos = pos + count;
  1701. return count;
  1702. }
  1703. static const struct file_operations mem_debugfs_fops = {
  1704. .owner = THIS_MODULE,
  1705. .open = simple_open,
  1706. .read = mem_read,
  1707. .llseek = default_llseek,
  1708. };
  1709. static void set_debugfs_file_size(struct dentry *de, loff_t size)
  1710. {
  1711. if (!IS_ERR(de) && de->d_inode)
  1712. de->d_inode->i_size = size;
  1713. }
  1714. static void add_debugfs_mem(struct adapter *adap, const char *name,
  1715. unsigned int idx, unsigned int size_mb)
  1716. {
  1717. debugfs_create_file_size(name, S_IRUSR, adap->debugfs_root,
  1718. (void *)adap + idx, &mem_debugfs_fops,
  1719. size_mb << 20);
  1720. }
  1721. /* Add an array of Debug FS files.
  1722. */
  1723. void add_debugfs_files(struct adapter *adap,
  1724. struct t4_debugfs_entry *files,
  1725. unsigned int nfiles)
  1726. {
  1727. int i;
  1728. /* debugfs support is best effort */
  1729. for (i = 0; i < nfiles; i++)
  1730. debugfs_create_file(files[i].name, files[i].mode,
  1731. adap->debugfs_root,
  1732. (void *)adap + files[i].data,
  1733. files[i].ops);
  1734. }
  1735. int t4_setup_debugfs(struct adapter *adap)
  1736. {
  1737. int i;
  1738. u32 size;
  1739. struct dentry *de;
  1740. static struct t4_debugfs_entry t4_debugfs_files[] = {
  1741. { "cim_la", &cim_la_fops, S_IRUSR, 0 },
  1742. { "cim_qcfg", &cim_qcfg_fops, S_IRUSR, 0 },
  1743. { "clk", &clk_debugfs_fops, S_IRUSR, 0 },
  1744. { "devlog", &devlog_fops, S_IRUSR, 0 },
  1745. { "mbox0", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 0 },
  1746. { "mbox1", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 1 },
  1747. { "mbox2", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 2 },
  1748. { "mbox3", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 3 },
  1749. { "mbox4", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 4 },
  1750. { "mbox5", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 5 },
  1751. { "mbox6", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 6 },
  1752. { "mbox7", &mbox_debugfs_fops, S_IRUSR | S_IWUSR, 7 },
  1753. { "l2t", &t4_l2t_fops, S_IRUSR, 0},
  1754. { "mps_tcam", &mps_tcam_debugfs_fops, S_IRUSR, 0 },
  1755. { "rss", &rss_debugfs_fops, S_IRUSR, 0 },
  1756. { "rss_config", &rss_config_debugfs_fops, S_IRUSR, 0 },
  1757. { "rss_key", &rss_key_debugfs_fops, S_IRUSR, 0 },
  1758. { "rss_pf_config", &rss_pf_config_debugfs_fops, S_IRUSR, 0 },
  1759. { "rss_vf_config", &rss_vf_config_debugfs_fops, S_IRUSR, 0 },
  1760. { "sge_qinfo", &sge_qinfo_debugfs_fops, S_IRUSR, 0 },
  1761. { "ibq_tp0", &cim_ibq_fops, S_IRUSR, 0 },
  1762. { "ibq_tp1", &cim_ibq_fops, S_IRUSR, 1 },
  1763. { "ibq_ulp", &cim_ibq_fops, S_IRUSR, 2 },
  1764. { "ibq_sge0", &cim_ibq_fops, S_IRUSR, 3 },
  1765. { "ibq_sge1", &cim_ibq_fops, S_IRUSR, 4 },
  1766. { "ibq_ncsi", &cim_ibq_fops, S_IRUSR, 5 },
  1767. { "obq_ulp0", &cim_obq_fops, S_IRUSR, 0 },
  1768. { "obq_ulp1", &cim_obq_fops, S_IRUSR, 1 },
  1769. { "obq_ulp2", &cim_obq_fops, S_IRUSR, 2 },
  1770. { "obq_ulp3", &cim_obq_fops, S_IRUSR, 3 },
  1771. { "obq_sge", &cim_obq_fops, S_IRUSR, 4 },
  1772. { "obq_ncsi", &cim_obq_fops, S_IRUSR, 5 },
  1773. { "tp_la", &tp_la_fops, S_IRUSR, 0 },
  1774. { "ulprx_la", &ulprx_la_fops, S_IRUSR, 0 },
  1775. { "sensors", &sensors_debugfs_fops, S_IRUSR, 0 },
  1776. { "pm_stats", &pm_stats_debugfs_fops, S_IRUSR, 0 },
  1777. { "cctrl", &cctrl_tbl_debugfs_fops, S_IRUSR, 0 },
  1778. #if IS_ENABLED(CONFIG_IPV6)
  1779. { "clip_tbl", &clip_tbl_debugfs_fops, S_IRUSR, 0 },
  1780. #endif
  1781. };
  1782. /* Debug FS nodes common to all T5 and later adapters.
  1783. */
  1784. static struct t4_debugfs_entry t5_debugfs_files[] = {
  1785. { "obq_sge_rx_q0", &cim_obq_fops, S_IRUSR, 6 },
  1786. { "obq_sge_rx_q1", &cim_obq_fops, S_IRUSR, 7 },
  1787. };
  1788. add_debugfs_files(adap,
  1789. t4_debugfs_files,
  1790. ARRAY_SIZE(t4_debugfs_files));
  1791. if (!is_t4(adap->params.chip))
  1792. add_debugfs_files(adap,
  1793. t5_debugfs_files,
  1794. ARRAY_SIZE(t5_debugfs_files));
  1795. i = t4_read_reg(adap, MA_TARGET_MEM_ENABLE_A);
  1796. if (i & EDRAM0_ENABLE_F) {
  1797. size = t4_read_reg(adap, MA_EDRAM0_BAR_A);
  1798. add_debugfs_mem(adap, "edc0", MEM_EDC0, EDRAM0_SIZE_G(size));
  1799. }
  1800. if (i & EDRAM1_ENABLE_F) {
  1801. size = t4_read_reg(adap, MA_EDRAM1_BAR_A);
  1802. add_debugfs_mem(adap, "edc1", MEM_EDC1, EDRAM1_SIZE_G(size));
  1803. }
  1804. if (is_t4(adap->params.chip)) {
  1805. size = t4_read_reg(adap, MA_EXT_MEMORY_BAR_A);
  1806. if (i & EXT_MEM_ENABLE_F)
  1807. add_debugfs_mem(adap, "mc", MEM_MC,
  1808. EXT_MEM_SIZE_G(size));
  1809. } else {
  1810. if (i & EXT_MEM0_ENABLE_F) {
  1811. size = t4_read_reg(adap, MA_EXT_MEMORY0_BAR_A);
  1812. add_debugfs_mem(adap, "mc0", MEM_MC0,
  1813. EXT_MEM0_SIZE_G(size));
  1814. }
  1815. if (i & EXT_MEM1_ENABLE_F) {
  1816. size = t4_read_reg(adap, MA_EXT_MEMORY1_BAR_A);
  1817. add_debugfs_mem(adap, "mc1", MEM_MC1,
  1818. EXT_MEM1_SIZE_G(size));
  1819. }
  1820. }
  1821. de = debugfs_create_file("flash", S_IRUSR, adap->debugfs_root, adap,
  1822. &flash_debugfs_fops);
  1823. set_debugfs_file_size(de, adap->params.sf_size);
  1824. return 0;
  1825. }