fpga-region.c 15 KB

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  1. /*
  2. * FPGA Region - Device Tree support for FPGA programming under Linux
  3. *
  4. * Copyright (C) 2013-2016 Altera Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #include <linux/fpga/fpga-bridge.h>
  19. #include <linux/fpga/fpga-mgr.h>
  20. #include <linux/idr.h>
  21. #include <linux/kernel.h>
  22. #include <linux/list.h>
  23. #include <linux/module.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/slab.h>
  26. #include <linux/spinlock.h>
  27. /**
  28. * struct fpga_region - FPGA Region structure
  29. * @dev: FPGA Region device
  30. * @mutex: enforces exclusive reference to region
  31. * @bridge_list: list of FPGA bridges specified in region
  32. * @info: fpga image specific information
  33. */
  34. struct fpga_region {
  35. struct device dev;
  36. struct mutex mutex; /* for exclusive reference to region */
  37. struct list_head bridge_list;
  38. struct fpga_image_info *info;
  39. };
  40. #define to_fpga_region(d) container_of(d, struct fpga_region, dev)
  41. static DEFINE_IDA(fpga_region_ida);
  42. static struct class *fpga_region_class;
  43. static const struct of_device_id fpga_region_of_match[] = {
  44. { .compatible = "fpga-region", },
  45. {},
  46. };
  47. MODULE_DEVICE_TABLE(of, fpga_region_of_match);
  48. static int fpga_region_of_node_match(struct device *dev, const void *data)
  49. {
  50. return dev->of_node == data;
  51. }
  52. /**
  53. * fpga_region_find - find FPGA region
  54. * @np: device node of FPGA Region
  55. * Caller will need to put_device(&region->dev) when done.
  56. * Returns FPGA Region struct or NULL
  57. */
  58. static struct fpga_region *fpga_region_find(struct device_node *np)
  59. {
  60. struct device *dev;
  61. dev = class_find_device(fpga_region_class, NULL, np,
  62. fpga_region_of_node_match);
  63. if (!dev)
  64. return NULL;
  65. return to_fpga_region(dev);
  66. }
  67. /**
  68. * fpga_region_get - get an exclusive reference to a fpga region
  69. * @region: FPGA Region struct
  70. *
  71. * Caller should call fpga_region_put() when done with region.
  72. *
  73. * Return fpga_region struct if successful.
  74. * Return -EBUSY if someone already has a reference to the region.
  75. * Return -ENODEV if @np is not a FPGA Region.
  76. */
  77. static struct fpga_region *fpga_region_get(struct fpga_region *region)
  78. {
  79. struct device *dev = &region->dev;
  80. if (!mutex_trylock(&region->mutex)) {
  81. dev_dbg(dev, "%s: FPGA Region already in use\n", __func__);
  82. return ERR_PTR(-EBUSY);
  83. }
  84. get_device(dev);
  85. of_node_get(dev->of_node);
  86. if (!try_module_get(dev->parent->driver->owner)) {
  87. of_node_put(dev->of_node);
  88. put_device(dev);
  89. mutex_unlock(&region->mutex);
  90. return ERR_PTR(-ENODEV);
  91. }
  92. dev_dbg(&region->dev, "get\n");
  93. return region;
  94. }
  95. /**
  96. * fpga_region_put - release a reference to a region
  97. *
  98. * @region: FPGA region
  99. */
  100. static void fpga_region_put(struct fpga_region *region)
  101. {
  102. struct device *dev = &region->dev;
  103. dev_dbg(&region->dev, "put\n");
  104. module_put(dev->parent->driver->owner);
  105. of_node_put(dev->of_node);
  106. put_device(dev);
  107. mutex_unlock(&region->mutex);
  108. }
  109. /**
  110. * fpga_region_get_manager - get exclusive reference for FPGA manager
  111. * @region: FPGA region
  112. *
  113. * Get FPGA Manager from "fpga-mgr" property or from ancestor region.
  114. *
  115. * Caller should call fpga_mgr_put() when done with manager.
  116. *
  117. * Return: fpga manager struct or IS_ERR() condition containing error code.
  118. */
  119. static struct fpga_manager *fpga_region_get_manager(struct fpga_region *region)
  120. {
  121. struct device *dev = &region->dev;
  122. struct device_node *np = dev->of_node;
  123. struct device_node *mgr_node;
  124. struct fpga_manager *mgr;
  125. of_node_get(np);
  126. while (np) {
  127. if (of_device_is_compatible(np, "fpga-region")) {
  128. mgr_node = of_parse_phandle(np, "fpga-mgr", 0);
  129. if (mgr_node) {
  130. mgr = of_fpga_mgr_get(mgr_node);
  131. of_node_put(np);
  132. return mgr;
  133. }
  134. }
  135. np = of_get_next_parent(np);
  136. }
  137. of_node_put(np);
  138. return ERR_PTR(-EINVAL);
  139. }
  140. /**
  141. * fpga_region_get_bridges - create a list of bridges
  142. * @region: FPGA region
  143. * @overlay: device node of the overlay
  144. *
  145. * Create a list of bridges including the parent bridge and the bridges
  146. * specified by "fpga-bridges" property. Note that the
  147. * fpga_bridges_enable/disable/put functions are all fine with an empty list
  148. * if that happens.
  149. *
  150. * Caller should call fpga_bridges_put(&region->bridge_list) when
  151. * done with the bridges.
  152. *
  153. * Return 0 for success (even if there are no bridges specified)
  154. * or -EBUSY if any of the bridges are in use.
  155. */
  156. static int fpga_region_get_bridges(struct fpga_region *region,
  157. struct device_node *overlay)
  158. {
  159. struct device *dev = &region->dev;
  160. struct device_node *region_np = dev->of_node;
  161. struct device_node *br, *np, *parent_br = NULL;
  162. int i, ret;
  163. /* If parent is a bridge, add to list */
  164. ret = fpga_bridge_get_to_list(region_np->parent, region->info,
  165. &region->bridge_list);
  166. if (ret == -EBUSY)
  167. return ret;
  168. if (!ret)
  169. parent_br = region_np->parent;
  170. /* If overlay has a list of bridges, use it. */
  171. if (of_parse_phandle(overlay, "fpga-bridges", 0))
  172. np = overlay;
  173. else
  174. np = region_np;
  175. for (i = 0; ; i++) {
  176. br = of_parse_phandle(np, "fpga-bridges", i);
  177. if (!br)
  178. break;
  179. /* If parent bridge is in list, skip it. */
  180. if (br == parent_br)
  181. continue;
  182. /* If node is a bridge, get it and add to list */
  183. ret = fpga_bridge_get_to_list(br, region->info,
  184. &region->bridge_list);
  185. /* If any of the bridges are in use, give up */
  186. if (ret == -EBUSY) {
  187. fpga_bridges_put(&region->bridge_list);
  188. return -EBUSY;
  189. }
  190. }
  191. return 0;
  192. }
  193. /**
  194. * fpga_region_program_fpga - program FPGA
  195. * @region: FPGA region
  196. * @firmware_name: name of FPGA image firmware file
  197. * @overlay: device node of the overlay
  198. * Program an FPGA using information in the device tree.
  199. * Function assumes that there is a firmware-name property.
  200. * Return 0 for success or negative error code.
  201. */
  202. static int fpga_region_program_fpga(struct fpga_region *region,
  203. const char *firmware_name,
  204. struct device_node *overlay)
  205. {
  206. struct fpga_manager *mgr;
  207. int ret;
  208. region = fpga_region_get(region);
  209. if (IS_ERR(region)) {
  210. pr_err("failed to get fpga region\n");
  211. return PTR_ERR(region);
  212. }
  213. mgr = fpga_region_get_manager(region);
  214. if (IS_ERR(mgr)) {
  215. pr_err("failed to get fpga region manager\n");
  216. ret = PTR_ERR(mgr);
  217. goto err_put_region;
  218. }
  219. ret = fpga_region_get_bridges(region, overlay);
  220. if (ret) {
  221. pr_err("failed to get fpga region bridges\n");
  222. goto err_put_mgr;
  223. }
  224. ret = fpga_bridges_disable(&region->bridge_list);
  225. if (ret) {
  226. pr_err("failed to disable region bridges\n");
  227. goto err_put_br;
  228. }
  229. ret = fpga_mgr_firmware_load(mgr, region->info, firmware_name);
  230. if (ret) {
  231. pr_err("failed to load fpga image\n");
  232. goto err_put_br;
  233. }
  234. ret = fpga_bridges_enable(&region->bridge_list);
  235. if (ret) {
  236. pr_err("failed to enable region bridges\n");
  237. goto err_put_br;
  238. }
  239. fpga_mgr_put(mgr);
  240. fpga_region_put(region);
  241. return 0;
  242. err_put_br:
  243. fpga_bridges_put(&region->bridge_list);
  244. err_put_mgr:
  245. fpga_mgr_put(mgr);
  246. err_put_region:
  247. fpga_region_put(region);
  248. return ret;
  249. }
  250. /**
  251. * child_regions_with_firmware
  252. * @overlay: device node of the overlay
  253. *
  254. * If the overlay adds child FPGA regions, they are not allowed to have
  255. * firmware-name property.
  256. *
  257. * Return 0 for OK or -EINVAL if child FPGA region adds firmware-name.
  258. */
  259. static int child_regions_with_firmware(struct device_node *overlay)
  260. {
  261. struct device_node *child_region;
  262. const char *child_firmware_name;
  263. int ret = 0;
  264. of_node_get(overlay);
  265. child_region = of_find_matching_node(overlay, fpga_region_of_match);
  266. while (child_region) {
  267. if (!of_property_read_string(child_region, "firmware-name",
  268. &child_firmware_name)) {
  269. ret = -EINVAL;
  270. break;
  271. }
  272. child_region = of_find_matching_node(child_region,
  273. fpga_region_of_match);
  274. }
  275. of_node_put(child_region);
  276. if (ret)
  277. pr_err("firmware-name not allowed in child FPGA region: %s",
  278. child_region->full_name);
  279. return ret;
  280. }
  281. /**
  282. * fpga_region_notify_pre_apply - pre-apply overlay notification
  283. *
  284. * @region: FPGA region that the overlay was applied to
  285. * @nd: overlay notification data
  286. *
  287. * Called after when an overlay targeted to a FPGA Region is about to be
  288. * applied. Function will check the properties that will be added to the FPGA
  289. * region. If the checks pass, it will program the FPGA.
  290. *
  291. * The checks are:
  292. * The overlay must add either firmware-name or external-fpga-config property
  293. * to the FPGA Region.
  294. *
  295. * firmware-name : program the FPGA
  296. * external-fpga-config : FPGA is already programmed
  297. * encrypted-fpga-config : FPGA bitstream is encrypted
  298. *
  299. * The overlay can add other FPGA regions, but child FPGA regions cannot have a
  300. * firmware-name property since those regions don't exist yet.
  301. *
  302. * If the overlay that breaks the rules, notifier returns an error and the
  303. * overlay is rejected before it goes into the main tree.
  304. *
  305. * Returns 0 for success or negative error code for failure.
  306. */
  307. static int fpga_region_notify_pre_apply(struct fpga_region *region,
  308. struct of_overlay_notify_data *nd)
  309. {
  310. const char *firmware_name = NULL;
  311. struct fpga_image_info *info;
  312. int ret;
  313. info = devm_kzalloc(&region->dev, sizeof(*info), GFP_KERNEL);
  314. if (!info)
  315. return -ENOMEM;
  316. region->info = info;
  317. /* Reject overlay if child FPGA Regions have firmware-name property */
  318. ret = child_regions_with_firmware(nd->overlay);
  319. if (ret)
  320. return ret;
  321. /* Read FPGA region properties from the overlay */
  322. if (of_property_read_bool(nd->overlay, "partial-fpga-config"))
  323. info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
  324. if (of_property_read_bool(nd->overlay, "external-fpga-config"))
  325. info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
  326. if (of_property_read_bool(nd->overlay, "encrypted-fpga-config"))
  327. info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
  328. of_property_read_string(nd->overlay, "firmware-name", &firmware_name);
  329. of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us",
  330. &info->enable_timeout_us);
  331. of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
  332. &info->disable_timeout_us);
  333. of_property_read_u32(nd->overlay, "config-complete-timeout-us",
  334. &info->config_complete_timeout_us);
  335. /* If FPGA was externally programmed, don't specify firmware */
  336. if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) {
  337. pr_err("error: specified firmware and external-fpga-config");
  338. return -EINVAL;
  339. }
  340. /* FPGA is already configured externally. We're done. */
  341. if (info->flags & FPGA_MGR_EXTERNAL_CONFIG)
  342. return 0;
  343. /* If we got this far, we should be programming the FPGA */
  344. if (!firmware_name) {
  345. pr_err("should specify firmware-name or external-fpga-config\n");
  346. return -EINVAL;
  347. }
  348. return fpga_region_program_fpga(region, firmware_name, nd->overlay);
  349. }
  350. /**
  351. * fpga_region_notify_post_remove - post-remove overlay notification
  352. *
  353. * @region: FPGA region that was targeted by the overlay that was removed
  354. * @nd: overlay notification data
  355. *
  356. * Called after an overlay has been removed if the overlay's target was a
  357. * FPGA region.
  358. */
  359. static void fpga_region_notify_post_remove(struct fpga_region *region,
  360. struct of_overlay_notify_data *nd)
  361. {
  362. fpga_bridges_disable(&region->bridge_list);
  363. fpga_bridges_put(&region->bridge_list);
  364. devm_kfree(&region->dev, region->info);
  365. region->info = NULL;
  366. }
  367. /**
  368. * of_fpga_region_notify - reconfig notifier for dynamic DT changes
  369. * @nb: notifier block
  370. * @action: notifier action
  371. * @arg: reconfig data
  372. *
  373. * This notifier handles programming a FPGA when a "firmware-name" property is
  374. * added to a fpga-region.
  375. *
  376. * Returns NOTIFY_OK or error if FPGA programming fails.
  377. */
  378. static int of_fpga_region_notify(struct notifier_block *nb,
  379. unsigned long action, void *arg)
  380. {
  381. struct of_overlay_notify_data *nd = arg;
  382. struct fpga_region *region;
  383. int ret;
  384. switch (action) {
  385. case OF_OVERLAY_PRE_APPLY:
  386. pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__);
  387. break;
  388. case OF_OVERLAY_POST_APPLY:
  389. pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__);
  390. return NOTIFY_OK; /* not for us */
  391. case OF_OVERLAY_PRE_REMOVE:
  392. pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__);
  393. return NOTIFY_OK; /* not for us */
  394. case OF_OVERLAY_POST_REMOVE:
  395. pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__);
  396. break;
  397. default: /* should not happen */
  398. return NOTIFY_OK;
  399. }
  400. region = fpga_region_find(nd->target);
  401. if (!region)
  402. return NOTIFY_OK;
  403. ret = 0;
  404. switch (action) {
  405. case OF_OVERLAY_PRE_APPLY:
  406. ret = fpga_region_notify_pre_apply(region, nd);
  407. break;
  408. case OF_OVERLAY_POST_REMOVE:
  409. fpga_region_notify_post_remove(region, nd);
  410. break;
  411. }
  412. put_device(&region->dev);
  413. if (ret)
  414. return notifier_from_errno(ret);
  415. return NOTIFY_OK;
  416. }
  417. static struct notifier_block fpga_region_of_nb = {
  418. .notifier_call = of_fpga_region_notify,
  419. };
  420. static int fpga_region_probe(struct platform_device *pdev)
  421. {
  422. struct device *dev = &pdev->dev;
  423. struct device_node *np = dev->of_node;
  424. struct fpga_region *region;
  425. int id, ret = 0;
  426. region = kzalloc(sizeof(*region), GFP_KERNEL);
  427. if (!region)
  428. return -ENOMEM;
  429. id = ida_simple_get(&fpga_region_ida, 0, 0, GFP_KERNEL);
  430. if (id < 0) {
  431. ret = id;
  432. goto err_kfree;
  433. }
  434. mutex_init(&region->mutex);
  435. INIT_LIST_HEAD(&region->bridge_list);
  436. device_initialize(&region->dev);
  437. region->dev.class = fpga_region_class;
  438. region->dev.parent = dev;
  439. region->dev.of_node = np;
  440. region->dev.id = id;
  441. dev_set_drvdata(dev, region);
  442. ret = dev_set_name(&region->dev, "region%d", id);
  443. if (ret)
  444. goto err_remove;
  445. ret = device_add(&region->dev);
  446. if (ret)
  447. goto err_remove;
  448. of_platform_populate(np, fpga_region_of_match, NULL, &region->dev);
  449. dev_info(dev, "FPGA Region probed\n");
  450. return 0;
  451. err_remove:
  452. ida_simple_remove(&fpga_region_ida, id);
  453. err_kfree:
  454. kfree(region);
  455. return ret;
  456. }
  457. static int fpga_region_remove(struct platform_device *pdev)
  458. {
  459. struct fpga_region *region = platform_get_drvdata(pdev);
  460. device_unregister(&region->dev);
  461. return 0;
  462. }
  463. static struct platform_driver fpga_region_driver = {
  464. .probe = fpga_region_probe,
  465. .remove = fpga_region_remove,
  466. .driver = {
  467. .name = "fpga-region",
  468. .of_match_table = of_match_ptr(fpga_region_of_match),
  469. },
  470. };
  471. static void fpga_region_dev_release(struct device *dev)
  472. {
  473. struct fpga_region *region = to_fpga_region(dev);
  474. ida_simple_remove(&fpga_region_ida, region->dev.id);
  475. kfree(region);
  476. }
  477. /**
  478. * fpga_region_init - init function for fpga_region class
  479. * Creates the fpga_region class and registers a reconfig notifier.
  480. */
  481. static int __init fpga_region_init(void)
  482. {
  483. int ret;
  484. fpga_region_class = class_create(THIS_MODULE, "fpga_region");
  485. if (IS_ERR(fpga_region_class))
  486. return PTR_ERR(fpga_region_class);
  487. fpga_region_class->dev_release = fpga_region_dev_release;
  488. ret = of_overlay_notifier_register(&fpga_region_of_nb);
  489. if (ret)
  490. goto err_class;
  491. ret = platform_driver_register(&fpga_region_driver);
  492. if (ret)
  493. goto err_plat;
  494. return 0;
  495. err_plat:
  496. of_overlay_notifier_unregister(&fpga_region_of_nb);
  497. err_class:
  498. class_destroy(fpga_region_class);
  499. ida_destroy(&fpga_region_ida);
  500. return ret;
  501. }
  502. static void __exit fpga_region_exit(void)
  503. {
  504. platform_driver_unregister(&fpga_region_driver);
  505. of_overlay_notifier_unregister(&fpga_region_of_nb);
  506. class_destroy(fpga_region_class);
  507. ida_destroy(&fpga_region_ida);
  508. }
  509. subsys_initcall(fpga_region_init);
  510. module_exit(fpga_region_exit);
  511. MODULE_DESCRIPTION("FPGA Region");
  512. MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
  513. MODULE_LICENSE("GPL v2");