amdgpu_amdkfd.c 6.7 KB

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  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. */
  22. #include "amdgpu_amdkfd.h"
  23. #include "amd_shared.h"
  24. #include <drm/drmP.h>
  25. #include "amdgpu.h"
  26. #include "amdgpu_gfx.h"
  27. #include <linux/module.h>
  28. const struct kfd2kgd_calls *kfd2kgd;
  29. const struct kgd2kfd_calls *kgd2kfd;
  30. bool (*kgd2kfd_init_p)(unsigned, const struct kgd2kfd_calls**);
  31. int amdgpu_amdkfd_init(void)
  32. {
  33. int ret;
  34. #if defined(CONFIG_HSA_AMD_MODULE)
  35. int (*kgd2kfd_init_p)(unsigned, const struct kgd2kfd_calls**);
  36. kgd2kfd_init_p = symbol_request(kgd2kfd_init);
  37. if (kgd2kfd_init_p == NULL)
  38. return -ENOENT;
  39. ret = kgd2kfd_init_p(KFD_INTERFACE_VERSION, &kgd2kfd);
  40. if (ret) {
  41. symbol_put(kgd2kfd_init);
  42. kgd2kfd = NULL;
  43. }
  44. #elif defined(CONFIG_HSA_AMD)
  45. ret = kgd2kfd_init(KFD_INTERFACE_VERSION, &kgd2kfd);
  46. if (ret)
  47. kgd2kfd = NULL;
  48. #else
  49. ret = -ENOENT;
  50. #endif
  51. return ret;
  52. }
  53. bool amdgpu_amdkfd_load_interface(struct amdgpu_device *adev)
  54. {
  55. switch (adev->asic_type) {
  56. #ifdef CONFIG_DRM_AMDGPU_CIK
  57. case CHIP_KAVERI:
  58. kfd2kgd = amdgpu_amdkfd_gfx_7_get_functions();
  59. break;
  60. #endif
  61. case CHIP_CARRIZO:
  62. kfd2kgd = amdgpu_amdkfd_gfx_8_0_get_functions();
  63. break;
  64. default:
  65. return false;
  66. }
  67. return true;
  68. }
  69. void amdgpu_amdkfd_fini(void)
  70. {
  71. if (kgd2kfd) {
  72. kgd2kfd->exit();
  73. symbol_put(kgd2kfd_init);
  74. }
  75. }
  76. void amdgpu_amdkfd_device_probe(struct amdgpu_device *adev)
  77. {
  78. if (kgd2kfd)
  79. adev->kfd = kgd2kfd->probe((struct kgd_dev *)adev,
  80. adev->pdev, kfd2kgd);
  81. }
  82. void amdgpu_amdkfd_device_init(struct amdgpu_device *adev)
  83. {
  84. int i;
  85. int last_valid_bit;
  86. if (adev->kfd) {
  87. struct kgd2kfd_shared_resources gpu_resources = {
  88. .compute_vmid_bitmap = 0xFF00,
  89. .num_mec = adev->gfx.mec.num_mec,
  90. .num_pipe_per_mec = adev->gfx.mec.num_pipe_per_mec,
  91. .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe
  92. };
  93. /* this is going to have a few of the MSBs set that we need to
  94. * clear */
  95. bitmap_complement(gpu_resources.queue_bitmap,
  96. adev->gfx.mec.queue_bitmap,
  97. KGD_MAX_QUEUES);
  98. /* remove the KIQ bit as well */
  99. if (adev->gfx.kiq.ring.ready)
  100. clear_bit(amdgpu_gfx_queue_to_bit(adev,
  101. adev->gfx.kiq.ring.me - 1,
  102. adev->gfx.kiq.ring.pipe,
  103. adev->gfx.kiq.ring.queue),
  104. gpu_resources.queue_bitmap);
  105. /* According to linux/bitmap.h we shouldn't use bitmap_clear if
  106. * nbits is not compile time constant */
  107. last_valid_bit = adev->gfx.mec.num_mec
  108. * adev->gfx.mec.num_pipe_per_mec
  109. * adev->gfx.mec.num_queue_per_pipe;
  110. for (i = last_valid_bit; i < KGD_MAX_QUEUES; ++i)
  111. clear_bit(i, gpu_resources.queue_bitmap);
  112. amdgpu_doorbell_get_kfd_info(adev,
  113. &gpu_resources.doorbell_physical_address,
  114. &gpu_resources.doorbell_aperture_size,
  115. &gpu_resources.doorbell_start_offset);
  116. kgd2kfd->device_init(adev->kfd, &gpu_resources);
  117. }
  118. }
  119. void amdgpu_amdkfd_device_fini(struct amdgpu_device *adev)
  120. {
  121. if (adev->kfd) {
  122. kgd2kfd->device_exit(adev->kfd);
  123. adev->kfd = NULL;
  124. }
  125. }
  126. void amdgpu_amdkfd_interrupt(struct amdgpu_device *adev,
  127. const void *ih_ring_entry)
  128. {
  129. if (adev->kfd)
  130. kgd2kfd->interrupt(adev->kfd, ih_ring_entry);
  131. }
  132. void amdgpu_amdkfd_suspend(struct amdgpu_device *adev)
  133. {
  134. if (adev->kfd)
  135. kgd2kfd->suspend(adev->kfd);
  136. }
  137. int amdgpu_amdkfd_resume(struct amdgpu_device *adev)
  138. {
  139. int r = 0;
  140. if (adev->kfd)
  141. r = kgd2kfd->resume(adev->kfd);
  142. return r;
  143. }
  144. int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
  145. void **mem_obj, uint64_t *gpu_addr,
  146. void **cpu_ptr)
  147. {
  148. struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
  149. struct kgd_mem **mem = (struct kgd_mem **) mem_obj;
  150. int r;
  151. BUG_ON(kgd == NULL);
  152. BUG_ON(gpu_addr == NULL);
  153. BUG_ON(cpu_ptr == NULL);
  154. *mem = kmalloc(sizeof(struct kgd_mem), GFP_KERNEL);
  155. if ((*mem) == NULL)
  156. return -ENOMEM;
  157. r = amdgpu_bo_create(adev, size, PAGE_SIZE, true, AMDGPU_GEM_DOMAIN_GTT,
  158. AMDGPU_GEM_CREATE_CPU_GTT_USWC, NULL, NULL, &(*mem)->bo);
  159. if (r) {
  160. dev_err(adev->dev,
  161. "failed to allocate BO for amdkfd (%d)\n", r);
  162. return r;
  163. }
  164. /* map the buffer */
  165. r = amdgpu_bo_reserve((*mem)->bo, true);
  166. if (r) {
  167. dev_err(adev->dev, "(%d) failed to reserve bo for amdkfd\n", r);
  168. goto allocate_mem_reserve_bo_failed;
  169. }
  170. r = amdgpu_bo_pin((*mem)->bo, AMDGPU_GEM_DOMAIN_GTT,
  171. &(*mem)->gpu_addr);
  172. if (r) {
  173. dev_err(adev->dev, "(%d) failed to pin bo for amdkfd\n", r);
  174. goto allocate_mem_pin_bo_failed;
  175. }
  176. *gpu_addr = (*mem)->gpu_addr;
  177. r = amdgpu_bo_kmap((*mem)->bo, &(*mem)->cpu_ptr);
  178. if (r) {
  179. dev_err(adev->dev,
  180. "(%d) failed to map bo to kernel for amdkfd\n", r);
  181. goto allocate_mem_kmap_bo_failed;
  182. }
  183. *cpu_ptr = (*mem)->cpu_ptr;
  184. amdgpu_bo_unreserve((*mem)->bo);
  185. return 0;
  186. allocate_mem_kmap_bo_failed:
  187. amdgpu_bo_unpin((*mem)->bo);
  188. allocate_mem_pin_bo_failed:
  189. amdgpu_bo_unreserve((*mem)->bo);
  190. allocate_mem_reserve_bo_failed:
  191. amdgpu_bo_unref(&(*mem)->bo);
  192. return r;
  193. }
  194. void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
  195. {
  196. struct kgd_mem *mem = (struct kgd_mem *) mem_obj;
  197. BUG_ON(mem == NULL);
  198. amdgpu_bo_reserve(mem->bo, true);
  199. amdgpu_bo_kunmap(mem->bo);
  200. amdgpu_bo_unpin(mem->bo);
  201. amdgpu_bo_unreserve(mem->bo);
  202. amdgpu_bo_unref(&(mem->bo));
  203. kfree(mem);
  204. }
  205. uint64_t get_vmem_size(struct kgd_dev *kgd)
  206. {
  207. struct amdgpu_device *adev =
  208. (struct amdgpu_device *)kgd;
  209. BUG_ON(kgd == NULL);
  210. return adev->mc.real_vram_size;
  211. }
  212. uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
  213. {
  214. struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
  215. if (adev->gfx.funcs->get_gpu_clock_counter)
  216. return adev->gfx.funcs->get_gpu_clock_counter(adev);
  217. return 0;
  218. }
  219. uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
  220. {
  221. struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
  222. /* The sclk is in quantas of 10kHz */
  223. return adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk / 100;
  224. }