amdtopology.c 4.2 KB

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  1. /*
  2. * AMD NUMA support.
  3. * Discover the memory map and associated nodes.
  4. *
  5. * This version reads it directly from the AMD northbridge.
  6. *
  7. * Copyright 2002,2003 Andi Kleen, SuSE Labs.
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/init.h>
  11. #include <linux/string.h>
  12. #include <linux/nodemask.h>
  13. #include <linux/memblock.h>
  14. #include <linux/bootmem.h>
  15. #include <asm/io.h>
  16. #include <linux/pci_ids.h>
  17. #include <linux/acpi.h>
  18. #include <asm/types.h>
  19. #include <asm/mmzone.h>
  20. #include <asm/proto.h>
  21. #include <asm/e820.h>
  22. #include <asm/pci-direct.h>
  23. #include <asm/numa.h>
  24. #include <asm/mpspec.h>
  25. #include <asm/apic.h>
  26. #include <asm/amd_nb.h>
  27. static unsigned char __initdata nodeids[8];
  28. static __init int find_northbridge(void)
  29. {
  30. int num;
  31. for (num = 0; num < 32; num++) {
  32. u32 header;
  33. header = read_pci_config(0, num, 0, 0x00);
  34. if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) &&
  35. header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) &&
  36. header != (PCI_VENDOR_ID_AMD | (0x1300<<16)))
  37. continue;
  38. header = read_pci_config(0, num, 1, 0x00);
  39. if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) &&
  40. header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) &&
  41. header != (PCI_VENDOR_ID_AMD | (0x1301<<16)))
  42. continue;
  43. return num;
  44. }
  45. return -ENOENT;
  46. }
  47. static __init void early_get_boot_cpu_id(void)
  48. {
  49. /*
  50. * need to get the APIC ID of the BSP so can use that to
  51. * create apicid_to_node in amd_scan_nodes()
  52. */
  53. #ifdef CONFIG_X86_MPPARSE
  54. /*
  55. * get boot-time SMP configuration:
  56. */
  57. if (smp_found_config)
  58. early_get_smp_config();
  59. #endif
  60. }
  61. int __init amd_numa_init(void)
  62. {
  63. u64 start = PFN_PHYS(0);
  64. u64 end = PFN_PHYS(max_pfn);
  65. unsigned numnodes;
  66. u64 prevbase;
  67. int i, j, nb;
  68. u32 nodeid, reg;
  69. unsigned int bits, cores, apicid_base;
  70. if (!early_pci_allowed())
  71. return -EINVAL;
  72. nb = find_northbridge();
  73. if (nb < 0)
  74. return nb;
  75. pr_info("Scanning NUMA topology in Northbridge %d\n", nb);
  76. reg = read_pci_config(0, nb, 0, 0x60);
  77. numnodes = ((reg >> 4) & 0xF) + 1;
  78. if (numnodes <= 1)
  79. return -ENOENT;
  80. pr_info("Number of physical nodes %d\n", numnodes);
  81. prevbase = 0;
  82. for (i = 0; i < 8; i++) {
  83. u64 base, limit;
  84. base = read_pci_config(0, nb, 1, 0x40 + i*8);
  85. limit = read_pci_config(0, nb, 1, 0x44 + i*8);
  86. nodeids[i] = nodeid = limit & 7;
  87. if ((base & 3) == 0) {
  88. if (i < numnodes)
  89. pr_info("Skipping disabled node %d\n", i);
  90. continue;
  91. }
  92. if (nodeid >= numnodes) {
  93. pr_info("Ignoring excess node %d (%Lx:%Lx)\n", nodeid,
  94. base, limit);
  95. continue;
  96. }
  97. if (!limit) {
  98. pr_info("Skipping node entry %d (base %Lx)\n",
  99. i, base);
  100. continue;
  101. }
  102. if ((base >> 8) & 3 || (limit >> 8) & 3) {
  103. pr_err("Node %d using interleaving mode %Lx/%Lx\n",
  104. nodeid, (base >> 8) & 3, (limit >> 8) & 3);
  105. return -EINVAL;
  106. }
  107. if (node_isset(nodeid, numa_nodes_parsed)) {
  108. pr_info("Node %d already present, skipping\n",
  109. nodeid);
  110. continue;
  111. }
  112. limit >>= 16;
  113. limit++;
  114. limit <<= 24;
  115. if (limit > end)
  116. limit = end;
  117. if (limit <= base)
  118. continue;
  119. base >>= 16;
  120. base <<= 24;
  121. if (base < start)
  122. base = start;
  123. if (limit > end)
  124. limit = end;
  125. if (limit == base) {
  126. pr_err("Empty node %d\n", nodeid);
  127. continue;
  128. }
  129. if (limit < base) {
  130. pr_err("Node %d bogus settings %Lx-%Lx.\n",
  131. nodeid, base, limit);
  132. continue;
  133. }
  134. /* Could sort here, but pun for now. Should not happen anyroads. */
  135. if (prevbase > base) {
  136. pr_err("Node map not sorted %Lx,%Lx\n",
  137. prevbase, base);
  138. return -EINVAL;
  139. }
  140. pr_info("Node %d MemBase %016Lx Limit %016Lx\n",
  141. nodeid, base, limit);
  142. prevbase = base;
  143. numa_add_memblk(nodeid, base, limit);
  144. node_set(nodeid, numa_nodes_parsed);
  145. }
  146. if (!nodes_weight(numa_nodes_parsed))
  147. return -ENOENT;
  148. /*
  149. * We seem to have valid NUMA configuration. Map apicids to nodes
  150. * using the coreid bits from early_identify_cpu.
  151. */
  152. bits = boot_cpu_data.x86_coreid_bits;
  153. cores = 1 << bits;
  154. apicid_base = 0;
  155. /* get the APIC ID of the BSP early for systems with apicid lifting */
  156. early_get_boot_cpu_id();
  157. if (boot_cpu_physical_apicid > 0) {
  158. pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid);
  159. apicid_base = boot_cpu_physical_apicid;
  160. }
  161. for_each_node_mask(i, numa_nodes_parsed)
  162. for (j = apicid_base; j < cores + apicid_base; j++)
  163. set_apicid_to_node((i << bits) + j, i);
  164. return 0;
  165. }