intel_breadcrumbs.c 19 KB

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  1. /*
  2. * Copyright © 2015 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. */
  24. #include <linux/kthread.h>
  25. #include <uapi/linux/sched/types.h>
  26. #include "i915_drv.h"
  27. static void intel_breadcrumbs_hangcheck(unsigned long data)
  28. {
  29. struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
  30. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  31. if (!b->irq_enabled)
  32. return;
  33. if (time_before(jiffies, b->timeout)) {
  34. mod_timer(&b->hangcheck, b->timeout);
  35. return;
  36. }
  37. DRM_DEBUG("Hangcheck timer elapsed... %s idle\n", engine->name);
  38. set_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
  39. mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
  40. /* Ensure that even if the GPU hangs, we get woken up.
  41. *
  42. * However, note that if no one is waiting, we never notice
  43. * a gpu hang. Eventually, we will have to wait for a resource
  44. * held by the GPU and so trigger a hangcheck. In the most
  45. * pathological case, this will be upon memory starvation! To
  46. * prevent this, we also queue the hangcheck from the retire
  47. * worker.
  48. */
  49. i915_queue_hangcheck(engine->i915);
  50. }
  51. static unsigned long wait_timeout(void)
  52. {
  53. return round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES);
  54. }
  55. static void intel_breadcrumbs_fake_irq(unsigned long data)
  56. {
  57. struct intel_engine_cs *engine = (struct intel_engine_cs *)data;
  58. /*
  59. * The timer persists in case we cannot enable interrupts,
  60. * or if we have previously seen seqno/interrupt incoherency
  61. * ("missed interrupt" syndrome). Here the worker will wake up
  62. * every jiffie in order to kick the oldest waiter to do the
  63. * coherent seqno check.
  64. */
  65. if (intel_engine_wakeup(engine))
  66. mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
  67. }
  68. static void irq_enable(struct intel_engine_cs *engine)
  69. {
  70. /* Enabling the IRQ may miss the generation of the interrupt, but
  71. * we still need to force the barrier before reading the seqno,
  72. * just in case.
  73. */
  74. engine->breadcrumbs.irq_posted = true;
  75. /* Caller disables interrupts */
  76. spin_lock(&engine->i915->irq_lock);
  77. engine->irq_enable(engine);
  78. spin_unlock(&engine->i915->irq_lock);
  79. }
  80. static void irq_disable(struct intel_engine_cs *engine)
  81. {
  82. /* Caller disables interrupts */
  83. spin_lock(&engine->i915->irq_lock);
  84. engine->irq_disable(engine);
  85. spin_unlock(&engine->i915->irq_lock);
  86. engine->breadcrumbs.irq_posted = false;
  87. }
  88. static void __intel_breadcrumbs_enable_irq(struct intel_breadcrumbs *b)
  89. {
  90. struct intel_engine_cs *engine =
  91. container_of(b, struct intel_engine_cs, breadcrumbs);
  92. struct drm_i915_private *i915 = engine->i915;
  93. assert_spin_locked(&b->lock);
  94. if (b->rpm_wakelock)
  95. return;
  96. /* Since we are waiting on a request, the GPU should be busy
  97. * and should have its own rpm reference. For completeness,
  98. * record an rpm reference for ourselves to cover the
  99. * interrupt we unmask.
  100. */
  101. intel_runtime_pm_get_noresume(i915);
  102. b->rpm_wakelock = true;
  103. /* No interrupts? Kick the waiter every jiffie! */
  104. if (intel_irqs_enabled(i915)) {
  105. if (!test_bit(engine->id, &i915->gpu_error.test_irq_rings))
  106. irq_enable(engine);
  107. b->irq_enabled = true;
  108. }
  109. if (!b->irq_enabled ||
  110. test_bit(engine->id, &i915->gpu_error.missed_irq_rings)) {
  111. mod_timer(&b->fake_irq, jiffies + 1);
  112. } else {
  113. /* Ensure we never sleep indefinitely */
  114. GEM_BUG_ON(!time_after(b->timeout, jiffies));
  115. mod_timer(&b->hangcheck, b->timeout);
  116. }
  117. }
  118. static void __intel_breadcrumbs_disable_irq(struct intel_breadcrumbs *b)
  119. {
  120. struct intel_engine_cs *engine =
  121. container_of(b, struct intel_engine_cs, breadcrumbs);
  122. assert_spin_locked(&b->lock);
  123. if (!b->rpm_wakelock)
  124. return;
  125. if (b->irq_enabled) {
  126. irq_disable(engine);
  127. b->irq_enabled = false;
  128. }
  129. intel_runtime_pm_put(engine->i915);
  130. b->rpm_wakelock = false;
  131. }
  132. static inline struct intel_wait *to_wait(struct rb_node *node)
  133. {
  134. return rb_entry(node, struct intel_wait, node);
  135. }
  136. static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
  137. struct intel_wait *wait)
  138. {
  139. assert_spin_locked(&b->lock);
  140. /* This request is completed, so remove it from the tree, mark it as
  141. * complete, and *then* wake up the associated task.
  142. */
  143. rb_erase(&wait->node, &b->waiters);
  144. RB_CLEAR_NODE(&wait->node);
  145. wake_up_process(wait->tsk); /* implicit smp_wmb() */
  146. }
  147. static bool __intel_engine_add_wait(struct intel_engine_cs *engine,
  148. struct intel_wait *wait)
  149. {
  150. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  151. struct rb_node **p, *parent, *completed;
  152. bool first;
  153. u32 seqno;
  154. /* Insert the request into the retirement ordered list
  155. * of waiters by walking the rbtree. If we are the oldest
  156. * seqno in the tree (the first to be retired), then
  157. * set ourselves as the bottom-half.
  158. *
  159. * As we descend the tree, prune completed branches since we hold the
  160. * spinlock we know that the first_waiter must be delayed and can
  161. * reduce some of the sequential wake up latency if we take action
  162. * ourselves and wake up the completed tasks in parallel. Also, by
  163. * removing stale elements in the tree, we may be able to reduce the
  164. * ping-pong between the old bottom-half and ourselves as first-waiter.
  165. */
  166. first = true;
  167. parent = NULL;
  168. completed = NULL;
  169. seqno = intel_engine_get_seqno(engine);
  170. /* If the request completed before we managed to grab the spinlock,
  171. * return now before adding ourselves to the rbtree. We let the
  172. * current bottom-half handle any pending wakeups and instead
  173. * try and get out of the way quickly.
  174. */
  175. if (i915_seqno_passed(seqno, wait->seqno)) {
  176. RB_CLEAR_NODE(&wait->node);
  177. return first;
  178. }
  179. p = &b->waiters.rb_node;
  180. while (*p) {
  181. parent = *p;
  182. if (wait->seqno == to_wait(parent)->seqno) {
  183. /* We have multiple waiters on the same seqno, select
  184. * the highest priority task (that with the smallest
  185. * task->prio) to serve as the bottom-half for this
  186. * group.
  187. */
  188. if (wait->tsk->prio > to_wait(parent)->tsk->prio) {
  189. p = &parent->rb_right;
  190. first = false;
  191. } else {
  192. p = &parent->rb_left;
  193. }
  194. } else if (i915_seqno_passed(wait->seqno,
  195. to_wait(parent)->seqno)) {
  196. p = &parent->rb_right;
  197. if (i915_seqno_passed(seqno, to_wait(parent)->seqno))
  198. completed = parent;
  199. else
  200. first = false;
  201. } else {
  202. p = &parent->rb_left;
  203. }
  204. }
  205. rb_link_node(&wait->node, parent, p);
  206. rb_insert_color(&wait->node, &b->waiters);
  207. GEM_BUG_ON(!first && !rcu_access_pointer(b->irq_seqno_bh));
  208. if (completed) {
  209. struct rb_node *next = rb_next(completed);
  210. GEM_BUG_ON(!next && !first);
  211. if (next && next != &wait->node) {
  212. GEM_BUG_ON(first);
  213. b->timeout = wait_timeout();
  214. b->first_wait = to_wait(next);
  215. rcu_assign_pointer(b->irq_seqno_bh, b->first_wait->tsk);
  216. /* As there is a delay between reading the current
  217. * seqno, processing the completed tasks and selecting
  218. * the next waiter, we may have missed the interrupt
  219. * and so need for the next bottom-half to wakeup.
  220. *
  221. * Also as we enable the IRQ, we may miss the
  222. * interrupt for that seqno, so we have to wake up
  223. * the next bottom-half in order to do a coherent check
  224. * in case the seqno passed.
  225. */
  226. __intel_breadcrumbs_enable_irq(b);
  227. if (READ_ONCE(b->irq_posted))
  228. wake_up_process(to_wait(next)->tsk);
  229. }
  230. do {
  231. struct intel_wait *crumb = to_wait(completed);
  232. completed = rb_prev(completed);
  233. __intel_breadcrumbs_finish(b, crumb);
  234. } while (completed);
  235. }
  236. if (first) {
  237. GEM_BUG_ON(rb_first(&b->waiters) != &wait->node);
  238. b->timeout = wait_timeout();
  239. b->first_wait = wait;
  240. rcu_assign_pointer(b->irq_seqno_bh, wait->tsk);
  241. /* After assigning ourselves as the new bottom-half, we must
  242. * perform a cursory check to prevent a missed interrupt.
  243. * Either we miss the interrupt whilst programming the hardware,
  244. * or if there was a previous waiter (for a later seqno) they
  245. * may be woken instead of us (due to the inherent race
  246. * in the unlocked read of b->irq_seqno_bh in the irq handler)
  247. * and so we miss the wake up.
  248. */
  249. __intel_breadcrumbs_enable_irq(b);
  250. }
  251. GEM_BUG_ON(!rcu_access_pointer(b->irq_seqno_bh));
  252. GEM_BUG_ON(!b->first_wait);
  253. GEM_BUG_ON(rb_first(&b->waiters) != &b->first_wait->node);
  254. return first;
  255. }
  256. bool intel_engine_add_wait(struct intel_engine_cs *engine,
  257. struct intel_wait *wait)
  258. {
  259. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  260. bool first;
  261. spin_lock_irq(&b->lock);
  262. first = __intel_engine_add_wait(engine, wait);
  263. spin_unlock_irq(&b->lock);
  264. return first;
  265. }
  266. static inline bool chain_wakeup(struct rb_node *rb, int priority)
  267. {
  268. return rb && to_wait(rb)->tsk->prio <= priority;
  269. }
  270. static inline int wakeup_priority(struct intel_breadcrumbs *b,
  271. struct task_struct *tsk)
  272. {
  273. if (tsk == b->signaler)
  274. return INT_MIN;
  275. else
  276. return tsk->prio;
  277. }
  278. void intel_engine_remove_wait(struct intel_engine_cs *engine,
  279. struct intel_wait *wait)
  280. {
  281. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  282. /* Quick check to see if this waiter was already decoupled from
  283. * the tree by the bottom-half to avoid contention on the spinlock
  284. * by the herd.
  285. */
  286. if (RB_EMPTY_NODE(&wait->node))
  287. return;
  288. spin_lock_irq(&b->lock);
  289. if (RB_EMPTY_NODE(&wait->node))
  290. goto out_unlock;
  291. if (b->first_wait == wait) {
  292. const int priority = wakeup_priority(b, wait->tsk);
  293. struct rb_node *next;
  294. GEM_BUG_ON(rcu_access_pointer(b->irq_seqno_bh) != wait->tsk);
  295. /* We are the current bottom-half. Find the next candidate,
  296. * the first waiter in the queue on the remaining oldest
  297. * request. As multiple seqnos may complete in the time it
  298. * takes us to wake up and find the next waiter, we have to
  299. * wake up that waiter for it to perform its own coherent
  300. * completion check.
  301. */
  302. next = rb_next(&wait->node);
  303. if (chain_wakeup(next, priority)) {
  304. /* If the next waiter is already complete,
  305. * wake it up and continue onto the next waiter. So
  306. * if have a small herd, they will wake up in parallel
  307. * rather than sequentially, which should reduce
  308. * the overall latency in waking all the completed
  309. * clients.
  310. *
  311. * However, waking up a chain adds extra latency to
  312. * the first_waiter. This is undesirable if that
  313. * waiter is a high priority task.
  314. */
  315. u32 seqno = intel_engine_get_seqno(engine);
  316. while (i915_seqno_passed(seqno, to_wait(next)->seqno)) {
  317. struct rb_node *n = rb_next(next);
  318. __intel_breadcrumbs_finish(b, to_wait(next));
  319. next = n;
  320. if (!chain_wakeup(next, priority))
  321. break;
  322. }
  323. }
  324. if (next) {
  325. /* In our haste, we may have completed the first waiter
  326. * before we enabled the interrupt. Do so now as we
  327. * have a second waiter for a future seqno. Afterwards,
  328. * we have to wake up that waiter in case we missed
  329. * the interrupt, or if we have to handle an
  330. * exception rather than a seqno completion.
  331. */
  332. b->timeout = wait_timeout();
  333. b->first_wait = to_wait(next);
  334. rcu_assign_pointer(b->irq_seqno_bh, b->first_wait->tsk);
  335. if (b->first_wait->seqno != wait->seqno)
  336. __intel_breadcrumbs_enable_irq(b);
  337. wake_up_process(b->first_wait->tsk);
  338. } else {
  339. b->first_wait = NULL;
  340. rcu_assign_pointer(b->irq_seqno_bh, NULL);
  341. __intel_breadcrumbs_disable_irq(b);
  342. }
  343. } else {
  344. GEM_BUG_ON(rb_first(&b->waiters) == &wait->node);
  345. }
  346. GEM_BUG_ON(RB_EMPTY_NODE(&wait->node));
  347. rb_erase(&wait->node, &b->waiters);
  348. out_unlock:
  349. GEM_BUG_ON(b->first_wait == wait);
  350. GEM_BUG_ON(rb_first(&b->waiters) !=
  351. (b->first_wait ? &b->first_wait->node : NULL));
  352. GEM_BUG_ON(!rcu_access_pointer(b->irq_seqno_bh) ^ RB_EMPTY_ROOT(&b->waiters));
  353. spin_unlock_irq(&b->lock);
  354. }
  355. static bool signal_complete(struct drm_i915_gem_request *request)
  356. {
  357. if (!request)
  358. return false;
  359. /* If another process served as the bottom-half it may have already
  360. * signalled that this wait is already completed.
  361. */
  362. if (intel_wait_complete(&request->signaling.wait))
  363. return true;
  364. /* Carefully check if the request is complete, giving time for the
  365. * seqno to be visible or if the GPU hung.
  366. */
  367. if (__i915_request_irq_complete(request))
  368. return true;
  369. return false;
  370. }
  371. static struct drm_i915_gem_request *to_signaler(struct rb_node *rb)
  372. {
  373. return rb_entry(rb, struct drm_i915_gem_request, signaling.node);
  374. }
  375. static void signaler_set_rtpriority(void)
  376. {
  377. struct sched_param param = { .sched_priority = 1 };
  378. sched_setscheduler_nocheck(current, SCHED_FIFO, &param);
  379. }
  380. static int intel_breadcrumbs_signaler(void *arg)
  381. {
  382. struct intel_engine_cs *engine = arg;
  383. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  384. struct drm_i915_gem_request *request;
  385. /* Install ourselves with high priority to reduce signalling latency */
  386. signaler_set_rtpriority();
  387. do {
  388. set_current_state(TASK_INTERRUPTIBLE);
  389. /* We are either woken up by the interrupt bottom-half,
  390. * or by a client adding a new signaller. In both cases,
  391. * the GPU seqno may have advanced beyond our oldest signal.
  392. * If it has, propagate the signal, remove the waiter and
  393. * check again with the next oldest signal. Otherwise we
  394. * need to wait for a new interrupt from the GPU or for
  395. * a new client.
  396. */
  397. request = READ_ONCE(b->first_signal);
  398. if (signal_complete(request)) {
  399. /* Wake up all other completed waiters and select the
  400. * next bottom-half for the next user interrupt.
  401. */
  402. intel_engine_remove_wait(engine,
  403. &request->signaling.wait);
  404. local_bh_disable();
  405. dma_fence_signal(&request->fence);
  406. local_bh_enable(); /* kick start the tasklets */
  407. /* Find the next oldest signal. Note that as we have
  408. * not been holding the lock, another client may
  409. * have installed an even older signal than the one
  410. * we just completed - so double check we are still
  411. * the oldest before picking the next one.
  412. */
  413. spin_lock_irq(&b->lock);
  414. if (request == b->first_signal) {
  415. struct rb_node *rb =
  416. rb_next(&request->signaling.node);
  417. b->first_signal = rb ? to_signaler(rb) : NULL;
  418. }
  419. rb_erase(&request->signaling.node, &b->signals);
  420. spin_unlock_irq(&b->lock);
  421. i915_gem_request_put(request);
  422. } else {
  423. if (kthread_should_stop())
  424. break;
  425. schedule();
  426. }
  427. } while (1);
  428. __set_current_state(TASK_RUNNING);
  429. return 0;
  430. }
  431. void intel_engine_enable_signaling(struct drm_i915_gem_request *request)
  432. {
  433. struct intel_engine_cs *engine = request->engine;
  434. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  435. struct rb_node *parent, **p;
  436. bool first, wakeup;
  437. /* Note that we may be called from an interrupt handler on another
  438. * device (e.g. nouveau signaling a fence completion causing us
  439. * to submit a request, and so enable signaling). As such,
  440. * we need to make sure that all other users of b->lock protect
  441. * against interrupts, i.e. use spin_lock_irqsave.
  442. */
  443. /* locked by dma_fence_enable_sw_signaling() (irqsafe fence->lock) */
  444. assert_spin_locked(&request->lock);
  445. if (!request->global_seqno)
  446. return;
  447. request->signaling.wait.tsk = b->signaler;
  448. request->signaling.wait.seqno = request->global_seqno;
  449. i915_gem_request_get(request);
  450. spin_lock(&b->lock);
  451. /* First add ourselves into the list of waiters, but register our
  452. * bottom-half as the signaller thread. As per usual, only the oldest
  453. * waiter (not just signaller) is tasked as the bottom-half waking
  454. * up all completed waiters after the user interrupt.
  455. *
  456. * If we are the oldest waiter, enable the irq (after which we
  457. * must double check that the seqno did not complete).
  458. */
  459. wakeup = __intel_engine_add_wait(engine, &request->signaling.wait);
  460. /* Now insert ourselves into the retirement ordered list of signals
  461. * on this engine. We track the oldest seqno as that will be the
  462. * first signal to complete.
  463. */
  464. parent = NULL;
  465. first = true;
  466. p = &b->signals.rb_node;
  467. while (*p) {
  468. parent = *p;
  469. if (i915_seqno_passed(request->global_seqno,
  470. to_signaler(parent)->global_seqno)) {
  471. p = &parent->rb_right;
  472. first = false;
  473. } else {
  474. p = &parent->rb_left;
  475. }
  476. }
  477. rb_link_node(&request->signaling.node, parent, p);
  478. rb_insert_color(&request->signaling.node, &b->signals);
  479. if (first)
  480. smp_store_mb(b->first_signal, request);
  481. spin_unlock(&b->lock);
  482. if (wakeup)
  483. wake_up_process(b->signaler);
  484. }
  485. int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
  486. {
  487. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  488. struct task_struct *tsk;
  489. spin_lock_init(&b->lock);
  490. setup_timer(&b->fake_irq,
  491. intel_breadcrumbs_fake_irq,
  492. (unsigned long)engine);
  493. setup_timer(&b->hangcheck,
  494. intel_breadcrumbs_hangcheck,
  495. (unsigned long)engine);
  496. /* Spawn a thread to provide a common bottom-half for all signals.
  497. * As this is an asynchronous interface we cannot steal the current
  498. * task for handling the bottom-half to the user interrupt, therefore
  499. * we create a thread to do the coherent seqno dance after the
  500. * interrupt and then signal the waitqueue (via the dma-buf/fence).
  501. */
  502. tsk = kthread_run(intel_breadcrumbs_signaler, engine,
  503. "i915/signal:%d", engine->id);
  504. if (IS_ERR(tsk))
  505. return PTR_ERR(tsk);
  506. b->signaler = tsk;
  507. return 0;
  508. }
  509. static void cancel_fake_irq(struct intel_engine_cs *engine)
  510. {
  511. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  512. del_timer_sync(&b->hangcheck);
  513. del_timer_sync(&b->fake_irq);
  514. clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
  515. }
  516. void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
  517. {
  518. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  519. cancel_fake_irq(engine);
  520. spin_lock_irq(&b->lock);
  521. __intel_breadcrumbs_disable_irq(b);
  522. if (intel_engine_has_waiter(engine)) {
  523. b->timeout = wait_timeout();
  524. __intel_breadcrumbs_enable_irq(b);
  525. if (READ_ONCE(b->irq_posted))
  526. wake_up_process(b->first_wait->tsk);
  527. } else {
  528. /* sanitize the IMR and unmask any auxiliary interrupts */
  529. irq_disable(engine);
  530. }
  531. spin_unlock_irq(&b->lock);
  532. }
  533. void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
  534. {
  535. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  536. /* The engines should be idle and all requests accounted for! */
  537. WARN_ON(READ_ONCE(b->first_wait));
  538. WARN_ON(!RB_EMPTY_ROOT(&b->waiters));
  539. WARN_ON(READ_ONCE(b->first_signal));
  540. WARN_ON(!RB_EMPTY_ROOT(&b->signals));
  541. if (!IS_ERR_OR_NULL(b->signaler))
  542. kthread_stop(b->signaler);
  543. cancel_fake_irq(engine);
  544. }
  545. unsigned int intel_breadcrumbs_busy(struct drm_i915_private *i915)
  546. {
  547. struct intel_engine_cs *engine;
  548. enum intel_engine_id id;
  549. unsigned int mask = 0;
  550. for_each_engine(engine, i915, id) {
  551. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  552. spin_lock_irq(&b->lock);
  553. if (b->first_wait) {
  554. wake_up_process(b->first_wait->tsk);
  555. mask |= intel_engine_flag(engine);
  556. }
  557. if (b->first_signal) {
  558. wake_up_process(b->signaler);
  559. mask |= intel_engine_flag(engine);
  560. }
  561. spin_unlock_irq(&b->lock);
  562. }
  563. return mask;
  564. }