intel-pt.c 58 KB

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  1. /*
  2. * intel_pt.c: Intel Processor Trace support
  3. * Copyright (c) 2013-2015, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. */
  15. #include <stdio.h>
  16. #include <stdbool.h>
  17. #include <errno.h>
  18. #include <linux/kernel.h>
  19. #include <linux/types.h>
  20. #include "../perf.h"
  21. #include "session.h"
  22. #include "machine.h"
  23. #include "sort.h"
  24. #include "tool.h"
  25. #include "event.h"
  26. #include "evlist.h"
  27. #include "evsel.h"
  28. #include "map.h"
  29. #include "color.h"
  30. #include "util.h"
  31. #include "thread.h"
  32. #include "thread-stack.h"
  33. #include "symbol.h"
  34. #include "callchain.h"
  35. #include "dso.h"
  36. #include "debug.h"
  37. #include "auxtrace.h"
  38. #include "tsc.h"
  39. #include "intel-pt.h"
  40. #include "config.h"
  41. #include "intel-pt-decoder/intel-pt-log.h"
  42. #include "intel-pt-decoder/intel-pt-decoder.h"
  43. #include "intel-pt-decoder/intel-pt-insn-decoder.h"
  44. #include "intel-pt-decoder/intel-pt-pkt-decoder.h"
  45. #define MAX_TIMESTAMP (~0ULL)
  46. struct intel_pt {
  47. struct auxtrace auxtrace;
  48. struct auxtrace_queues queues;
  49. struct auxtrace_heap heap;
  50. u32 auxtrace_type;
  51. struct perf_session *session;
  52. struct machine *machine;
  53. struct perf_evsel *switch_evsel;
  54. struct thread *unknown_thread;
  55. bool timeless_decoding;
  56. bool sampling_mode;
  57. bool snapshot_mode;
  58. bool per_cpu_mmaps;
  59. bool have_tsc;
  60. bool data_queued;
  61. bool est_tsc;
  62. bool sync_switch;
  63. bool mispred_all;
  64. int have_sched_switch;
  65. u32 pmu_type;
  66. u64 kernel_start;
  67. u64 switch_ip;
  68. u64 ptss_ip;
  69. struct perf_tsc_conversion tc;
  70. bool cap_user_time_zero;
  71. struct itrace_synth_opts synth_opts;
  72. bool sample_instructions;
  73. u64 instructions_sample_type;
  74. u64 instructions_sample_period;
  75. u64 instructions_id;
  76. bool sample_branches;
  77. u32 branches_filter;
  78. u64 branches_sample_type;
  79. u64 branches_id;
  80. bool sample_transactions;
  81. u64 transactions_sample_type;
  82. u64 transactions_id;
  83. bool synth_needs_swap;
  84. u64 tsc_bit;
  85. u64 mtc_bit;
  86. u64 mtc_freq_bits;
  87. u32 tsc_ctc_ratio_n;
  88. u32 tsc_ctc_ratio_d;
  89. u64 cyc_bit;
  90. u64 noretcomp_bit;
  91. unsigned max_non_turbo_ratio;
  92. unsigned long num_events;
  93. char *filter;
  94. struct addr_filters filts;
  95. };
  96. enum switch_state {
  97. INTEL_PT_SS_NOT_TRACING,
  98. INTEL_PT_SS_UNKNOWN,
  99. INTEL_PT_SS_TRACING,
  100. INTEL_PT_SS_EXPECTING_SWITCH_EVENT,
  101. INTEL_PT_SS_EXPECTING_SWITCH_IP,
  102. };
  103. struct intel_pt_queue {
  104. struct intel_pt *pt;
  105. unsigned int queue_nr;
  106. struct auxtrace_buffer *buffer;
  107. void *decoder;
  108. const struct intel_pt_state *state;
  109. struct ip_callchain *chain;
  110. struct branch_stack *last_branch;
  111. struct branch_stack *last_branch_rb;
  112. size_t last_branch_pos;
  113. union perf_event *event_buf;
  114. bool on_heap;
  115. bool stop;
  116. bool step_through_buffers;
  117. bool use_buffer_pid_tid;
  118. pid_t pid, tid;
  119. int cpu;
  120. int switch_state;
  121. pid_t next_tid;
  122. struct thread *thread;
  123. bool exclude_kernel;
  124. bool have_sample;
  125. u64 time;
  126. u64 timestamp;
  127. u32 flags;
  128. u16 insn_len;
  129. u64 last_insn_cnt;
  130. char insn[INTEL_PT_INSN_BUF_SZ];
  131. };
  132. static void intel_pt_dump(struct intel_pt *pt __maybe_unused,
  133. unsigned char *buf, size_t len)
  134. {
  135. struct intel_pt_pkt packet;
  136. size_t pos = 0;
  137. int ret, pkt_len, i;
  138. char desc[INTEL_PT_PKT_DESC_MAX];
  139. const char *color = PERF_COLOR_BLUE;
  140. color_fprintf(stdout, color,
  141. ". ... Intel Processor Trace data: size %zu bytes\n",
  142. len);
  143. while (len) {
  144. ret = intel_pt_get_packet(buf, len, &packet);
  145. if (ret > 0)
  146. pkt_len = ret;
  147. else
  148. pkt_len = 1;
  149. printf(".");
  150. color_fprintf(stdout, color, " %08x: ", pos);
  151. for (i = 0; i < pkt_len; i++)
  152. color_fprintf(stdout, color, " %02x", buf[i]);
  153. for (; i < 16; i++)
  154. color_fprintf(stdout, color, " ");
  155. if (ret > 0) {
  156. ret = intel_pt_pkt_desc(&packet, desc,
  157. INTEL_PT_PKT_DESC_MAX);
  158. if (ret > 0)
  159. color_fprintf(stdout, color, " %s\n", desc);
  160. } else {
  161. color_fprintf(stdout, color, " Bad packet!\n");
  162. }
  163. pos += pkt_len;
  164. buf += pkt_len;
  165. len -= pkt_len;
  166. }
  167. }
  168. static void intel_pt_dump_event(struct intel_pt *pt, unsigned char *buf,
  169. size_t len)
  170. {
  171. printf(".\n");
  172. intel_pt_dump(pt, buf, len);
  173. }
  174. static int intel_pt_do_fix_overlap(struct intel_pt *pt, struct auxtrace_buffer *a,
  175. struct auxtrace_buffer *b)
  176. {
  177. void *start;
  178. start = intel_pt_find_overlap(a->data, a->size, b->data, b->size,
  179. pt->have_tsc);
  180. if (!start)
  181. return -EINVAL;
  182. b->use_size = b->data + b->size - start;
  183. b->use_data = start;
  184. return 0;
  185. }
  186. static void intel_pt_use_buffer_pid_tid(struct intel_pt_queue *ptq,
  187. struct auxtrace_queue *queue,
  188. struct auxtrace_buffer *buffer)
  189. {
  190. if (queue->cpu == -1 && buffer->cpu != -1)
  191. ptq->cpu = buffer->cpu;
  192. ptq->pid = buffer->pid;
  193. ptq->tid = buffer->tid;
  194. intel_pt_log("queue %u cpu %d pid %d tid %d\n",
  195. ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
  196. thread__zput(ptq->thread);
  197. if (ptq->tid != -1) {
  198. if (ptq->pid != -1)
  199. ptq->thread = machine__findnew_thread(ptq->pt->machine,
  200. ptq->pid,
  201. ptq->tid);
  202. else
  203. ptq->thread = machine__find_thread(ptq->pt->machine, -1,
  204. ptq->tid);
  205. }
  206. }
  207. /* This function assumes data is processed sequentially only */
  208. static int intel_pt_get_trace(struct intel_pt_buffer *b, void *data)
  209. {
  210. struct intel_pt_queue *ptq = data;
  211. struct auxtrace_buffer *buffer = ptq->buffer, *old_buffer = buffer;
  212. struct auxtrace_queue *queue;
  213. if (ptq->stop) {
  214. b->len = 0;
  215. return 0;
  216. }
  217. queue = &ptq->pt->queues.queue_array[ptq->queue_nr];
  218. next:
  219. buffer = auxtrace_buffer__next(queue, buffer);
  220. if (!buffer) {
  221. if (old_buffer)
  222. auxtrace_buffer__drop_data(old_buffer);
  223. b->len = 0;
  224. return 0;
  225. }
  226. ptq->buffer = buffer;
  227. if (!buffer->data) {
  228. int fd = perf_data_file__fd(ptq->pt->session->file);
  229. buffer->data = auxtrace_buffer__get_data(buffer, fd);
  230. if (!buffer->data)
  231. return -ENOMEM;
  232. }
  233. if (ptq->pt->snapshot_mode && !buffer->consecutive && old_buffer &&
  234. intel_pt_do_fix_overlap(ptq->pt, old_buffer, buffer))
  235. return -ENOMEM;
  236. if (buffer->use_data) {
  237. b->len = buffer->use_size;
  238. b->buf = buffer->use_data;
  239. } else {
  240. b->len = buffer->size;
  241. b->buf = buffer->data;
  242. }
  243. b->ref_timestamp = buffer->reference;
  244. /*
  245. * If in snapshot mode and the buffer has no usable data, get next
  246. * buffer and again check overlap against old_buffer.
  247. */
  248. if (ptq->pt->snapshot_mode && !b->len)
  249. goto next;
  250. if (old_buffer)
  251. auxtrace_buffer__drop_data(old_buffer);
  252. if (!old_buffer || ptq->pt->sampling_mode || (ptq->pt->snapshot_mode &&
  253. !buffer->consecutive)) {
  254. b->consecutive = false;
  255. b->trace_nr = buffer->buffer_nr + 1;
  256. } else {
  257. b->consecutive = true;
  258. }
  259. if (ptq->use_buffer_pid_tid && (ptq->pid != buffer->pid ||
  260. ptq->tid != buffer->tid))
  261. intel_pt_use_buffer_pid_tid(ptq, queue, buffer);
  262. if (ptq->step_through_buffers)
  263. ptq->stop = true;
  264. if (!b->len)
  265. return intel_pt_get_trace(b, data);
  266. return 0;
  267. }
  268. struct intel_pt_cache_entry {
  269. struct auxtrace_cache_entry entry;
  270. u64 insn_cnt;
  271. u64 byte_cnt;
  272. enum intel_pt_insn_op op;
  273. enum intel_pt_insn_branch branch;
  274. int length;
  275. int32_t rel;
  276. char insn[INTEL_PT_INSN_BUF_SZ];
  277. };
  278. static int intel_pt_config_div(const char *var, const char *value, void *data)
  279. {
  280. int *d = data;
  281. long val;
  282. if (!strcmp(var, "intel-pt.cache-divisor")) {
  283. val = strtol(value, NULL, 0);
  284. if (val > 0 && val <= INT_MAX)
  285. *d = val;
  286. }
  287. return 0;
  288. }
  289. static int intel_pt_cache_divisor(void)
  290. {
  291. static int d;
  292. if (d)
  293. return d;
  294. perf_config(intel_pt_config_div, &d);
  295. if (!d)
  296. d = 64;
  297. return d;
  298. }
  299. static unsigned int intel_pt_cache_size(struct dso *dso,
  300. struct machine *machine)
  301. {
  302. off_t size;
  303. size = dso__data_size(dso, machine);
  304. size /= intel_pt_cache_divisor();
  305. if (size < 1000)
  306. return 10;
  307. if (size > (1 << 21))
  308. return 21;
  309. return 32 - __builtin_clz(size);
  310. }
  311. static struct auxtrace_cache *intel_pt_cache(struct dso *dso,
  312. struct machine *machine)
  313. {
  314. struct auxtrace_cache *c;
  315. unsigned int bits;
  316. if (dso->auxtrace_cache)
  317. return dso->auxtrace_cache;
  318. bits = intel_pt_cache_size(dso, machine);
  319. /* Ignoring cache creation failure */
  320. c = auxtrace_cache__new(bits, sizeof(struct intel_pt_cache_entry), 200);
  321. dso->auxtrace_cache = c;
  322. return c;
  323. }
  324. static int intel_pt_cache_add(struct dso *dso, struct machine *machine,
  325. u64 offset, u64 insn_cnt, u64 byte_cnt,
  326. struct intel_pt_insn *intel_pt_insn)
  327. {
  328. struct auxtrace_cache *c = intel_pt_cache(dso, machine);
  329. struct intel_pt_cache_entry *e;
  330. int err;
  331. if (!c)
  332. return -ENOMEM;
  333. e = auxtrace_cache__alloc_entry(c);
  334. if (!e)
  335. return -ENOMEM;
  336. e->insn_cnt = insn_cnt;
  337. e->byte_cnt = byte_cnt;
  338. e->op = intel_pt_insn->op;
  339. e->branch = intel_pt_insn->branch;
  340. e->length = intel_pt_insn->length;
  341. e->rel = intel_pt_insn->rel;
  342. memcpy(e->insn, intel_pt_insn->buf, INTEL_PT_INSN_BUF_SZ);
  343. err = auxtrace_cache__add(c, offset, &e->entry);
  344. if (err)
  345. auxtrace_cache__free_entry(c, e);
  346. return err;
  347. }
  348. static struct intel_pt_cache_entry *
  349. intel_pt_cache_lookup(struct dso *dso, struct machine *machine, u64 offset)
  350. {
  351. struct auxtrace_cache *c = intel_pt_cache(dso, machine);
  352. if (!c)
  353. return NULL;
  354. return auxtrace_cache__lookup(dso->auxtrace_cache, offset);
  355. }
  356. static int intel_pt_walk_next_insn(struct intel_pt_insn *intel_pt_insn,
  357. uint64_t *insn_cnt_ptr, uint64_t *ip,
  358. uint64_t to_ip, uint64_t max_insn_cnt,
  359. void *data)
  360. {
  361. struct intel_pt_queue *ptq = data;
  362. struct machine *machine = ptq->pt->machine;
  363. struct thread *thread;
  364. struct addr_location al;
  365. unsigned char buf[INTEL_PT_INSN_BUF_SZ];
  366. ssize_t len;
  367. int x86_64;
  368. u8 cpumode;
  369. u64 offset, start_offset, start_ip;
  370. u64 insn_cnt = 0;
  371. bool one_map = true;
  372. intel_pt_insn->length = 0;
  373. if (to_ip && *ip == to_ip)
  374. goto out_no_cache;
  375. if (*ip >= ptq->pt->kernel_start)
  376. cpumode = PERF_RECORD_MISC_KERNEL;
  377. else
  378. cpumode = PERF_RECORD_MISC_USER;
  379. thread = ptq->thread;
  380. if (!thread) {
  381. if (cpumode != PERF_RECORD_MISC_KERNEL)
  382. return -EINVAL;
  383. thread = ptq->pt->unknown_thread;
  384. }
  385. while (1) {
  386. thread__find_addr_map(thread, cpumode, MAP__FUNCTION, *ip, &al);
  387. if (!al.map || !al.map->dso)
  388. return -EINVAL;
  389. if (al.map->dso->data.status == DSO_DATA_STATUS_ERROR &&
  390. dso__data_status_seen(al.map->dso,
  391. DSO_DATA_STATUS_SEEN_ITRACE))
  392. return -ENOENT;
  393. offset = al.map->map_ip(al.map, *ip);
  394. if (!to_ip && one_map) {
  395. struct intel_pt_cache_entry *e;
  396. e = intel_pt_cache_lookup(al.map->dso, machine, offset);
  397. if (e &&
  398. (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) {
  399. *insn_cnt_ptr = e->insn_cnt;
  400. *ip += e->byte_cnt;
  401. intel_pt_insn->op = e->op;
  402. intel_pt_insn->branch = e->branch;
  403. intel_pt_insn->length = e->length;
  404. intel_pt_insn->rel = e->rel;
  405. memcpy(intel_pt_insn->buf, e->insn,
  406. INTEL_PT_INSN_BUF_SZ);
  407. intel_pt_log_insn_no_data(intel_pt_insn, *ip);
  408. return 0;
  409. }
  410. }
  411. start_offset = offset;
  412. start_ip = *ip;
  413. /* Load maps to ensure dso->is_64_bit has been updated */
  414. map__load(al.map);
  415. x86_64 = al.map->dso->is_64_bit;
  416. while (1) {
  417. len = dso__data_read_offset(al.map->dso, machine,
  418. offset, buf,
  419. INTEL_PT_INSN_BUF_SZ);
  420. if (len <= 0)
  421. return -EINVAL;
  422. if (intel_pt_get_insn(buf, len, x86_64, intel_pt_insn))
  423. return -EINVAL;
  424. intel_pt_log_insn(intel_pt_insn, *ip);
  425. insn_cnt += 1;
  426. if (intel_pt_insn->branch != INTEL_PT_BR_NO_BRANCH)
  427. goto out;
  428. if (max_insn_cnt && insn_cnt >= max_insn_cnt)
  429. goto out_no_cache;
  430. *ip += intel_pt_insn->length;
  431. if (to_ip && *ip == to_ip)
  432. goto out_no_cache;
  433. if (*ip >= al.map->end)
  434. break;
  435. offset += intel_pt_insn->length;
  436. }
  437. one_map = false;
  438. }
  439. out:
  440. *insn_cnt_ptr = insn_cnt;
  441. if (!one_map)
  442. goto out_no_cache;
  443. /*
  444. * Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate
  445. * entries.
  446. */
  447. if (to_ip) {
  448. struct intel_pt_cache_entry *e;
  449. e = intel_pt_cache_lookup(al.map->dso, machine, start_offset);
  450. if (e)
  451. return 0;
  452. }
  453. /* Ignore cache errors */
  454. intel_pt_cache_add(al.map->dso, machine, start_offset, insn_cnt,
  455. *ip - start_ip, intel_pt_insn);
  456. return 0;
  457. out_no_cache:
  458. *insn_cnt_ptr = insn_cnt;
  459. return 0;
  460. }
  461. static bool intel_pt_match_pgd_ip(struct intel_pt *pt, uint64_t ip,
  462. uint64_t offset, const char *filename)
  463. {
  464. struct addr_filter *filt;
  465. bool have_filter = false;
  466. bool hit_tracestop = false;
  467. bool hit_filter = false;
  468. list_for_each_entry(filt, &pt->filts.head, list) {
  469. if (filt->start)
  470. have_filter = true;
  471. if ((filename && !filt->filename) ||
  472. (!filename && filt->filename) ||
  473. (filename && strcmp(filename, filt->filename)))
  474. continue;
  475. if (!(offset >= filt->addr && offset < filt->addr + filt->size))
  476. continue;
  477. intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s hit filter: %s offset %#"PRIx64" size %#"PRIx64"\n",
  478. ip, offset, filename ? filename : "[kernel]",
  479. filt->start ? "filter" : "stop",
  480. filt->addr, filt->size);
  481. if (filt->start)
  482. hit_filter = true;
  483. else
  484. hit_tracestop = true;
  485. }
  486. if (!hit_tracestop && !hit_filter)
  487. intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s is not in a filter region\n",
  488. ip, offset, filename ? filename : "[kernel]");
  489. return hit_tracestop || (have_filter && !hit_filter);
  490. }
  491. static int __intel_pt_pgd_ip(uint64_t ip, void *data)
  492. {
  493. struct intel_pt_queue *ptq = data;
  494. struct thread *thread;
  495. struct addr_location al;
  496. u8 cpumode;
  497. u64 offset;
  498. if (ip >= ptq->pt->kernel_start)
  499. return intel_pt_match_pgd_ip(ptq->pt, ip, ip, NULL);
  500. cpumode = PERF_RECORD_MISC_USER;
  501. thread = ptq->thread;
  502. if (!thread)
  503. return -EINVAL;
  504. thread__find_addr_map(thread, cpumode, MAP__FUNCTION, ip, &al);
  505. if (!al.map || !al.map->dso)
  506. return -EINVAL;
  507. offset = al.map->map_ip(al.map, ip);
  508. return intel_pt_match_pgd_ip(ptq->pt, ip, offset,
  509. al.map->dso->long_name);
  510. }
  511. static bool intel_pt_pgd_ip(uint64_t ip, void *data)
  512. {
  513. return __intel_pt_pgd_ip(ip, data) > 0;
  514. }
  515. static bool intel_pt_get_config(struct intel_pt *pt,
  516. struct perf_event_attr *attr, u64 *config)
  517. {
  518. if (attr->type == pt->pmu_type) {
  519. if (config)
  520. *config = attr->config;
  521. return true;
  522. }
  523. return false;
  524. }
  525. static bool intel_pt_exclude_kernel(struct intel_pt *pt)
  526. {
  527. struct perf_evsel *evsel;
  528. evlist__for_each_entry(pt->session->evlist, evsel) {
  529. if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
  530. !evsel->attr.exclude_kernel)
  531. return false;
  532. }
  533. return true;
  534. }
  535. static bool intel_pt_return_compression(struct intel_pt *pt)
  536. {
  537. struct perf_evsel *evsel;
  538. u64 config;
  539. if (!pt->noretcomp_bit)
  540. return true;
  541. evlist__for_each_entry(pt->session->evlist, evsel) {
  542. if (intel_pt_get_config(pt, &evsel->attr, &config) &&
  543. (config & pt->noretcomp_bit))
  544. return false;
  545. }
  546. return true;
  547. }
  548. static unsigned int intel_pt_mtc_period(struct intel_pt *pt)
  549. {
  550. struct perf_evsel *evsel;
  551. unsigned int shift;
  552. u64 config;
  553. if (!pt->mtc_freq_bits)
  554. return 0;
  555. for (shift = 0, config = pt->mtc_freq_bits; !(config & 1); shift++)
  556. config >>= 1;
  557. evlist__for_each_entry(pt->session->evlist, evsel) {
  558. if (intel_pt_get_config(pt, &evsel->attr, &config))
  559. return (config & pt->mtc_freq_bits) >> shift;
  560. }
  561. return 0;
  562. }
  563. static bool intel_pt_timeless_decoding(struct intel_pt *pt)
  564. {
  565. struct perf_evsel *evsel;
  566. bool timeless_decoding = true;
  567. u64 config;
  568. if (!pt->tsc_bit || !pt->cap_user_time_zero)
  569. return true;
  570. evlist__for_each_entry(pt->session->evlist, evsel) {
  571. if (!(evsel->attr.sample_type & PERF_SAMPLE_TIME))
  572. return true;
  573. if (intel_pt_get_config(pt, &evsel->attr, &config)) {
  574. if (config & pt->tsc_bit)
  575. timeless_decoding = false;
  576. else
  577. return true;
  578. }
  579. }
  580. return timeless_decoding;
  581. }
  582. static bool intel_pt_tracing_kernel(struct intel_pt *pt)
  583. {
  584. struct perf_evsel *evsel;
  585. evlist__for_each_entry(pt->session->evlist, evsel) {
  586. if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
  587. !evsel->attr.exclude_kernel)
  588. return true;
  589. }
  590. return false;
  591. }
  592. static bool intel_pt_have_tsc(struct intel_pt *pt)
  593. {
  594. struct perf_evsel *evsel;
  595. bool have_tsc = false;
  596. u64 config;
  597. if (!pt->tsc_bit)
  598. return false;
  599. evlist__for_each_entry(pt->session->evlist, evsel) {
  600. if (intel_pt_get_config(pt, &evsel->attr, &config)) {
  601. if (config & pt->tsc_bit)
  602. have_tsc = true;
  603. else
  604. return false;
  605. }
  606. }
  607. return have_tsc;
  608. }
  609. static u64 intel_pt_ns_to_ticks(const struct intel_pt *pt, u64 ns)
  610. {
  611. u64 quot, rem;
  612. quot = ns / pt->tc.time_mult;
  613. rem = ns % pt->tc.time_mult;
  614. return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) /
  615. pt->tc.time_mult;
  616. }
  617. static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
  618. unsigned int queue_nr)
  619. {
  620. struct intel_pt_params params = { .get_trace = 0, };
  621. struct intel_pt_queue *ptq;
  622. ptq = zalloc(sizeof(struct intel_pt_queue));
  623. if (!ptq)
  624. return NULL;
  625. if (pt->synth_opts.callchain) {
  626. size_t sz = sizeof(struct ip_callchain);
  627. sz += pt->synth_opts.callchain_sz * sizeof(u64);
  628. ptq->chain = zalloc(sz);
  629. if (!ptq->chain)
  630. goto out_free;
  631. }
  632. if (pt->synth_opts.last_branch) {
  633. size_t sz = sizeof(struct branch_stack);
  634. sz += pt->synth_opts.last_branch_sz *
  635. sizeof(struct branch_entry);
  636. ptq->last_branch = zalloc(sz);
  637. if (!ptq->last_branch)
  638. goto out_free;
  639. ptq->last_branch_rb = zalloc(sz);
  640. if (!ptq->last_branch_rb)
  641. goto out_free;
  642. }
  643. ptq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
  644. if (!ptq->event_buf)
  645. goto out_free;
  646. ptq->pt = pt;
  647. ptq->queue_nr = queue_nr;
  648. ptq->exclude_kernel = intel_pt_exclude_kernel(pt);
  649. ptq->pid = -1;
  650. ptq->tid = -1;
  651. ptq->cpu = -1;
  652. ptq->next_tid = -1;
  653. params.get_trace = intel_pt_get_trace;
  654. params.walk_insn = intel_pt_walk_next_insn;
  655. params.data = ptq;
  656. params.return_compression = intel_pt_return_compression(pt);
  657. params.max_non_turbo_ratio = pt->max_non_turbo_ratio;
  658. params.mtc_period = intel_pt_mtc_period(pt);
  659. params.tsc_ctc_ratio_n = pt->tsc_ctc_ratio_n;
  660. params.tsc_ctc_ratio_d = pt->tsc_ctc_ratio_d;
  661. if (pt->filts.cnt > 0)
  662. params.pgd_ip = intel_pt_pgd_ip;
  663. if (pt->synth_opts.instructions) {
  664. if (pt->synth_opts.period) {
  665. switch (pt->synth_opts.period_type) {
  666. case PERF_ITRACE_PERIOD_INSTRUCTIONS:
  667. params.period_type =
  668. INTEL_PT_PERIOD_INSTRUCTIONS;
  669. params.period = pt->synth_opts.period;
  670. break;
  671. case PERF_ITRACE_PERIOD_TICKS:
  672. params.period_type = INTEL_PT_PERIOD_TICKS;
  673. params.period = pt->synth_opts.period;
  674. break;
  675. case PERF_ITRACE_PERIOD_NANOSECS:
  676. params.period_type = INTEL_PT_PERIOD_TICKS;
  677. params.period = intel_pt_ns_to_ticks(pt,
  678. pt->synth_opts.period);
  679. break;
  680. default:
  681. break;
  682. }
  683. }
  684. if (!params.period) {
  685. params.period_type = INTEL_PT_PERIOD_INSTRUCTIONS;
  686. params.period = 1;
  687. }
  688. }
  689. ptq->decoder = intel_pt_decoder_new(&params);
  690. if (!ptq->decoder)
  691. goto out_free;
  692. return ptq;
  693. out_free:
  694. zfree(&ptq->event_buf);
  695. zfree(&ptq->last_branch);
  696. zfree(&ptq->last_branch_rb);
  697. zfree(&ptq->chain);
  698. free(ptq);
  699. return NULL;
  700. }
  701. static void intel_pt_free_queue(void *priv)
  702. {
  703. struct intel_pt_queue *ptq = priv;
  704. if (!ptq)
  705. return;
  706. thread__zput(ptq->thread);
  707. intel_pt_decoder_free(ptq->decoder);
  708. zfree(&ptq->event_buf);
  709. zfree(&ptq->last_branch);
  710. zfree(&ptq->last_branch_rb);
  711. zfree(&ptq->chain);
  712. free(ptq);
  713. }
  714. static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,
  715. struct auxtrace_queue *queue)
  716. {
  717. struct intel_pt_queue *ptq = queue->priv;
  718. if (queue->tid == -1 || pt->have_sched_switch) {
  719. ptq->tid = machine__get_current_tid(pt->machine, ptq->cpu);
  720. thread__zput(ptq->thread);
  721. }
  722. if (!ptq->thread && ptq->tid != -1)
  723. ptq->thread = machine__find_thread(pt->machine, -1, ptq->tid);
  724. if (ptq->thread) {
  725. ptq->pid = ptq->thread->pid_;
  726. if (queue->cpu == -1)
  727. ptq->cpu = ptq->thread->cpu;
  728. }
  729. }
  730. static void intel_pt_sample_flags(struct intel_pt_queue *ptq)
  731. {
  732. if (ptq->state->flags & INTEL_PT_ABORT_TX) {
  733. ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_TX_ABORT;
  734. } else if (ptq->state->flags & INTEL_PT_ASYNC) {
  735. if (ptq->state->to_ip)
  736. ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
  737. PERF_IP_FLAG_ASYNC |
  738. PERF_IP_FLAG_INTERRUPT;
  739. else
  740. ptq->flags = PERF_IP_FLAG_BRANCH |
  741. PERF_IP_FLAG_TRACE_END;
  742. ptq->insn_len = 0;
  743. } else {
  744. if (ptq->state->from_ip)
  745. ptq->flags = intel_pt_insn_type(ptq->state->insn_op);
  746. else
  747. ptq->flags = PERF_IP_FLAG_BRANCH |
  748. PERF_IP_FLAG_TRACE_BEGIN;
  749. if (ptq->state->flags & INTEL_PT_IN_TX)
  750. ptq->flags |= PERF_IP_FLAG_IN_TX;
  751. ptq->insn_len = ptq->state->insn_len;
  752. memcpy(ptq->insn, ptq->state->insn, INTEL_PT_INSN_BUF_SZ);
  753. }
  754. }
  755. static int intel_pt_setup_queue(struct intel_pt *pt,
  756. struct auxtrace_queue *queue,
  757. unsigned int queue_nr)
  758. {
  759. struct intel_pt_queue *ptq = queue->priv;
  760. if (list_empty(&queue->head))
  761. return 0;
  762. if (!ptq) {
  763. ptq = intel_pt_alloc_queue(pt, queue_nr);
  764. if (!ptq)
  765. return -ENOMEM;
  766. queue->priv = ptq;
  767. if (queue->cpu != -1)
  768. ptq->cpu = queue->cpu;
  769. ptq->tid = queue->tid;
  770. if (pt->sampling_mode) {
  771. if (pt->timeless_decoding)
  772. ptq->step_through_buffers = true;
  773. if (pt->timeless_decoding || !pt->have_sched_switch)
  774. ptq->use_buffer_pid_tid = true;
  775. }
  776. }
  777. if (!ptq->on_heap &&
  778. (!pt->sync_switch ||
  779. ptq->switch_state != INTEL_PT_SS_EXPECTING_SWITCH_EVENT)) {
  780. const struct intel_pt_state *state;
  781. int ret;
  782. if (pt->timeless_decoding)
  783. return 0;
  784. intel_pt_log("queue %u getting timestamp\n", queue_nr);
  785. intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
  786. queue_nr, ptq->cpu, ptq->pid, ptq->tid);
  787. while (1) {
  788. state = intel_pt_decode(ptq->decoder);
  789. if (state->err) {
  790. if (state->err == INTEL_PT_ERR_NODATA) {
  791. intel_pt_log("queue %u has no timestamp\n",
  792. queue_nr);
  793. return 0;
  794. }
  795. continue;
  796. }
  797. if (state->timestamp)
  798. break;
  799. }
  800. ptq->timestamp = state->timestamp;
  801. intel_pt_log("queue %u timestamp 0x%" PRIx64 "\n",
  802. queue_nr, ptq->timestamp);
  803. ptq->state = state;
  804. ptq->have_sample = true;
  805. intel_pt_sample_flags(ptq);
  806. ret = auxtrace_heap__add(&pt->heap, queue_nr, ptq->timestamp);
  807. if (ret)
  808. return ret;
  809. ptq->on_heap = true;
  810. }
  811. return 0;
  812. }
  813. static int intel_pt_setup_queues(struct intel_pt *pt)
  814. {
  815. unsigned int i;
  816. int ret;
  817. for (i = 0; i < pt->queues.nr_queues; i++) {
  818. ret = intel_pt_setup_queue(pt, &pt->queues.queue_array[i], i);
  819. if (ret)
  820. return ret;
  821. }
  822. return 0;
  823. }
  824. static inline void intel_pt_copy_last_branch_rb(struct intel_pt_queue *ptq)
  825. {
  826. struct branch_stack *bs_src = ptq->last_branch_rb;
  827. struct branch_stack *bs_dst = ptq->last_branch;
  828. size_t nr = 0;
  829. bs_dst->nr = bs_src->nr;
  830. if (!bs_src->nr)
  831. return;
  832. nr = ptq->pt->synth_opts.last_branch_sz - ptq->last_branch_pos;
  833. memcpy(&bs_dst->entries[0],
  834. &bs_src->entries[ptq->last_branch_pos],
  835. sizeof(struct branch_entry) * nr);
  836. if (bs_src->nr >= ptq->pt->synth_opts.last_branch_sz) {
  837. memcpy(&bs_dst->entries[nr],
  838. &bs_src->entries[0],
  839. sizeof(struct branch_entry) * ptq->last_branch_pos);
  840. }
  841. }
  842. static inline void intel_pt_reset_last_branch_rb(struct intel_pt_queue *ptq)
  843. {
  844. ptq->last_branch_pos = 0;
  845. ptq->last_branch_rb->nr = 0;
  846. }
  847. static void intel_pt_update_last_branch_rb(struct intel_pt_queue *ptq)
  848. {
  849. const struct intel_pt_state *state = ptq->state;
  850. struct branch_stack *bs = ptq->last_branch_rb;
  851. struct branch_entry *be;
  852. if (!ptq->last_branch_pos)
  853. ptq->last_branch_pos = ptq->pt->synth_opts.last_branch_sz;
  854. ptq->last_branch_pos -= 1;
  855. be = &bs->entries[ptq->last_branch_pos];
  856. be->from = state->from_ip;
  857. be->to = state->to_ip;
  858. be->flags.abort = !!(state->flags & INTEL_PT_ABORT_TX);
  859. be->flags.in_tx = !!(state->flags & INTEL_PT_IN_TX);
  860. /* No support for mispredict */
  861. be->flags.mispred = ptq->pt->mispred_all;
  862. if (bs->nr < ptq->pt->synth_opts.last_branch_sz)
  863. bs->nr += 1;
  864. }
  865. static int intel_pt_inject_event(union perf_event *event,
  866. struct perf_sample *sample, u64 type,
  867. bool swapped)
  868. {
  869. event->header.size = perf_event__sample_event_size(sample, type, 0);
  870. return perf_event__synthesize_sample(event, type, 0, sample, swapped);
  871. }
  872. static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq)
  873. {
  874. int ret;
  875. struct intel_pt *pt = ptq->pt;
  876. union perf_event *event = ptq->event_buf;
  877. struct perf_sample sample = { .ip = 0, };
  878. struct dummy_branch_stack {
  879. u64 nr;
  880. struct branch_entry entries;
  881. } dummy_bs;
  882. if (pt->branches_filter && !(pt->branches_filter & ptq->flags))
  883. return 0;
  884. if (pt->synth_opts.initial_skip &&
  885. pt->num_events++ < pt->synth_opts.initial_skip)
  886. return 0;
  887. event->sample.header.type = PERF_RECORD_SAMPLE;
  888. event->sample.header.misc = PERF_RECORD_MISC_USER;
  889. event->sample.header.size = sizeof(struct perf_event_header);
  890. if (!pt->timeless_decoding)
  891. sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
  892. sample.cpumode = PERF_RECORD_MISC_USER;
  893. sample.ip = ptq->state->from_ip;
  894. sample.pid = ptq->pid;
  895. sample.tid = ptq->tid;
  896. sample.addr = ptq->state->to_ip;
  897. sample.id = ptq->pt->branches_id;
  898. sample.stream_id = ptq->pt->branches_id;
  899. sample.period = 1;
  900. sample.cpu = ptq->cpu;
  901. sample.flags = ptq->flags;
  902. sample.insn_len = ptq->insn_len;
  903. memcpy(sample.insn, ptq->insn, INTEL_PT_INSN_BUF_SZ);
  904. /*
  905. * perf report cannot handle events without a branch stack when using
  906. * SORT_MODE__BRANCH so make a dummy one.
  907. */
  908. if (pt->synth_opts.last_branch && sort__mode == SORT_MODE__BRANCH) {
  909. dummy_bs = (struct dummy_branch_stack){
  910. .nr = 1,
  911. .entries = {
  912. .from = sample.ip,
  913. .to = sample.addr,
  914. },
  915. };
  916. sample.branch_stack = (struct branch_stack *)&dummy_bs;
  917. }
  918. if (pt->synth_opts.inject) {
  919. ret = intel_pt_inject_event(event, &sample,
  920. pt->branches_sample_type,
  921. pt->synth_needs_swap);
  922. if (ret)
  923. return ret;
  924. }
  925. ret = perf_session__deliver_synth_event(pt->session, event, &sample);
  926. if (ret)
  927. pr_err("Intel Processor Trace: failed to deliver branch event, error %d\n",
  928. ret);
  929. return ret;
  930. }
  931. static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq)
  932. {
  933. int ret;
  934. struct intel_pt *pt = ptq->pt;
  935. union perf_event *event = ptq->event_buf;
  936. struct perf_sample sample = { .ip = 0, };
  937. if (pt->synth_opts.initial_skip &&
  938. pt->num_events++ < pt->synth_opts.initial_skip)
  939. return 0;
  940. event->sample.header.type = PERF_RECORD_SAMPLE;
  941. event->sample.header.misc = PERF_RECORD_MISC_USER;
  942. event->sample.header.size = sizeof(struct perf_event_header);
  943. if (!pt->timeless_decoding)
  944. sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
  945. sample.cpumode = PERF_RECORD_MISC_USER;
  946. sample.ip = ptq->state->from_ip;
  947. sample.pid = ptq->pid;
  948. sample.tid = ptq->tid;
  949. sample.addr = ptq->state->to_ip;
  950. sample.id = ptq->pt->instructions_id;
  951. sample.stream_id = ptq->pt->instructions_id;
  952. sample.period = ptq->state->tot_insn_cnt - ptq->last_insn_cnt;
  953. sample.cpu = ptq->cpu;
  954. sample.flags = ptq->flags;
  955. sample.insn_len = ptq->insn_len;
  956. memcpy(sample.insn, ptq->insn, INTEL_PT_INSN_BUF_SZ);
  957. ptq->last_insn_cnt = ptq->state->tot_insn_cnt;
  958. if (pt->synth_opts.callchain) {
  959. thread_stack__sample(ptq->thread, ptq->chain,
  960. pt->synth_opts.callchain_sz, sample.ip);
  961. sample.callchain = ptq->chain;
  962. }
  963. if (pt->synth_opts.last_branch) {
  964. intel_pt_copy_last_branch_rb(ptq);
  965. sample.branch_stack = ptq->last_branch;
  966. }
  967. if (pt->synth_opts.inject) {
  968. ret = intel_pt_inject_event(event, &sample,
  969. pt->instructions_sample_type,
  970. pt->synth_needs_swap);
  971. if (ret)
  972. return ret;
  973. }
  974. ret = perf_session__deliver_synth_event(pt->session, event, &sample);
  975. if (ret)
  976. pr_err("Intel Processor Trace: failed to deliver instruction event, error %d\n",
  977. ret);
  978. if (pt->synth_opts.last_branch)
  979. intel_pt_reset_last_branch_rb(ptq);
  980. return ret;
  981. }
  982. static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
  983. {
  984. int ret;
  985. struct intel_pt *pt = ptq->pt;
  986. union perf_event *event = ptq->event_buf;
  987. struct perf_sample sample = { .ip = 0, };
  988. if (pt->synth_opts.initial_skip &&
  989. pt->num_events++ < pt->synth_opts.initial_skip)
  990. return 0;
  991. event->sample.header.type = PERF_RECORD_SAMPLE;
  992. event->sample.header.misc = PERF_RECORD_MISC_USER;
  993. event->sample.header.size = sizeof(struct perf_event_header);
  994. if (!pt->timeless_decoding)
  995. sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
  996. sample.cpumode = PERF_RECORD_MISC_USER;
  997. sample.ip = ptq->state->from_ip;
  998. sample.pid = ptq->pid;
  999. sample.tid = ptq->tid;
  1000. sample.addr = ptq->state->to_ip;
  1001. sample.id = ptq->pt->transactions_id;
  1002. sample.stream_id = ptq->pt->transactions_id;
  1003. sample.period = 1;
  1004. sample.cpu = ptq->cpu;
  1005. sample.flags = ptq->flags;
  1006. sample.insn_len = ptq->insn_len;
  1007. memcpy(sample.insn, ptq->insn, INTEL_PT_INSN_BUF_SZ);
  1008. if (pt->synth_opts.callchain) {
  1009. thread_stack__sample(ptq->thread, ptq->chain,
  1010. pt->synth_opts.callchain_sz, sample.ip);
  1011. sample.callchain = ptq->chain;
  1012. }
  1013. if (pt->synth_opts.last_branch) {
  1014. intel_pt_copy_last_branch_rb(ptq);
  1015. sample.branch_stack = ptq->last_branch;
  1016. }
  1017. if (pt->synth_opts.inject) {
  1018. ret = intel_pt_inject_event(event, &sample,
  1019. pt->transactions_sample_type,
  1020. pt->synth_needs_swap);
  1021. if (ret)
  1022. return ret;
  1023. }
  1024. ret = perf_session__deliver_synth_event(pt->session, event, &sample);
  1025. if (ret)
  1026. pr_err("Intel Processor Trace: failed to deliver transaction event, error %d\n",
  1027. ret);
  1028. if (pt->synth_opts.last_branch)
  1029. intel_pt_reset_last_branch_rb(ptq);
  1030. return ret;
  1031. }
  1032. static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
  1033. pid_t pid, pid_t tid, u64 ip)
  1034. {
  1035. union perf_event event;
  1036. char msg[MAX_AUXTRACE_ERROR_MSG];
  1037. int err;
  1038. intel_pt__strerror(code, msg, MAX_AUXTRACE_ERROR_MSG);
  1039. auxtrace_synth_error(&event.auxtrace_error, PERF_AUXTRACE_ERROR_ITRACE,
  1040. code, cpu, pid, tid, ip, msg);
  1041. err = perf_session__deliver_synth_event(pt->session, &event, NULL);
  1042. if (err)
  1043. pr_err("Intel Processor Trace: failed to deliver error event, error %d\n",
  1044. err);
  1045. return err;
  1046. }
  1047. static int intel_pt_next_tid(struct intel_pt *pt, struct intel_pt_queue *ptq)
  1048. {
  1049. struct auxtrace_queue *queue;
  1050. pid_t tid = ptq->next_tid;
  1051. int err;
  1052. if (tid == -1)
  1053. return 0;
  1054. intel_pt_log("switch: cpu %d tid %d\n", ptq->cpu, tid);
  1055. err = machine__set_current_tid(pt->machine, ptq->cpu, -1, tid);
  1056. queue = &pt->queues.queue_array[ptq->queue_nr];
  1057. intel_pt_set_pid_tid_cpu(pt, queue);
  1058. ptq->next_tid = -1;
  1059. return err;
  1060. }
  1061. static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
  1062. {
  1063. struct intel_pt *pt = ptq->pt;
  1064. return ip == pt->switch_ip &&
  1065. (ptq->flags & PERF_IP_FLAG_BRANCH) &&
  1066. !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL | PERF_IP_FLAG_ASYNC |
  1067. PERF_IP_FLAG_INTERRUPT | PERF_IP_FLAG_TX_ABORT));
  1068. }
  1069. static int intel_pt_sample(struct intel_pt_queue *ptq)
  1070. {
  1071. const struct intel_pt_state *state = ptq->state;
  1072. struct intel_pt *pt = ptq->pt;
  1073. int err;
  1074. if (!ptq->have_sample)
  1075. return 0;
  1076. ptq->have_sample = false;
  1077. if (pt->sample_instructions &&
  1078. (state->type & INTEL_PT_INSTRUCTION) &&
  1079. (!pt->synth_opts.initial_skip ||
  1080. pt->num_events++ >= pt->synth_opts.initial_skip)) {
  1081. err = intel_pt_synth_instruction_sample(ptq);
  1082. if (err)
  1083. return err;
  1084. }
  1085. if (pt->sample_transactions &&
  1086. (state->type & INTEL_PT_TRANSACTION) &&
  1087. (!pt->synth_opts.initial_skip ||
  1088. pt->num_events++ >= pt->synth_opts.initial_skip)) {
  1089. err = intel_pt_synth_transaction_sample(ptq);
  1090. if (err)
  1091. return err;
  1092. }
  1093. if (!(state->type & INTEL_PT_BRANCH))
  1094. return 0;
  1095. if (pt->synth_opts.callchain || pt->synth_opts.thread_stack)
  1096. thread_stack__event(ptq->thread, ptq->flags, state->from_ip,
  1097. state->to_ip, ptq->insn_len,
  1098. state->trace_nr);
  1099. else
  1100. thread_stack__set_trace_nr(ptq->thread, state->trace_nr);
  1101. if (pt->sample_branches) {
  1102. err = intel_pt_synth_branch_sample(ptq);
  1103. if (err)
  1104. return err;
  1105. }
  1106. if (pt->synth_opts.last_branch)
  1107. intel_pt_update_last_branch_rb(ptq);
  1108. if (!pt->sync_switch)
  1109. return 0;
  1110. if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
  1111. switch (ptq->switch_state) {
  1112. case INTEL_PT_SS_UNKNOWN:
  1113. case INTEL_PT_SS_EXPECTING_SWITCH_IP:
  1114. err = intel_pt_next_tid(pt, ptq);
  1115. if (err)
  1116. return err;
  1117. ptq->switch_state = INTEL_PT_SS_TRACING;
  1118. break;
  1119. default:
  1120. ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_EVENT;
  1121. return 1;
  1122. }
  1123. } else if (!state->to_ip) {
  1124. ptq->switch_state = INTEL_PT_SS_NOT_TRACING;
  1125. } else if (ptq->switch_state == INTEL_PT_SS_NOT_TRACING) {
  1126. ptq->switch_state = INTEL_PT_SS_UNKNOWN;
  1127. } else if (ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
  1128. state->to_ip == pt->ptss_ip &&
  1129. (ptq->flags & PERF_IP_FLAG_CALL)) {
  1130. ptq->switch_state = INTEL_PT_SS_TRACING;
  1131. }
  1132. return 0;
  1133. }
  1134. static u64 intel_pt_switch_ip(struct intel_pt *pt, u64 *ptss_ip)
  1135. {
  1136. struct machine *machine = pt->machine;
  1137. struct map *map;
  1138. struct symbol *sym, *start;
  1139. u64 ip, switch_ip = 0;
  1140. const char *ptss;
  1141. if (ptss_ip)
  1142. *ptss_ip = 0;
  1143. map = machine__kernel_map(machine);
  1144. if (!map)
  1145. return 0;
  1146. if (map__load(map))
  1147. return 0;
  1148. start = dso__first_symbol(map->dso, MAP__FUNCTION);
  1149. for (sym = start; sym; sym = dso__next_symbol(sym)) {
  1150. if (sym->binding == STB_GLOBAL &&
  1151. !strcmp(sym->name, "__switch_to")) {
  1152. ip = map->unmap_ip(map, sym->start);
  1153. if (ip >= map->start && ip < map->end) {
  1154. switch_ip = ip;
  1155. break;
  1156. }
  1157. }
  1158. }
  1159. if (!switch_ip || !ptss_ip)
  1160. return 0;
  1161. if (pt->have_sched_switch == 1)
  1162. ptss = "perf_trace_sched_switch";
  1163. else
  1164. ptss = "__perf_event_task_sched_out";
  1165. for (sym = start; sym; sym = dso__next_symbol(sym)) {
  1166. if (!strcmp(sym->name, ptss)) {
  1167. ip = map->unmap_ip(map, sym->start);
  1168. if (ip >= map->start && ip < map->end) {
  1169. *ptss_ip = ip;
  1170. break;
  1171. }
  1172. }
  1173. }
  1174. return switch_ip;
  1175. }
  1176. static int intel_pt_run_decoder(struct intel_pt_queue *ptq, u64 *timestamp)
  1177. {
  1178. const struct intel_pt_state *state = ptq->state;
  1179. struct intel_pt *pt = ptq->pt;
  1180. int err;
  1181. if (!pt->kernel_start) {
  1182. pt->kernel_start = machine__kernel_start(pt->machine);
  1183. if (pt->per_cpu_mmaps &&
  1184. (pt->have_sched_switch == 1 || pt->have_sched_switch == 3) &&
  1185. !pt->timeless_decoding && intel_pt_tracing_kernel(pt) &&
  1186. !pt->sampling_mode) {
  1187. pt->switch_ip = intel_pt_switch_ip(pt, &pt->ptss_ip);
  1188. if (pt->switch_ip) {
  1189. intel_pt_log("switch_ip: %"PRIx64" ptss_ip: %"PRIx64"\n",
  1190. pt->switch_ip, pt->ptss_ip);
  1191. pt->sync_switch = true;
  1192. }
  1193. }
  1194. }
  1195. intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
  1196. ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
  1197. while (1) {
  1198. err = intel_pt_sample(ptq);
  1199. if (err)
  1200. return err;
  1201. state = intel_pt_decode(ptq->decoder);
  1202. if (state->err) {
  1203. if (state->err == INTEL_PT_ERR_NODATA)
  1204. return 1;
  1205. if (pt->sync_switch &&
  1206. state->from_ip >= pt->kernel_start) {
  1207. pt->sync_switch = false;
  1208. intel_pt_next_tid(pt, ptq);
  1209. }
  1210. if (pt->synth_opts.errors) {
  1211. err = intel_pt_synth_error(pt, state->err,
  1212. ptq->cpu, ptq->pid,
  1213. ptq->tid,
  1214. state->from_ip);
  1215. if (err)
  1216. return err;
  1217. }
  1218. continue;
  1219. }
  1220. ptq->state = state;
  1221. ptq->have_sample = true;
  1222. intel_pt_sample_flags(ptq);
  1223. /* Use estimated TSC upon return to user space */
  1224. if (pt->est_tsc &&
  1225. (state->from_ip >= pt->kernel_start || !state->from_ip) &&
  1226. state->to_ip && state->to_ip < pt->kernel_start) {
  1227. intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
  1228. state->timestamp, state->est_timestamp);
  1229. ptq->timestamp = state->est_timestamp;
  1230. /* Use estimated TSC in unknown switch state */
  1231. } else if (pt->sync_switch &&
  1232. ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
  1233. intel_pt_is_switch_ip(ptq, state->to_ip) &&
  1234. ptq->next_tid == -1) {
  1235. intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
  1236. state->timestamp, state->est_timestamp);
  1237. ptq->timestamp = state->est_timestamp;
  1238. } else if (state->timestamp > ptq->timestamp) {
  1239. ptq->timestamp = state->timestamp;
  1240. }
  1241. if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) {
  1242. *timestamp = ptq->timestamp;
  1243. return 0;
  1244. }
  1245. }
  1246. return 0;
  1247. }
  1248. static inline int intel_pt_update_queues(struct intel_pt *pt)
  1249. {
  1250. if (pt->queues.new_data) {
  1251. pt->queues.new_data = false;
  1252. return intel_pt_setup_queues(pt);
  1253. }
  1254. return 0;
  1255. }
  1256. static int intel_pt_process_queues(struct intel_pt *pt, u64 timestamp)
  1257. {
  1258. unsigned int queue_nr;
  1259. u64 ts;
  1260. int ret;
  1261. while (1) {
  1262. struct auxtrace_queue *queue;
  1263. struct intel_pt_queue *ptq;
  1264. if (!pt->heap.heap_cnt)
  1265. return 0;
  1266. if (pt->heap.heap_array[0].ordinal >= timestamp)
  1267. return 0;
  1268. queue_nr = pt->heap.heap_array[0].queue_nr;
  1269. queue = &pt->queues.queue_array[queue_nr];
  1270. ptq = queue->priv;
  1271. intel_pt_log("queue %u processing 0x%" PRIx64 " to 0x%" PRIx64 "\n",
  1272. queue_nr, pt->heap.heap_array[0].ordinal,
  1273. timestamp);
  1274. auxtrace_heap__pop(&pt->heap);
  1275. if (pt->heap.heap_cnt) {
  1276. ts = pt->heap.heap_array[0].ordinal + 1;
  1277. if (ts > timestamp)
  1278. ts = timestamp;
  1279. } else {
  1280. ts = timestamp;
  1281. }
  1282. intel_pt_set_pid_tid_cpu(pt, queue);
  1283. ret = intel_pt_run_decoder(ptq, &ts);
  1284. if (ret < 0) {
  1285. auxtrace_heap__add(&pt->heap, queue_nr, ts);
  1286. return ret;
  1287. }
  1288. if (!ret) {
  1289. ret = auxtrace_heap__add(&pt->heap, queue_nr, ts);
  1290. if (ret < 0)
  1291. return ret;
  1292. } else {
  1293. ptq->on_heap = false;
  1294. }
  1295. }
  1296. return 0;
  1297. }
  1298. static int intel_pt_process_timeless_queues(struct intel_pt *pt, pid_t tid,
  1299. u64 time_)
  1300. {
  1301. struct auxtrace_queues *queues = &pt->queues;
  1302. unsigned int i;
  1303. u64 ts = 0;
  1304. for (i = 0; i < queues->nr_queues; i++) {
  1305. struct auxtrace_queue *queue = &pt->queues.queue_array[i];
  1306. struct intel_pt_queue *ptq = queue->priv;
  1307. if (ptq && (tid == -1 || ptq->tid == tid)) {
  1308. ptq->time = time_;
  1309. intel_pt_set_pid_tid_cpu(pt, queue);
  1310. intel_pt_run_decoder(ptq, &ts);
  1311. }
  1312. }
  1313. return 0;
  1314. }
  1315. static int intel_pt_lost(struct intel_pt *pt, struct perf_sample *sample)
  1316. {
  1317. return intel_pt_synth_error(pt, INTEL_PT_ERR_LOST, sample->cpu,
  1318. sample->pid, sample->tid, 0);
  1319. }
  1320. static struct intel_pt_queue *intel_pt_cpu_to_ptq(struct intel_pt *pt, int cpu)
  1321. {
  1322. unsigned i, j;
  1323. if (cpu < 0 || !pt->queues.nr_queues)
  1324. return NULL;
  1325. if ((unsigned)cpu >= pt->queues.nr_queues)
  1326. i = pt->queues.nr_queues - 1;
  1327. else
  1328. i = cpu;
  1329. if (pt->queues.queue_array[i].cpu == cpu)
  1330. return pt->queues.queue_array[i].priv;
  1331. for (j = 0; i > 0; j++) {
  1332. if (pt->queues.queue_array[--i].cpu == cpu)
  1333. return pt->queues.queue_array[i].priv;
  1334. }
  1335. for (; j < pt->queues.nr_queues; j++) {
  1336. if (pt->queues.queue_array[j].cpu == cpu)
  1337. return pt->queues.queue_array[j].priv;
  1338. }
  1339. return NULL;
  1340. }
  1341. static int intel_pt_sync_switch(struct intel_pt *pt, int cpu, pid_t tid,
  1342. u64 timestamp)
  1343. {
  1344. struct intel_pt_queue *ptq;
  1345. int err;
  1346. if (!pt->sync_switch)
  1347. return 1;
  1348. ptq = intel_pt_cpu_to_ptq(pt, cpu);
  1349. if (!ptq)
  1350. return 1;
  1351. switch (ptq->switch_state) {
  1352. case INTEL_PT_SS_NOT_TRACING:
  1353. ptq->next_tid = -1;
  1354. break;
  1355. case INTEL_PT_SS_UNKNOWN:
  1356. case INTEL_PT_SS_TRACING:
  1357. ptq->next_tid = tid;
  1358. ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_IP;
  1359. return 0;
  1360. case INTEL_PT_SS_EXPECTING_SWITCH_EVENT:
  1361. if (!ptq->on_heap) {
  1362. ptq->timestamp = perf_time_to_tsc(timestamp,
  1363. &pt->tc);
  1364. err = auxtrace_heap__add(&pt->heap, ptq->queue_nr,
  1365. ptq->timestamp);
  1366. if (err)
  1367. return err;
  1368. ptq->on_heap = true;
  1369. }
  1370. ptq->switch_state = INTEL_PT_SS_TRACING;
  1371. break;
  1372. case INTEL_PT_SS_EXPECTING_SWITCH_IP:
  1373. ptq->next_tid = tid;
  1374. intel_pt_log("ERROR: cpu %d expecting switch ip\n", cpu);
  1375. break;
  1376. default:
  1377. break;
  1378. }
  1379. return 1;
  1380. }
  1381. static int intel_pt_process_switch(struct intel_pt *pt,
  1382. struct perf_sample *sample)
  1383. {
  1384. struct perf_evsel *evsel;
  1385. pid_t tid;
  1386. int cpu, ret;
  1387. evsel = perf_evlist__id2evsel(pt->session->evlist, sample->id);
  1388. if (evsel != pt->switch_evsel)
  1389. return 0;
  1390. tid = perf_evsel__intval(evsel, sample, "next_pid");
  1391. cpu = sample->cpu;
  1392. intel_pt_log("sched_switch: cpu %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
  1393. cpu, tid, sample->time, perf_time_to_tsc(sample->time,
  1394. &pt->tc));
  1395. ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
  1396. if (ret <= 0)
  1397. return ret;
  1398. return machine__set_current_tid(pt->machine, cpu, -1, tid);
  1399. }
  1400. static int intel_pt_context_switch(struct intel_pt *pt, union perf_event *event,
  1401. struct perf_sample *sample)
  1402. {
  1403. bool out = event->header.misc & PERF_RECORD_MISC_SWITCH_OUT;
  1404. pid_t pid, tid;
  1405. int cpu, ret;
  1406. cpu = sample->cpu;
  1407. if (pt->have_sched_switch == 3) {
  1408. if (!out)
  1409. return 0;
  1410. if (event->header.type != PERF_RECORD_SWITCH_CPU_WIDE) {
  1411. pr_err("Expecting CPU-wide context switch event\n");
  1412. return -EINVAL;
  1413. }
  1414. pid = event->context_switch.next_prev_pid;
  1415. tid = event->context_switch.next_prev_tid;
  1416. } else {
  1417. if (out)
  1418. return 0;
  1419. pid = sample->pid;
  1420. tid = sample->tid;
  1421. }
  1422. if (tid == -1) {
  1423. pr_err("context_switch event has no tid\n");
  1424. return -EINVAL;
  1425. }
  1426. intel_pt_log("context_switch: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
  1427. cpu, pid, tid, sample->time, perf_time_to_tsc(sample->time,
  1428. &pt->tc));
  1429. ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
  1430. if (ret <= 0)
  1431. return ret;
  1432. return machine__set_current_tid(pt->machine, cpu, pid, tid);
  1433. }
  1434. static int intel_pt_process_itrace_start(struct intel_pt *pt,
  1435. union perf_event *event,
  1436. struct perf_sample *sample)
  1437. {
  1438. if (!pt->per_cpu_mmaps)
  1439. return 0;
  1440. intel_pt_log("itrace_start: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
  1441. sample->cpu, event->itrace_start.pid,
  1442. event->itrace_start.tid, sample->time,
  1443. perf_time_to_tsc(sample->time, &pt->tc));
  1444. return machine__set_current_tid(pt->machine, sample->cpu,
  1445. event->itrace_start.pid,
  1446. event->itrace_start.tid);
  1447. }
  1448. static int intel_pt_process_event(struct perf_session *session,
  1449. union perf_event *event,
  1450. struct perf_sample *sample,
  1451. struct perf_tool *tool)
  1452. {
  1453. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1454. auxtrace);
  1455. u64 timestamp;
  1456. int err = 0;
  1457. if (dump_trace)
  1458. return 0;
  1459. if (!tool->ordered_events) {
  1460. pr_err("Intel Processor Trace requires ordered events\n");
  1461. return -EINVAL;
  1462. }
  1463. if (sample->time && sample->time != (u64)-1)
  1464. timestamp = perf_time_to_tsc(sample->time, &pt->tc);
  1465. else
  1466. timestamp = 0;
  1467. if (timestamp || pt->timeless_decoding) {
  1468. err = intel_pt_update_queues(pt);
  1469. if (err)
  1470. return err;
  1471. }
  1472. if (pt->timeless_decoding) {
  1473. if (event->header.type == PERF_RECORD_EXIT) {
  1474. err = intel_pt_process_timeless_queues(pt,
  1475. event->fork.tid,
  1476. sample->time);
  1477. }
  1478. } else if (timestamp) {
  1479. err = intel_pt_process_queues(pt, timestamp);
  1480. }
  1481. if (err)
  1482. return err;
  1483. if (event->header.type == PERF_RECORD_AUX &&
  1484. (event->aux.flags & PERF_AUX_FLAG_TRUNCATED) &&
  1485. pt->synth_opts.errors) {
  1486. err = intel_pt_lost(pt, sample);
  1487. if (err)
  1488. return err;
  1489. }
  1490. if (pt->switch_evsel && event->header.type == PERF_RECORD_SAMPLE)
  1491. err = intel_pt_process_switch(pt, sample);
  1492. else if (event->header.type == PERF_RECORD_ITRACE_START)
  1493. err = intel_pt_process_itrace_start(pt, event, sample);
  1494. else if (event->header.type == PERF_RECORD_SWITCH ||
  1495. event->header.type == PERF_RECORD_SWITCH_CPU_WIDE)
  1496. err = intel_pt_context_switch(pt, event, sample);
  1497. intel_pt_log("event %s (%u): cpu %d time %"PRIu64" tsc %#"PRIx64"\n",
  1498. perf_event__name(event->header.type), event->header.type,
  1499. sample->cpu, sample->time, timestamp);
  1500. return err;
  1501. }
  1502. static int intel_pt_flush(struct perf_session *session, struct perf_tool *tool)
  1503. {
  1504. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1505. auxtrace);
  1506. int ret;
  1507. if (dump_trace)
  1508. return 0;
  1509. if (!tool->ordered_events)
  1510. return -EINVAL;
  1511. ret = intel_pt_update_queues(pt);
  1512. if (ret < 0)
  1513. return ret;
  1514. if (pt->timeless_decoding)
  1515. return intel_pt_process_timeless_queues(pt, -1,
  1516. MAX_TIMESTAMP - 1);
  1517. return intel_pt_process_queues(pt, MAX_TIMESTAMP);
  1518. }
  1519. static void intel_pt_free_events(struct perf_session *session)
  1520. {
  1521. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1522. auxtrace);
  1523. struct auxtrace_queues *queues = &pt->queues;
  1524. unsigned int i;
  1525. for (i = 0; i < queues->nr_queues; i++) {
  1526. intel_pt_free_queue(queues->queue_array[i].priv);
  1527. queues->queue_array[i].priv = NULL;
  1528. }
  1529. intel_pt_log_disable();
  1530. auxtrace_queues__free(queues);
  1531. }
  1532. static void intel_pt_free(struct perf_session *session)
  1533. {
  1534. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1535. auxtrace);
  1536. auxtrace_heap__free(&pt->heap);
  1537. intel_pt_free_events(session);
  1538. session->auxtrace = NULL;
  1539. thread__put(pt->unknown_thread);
  1540. addr_filters__exit(&pt->filts);
  1541. zfree(&pt->filter);
  1542. free(pt);
  1543. }
  1544. static int intel_pt_process_auxtrace_event(struct perf_session *session,
  1545. union perf_event *event,
  1546. struct perf_tool *tool __maybe_unused)
  1547. {
  1548. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1549. auxtrace);
  1550. if (pt->sampling_mode)
  1551. return 0;
  1552. if (!pt->data_queued) {
  1553. struct auxtrace_buffer *buffer;
  1554. off_t data_offset;
  1555. int fd = perf_data_file__fd(session->file);
  1556. int err;
  1557. if (perf_data_file__is_pipe(session->file)) {
  1558. data_offset = 0;
  1559. } else {
  1560. data_offset = lseek(fd, 0, SEEK_CUR);
  1561. if (data_offset == -1)
  1562. return -errno;
  1563. }
  1564. err = auxtrace_queues__add_event(&pt->queues, session, event,
  1565. data_offset, &buffer);
  1566. if (err)
  1567. return err;
  1568. /* Dump here now we have copied a piped trace out of the pipe */
  1569. if (dump_trace) {
  1570. if (auxtrace_buffer__get_data(buffer, fd)) {
  1571. intel_pt_dump_event(pt, buffer->data,
  1572. buffer->size);
  1573. auxtrace_buffer__put_data(buffer);
  1574. }
  1575. }
  1576. }
  1577. return 0;
  1578. }
  1579. struct intel_pt_synth {
  1580. struct perf_tool dummy_tool;
  1581. struct perf_session *session;
  1582. };
  1583. static int intel_pt_event_synth(struct perf_tool *tool,
  1584. union perf_event *event,
  1585. struct perf_sample *sample __maybe_unused,
  1586. struct machine *machine __maybe_unused)
  1587. {
  1588. struct intel_pt_synth *intel_pt_synth =
  1589. container_of(tool, struct intel_pt_synth, dummy_tool);
  1590. return perf_session__deliver_synth_event(intel_pt_synth->session, event,
  1591. NULL);
  1592. }
  1593. static int intel_pt_synth_event(struct perf_session *session,
  1594. struct perf_event_attr *attr, u64 id)
  1595. {
  1596. struct intel_pt_synth intel_pt_synth;
  1597. memset(&intel_pt_synth, 0, sizeof(struct intel_pt_synth));
  1598. intel_pt_synth.session = session;
  1599. return perf_event__synthesize_attr(&intel_pt_synth.dummy_tool, attr, 1,
  1600. &id, intel_pt_event_synth);
  1601. }
  1602. static int intel_pt_synth_events(struct intel_pt *pt,
  1603. struct perf_session *session)
  1604. {
  1605. struct perf_evlist *evlist = session->evlist;
  1606. struct perf_evsel *evsel;
  1607. struct perf_event_attr attr;
  1608. bool found = false;
  1609. u64 id;
  1610. int err;
  1611. evlist__for_each_entry(evlist, evsel) {
  1612. if (evsel->attr.type == pt->pmu_type && evsel->ids) {
  1613. found = true;
  1614. break;
  1615. }
  1616. }
  1617. if (!found) {
  1618. pr_debug("There are no selected events with Intel Processor Trace data\n");
  1619. return 0;
  1620. }
  1621. memset(&attr, 0, sizeof(struct perf_event_attr));
  1622. attr.size = sizeof(struct perf_event_attr);
  1623. attr.type = PERF_TYPE_HARDWARE;
  1624. attr.sample_type = evsel->attr.sample_type & PERF_SAMPLE_MASK;
  1625. attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
  1626. PERF_SAMPLE_PERIOD;
  1627. if (pt->timeless_decoding)
  1628. attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
  1629. else
  1630. attr.sample_type |= PERF_SAMPLE_TIME;
  1631. if (!pt->per_cpu_mmaps)
  1632. attr.sample_type &= ~(u64)PERF_SAMPLE_CPU;
  1633. attr.exclude_user = evsel->attr.exclude_user;
  1634. attr.exclude_kernel = evsel->attr.exclude_kernel;
  1635. attr.exclude_hv = evsel->attr.exclude_hv;
  1636. attr.exclude_host = evsel->attr.exclude_host;
  1637. attr.exclude_guest = evsel->attr.exclude_guest;
  1638. attr.sample_id_all = evsel->attr.sample_id_all;
  1639. attr.read_format = evsel->attr.read_format;
  1640. id = evsel->id[0] + 1000000000;
  1641. if (!id)
  1642. id = 1;
  1643. if (pt->synth_opts.instructions) {
  1644. attr.config = PERF_COUNT_HW_INSTRUCTIONS;
  1645. if (pt->synth_opts.period_type == PERF_ITRACE_PERIOD_NANOSECS)
  1646. attr.sample_period =
  1647. intel_pt_ns_to_ticks(pt, pt->synth_opts.period);
  1648. else
  1649. attr.sample_period = pt->synth_opts.period;
  1650. pt->instructions_sample_period = attr.sample_period;
  1651. if (pt->synth_opts.callchain)
  1652. attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
  1653. if (pt->synth_opts.last_branch)
  1654. attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
  1655. pr_debug("Synthesizing 'instructions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
  1656. id, (u64)attr.sample_type);
  1657. err = intel_pt_synth_event(session, &attr, id);
  1658. if (err) {
  1659. pr_err("%s: failed to synthesize 'instructions' event type\n",
  1660. __func__);
  1661. return err;
  1662. }
  1663. pt->sample_instructions = true;
  1664. pt->instructions_sample_type = attr.sample_type;
  1665. pt->instructions_id = id;
  1666. id += 1;
  1667. }
  1668. if (pt->synth_opts.transactions) {
  1669. attr.config = PERF_COUNT_HW_INSTRUCTIONS;
  1670. attr.sample_period = 1;
  1671. if (pt->synth_opts.callchain)
  1672. attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
  1673. if (pt->synth_opts.last_branch)
  1674. attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
  1675. pr_debug("Synthesizing 'transactions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
  1676. id, (u64)attr.sample_type);
  1677. err = intel_pt_synth_event(session, &attr, id);
  1678. if (err) {
  1679. pr_err("%s: failed to synthesize 'transactions' event type\n",
  1680. __func__);
  1681. return err;
  1682. }
  1683. pt->sample_transactions = true;
  1684. pt->transactions_id = id;
  1685. id += 1;
  1686. evlist__for_each_entry(evlist, evsel) {
  1687. if (evsel->id && evsel->id[0] == pt->transactions_id) {
  1688. if (evsel->name)
  1689. zfree(&evsel->name);
  1690. evsel->name = strdup("transactions");
  1691. break;
  1692. }
  1693. }
  1694. }
  1695. if (pt->synth_opts.branches) {
  1696. attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;
  1697. attr.sample_period = 1;
  1698. attr.sample_type |= PERF_SAMPLE_ADDR;
  1699. attr.sample_type &= ~(u64)PERF_SAMPLE_CALLCHAIN;
  1700. attr.sample_type &= ~(u64)PERF_SAMPLE_BRANCH_STACK;
  1701. pr_debug("Synthesizing 'branches' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
  1702. id, (u64)attr.sample_type);
  1703. err = intel_pt_synth_event(session, &attr, id);
  1704. if (err) {
  1705. pr_err("%s: failed to synthesize 'branches' event type\n",
  1706. __func__);
  1707. return err;
  1708. }
  1709. pt->sample_branches = true;
  1710. pt->branches_sample_type = attr.sample_type;
  1711. pt->branches_id = id;
  1712. }
  1713. pt->synth_needs_swap = evsel->needs_swap;
  1714. return 0;
  1715. }
  1716. static struct perf_evsel *intel_pt_find_sched_switch(struct perf_evlist *evlist)
  1717. {
  1718. struct perf_evsel *evsel;
  1719. evlist__for_each_entry_reverse(evlist, evsel) {
  1720. const char *name = perf_evsel__name(evsel);
  1721. if (!strcmp(name, "sched:sched_switch"))
  1722. return evsel;
  1723. }
  1724. return NULL;
  1725. }
  1726. static bool intel_pt_find_switch(struct perf_evlist *evlist)
  1727. {
  1728. struct perf_evsel *evsel;
  1729. evlist__for_each_entry(evlist, evsel) {
  1730. if (evsel->attr.context_switch)
  1731. return true;
  1732. }
  1733. return false;
  1734. }
  1735. static int intel_pt_perf_config(const char *var, const char *value, void *data)
  1736. {
  1737. struct intel_pt *pt = data;
  1738. if (!strcmp(var, "intel-pt.mispred-all"))
  1739. pt->mispred_all = perf_config_bool(var, value);
  1740. return 0;
  1741. }
  1742. static const char * const intel_pt_info_fmts[] = {
  1743. [INTEL_PT_PMU_TYPE] = " PMU Type %"PRId64"\n",
  1744. [INTEL_PT_TIME_SHIFT] = " Time Shift %"PRIu64"\n",
  1745. [INTEL_PT_TIME_MULT] = " Time Muliplier %"PRIu64"\n",
  1746. [INTEL_PT_TIME_ZERO] = " Time Zero %"PRIu64"\n",
  1747. [INTEL_PT_CAP_USER_TIME_ZERO] = " Cap Time Zero %"PRId64"\n",
  1748. [INTEL_PT_TSC_BIT] = " TSC bit %#"PRIx64"\n",
  1749. [INTEL_PT_NORETCOMP_BIT] = " NoRETComp bit %#"PRIx64"\n",
  1750. [INTEL_PT_HAVE_SCHED_SWITCH] = " Have sched_switch %"PRId64"\n",
  1751. [INTEL_PT_SNAPSHOT_MODE] = " Snapshot mode %"PRId64"\n",
  1752. [INTEL_PT_PER_CPU_MMAPS] = " Per-cpu maps %"PRId64"\n",
  1753. [INTEL_PT_MTC_BIT] = " MTC bit %#"PRIx64"\n",
  1754. [INTEL_PT_TSC_CTC_N] = " TSC:CTC numerator %"PRIu64"\n",
  1755. [INTEL_PT_TSC_CTC_D] = " TSC:CTC denominator %"PRIu64"\n",
  1756. [INTEL_PT_CYC_BIT] = " CYC bit %#"PRIx64"\n",
  1757. [INTEL_PT_MAX_NONTURBO_RATIO] = " Max non-turbo ratio %"PRIu64"\n",
  1758. [INTEL_PT_FILTER_STR_LEN] = " Filter string len. %"PRIu64"\n",
  1759. };
  1760. static void intel_pt_print_info(u64 *arr, int start, int finish)
  1761. {
  1762. int i;
  1763. if (!dump_trace)
  1764. return;
  1765. for (i = start; i <= finish; i++)
  1766. fprintf(stdout, intel_pt_info_fmts[i], arr[i]);
  1767. }
  1768. static void intel_pt_print_info_str(const char *name, const char *str)
  1769. {
  1770. if (!dump_trace)
  1771. return;
  1772. fprintf(stdout, " %-20s%s\n", name, str ? str : "");
  1773. }
  1774. static bool intel_pt_has(struct auxtrace_info_event *auxtrace_info, int pos)
  1775. {
  1776. return auxtrace_info->header.size >=
  1777. sizeof(struct auxtrace_info_event) + (sizeof(u64) * (pos + 1));
  1778. }
  1779. int intel_pt_process_auxtrace_info(union perf_event *event,
  1780. struct perf_session *session)
  1781. {
  1782. struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info;
  1783. size_t min_sz = sizeof(u64) * INTEL_PT_PER_CPU_MMAPS;
  1784. struct intel_pt *pt;
  1785. void *info_end;
  1786. u64 *info;
  1787. int err;
  1788. if (auxtrace_info->header.size < sizeof(struct auxtrace_info_event) +
  1789. min_sz)
  1790. return -EINVAL;
  1791. pt = zalloc(sizeof(struct intel_pt));
  1792. if (!pt)
  1793. return -ENOMEM;
  1794. addr_filters__init(&pt->filts);
  1795. perf_config(intel_pt_perf_config, pt);
  1796. err = auxtrace_queues__init(&pt->queues);
  1797. if (err)
  1798. goto err_free;
  1799. intel_pt_log_set_name(INTEL_PT_PMU_NAME);
  1800. pt->session = session;
  1801. pt->machine = &session->machines.host; /* No kvm support */
  1802. pt->auxtrace_type = auxtrace_info->type;
  1803. pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE];
  1804. pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT];
  1805. pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT];
  1806. pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO];
  1807. pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO];
  1808. pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT];
  1809. pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT];
  1810. pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH];
  1811. pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE];
  1812. pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS];
  1813. intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_PMU_TYPE,
  1814. INTEL_PT_PER_CPU_MMAPS);
  1815. if (intel_pt_has(auxtrace_info, INTEL_PT_CYC_BIT)) {
  1816. pt->mtc_bit = auxtrace_info->priv[INTEL_PT_MTC_BIT];
  1817. pt->mtc_freq_bits = auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS];
  1818. pt->tsc_ctc_ratio_n = auxtrace_info->priv[INTEL_PT_TSC_CTC_N];
  1819. pt->tsc_ctc_ratio_d = auxtrace_info->priv[INTEL_PT_TSC_CTC_D];
  1820. pt->cyc_bit = auxtrace_info->priv[INTEL_PT_CYC_BIT];
  1821. intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_MTC_BIT,
  1822. INTEL_PT_CYC_BIT);
  1823. }
  1824. if (intel_pt_has(auxtrace_info, INTEL_PT_MAX_NONTURBO_RATIO)) {
  1825. pt->max_non_turbo_ratio =
  1826. auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO];
  1827. intel_pt_print_info(&auxtrace_info->priv[0],
  1828. INTEL_PT_MAX_NONTURBO_RATIO,
  1829. INTEL_PT_MAX_NONTURBO_RATIO);
  1830. }
  1831. info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
  1832. info_end = (void *)info + auxtrace_info->header.size;
  1833. if (intel_pt_has(auxtrace_info, INTEL_PT_FILTER_STR_LEN)) {
  1834. size_t len;
  1835. len = auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN];
  1836. intel_pt_print_info(&auxtrace_info->priv[0],
  1837. INTEL_PT_FILTER_STR_LEN,
  1838. INTEL_PT_FILTER_STR_LEN);
  1839. if (len) {
  1840. const char *filter = (const char *)info;
  1841. len = roundup(len + 1, 8);
  1842. info += len >> 3;
  1843. if ((void *)info > info_end) {
  1844. pr_err("%s: bad filter string length\n", __func__);
  1845. err = -EINVAL;
  1846. goto err_free_queues;
  1847. }
  1848. pt->filter = memdup(filter, len);
  1849. if (!pt->filter) {
  1850. err = -ENOMEM;
  1851. goto err_free_queues;
  1852. }
  1853. if (session->header.needs_swap)
  1854. mem_bswap_64(pt->filter, len);
  1855. if (pt->filter[len - 1]) {
  1856. pr_err("%s: filter string not null terminated\n", __func__);
  1857. err = -EINVAL;
  1858. goto err_free_queues;
  1859. }
  1860. err = addr_filters__parse_bare_filter(&pt->filts,
  1861. filter);
  1862. if (err)
  1863. goto err_free_queues;
  1864. }
  1865. intel_pt_print_info_str("Filter string", pt->filter);
  1866. }
  1867. pt->timeless_decoding = intel_pt_timeless_decoding(pt);
  1868. pt->have_tsc = intel_pt_have_tsc(pt);
  1869. pt->sampling_mode = false;
  1870. pt->est_tsc = !pt->timeless_decoding;
  1871. pt->unknown_thread = thread__new(999999999, 999999999);
  1872. if (!pt->unknown_thread) {
  1873. err = -ENOMEM;
  1874. goto err_free_queues;
  1875. }
  1876. /*
  1877. * Since this thread will not be kept in any rbtree not in a
  1878. * list, initialize its list node so that at thread__put() the
  1879. * current thread lifetime assuption is kept and we don't segfault
  1880. * at list_del_init().
  1881. */
  1882. INIT_LIST_HEAD(&pt->unknown_thread->node);
  1883. err = thread__set_comm(pt->unknown_thread, "unknown", 0);
  1884. if (err)
  1885. goto err_delete_thread;
  1886. if (thread__init_map_groups(pt->unknown_thread, pt->machine)) {
  1887. err = -ENOMEM;
  1888. goto err_delete_thread;
  1889. }
  1890. pt->auxtrace.process_event = intel_pt_process_event;
  1891. pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event;
  1892. pt->auxtrace.flush_events = intel_pt_flush;
  1893. pt->auxtrace.free_events = intel_pt_free_events;
  1894. pt->auxtrace.free = intel_pt_free;
  1895. session->auxtrace = &pt->auxtrace;
  1896. if (dump_trace)
  1897. return 0;
  1898. if (pt->have_sched_switch == 1) {
  1899. pt->switch_evsel = intel_pt_find_sched_switch(session->evlist);
  1900. if (!pt->switch_evsel) {
  1901. pr_err("%s: missing sched_switch event\n", __func__);
  1902. err = -EINVAL;
  1903. goto err_delete_thread;
  1904. }
  1905. } else if (pt->have_sched_switch == 2 &&
  1906. !intel_pt_find_switch(session->evlist)) {
  1907. pr_err("%s: missing context_switch attribute flag\n", __func__);
  1908. err = -EINVAL;
  1909. goto err_delete_thread;
  1910. }
  1911. if (session->itrace_synth_opts && session->itrace_synth_opts->set) {
  1912. pt->synth_opts = *session->itrace_synth_opts;
  1913. } else {
  1914. itrace_synth_opts__set_default(&pt->synth_opts);
  1915. if (use_browser != -1) {
  1916. pt->synth_opts.branches = false;
  1917. pt->synth_opts.callchain = true;
  1918. }
  1919. if (session->itrace_synth_opts)
  1920. pt->synth_opts.thread_stack =
  1921. session->itrace_synth_opts->thread_stack;
  1922. }
  1923. if (pt->synth_opts.log)
  1924. intel_pt_log_enable();
  1925. /* Maximum non-turbo ratio is TSC freq / 100 MHz */
  1926. if (pt->tc.time_mult) {
  1927. u64 tsc_freq = intel_pt_ns_to_ticks(pt, 1000000000);
  1928. if (!pt->max_non_turbo_ratio)
  1929. pt->max_non_turbo_ratio =
  1930. (tsc_freq + 50000000) / 100000000;
  1931. intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
  1932. intel_pt_log("Maximum non-turbo ratio %u\n",
  1933. pt->max_non_turbo_ratio);
  1934. }
  1935. if (pt->synth_opts.calls)
  1936. pt->branches_filter |= PERF_IP_FLAG_CALL | PERF_IP_FLAG_ASYNC |
  1937. PERF_IP_FLAG_TRACE_END;
  1938. if (pt->synth_opts.returns)
  1939. pt->branches_filter |= PERF_IP_FLAG_RETURN |
  1940. PERF_IP_FLAG_TRACE_BEGIN;
  1941. if (pt->synth_opts.callchain && !symbol_conf.use_callchain) {
  1942. symbol_conf.use_callchain = true;
  1943. if (callchain_register_param(&callchain_param) < 0) {
  1944. symbol_conf.use_callchain = false;
  1945. pt->synth_opts.callchain = false;
  1946. }
  1947. }
  1948. err = intel_pt_synth_events(pt, session);
  1949. if (err)
  1950. goto err_delete_thread;
  1951. err = auxtrace_queues__process_index(&pt->queues, session);
  1952. if (err)
  1953. goto err_delete_thread;
  1954. if (pt->queues.populated)
  1955. pt->data_queued = true;
  1956. if (pt->timeless_decoding)
  1957. pr_debug2("Intel PT decoding without timestamps\n");
  1958. return 0;
  1959. err_delete_thread:
  1960. thread__zput(pt->unknown_thread);
  1961. err_free_queues:
  1962. intel_pt_log_disable();
  1963. auxtrace_queues__free(&pt->queues);
  1964. session->auxtrace = NULL;
  1965. err_free:
  1966. addr_filters__exit(&pt->filts);
  1967. zfree(&pt->filter);
  1968. free(pt);
  1969. return err;
  1970. }